CN113840453A - Mainboard structure of switch - Google Patents

Mainboard structure of switch Download PDF

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Publication number
CN113840453A
CN113840453A CN202111141477.8A CN202111141477A CN113840453A CN 113840453 A CN113840453 A CN 113840453A CN 202111141477 A CN202111141477 A CN 202111141477A CN 113840453 A CN113840453 A CN 113840453A
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CN
China
Prior art keywords
edge
switch
shaped
circular arc
sets
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Pending
Application number
CN202111141477.8A
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Chinese (zh)
Inventor
舒伟峰
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Hangzhou Clounix Technology Ltd
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Hangzhou Clounix Technology Ltd
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Priority to CN202111141477.8A priority Critical patent/CN113840453A/en
Publication of CN113840453A publication Critical patent/CN113840453A/en
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/117Pads along the edge of rigid circuit boards, e.g. for pluggable connectors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0002Apparatus or processes for manufacturing printed circuits for manufacturing artworks for printed circuits

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

The invention protects a mainboard structure of a switch, the mainboard structure comprises: a main panel; a main chip disposed on the main panel, the main chip having a plurality of pins; and a plurality of sets of ports disposed at an outer edge of the main panel; the pins and the port groups are connected in a one-to-one correspondence mode through respective transmission routing wires, the main panel forms an irregular-shaped wiring area to limit the outer edge, and the port groups are arranged along the outer edge. According to the mainboard structure of the switch, the routing length on the PCB can be effectively reduced, the loss is reduced to the minimum, the lower system cost and the system complexity are realized, the higher performance and the noise margin are achieved, and the system design of the switch is improved.

Description

Mainboard structure of switch
Technical Field
The invention relates to the technical field of switches, in particular to a mainboard structure of a switch.
Background
With the increase of the ethernet rate, the frequency of the transmission signal is higher and higher, and the loss in the medium is also higher and higher, so that the internet cost of the whole system is increased sharply. The medium for transmitting signals is usually DAC (directataccable) high-speed cable, ace (active electric cable), multimode fiber, single-mode fiber, etc., wherein DAC is the cheapest and the most used. However, as the rate increases, it becomes more and more difficult to support 3m DACCable, and the latest IEEE802.3 has reduced the DAC Cable supported by the 112G standard from 3m to 2 m. Therefore, the traditional method for using 2-3 m DAC cable in a large amount in a data center, a core switching network and an enterprise network cannot support upgrading to a higher speed in the future. Statistically, 2-3 m of Cable accounts for about 40% of all DAC cables, so migrating them to more costly AECs or fibers (about several to tens of times the cost of DAC cables) can dramatically increase the cost of wiring. In addition, another side effect brought by the AEC and the optical fiber is that the system power consumption is greatly increased, which is a huge burden for the data center which is already in the future in terms of power consumption.
Therefore, the novel solutions are used, so that the loss on the exchange link is smaller, and the longer DAC cable can be supported, and the method has great economic value and practical significance.
The conventional main board layout of the switch is shown in fig. 1, and the panel ports of the switch are placed at the edge of the main board, which is generally 32 ports. If a 2-layer or 4-layer structure is used, the number of ports may be increased to 64 or 128.
The main exchange chip is usually put at the position 1 ~ 2 cun of back distance of front panel port, and in general design, main exchange chip and panel pass through mainboard PCB and walk the line connection, because neotype switch need support more and more ports, consequently need usually with most pin with the panel port be connected. The connection diagram is as follows, and generally, the middle port, such as the 13-20 positions, is nearest, so the routing is shortest, generally about 2-3 inches. The longest is the port on both sides, such as 1-4 and 29-32 in the figure, which is the farthest, and the length is also the longest, generally exceeding 8 inches, and reaching 10 inches or even more than 12 inches (the specific length is related to the size of the chip).
Because the PCB routing loss on the motherboard is large, even with the best materials, the loss per inch reaches over 0.5dB for signals with frequency >13.5GHz, and the loss per inch reaches over 1dB for signals with frequency >26.5 GHz. As the speed of the switch is higher, the interface frequency is higher, from 1G, 10G, 25G, 40G, 56G, to the present 112G and even the later 200G, 400G, the frequency is higher, and therefore the loss of the PCB per inch is increased proportionally.
On the other hand, due to the limitations of power consumption and cost, the total loss supported by a typical link is very limited, typically around 30dB, and up to 40dB, where the loss allocated to the main board of the switch is also around 5-10 dB.
In addition, to support lower cost DAC cables, the loss left to the switch board is further reduced, on the order of about 5 dB. This means that approximately half of the ports of the switch cannot support or only marginally support low cost cables. If it has to be supported, it needs to add a driver chip before the port with trace >5inch, which adds a lot to the cost of the switch.
Therefore, it is necessary to effectively reduce the wiring length on the main board of the switch to reduce the link loss and the cost of the switch.
Disclosure of Invention
The present invention provides a main board structure of a switch, which comprises:
a main panel;
a main chip disposed on the main panel, the main chip having a plurality of pins; and
a plurality of sets of ports disposed at an outer edge of the main panel;
the pins and the port groups are connected in a one-to-one correspondence mode through respective transmission routing wires, the main panel forms an irregular-shaped wiring area to limit the outer edge, and the port groups are arranged along the outer edge.
Preferably, at least two of the plurality of transmission traces cross-interfere.
Preferably, the length of the transmission trace is smaller than a preset size.
Preferably, the irregular-shaped wiring area has an outer contour in a shape of a wedge, a trapezoid, a polygon or an arc, and the plurality of port groups are arranged along the outer contour.
Preferably, the outer contour of the irregularly shaped termination region is wedge-shaped and includes a first extending edge and a second extending edge, a first included angle a formed by the first extending edge and the second extending edge being selected in the range of 120 DEG a to 160 deg.
Preferably, at least two sets of said sets of ports are arranged along said first and/or second extending edges.
Preferably, the outer contour of the irregular-shaped termination region is polygonal and includes at least three extending sides for arranging a plurality of sets of the port sets.
Preferably, the outer contour of the irregular-shaped wiring area is arc-shaped and comprises a first arc edge, an arc transition edge connected with the first arc edge and a second arc edge connected with the arc transition edge, and the first arc edge and the second arc edge are symmetrical about the arc transition edge.
Preferably, the extension direction of the length of the main chip is arranged to cross the outer edge of the main panel.
Preferably, each of said sets of ports comprises at least four ports arranged in parallel.
Drawings
A more complete appreciation of the present disclosure and many of the attendant advantages thereof will be readily obtained as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings.
Fig. 1 is a schematic diagram of a panel structure of a switch in the prior art.
Fig. 2 is a schematic diagram of a main board structure of a switch according to a first embodiment of the present invention.
Fig. 3 is a schematic diagram of a motherboard structure of a switch according to a second embodiment of the present invention.
Fig. 4 is a schematic diagram of a main board structure of a switch according to a third embodiment of the present invention.
Fig. 5 is a schematic diagram of a main board structure of a switch according to a fourth embodiment of the present invention.
Fig. 6 and 7 are diagrams comparing the main board structure of the switch according to the first embodiment of the present invention with the main board structure of the switch of the related art.
Detailed Description
Embodiments will now be described with reference to the drawings, wherein like reference numerals designate corresponding or identical elements in the various drawings.
First embodiment
As shown in fig. 2, the main board structure 100 of the switch of the present embodiment includes: the main panel 110, the main chip 120 disposed on the main panel 110, and the plurality of port groups 130 disposed at the outer edge of the main panel 110, wherein the main chip 120 has a plurality of pins, and the plurality of pins and the plurality of port groups 130 are connected in a one-to-one correspondence through respective transmission traces, the main panel 110 forms an irregular-shaped wiring region to define the outer edge, and the plurality of port groups 130 are disposed along the outer edge.
Specifically, as shown in fig. 2, the main chip 120 has eight pins, pin 1, pin 2, pin 3, pin 4, pin 5, pin 6, pin 7, and pin 8, respectively. The outer edge of the main panel 110 is arranged with 32 ports, wherein each four ports are in one group for eight groups of ports.
Preferably, the extension direction of the length of the main chip 120 is arranged to cross the outer edge of the main panel 110. Of course, the extending direction of the width of the main chip 120 may intersect with the outer edge of the main panel 110. It is understood that, as seen in fig. 2, an extension line of any one edge of the main chip 120 necessarily crosses an extension line of an outer edge of the main panel 110. This is because the main chip 120 is rotated by 45 degrees compared to the prior art. Of course, in other embodiments, 30 degrees, 60 degrees, etc. may be rotated. This is arranged to shorten the track length as much as possible.
Also, in the present embodiment, the outer contour of the irregularly shaped wire connection region is wedge-shaped. It is also understood that the wedge-shaped outer profile is substantially v-shaped. The connection area can be understood as at least an area through which transmission traces pass. Eight sets of ports 130 are arranged along the wedge-shaped outer profile. Specifically, pin 1 is connected to port groups numbered 13-16 through transmission traces, pin 2 is connected to port groups numbered 17-20 through transmission traces, pin 3 is connected to port groups numbered 5-8 through transmission traces, pin 4 is connected to port groups numbered 25-28 through transmission traces, pin 5 is connected to port groups numbered 1-4 through transmission traces, pin 6 is connected to port groups numbered 29-32 through transmission traces, pin 7 is connected to port groups numbered 9-12 through transmission traces, and pin 8 is connected to port groups numbered 21-24 through transmission traces.
It should be understood that the arrangement of the transmission traces between the port group 130 and the main chip 120 is not limited to the embodiment shown, and the purpose is to make the lengths of the traces as short as possible, and each trace is as long as possible, so that the loss problem can be effectively solved without increasing the complexity of the system.
In some preferred embodiments, at least two of the plurality of transmission traces cross-interfere. In the present embodiment, as shown in fig. 2, there are 6 transmission lines that cross-interfere with each other.
Also, for example, the transmission traces between pin 8 and port groups numbered 21-24 are smaller than a predetermined size. The preset size can be set as required, for example, the preset size can be less than or equal to 8 inches, that is, the longest transmission trace needs to be set to be less than or equal to 8 inches. And preferably the shortest transmission trace needs to be set to less than or equal to 2 inches.
More specifically, the wedge-shaped outer contour of the irregularly shaped land may include a first extending edge and a second extending edge, and the first angle a formed by the first extending edge 111 and the second extending edge 112 is selected in the range of 120. ltoreq. a.ltoreq.160. In the present embodiment, the first included angle a is 120 °.
Also, four sets of ports are provided at the first extension side 111; symmetrically, four sets of ports are also provided at the second extending edge 112.
According to the mainboard structure of the switch in the embodiment, the wiring length on the PCB can be effectively reduced, the total wiring length can be reduced by 30% -50%, and the loss is reduced to the minimum, so that the lower system cost and the system complexity are realized, the higher performance and the noise margin are achieved, and the system design of the switch is improved.
And as shown in fig. 6 and 7 in particular, the wedge-shaped outer profile also enables a reduction in the external wiring length compared to a conventional square outer profile, which is quadrangular.
Second embodiment
A main board structure 200 of a switch according to the second embodiment will be described below with reference to fig. 3. The motherboard structure 200 of the switch has the same structure and/or configuration as the motherboard structure 100, except for the shape of the routing area of the main panel 210. Accordingly, elements having substantially the same function as elements in the first embodiment will be numbered the same and will not be described and/or illustrated in detail herein for the sake of brevity.
As shown in fig. 3, the irregular-shaped termination area of the main panel 210 has a trapezoidal outer contour. In particular, the trapezoidal outer profile increases an intermediate straight edge 213 for transitioning the first and second extending edges 211, 212 compared to the wedge-shaped outer profile of the first embodiment. That is, the first extended side 211, the intermediate straight side 213, and the second extended side 212 are sequentially connected. Therefore, multiple sets of port groups 230 may be adaptively set on each edge as needed.
Third embodiment
A main board structure 300 of a switch according to the third embodiment will be described below with reference to fig. 4. The motherboard structure 300 of the switch has the same structure and/or construction as the motherboard structure 100, except for the shape of the routing area of the main panel 310. Accordingly, elements having substantially the same function as elements in the first embodiment will be numbered the same and will not be described and/or illustrated in detail herein for the sake of brevity.
As shown in fig. 4, the irregular-shaped termination area of the main panel 310 has a polygonal outer contour and includes at least three extending sides for arranging the plurality of port sets 330. It will also be understood that trapezoidal outlines with three extending sides also belong to polygonal outlines.
In particular, in the present embodiment, the polygonal outer contour comprises 7 extended sides, which in particular may each be a rectilinear extended side. And the length of the middle extension edge can be larger than that of the extension edges symmetrically arranged at two sides. Also, a plurality of port groups may be sequentially arranged along the extension side.
Fourth embodiment
A main board structure 400 of a switch according to the fourth embodiment will be described below with reference to fig. 5. The motherboard structure 400 of the switch has the same structure and/or configuration as the motherboard structure 100, except for the shape of the routing area of the main panel 410. Accordingly, elements having substantially the same function as elements in the first embodiment will be numbered the same and will not be described and/or illustrated in detail herein for the sake of brevity.
As shown in fig. 5, the irregular-shaped wire connection region of the main panel 410 has an outer contour in the shape of a circular arc. Specifically, a first arc edge 411, an arc transition edge 413 connected to the first arc edge 411, and a second arc edge 412 connected to the arc transition edge 413 may be included, and the first arc edge 411 and the second arc edge 412 are symmetrical with respect to the arc transition edge 413.
In this application, the term "comprises/comprising" and its derivatives, as used herein, are intended to be open ended terms that specify the presence of the stated features, elements, components, groups, integers, and/or steps, but do not exclude the presence of other unstated features, elements, components, groups, integers and/or steps. This concept also applies to words having similar meanings such as the terms, "having", "including" and their derivatives.
When used in the singular, the terms "member," "section," "portion," "section," "element," "body" and "structure" can have the dual meaning of a single part or a plurality of parts.
The ordinal numbers such as "first," "second," etc., are used herein for identification only and do not have any other meaning, such as a particular sequence. Further, for example, the term "first element" does not itself imply the presence of "second element," nor does the term "second element" itself imply the presence of "first element.
As used herein, the term "pair" may encompass a configuration in which a pair of elements has a shape or structure different from each other, in addition to a configuration in which the pair of elements has the same shape or structure as each other.
The terms "a" (or "an"), "one or more" and "at least one" are used interchangeably herein.
The phrase "at least one" as used in this disclosure refers to "one or more" that is desired to be selected. For example, the phrase "at least one of" as used in this disclosure means "only one single choice" or "both of two choices" if the number of choices is two. Other examples, the phrase "at least one of" as used in this disclosure means "only one single choice" or "any combination of equal or more than two choices" if the number of choices is equal to or more than three. For example, the phrase "at least one of a and B" includes (1) a alone, (2) B alone. And (3) both A and B. The phrase "at least one of A, B and C" includes all of (1) a alone, (2) B alone, (3) C alone, (4) a and B, (5) B and C, (6) a and C, and (7) A, B and C. In other words, the phrase "at least one of a and B" does not mean "at least one of a and at least one of B" in the present disclosure.
Finally, terms of degree such as "substantially", "about", "approximately" and "approximately" as used herein mean a reasonable amount of deviation of the modified term such that the end result is not significantly changed. All numerical values described in this application are to be construed as including terms such as "substantially", "about" and "approximately".
Obviously, many modifications and variations of the present invention are possible in light of the above teachings. It is, therefore, to be understood that within the scope of the appended claims, the invention may be practiced otherwise than as specifically described herein.

Claims (10)

1. A motherboard structure of a switch, said motherboard structure comprising:
a main panel;
a main chip disposed on the main panel, the main chip having a plurality of pins; and
a plurality of sets of ports disposed at an outer edge of the main panel;
the pins and the port groups are connected in a one-to-one correspondence mode through respective transmission routing wires, the main panel forms an irregular-shaped wiring area to limit the outer edge, and the port groups are arranged along the outer edge.
2. The motherboard structure of a switch according to claim 1, wherein at least two of said plurality of transmission traces interfere with each other in a cross-wise manner.
3. The motherboard structure of a switch of claim 1, wherein the length of the transmission trace is less than a predetermined dimension.
4. The motherboard structure of a switch according to claim 1, wherein an outer contour of said irregularly shaped termination region is wedge-shaped, trapezoid-shaped, polygonal-shaped, or circular arc-shaped, and a plurality of sets of said port groups are arranged along said outer contour.
5. The motherboard structure of a switch according to claim 4, characterized in that said outer contour of said irregularly shaped termination area is wedge-shaped and comprises a first extended side and a second extended side, said first extended side forming a first angle a with said second extended side selected in the range of 120 ° ≦ a ≦ 160 °.
6. The motherboard structure of a switch according to claim 5, characterized in that at least two sets of said port groups are arranged along said first extended edge and/or said second extended edge.
7. The motherboard structure of a switch as recited in claim 4, wherein the outer contour of the irregularly-shaped termination region is polygonal and includes at least three extended sides for arranging a plurality of sets of the port sets.
8. The main board structure of the switch according to claim 4, wherein the outer contour of the irregularly-shaped wiring region is in a circular arc shape and includes a first circular arc edge, a circular arc transition edge connected to the first circular arc edge, and a second circular arc edge connected to the circular arc transition edge, the first circular arc edge and the second circular arc edge being symmetrical with respect to the circular arc transition edge.
9. The motherboard structure of a switch according to claim 1, wherein the extension direction of the length of said main chip is arranged to intersect with said outer edge of said main board.
10. The motherboard structure of a switch according to claim 1, wherein each of said sets of ports comprises at least four ports arranged in parallel.
CN202111141477.8A 2021-09-28 2021-09-28 Mainboard structure of switch Pending CN113840453A (en)

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Application Number Priority Date Filing Date Title
CN202111141477.8A CN113840453A (en) 2021-09-28 2021-09-28 Mainboard structure of switch

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Application Number Priority Date Filing Date Title
CN202111141477.8A CN113840453A (en) 2021-09-28 2021-09-28 Mainboard structure of switch

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110149539A1 (en) * 2009-12-23 2011-06-23 Sun Microsystems, Inc. Base plate for use in a multi-chip module
CN107005493A (en) * 2014-12-23 2017-08-01 英特尔公司 Reduce the trace length and insertion loss of high speed signal on network switch plate
US9794195B1 (en) * 2015-06-26 2017-10-17 Amazon Technologies, Inc. Communication device with receded ports
CN108183872A (en) * 2017-12-27 2018-06-19 曙光信息产业(北京)有限公司 Switch system and its construction method
CN109792412A (en) * 2016-09-30 2019-05-21 脸谱公司 It is configured with the network switch of optical interface or electric interfaces
US20190245751A1 (en) * 2018-02-05 2019-08-08 David I-Keong Wong Network interconnect as a switch

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110149539A1 (en) * 2009-12-23 2011-06-23 Sun Microsystems, Inc. Base plate for use in a multi-chip module
CN107005493A (en) * 2014-12-23 2017-08-01 英特尔公司 Reduce the trace length and insertion loss of high speed signal on network switch plate
US9794195B1 (en) * 2015-06-26 2017-10-17 Amazon Technologies, Inc. Communication device with receded ports
CN109792412A (en) * 2016-09-30 2019-05-21 脸谱公司 It is configured with the network switch of optical interface or electric interfaces
CN108183872A (en) * 2017-12-27 2018-06-19 曙光信息产业(北京)有限公司 Switch system and its construction method
US20190245751A1 (en) * 2018-02-05 2019-08-08 David I-Keong Wong Network interconnect as a switch

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Application publication date: 20211224