CN113839723B - DEVM test platform and method for Wi-Fi6 chip - Google Patents

DEVM test platform and method for Wi-Fi6 chip Download PDF

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CN113839723B
CN113839723B CN202111419467.6A CN202111419467A CN113839723B CN 113839723 B CN113839723 B CN 113839723B CN 202111419467 A CN202111419467 A CN 202111419467A CN 113839723 B CN113839723 B CN 113839723B
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devm
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CN113839723A (en
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刘鹏
郭嘉帅
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Shenzhen Volans Technology Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/10Monitoring; Testing of transmitters
    • H04B17/15Performance testing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/20Monitoring; Testing of receivers
    • H04B17/29Performance testing

Abstract

The invention provides a DEVM test platform of a Wi-Fi6 chip, wherein a function signal generator respectively provides trigger signals for a vector signal generator, a frequency spectrograph and a power meter, and also provides an enabling signal for the chip to be tested; the vector signal generator is used for providing a pulse modulation signal for the chip to be tested; the power supply is used for supplying power to the chip to be tested; the input end of the directional coupler is used for connecting a chip to be tested, the coupling end is connected to the power meter, and the straight-through end is connected to the input end of the frequency spectrograph; and the computer respectively controls the function signal generator, the vector signal generator, the frequency spectrograph, the power meter and the power supply to work so as to realize the DEVM performance test of the chip to be tested. The invention also provides a DEVM testing method of the Wi-Fi6 chip. Compared with the related technology, the test platform and the test method have the advantages of high efficiency and precision and low cost.

Description

DEVM test platform and method for Wi-Fi6 chip
Technical Field
The invention relates to the technical field of performance test platforms of power devices, in particular to a DEVM test platform and a DEVM test method using a Wi-Fi6 chip.
Background
Wi-Fi6 (IEEE 802.11. ax), a sixth generation wireless networking technology, is the name of the Wi-Fi standard, a wireless local area networking technology that the Wi-Fi alliance has created in the IEEE 802.11 standard. Wi-Fi6 will allow communication with up to 8 devices, up to 9.6 Gbps. The Wi-Fi standard employs DEVM to describe the modulation accuracy of a transmitted signal.
Error Vector Magnitude (EVM) is the Vector difference between the actual transmitted signal and the ideal Error-free reference signal at a given time, and can comprehensively measure the amplitude Error and phase Error of the modulated signal. Generally defined as the ratio of the root mean square value of the error vector signal mean power to the root mean square value of the ideal signal mean power, expressed as a percentage, the smaller the EVM, the better the signal quality.
DEVM (Delta EVM), dynamic EVM, is more difficult to test. As shown in fig. 1, the power supply Vcc of the power amplifier, the enable Signal PA _ EN, the radio frequency input Signal RF Signal are not continuous but have respective duty cycles. Before the RF Signal is input, PA _ EN is set high, and Vcc is firstly opened; accordingly, RF Signal is turned off first, PA _ EN is set low again, and finally Vcc is turned off.
The conventional power transmitting device test platform can only perform static test, that is, a power supply, an enable signal and a radio frequency input signal are always on, while for Wi-Fi, the signal is transmitted and received in an FEM (radio frequency front end module), so that the test platform is dynamic test, and the conventional test platform cannot meet the Dynamic Error Vector Magnitude (DEVM) test of a Wi-Fi6 chip. In addition, the traditional test platform needs manual control, the test efficiency is low, and the precision is difficult to guarantee.
Therefore, there is a need to provide a new DEVM testing platform and testing method for Wi-Fi6 chips to solve the above problems.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a DEVM test platform and a DEVM test method of a Wi-Fi6 chip, which have high DEVM performance test efficiency and precision and low cost.
In order to solve the above technical problem, an embodiment of the present invention provides a DEVM testing platform of a Wi-Fi6 chip, including: the system comprises a function signal generator, a vector signal generator, a power supply, a power meter, a directional coupler, a frequency spectrograph and a computer;
the input end of the function signal generator is connected with the computer, and the output end of the function signal generator is respectively connected to the vector signal generator, the frequency spectrograph and the power meter, and is used for providing trigger signals for the vector signal generator, the frequency spectrograph and the power meter and also used for providing an enabling signal for a chip to be tested;
the input end of the vector signal generator is also connected to the computer, and the output end of the vector signal generator is used for being connected to the input end of the chip to be tested and providing a pulse modulation signal for the chip to be tested;
one end of the power supply is connected with the computer, and the other end of the power supply is used for being connected to the chip to be tested and supplying power to the chip to be tested;
the power meter is connected with the computer;
the frequency spectrograph is connected with the computer;
the input end of the directional coupler is used for connecting the output end of the chip to be tested, the coupling end of the directional coupler is connected to the power meter, and the through end of the directional coupler is connected to the input end of the frequency spectrograph;
the computer is used for respectively controlling the function signal generator, the vector signal generator, the frequency spectrograph, the power meter and the power supply to work so as to realize the DEVM performance test of the chip to be tested.
Preferably, the computer is connected to the function signal generator, the vector signal generator, the frequency spectrograph, the power meter and the power supply through a universal interface bus.
Preferably, the model of the function signal generator is 33220A, the model of the vector signal generator is N5182B, the model of the power supply is 66319D, the model of the power meter is ROHDE & SCHWARZ NRP, the model of the directional coupler is C-058-20, and the model of the spectrometer is N9020B.
The embodiment of the invention also provides a DEVM test method of the Wi-Fi6 chip, which is realized on the basis of the test platform, wherein the input end of the chip to be tested is respectively connected to the output end of the vector signal generator, the output end of the function signal generator and the power supply, and the output end of the chip to be tested is connected to the input end of the directional coupler; the test method comprises the following steps:
and step S1, carrying out initialization calibration on the test platform, and measuring initial values of all devices in the test platform and cables connected with the devices in a straight-through manner through the computer to obtain test data of the test platform.
And step S2, setting the voltage value of the power supply, the parameters of the function signal generator, the test environment temperature, the working frequency and the modulation mode through the computer so as to meet the test requirements.
And step S3, starting a measuring program through the computer to obtain total test data.
And step S4, subtracting the self test data from the total test data by the computer to obtain the test data of the chip to be tested.
Preferably, the step S3 specifically includes the following sub-steps:
and step S31, controlling the power supply to supply power to the chip to be tested through the computer.
And step S32, controlling the function signal generator to generate the trigger signal and the enable signal through the computer, wherein the enable signal is used for driving the chip to be tested to work.
And step S33, controlling the vector signal generator to generate a pulse modulation signal according to the trigger signal through the computer to be used as a radio frequency input signal of the chip to be tested.
And step S34, reading the data of the directional coupler, the spectrometer and the power meter by the computer to obtain the total test data.
Preferably, in step S2, the voltage value of the power supply is 3.4V, the test environment temperature is 25 ℃, the operating frequency is 5.15 to 5.85GHz, and the modulation mode is
Figure DEST_PATH_IMAGE001
Preferably, in step S2, the parameters of the function signal generator include an enable signal, a frequency and a power of a trigger signal, and a duty ratio, and the enable signal is set at a high level to trigger the chip to be tested to operate, the frequency of the trigger signal is 5.15 to 5.85GHz, the power of the trigger signal is-30 to 10dBm, and the duty ratio is 50%.
Preferably, the self test data, the total test data and the test data of the chip to be tested all include current, gain, output power and DEVM.
Compared with the related art, the DEVM test platform and the DEVM test method of the Wi-Fi6 chip are not only suitable for DEVM performance test of a Wi-Fi6 chip, but also suitable for DEVM performance test of all power devices; in the test platform and the test method, the automatic test control of a hardware measuring instrument and a computer is effectively combined, and manual operation is not needed during test, so that the test efficiency and precision are effectively improved; in addition, the hardware measuring instruments used in the test platform of the invention all belong to laboratory conventional test instruments, and the hardware measuring instruments are combined according to the structure of the invention, thereby effectively reducing the production test cost.
Drawings
The present invention will be described in detail below with reference to the accompanying drawings. The foregoing and other aspects of the invention will become more apparent and more readily appreciated from the following detailed description, taken in conjunction with the accompanying drawings. In the drawings:
FIG. 1 is a block diagram of a DEVM test platform of a Wi-Fi6 chip according to an embodiment of the present invention;
FIG. 2 is a block flow diagram of a method for DEVM testing of Wi-Fi6 chips according to an embodiment of the present invention;
FIG. 3 is a timing diagram of the DEVM testing method of Wi-Fi6 chips according to an embodiment of the present invention.
Detailed Description
The following detailed description of embodiments of the invention refers to the accompanying drawings.
The embodiments/examples described herein are specific embodiments of the present invention, are intended to be illustrative of the concepts of the present invention, are intended to be illustrative and exemplary, and should not be construed as limiting the embodiments and scope of the invention. In addition to the embodiments described herein, those skilled in the art will be able to employ other technical solutions which are obvious based on the disclosure of the claims and the specification of the present application, and these technical solutions include those which make any obvious replacement or modification of the embodiments described herein, and all of which are within the scope of the present invention.
The following description of the embodiments refers to the accompanying drawings for illustrating the specific embodiments in which the invention may be practiced. Directional phrases used herein, such as, for example, upper, lower, front, rear, left, right, inner, outer, lateral, and the like, refer only to the orientation of the appended drawings. Accordingly, the directional terms used are used for explanation and understanding of the present invention, and are not used for limiting the present invention.
FIG. 1 is a schematic diagram of a DEVM test platform with Wi-Fi6 chips according to an embodiment of the present invention, wherein a chip to be tested is mounted thereon. The DEVM test platform 100 of the Wi-Fi6 chip comprises: function signal generator 1, vector signal generator 2, power supply 3, power meter 4, directional coupler 5, spectrometer 6 and computer 7.
The input end of the function signal generator 1 is connected with the computer 7, and the output end of the function signal generator 1 is respectively connected to the vector signal generator 2, the frequency spectrograph 6 and the power meter 4, and is used for providing a trigger signal for the vector signal generator 2, the frequency spectrograph 6 and the power meter 4, and also used for providing an enable signal PA _ EN for a chip 8 to be tested;
the input end of the vector signal generator 2 is further connected to the computer 7, and the output end of the vector signal generator 2 is used for being connected to the input end of the chip 8 to be tested and providing a pulse modulation signal for the chip 8 to be tested. The pulse modulation signal is a radio frequency input signal for the chip 8 to be tested, which is generated by the vector signal generator 2 according to the trigger signal generated by the function signal generator 1.
One end of the power supply 3 is connected with the computer, and the other end of the power supply 3 is used for being connected to the chip 8 to be tested and supplying power to the chip to be tested.
The power meter 4 is connected with the computer 7, and the frequency spectrograph 6 is connected with the computer 7.
The input end of the directional coupler 5 is used for connecting the output end of the chip 8 to be tested, the coupling end of the directional coupler 5 is connected to the power meter 4, and the through end of the directional coupler 5 is connected to the input end of the frequency spectrograph 6.
The computer 7 is configured to control the function signal generator 1, the vector signal generator 2, the spectrometer 6, the power meter 4, and the power supply 3 to operate respectively to implement a DEVM performance test on the chip 8 to be tested.
In this embodiment, the computer 7 is connected to the function signal generator 1, the vector signal generator 2, the spectrometer 6, the power meter 4, and the power supply 3 through a universal interface bus.
It should be noted that all hardware measurement instruments used in the DEVM test platform 100 of the Wi-Fi6 chip of the present invention belong to laboratory conventional test instruments, and the hardware measurement instruments are combined according to the structure of the present invention, so that the production test cost is effectively reduced.
Specifically, the model of the function signal generator 1 is 33220A, the model of the vector signal generator is N5182B, the model of the power supply is 66319D, the model of the power meter is ROHDE & SCHWARZ NRP, the model of the directional coupler 5 is C-058-20, the model of the spectrometer is N9020B, and the model of the computer 7 is: any computer may be used.
The DEVM test platform 100 of the Wi-Fi6 chip is not only suitable for DEVM performance test of a Wi-Fi6 chip, but also suitable for DEVM performance test of all power devices, and the test platform effectively combines a function signal generator 1, a vector signal generator 2, a power supply 3, a power meter 4, a directional coupler 5, a frequency spectrograph 6 and other hardware measurement instruments, and combines a computer 7 to realize automatic test control of each hardware measurement instrument, and does not need to be operated manually during test, so that the test efficiency and precision are effectively improved.
The embodiment of the present invention further provides a DEVM testing method for a Wi-Fi6 chip, where the testing method is implemented based on the DEVM testing platform 100 for the Wi-Fi6 chip provided by the present invention, and is shown in fig. 1-3, where fig. 2 is a flow chart of the DEVM testing method for a Wi-Fi6 chip according to the embodiment of the present invention; FIG. 3 is a timing diagram of the DEVM testing method of Wi-Fi6 chips according to an embodiment of the present invention.
And respectively connecting the input end of a chip 8 to be tested to the output end of the vector signal generator 2, the output end of the function signal generator 1 and the power supply 3, and connecting the output end of the chip 8 to be tested to the input end of the directional coupler 5. The test method comprises the following steps:
step S1, performing initialization calibration on the test platform, and measuring initial values of each device in the test platform and a cable connected to each device when the cable is through by the computer 7 to obtain test data of the test platform itself.
During measurement, firstly, each hardware measuring instrument and each cable in the test platform are initially measured to obtain test data of the test platform, then the chip 8 to be tested is tested to obtain total test data, and finally the influence of the hardware measuring instruments and the cables on the relevant test quantity of the chip 8 to be tested is subtracted from the total test data to obtain the test data of the chip 8 to be tested, so that the accuracy of the test result of the chip 8 to be tested is ensured.
Step S2, setting the voltage Vcc of the power supply 3, the parameters of the function signal generator 1, the test environment temperature, the operating frequency, and the modulation scheme by the computer 7 to meet the test requirements.
In this embodiment, the voltage value of the power supply 3 is 3.4V, the test environment temperature is 25 ℃, the operating frequency is 5.15 to 5.85GHz, and the modulation mode is
Figure DEST_PATH_IMAGE002
The parameters of the function signal generator 1 comprise an enable signal PA _ EN, the frequency and power of a trigger signal and a duty ratio, specifically setting the enable signal PA _ EN to trigger the chip 8 to be tested to work when the enable signal PA _ EN is arranged at a high level, the frequency of the trigger signal is 5.15-5.85 GHz, and the power of the trigger signal is
Figure DEST_PATH_IMAGE003
The duty cycle is 50%.
The function signal generator 1 may generate a periodic enable signal
Figure DEST_PATH_IMAGE004
And a square wave signal (trigger signal) for controlling the on and off states of the rf input signal to the device under test, and a duty cycle (duty cycle) is generally set to 50%.
The test environment temperature and the working frequency are selected and set according to different test requirements, and different modulation modes are different test standards.
It should be noted that, after the frequency and power of the trigger signal of the function signal generator 1 are set, the frequency and power of the pulse modulation signal (i.e., the rf input signal) generated by the vector signal generator 2 according to the trigger signal are also in phase.
The setting of each parameter in this step is specifically set in conjunction with the switching timing chart shown in fig. 3. It can be selected as a fixed setting mode in the computer or can be set manually before each test.
Step S3, the computer 7 starts the measurement program to obtain the total test data.
In the step, when the measurement works, the power supply 3 is firstly used for supplying power, then the chip 8 to be measured is started, and finally the radio frequency input signal is provided; when the power supply is closed, the radio frequency input signal is firstly cut off, then the chip 8 to be tested is closed, and finally the power supply 3 is turned off. That is, the setting sequence is implemented according to the timing diagram shown in fig. 3, i.e., according to the supply voltage VCCEnable signal
Figure 28164DEST_PATH_IMAGE004
Setting the timing diagram of the RF input signal RF signal, the normal working sequence of the device to be tested (RF power amplifier) is firstly to have the voltage DC, and then providing the RF input signal
Figure DEST_PATH_IMAGE005
I.e. first providing the supply voltage VCCThe circuit is operated, the device to be tested (radio frequency power amplifier) is opened, and finally, a radio frequency input signal is input
Figure 866676DEST_PATH_IMAGE005
The method specifically comprises the following substeps:
and step S31, controlling the power supply 3 to supply power to the chip 8 to be tested through the computer 7.
Step S32, pass stationThe computer 7 controls the function signal generator 1 to generate the trigger signal and the enable signal
Figure 115255DEST_PATH_IMAGE004
And the enabling signal is used for driving the chip 8 to be tested to work. The trigger signal is used for triggering a device connected with the trigger signal to work.
Step S33, the computer 7 controls the vector signal generator 2 to generate a pulse modulation signal according to the trigger signal, so as to serve as the radio frequency input signal of the chip 8 to be tested.
Step S34, reading the data of the directional coupler 5, the spectrometer 6 and the power meter 4 by the computer 7 to obtain the total test data.
Step S4, subtracting the test data of the computer 7 from the total test data to obtain the test data of the chip 8 to be tested.
In this embodiment, the self test data, the total test data, and the test data of the chip to be tested all include current, gain, output power, and DEVM.
That is to say, in the testing method in the embodiment of the present invention, steps S1 and S2 are actually prepared before testing, the setting of each parameter is controlled and set by the computer 7, or may be set manually, and steps S3 and S4 are actual testing processes, and in combination with the control of the computer 7, steps S3 and S4 implement control of automatic testing, that is, manual testing is not required, so as to effectively improve testing efficiency and precision. The control setting of the computer is a program of logic setting according to the measurement request, and is a logic program which is easy to implement, that is, is set according to the procedure in the test method.
In the DEVM test platform and the DEVM test method of the Wi-Fi6 chip, the function signal generator 1 can control the enabling signal
Figure 776043DEST_PATH_IMAGE004
And a radio frequency input signal
Figure 793678DEST_PATH_IMAGE005
To achieve the effect of dynamic measurement, i.e. capable of measuring DEVM; whereas without the function signal generator 1, the RF input signal is
Figure 84982DEST_PATH_IMAGE005
The EVM can only be measured when it is always on or off.
Compared with the related art, the DEVM test platform and the DEVM test method of the Wi-Fi6 chip are not only suitable for DEVM performance test of a Wi-Fi6 chip, but also suitable for DEVM performance test of all power devices; in the test platform and the test method, the automatic test control of a hardware measuring instrument and a computer is effectively combined, and manual operation is not needed during test, so that the test efficiency and precision are effectively improved; in addition, the hardware measuring instruments used in the test platform of the invention all belong to laboratory conventional test instruments, and the hardware measuring instruments are combined according to the structure of the invention, thereby effectively reducing the production test cost.
It should be noted that the above-mentioned embodiments described with reference to the drawings are only intended to illustrate the present invention and not to limit the scope of the present invention, and it should be understood by those skilled in the art that modifications and equivalent substitutions can be made without departing from the spirit and scope of the present invention. Furthermore, unless the context indicates otherwise, words that appear in the singular include the plural and vice versa. Additionally, all or a portion of any embodiment may be utilized with all or a portion of any other embodiment, unless stated otherwise.

Claims (8)

1.A DEVM test platform of Wi-Fi6 chips, comprising: the system comprises a function signal generator, a vector signal generator, a power supply, a power meter, a directional coupler, a frequency spectrograph and a computer;
the input end of the function signal generator is connected with the computer, and the output end of the function signal generator is respectively connected to the vector signal generator, the frequency spectrograph and the power meter, and is used for providing trigger signals for the vector signal generator, the frequency spectrograph and the power meter and also used for providing an enabling signal for a chip to be tested;
the input end of the vector signal generator is also connected to the computer, and the output end of the vector signal generator is used for being connected to the input end of the chip to be tested and providing a pulse modulation signal for the chip to be tested;
one end of the power supply is connected with the computer, and the other end of the power supply is used for being connected to the chip to be tested and supplying power to the chip to be tested;
the power meter is connected with the computer;
the frequency spectrograph is connected with the computer;
the input end of the directional coupler is used for connecting the output end of the chip to be tested, the coupling end of the directional coupler is connected to the power meter, and the through end of the directional coupler is connected to the input end of the frequency spectrograph;
the computer is used for respectively controlling the function signal generator, the vector signal generator, the frequency spectrograph, the power meter and the power supply to work so as to realize the DEVM performance test of the chip to be tested.
2. The DEVM testing platform of Wi-Fi6 chips of claim 1, wherein the computer is connected to the function signal generator, the vector signal generator, the spectrometer, the power meter, and the power supply via a universal interface bus, respectively.
3. The DEVM test platform of a Wi-Fi6 chip of claim 1, wherein the model of the function signal generator is 33220A, the model of the vector signal generator is N5182B, the model of the power supply is 66319D, the model of the power meter is ROHDE & SCHWARZ NRP, the model of the directional coupler is C-058-20, and the model of the spectrometer is N90 9020B.
4. A DEVM testing method of a Wi-Fi6 chip, wherein a DEVM testing platform of a Wi-Fi6 chip as claimed in any one of claims 1-3 is provided, the testing method is implemented based on the testing platform, an input terminal of a chip to be tested is respectively connected to an output terminal of the vector signal generator, an output terminal of the function signal generator and the power supply, and an output terminal of the chip to be tested is connected to an input terminal of the directional coupler; the test method comprises the following steps:
step S1, carrying out initialization calibration on the test platform, and measuring initial values of all devices in the test platform and cables connected with the devices through the computer to obtain test data of the test platform;
step S2, setting the voltage value of the power supply, the parameters of the function signal generator, the test environment temperature, the working frequency and the modulation mode through the computer to meet the test requirements;
step S3, starting a measuring program through the computer to obtain total test data;
and step S4, subtracting the self test data from the total test data by the computer to obtain the test data of the chip to be tested.
5. The method for DEVM testing of Wi-Fi6 chips of claim 4, wherein the step S3 comprises the following steps:
step S31, controlling the power supply to supply power to the chip to be tested through the computer;
step S32, controlling the function signal generator to generate the trigger signal and the enable signal through the computer, wherein the enable signal is used for driving the chip to be tested to work;
step S33, controlling the vector signal generator to generate a pulse modulation signal as a radio frequency input signal of the chip to be tested according to the trigger signal through the computer;
and step S34, reading the data of the directional coupler, the spectrometer and the power meter by the computer to obtain the total test data.
6. The DEVM testing method of Wi-Fi6 chips of claim 4, wherein in step S2, the voltage value of the power supply is 3.4V, the testing environment temperature is 25 ℃, the operating frequency is 5.15-5.85 GHz, and the modulation format is 802.11AX _ MCS11_ VHT 80M.
7. The method for DEVM testing of Wi-Fi6 chips of claim 6, wherein in step S2, the parameters of the function signal generator comprise an enable signal, the frequency and power of a trigger signal, and a duty cycle, the enable signal is set to be at a high level to trigger the chip to be tested to operate, the frequency of the trigger signal is 5.15-5.85 GHz, the power of the trigger signal is-30-10 dBm, and the duty cycle is 50%.
8. The method for DEVM testing of Wi-Fi6 chips of claim 4, wherein the self test data, the total test data, and the test data of the chip under test each comprise current, gain, output power, and DEVM.
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CN113839723A (en) 2021-12-24

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