CN113839451B - Equalization control method, system, device and storage medium - Google Patents
Equalization control method, system, device and storage medium Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 48
- 238000003860 storage Methods 0.000 title claims description 12
- 239000003990 capacitor Substances 0.000 claims abstract description 200
- 238000004146 energy storage Methods 0.000 claims abstract description 66
- 230000004622 sleep time Effects 0.000 claims abstract description 13
- 230000007958 sleep Effects 0.000 claims abstract description 11
- 230000005059 dormancy Effects 0.000 claims description 61
- 238000004590 computer program Methods 0.000 claims description 20
- 238000004422 calculation algorithm Methods 0.000 claims description 18
- 238000004364 calculation method Methods 0.000 claims description 10
- 238000012937 correction Methods 0.000 claims description 8
- 238000005070 sampling Methods 0.000 claims description 6
- 238000003064 k means clustering Methods 0.000 claims description 5
- 238000012216 screening Methods 0.000 claims description 5
- 210000001061 forehead Anatomy 0.000 claims description 4
- 230000017525 heat dissipation Effects 0.000 claims description 4
- 230000002035 prolonged effect Effects 0.000 abstract description 3
- 239000000178 monomer Substances 0.000 description 23
- 238000012545 processing Methods 0.000 description 5
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- 238000013021 overheating Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0013—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries acting upon several batteries simultaneously or sequentially
- H02J7/0014—Circuits for equalisation of charge between batteries
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/007—Regulation of charging or discharging current or voltage
- H02J7/00712—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters
- H02J7/007182—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters in response to battery voltage
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/007—Regulation of charging or discharging current or voltage
- H02J7/007188—Regulation of charging or discharging current or voltage the charge cycle being controlled or terminated in response to non-electric parameters
- H02J7/007192—Regulation of charging or discharging current or voltage the charge cycle being controlled or terminated in response to non-electric parameters in response to temperature
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/34—Parallel operation in networks using both storage and other dc sources, e.g. providing buffering
- H02J7/345—Parallel operation in networks using both storage and other dc sources, e.g. providing buffering using capacitors as storage or buffering devices
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J2207/00—Indexing scheme relating to details of circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J2207/50—Charging of capacitors, supercapacitors, ultra-capacitors or double layer capacitors
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
The invention discloses an energy storage system balance control method and system, M strings of super capacitors are divided into K categories, the central point of each category is the average value of the real-time voltages of all the super capacitors in the category, and when a certain category U is adopted i Mean and average of (2)When the difference is greater than the set threshold, the classification U is indicated i All super capacitors in the system need to execute equalization tasks, and category U is calculated i In category U i‑1 Mean C of (2) i‑1 Time to perform the equalization task for the equalization target value; when the balance count is greater than or equal to the corresponding time for executing the balance task, the super capacitor and the balance module are indicated to have executed the balance task, so that the balance count is cleared, the sleep count is set to be the sleep time, and the temperature of devices in the corresponding balance module is reduced by forced sleep before the next balance task is executed, so that the problem that the devices are overheated due to the fact that the balance module continuously executes the balance task is avoided, the service life of the devices is prolonged, and the reliability is improved.
Description
Technical Field
The invention belongs to the technical field of energy storage system monitoring, and particularly relates to an energy storage system balance control method, system, equipment and storage medium based on time slice task scheduling.
Background
Currently, super-capacitor energy storage type tramcar is popularized and applied in various cities in China, such as Guangzhou sea bead, huang Xuang, yunnan mountain, jiangsu Huaian, wuhan Dahanyang, shenzhen Longhua and other lines.
Because of the limitation of rated working voltage of the super capacitor single body, in order to meet the requirements of capacity and voltage class of an energy storage system, up to hundreds of super capacitor single bodies are generally required to be connected in series and parallel to form the energy storage system, however, due to the limitation of manufacturing technology, single body parameters have certain differences, mainly leakage parameters and capacity parameters. The accumulated leakage difference may cause uneven voltage distribution inside the system. In the process of high-current charge and discharge, the superimposed capacity difference can cause single overvoltage with higher voltage and lower capacity, so that the service life of the capacitor is rapidly attenuated. In order to avoid negative effects of overvoltage on the energy storage system, the energy storage system needs to be stopped from being charged when a certain single voltage reaches a rated voltage, and at the moment, the available energy of other super capacitor single bodies with normal or larger capacity is not fully released, so that the efficiency of the energy storage system is reduced. Therefore, in order to improve the reliability and the energy utilization efficiency of the energy storage system, the voltage balance control of the super capacitor is important.
In the prior art, aiming at the voltage balance of the super capacitor energy storage system, there are mainly two modes of passive balance and active balance, and the passive balance mainly adopts an energy consumption method to consume the energy of the super capacitor monomer with overhigh voltage, so that larger heat can be generated; the active equalization mainly adopts an energy transfer method to achieve the consistency of voltages among super capacitor monomers in the energy storage system, but because the energy conversion rate is limited (generally only 80%), larger heat can be generated in the equalization process. Regardless of the hardware configuration of the equalization circuit or equalization module, the algorithm controlling its operation will have an important impact on the final control effect. In the existing control strategies, the problem that the continuously accumulated heat in the equalization process easily causes overheat of devices in an equalization circuit, thereby finally influencing the service life of the devices and even causing the failure of the devices is rarely considered.
Disclosure of Invention
The invention aims to provide an energy storage system balance control method, an energy storage system balance control system, energy storage equipment and a storage medium, so as to solve the problems that heat accumulated continuously in the balance process is easy to cause overheating of devices in a balance module or a balance circuit, and further the service life of the devices is influenced and even the devices are invalid.
The invention solves the technical problems by the following technical scheme: an energy storage system balance control method, wherein the energy storage system is composed of N parallel M strings of super capacitors, and each N parallel M strings of super capacitors 1 The serial super capacitors form a module, n modules, wherein n is multiplied by m 1 =m; each module corresponds to a module balancing unit, and each module balancing unit comprises a main control module and m 1 Each equalization module corresponds to a super capacitor in the module, and n module equalization units correspond to a main control unit; the method comprises the following steps:
step 1: calculating the equalizing voltage of each equalizing module in unit time according to the equalizing current of each equalizing module, and inputting the equalizing voltage into the main control unit;
step 2: the main control unit acquires real-time voltages of M super capacitors acquired and transmitted by all the module equalizing units according to the sampling period, and classifies the M super capacitors into K categories which are recorded as U 1 ,U 2 ,…,U i ,…,U K, wherein Ui Represents class i;
step 3: calculating the average value of the real-time voltages of M super capacitors
Step 4: when class i U i Mean and average of (2)When the difference is larger than the set threshold, calculating the ith class U i The specific calculation formula of the time for all the super capacitors to execute the balancing task is as follows:
wherein ,Tij Represents class i U i Time of the j-th super capacitor to execute the equalization task, V ij Represents class i U i Real-time voltage of jth super capacitor of (V) Are all Represents class i U i Equalizing voltage in unit time of equalizing module corresponding to jth super capacitor, C i-1 Represents class i-1U i-1 Mean value of C i-1 Is of the ith class U i Equalizing target values of all super capacitors;
step 5: according to class i U i Time T for the j-th super capacitor to execute equalization task ij Calculating the dormancy time of the super capacitor
Step 6: the main control unit sends an equalization instruction to the main control module, wherein the equalization instruction comprises time for executing an equalization task, an equalization target value and dormancy time corresponding to all super capacitors in the module;
step 7: the main control module judges whether the dormancy count of each super capacitor in the corresponding module is greater than 0; the initial value of dormancy count of each super capacitor is 0;
if the dormancy count is greater than 0, the dormancy count is reduced by 1, and dormancy is continued; otherwise, turning to step 8;
step 8: adding 1 to the equilibrium count, wherein the initial value of the equilibrium count of each super capacitor is 0;
step 9: judging whether the balance count is greater than or equal to the time for executing the balance task corresponding to the super capacitor;
If not, adding 1 to the balance count, and continuing to execute the balance task; otherwise, stopping executing the equalization task, resetting the equalization count, and setting the dormancy count as the dormancy time of the super capacitor;
step 10: and the main control module acquires the latest equalization instruction according to a set equalization period, and repeats the steps 7-9, wherein the equalization period is greater than the sampling period.
In the invention, M strings of super capacitors are divided into K categories according to the discrete degree of the real-time voltage of the M strings of super capacitors, the central point of each category is the average value of the real-time voltage of all the super capacitors in the category,when a certain category U i Mean and average of (2)When the difference is greater than the set threshold, the classification U is indicated i All super capacitors in the system need to execute equalization tasks, and category U is calculated i In category U i-1 Mean C of (2) i-1 Time to perform the equalization task for the equalization target value; when the balance count is greater than or equal to the corresponding time for executing the balance task, the super capacitor and the balance module are indicated to have executed the balance task (namely the real-time voltage of the super capacitor is consistent with the balance target value), so that the balance count is cleared, the sleep count is set to be sleep time, the temperature of devices in the corresponding balance module is reduced by forced sleep before the next execution of the balance task, the problem that the devices are overheated due to the fact that the balance module continuously executes the balance task is avoided, the service life of the devices is prolonged, and the reliability is improved; meanwhile, all the super capacitors in each category take the average value of the same category as an equalizing target value, so that the consistency control of the voltages of all the super capacitors in the category is realized, and the energy utilization rate and the reliability of the whole energy storage system are improved.
Further, in the step 2, the M super capacitors are divided into K categories by adopting a K-means clustering algorithm, and the specific implementation steps are as follows:
step 2.1: determining a K value according to the process deviation of the super capacitor, namely screening K clusters, wherein K is a positive integer greater than or equal to 2;
step 2.2: selecting M data from the M real-time voltages as initial center points, wherein the M initial center points are in one-to-one correspondence with K clusters;
step 2.3: respectively calculating Euclidean distances between M real-time voltages and each initial center point or center point;
step 2.4: distributing each real-time voltage to the initial center point with the minimum Euclidean distance or the cluster corresponding to the center point to obtain K clusters;
step 2.5: calculating the center point of each cluster;
step 2.6: repeating the steps 2.3-2.5 until the clustering algorithm converges;
step 2.7: calculating the mean value of each cluster after convergence to obtain K mean values; sorting K means, i.e. C 1 ≤C 2 ≤…≤C i ≤…≤C K, wherein C1 ,C 2 ,…,C i ,…,C K Respectively, are clustered U 1 ,U 2 ,…,U i ,…,U K Is a mean value of (c).
Further, in the step 2.6, the clustering algorithm convergence condition is: the convergence number is more than or equal to 3, wherein the initial value of the convergence number is 0, and when the center point of each cluster at the current time is the same as the center point of the cluster at the last time, the convergence number is +1.
Further, in the step 4, when the K value is equal to 3, the value ranges of the set threshold values are all wherein ,VForehead (forehead) Rated voltage delta of super capacitor min 、δ max The minimum correction deviation and the maximum correction deviation of the rated capacity of the super capacitor are respectively;
when the K value is more than 3, the value ranges of the set threshold values are all V 0 V (K/3), where V 0 And setting a threshold value range when the K value is equal to 3.
Further, in the step 5, the calculation formula of the sleep time is:
wherein ,represents class i U i The dormancy time of the j-th super capacitor in the system, eta represents the temperature rise balance coefficient, and eta is equal to the heat dissipation capacity and unit of the corresponding balance module in unit timeRatio of time heating value.
Further, the equalization instruction further includes an enable bit, and a step of judging validity of the equalization instruction is further included between the steps 7 and 8, and the specific implementation process is as follows: when the enabling bit is valid, the equalization instruction is valid, and the step 8 is carried out; otherwise go to step 10.
The invention also provides an energy storage system balance control system, which comprises a main control unit and a plurality of module balance units, wherein each module balance unit comprises a main control module and a plurality of balance modules; the energy storage system consists of N-to-M strings of super capacitors, wherein each N-to-M 1 The serial super capacitors form a module, n modules, wherein n is multiplied by m 1 =m; each module corresponds to a module balancing unit, each balancing module corresponds to a super capacitor in the module, and n module balancing units correspond to a main control unit;
the balancing module is used for collecting real-time voltage of the super capacitor and consuming redundant energy in the super capacitor or compensating the energy lacking in the super capacitor when the balancing task is executed;
the main control module is used for: obtaining m in corresponding module 1 Real-time voltages of the super capacitors are filtered and then sent to the main control unit; acquiring an equalization instruction sent by a main control unit according to a set equalization period, and controlling an equalization module and super capacitors in a corresponding module to execute an equalization task according to the equalization instruction, namely judging whether the dormancy count of each super capacitor in the module is greater than 0 according to the equalization instruction, wherein the initial value of the dormancy count of each super capacitor is 0; if the dormancy count is greater than 0, the dormancy count is reduced by 1, and dormancy is continued; if the sleep count is less than or equal to 0, adding 1 to the balance count, wherein the initial value of the balance count of each super capacitor is 0; judging whether the balance count is greater than or equal to the time for executing the balance task corresponding to the super capacitor; if the balance count is less than the time for executing the balance task, adding 1 to the balance count, and continuing to execute the balance task; if the balance count is greater than or equal to the time for executing the balance task, stopping executing the balance task and balancing the meter Resetting the number, and setting the dormancy count as the dormancy time of the super capacitor;
the main control unit is used for: acquiring real-time voltages of super capacitors sent by all main control modules and acquiring unit time balanced voltage of each balanced module; dividing M supercapacitors into K categories, denoted as U 1 ,U 2 ,…,U i ,…,U K, wherein Ui Represents class i; calculating the average value of the real-time voltages of M super capacitorsWhen class i U i Mean and mean>When the difference is larger than the set threshold, calculating the ith class U i The specific calculation formula of the time for all the super capacitors to execute the balancing task is as follows:
wherein ,Tij Represents class i U i Time of the j-th super capacitor to execute the equalization task, V ij Represents class i U i Real-time voltage of jth super capacitor of (V) Are all Represents class i U i Equalizing voltage in unit time of equalizing module corresponding to jth super capacitor, C i-1 Represents class i-1U i-1 Mean value of C i-1 Is of the ith class U i Equalizing target values of all super capacitors;
according to class i U i Time T for the j-th super capacitor to execute equalization task ij Calculating the dormancy time of the super capacitorAnd sending an equalization instruction to each main control module, wherein the equalization instruction comprises the time for executing an equalization task by all the super capacitors in the module, an equalization target value and a sleep time.
Further, the main control unit is used for classifying M super capacitors into K categories:
obtaining K values, namely screening K clusters, wherein K is a positive integer greater than or equal to 2;
selecting M data from the M real-time voltages as initial center points, wherein the M initial center points are in one-to-one correspondence with K clusters;
respectively calculating Euclidean distances between M real-time voltages and each initial center point or center point;
distributing each real-time voltage to the initial center point with the minimum Euclidean distance or the cluster corresponding to the center point to obtain K clusters;
calculating the center point of each cluster;
judging whether the clustering algorithm is converged, and calculating the mean value of each cluster after convergence when the clustering algorithm is converged to obtain K mean values; sorting K means, i.e. C 1 ≤C 2 ≤…≤C i ≤…≤C K, wherein C1 ,C 2 ,…,C i ,…,C K Respectively, are clustered U 1 ,U 2 ,…,U i ,…,U K Is a mean value of (c).
The invention also provides an apparatus comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the energy storage system equalization control method as described above when executing the program.
The present invention also provides a storage medium having stored thereon a computer program which when executed by a processor implements a method for balancing control of an energy storage system as described above.
Advantageous effects
Compared with the prior art, the invention has the advantages that:
according to the balance control method and system for the energy storage system, provided by the invention, M strings of super capacitors are divided into K categories according to the discrete degree of the real-time voltage of the M strings of super capacitors, the central point of each category is the average value of the real-time voltage of all the super capacitors in the category, and when a certain category U is adopted i Mean and average of (2)When the difference is greater than the set threshold, the classification U is indicated i All super capacitors in the system need to execute equalization tasks, and category U is calculated i In category U i-1 Mean C of (2) i-1 Time to perform the equalization task for the equalization target value; when the balance count is greater than or equal to the corresponding time for executing the balance task, the super capacitor and the balance module are indicated to have executed the balance task, so that the balance count is cleared, the sleep count is set to be the sleep time, and the temperature of devices in the corresponding balance module is reduced by forced sleep before the next balance task is executed, so that the problem of overheating of the devices caused by continuous execution of the balance task by the balance module is avoided, the service life of the devices is prolonged, and the reliability is improved; meanwhile, all the super capacitors in each category take the average value of the same category as an equalizing target value, so that the consistency control of the voltages of all the super capacitors in the category is realized, and the energy utilization rate and the reliability of the whole energy storage system are improved.
Drawings
In order to more clearly illustrate the technical solutions of the present invention, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawing in the description below is only one embodiment of the present invention, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a module consisting of 2-8 strings in an embodiment of the invention;
FIG. 2 is a topology diagram of an energy storage system balance control system for an energy storage tramcar in an embodiment of the invention;
fig. 3 is a flowchart of an energy storage system equalization control method in an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made more apparent and fully by reference to the accompanying drawings, in which it is shown, however, only some, but not all embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The technical scheme of the present application is described in detail below with specific examples. The following embodiments may be combined with each other, and some embodiments may not be repeated for the same or similar concepts or processes.
The energy storage system equalization control method provided by the embodiment, wherein the energy storage system is composed of N parallel M strings of super capacitors, and each N parallel M 1 The serial super capacitors form a module, n modules, wherein n is multiplied by m 1 =m. Taking an energy storage tramcar as an example, 3 groups of energy storage systems are generally configured, each group of energy storage systems is composed of 2 parallel 344 strings (688 super capacitors), and each 2 parallel 8 strings is composed of 43 modules (as shown in fig. 1).
As shown in fig. 2, the energy storage system equalization control system includes a main control unit (MU) and a plurality of module equalization units (SCU), each module equalization unit includes a main control module and a plurality of equalization modules; each module corresponds to a module balancing unit, each balancing module corresponds to a super capacitor in the module, and a plurality of module balancing units correspond to a main control unit. For the energy storage system composed of 2 parallel 344 strings of super capacitors, every 2 parallel 8 strings of super capacitors form a module, 43 modules are provided, each module has 43 module equalizing units, 8 equalizing modules are provided in each module equalizing unit, and the 43 module equalizing units correspond to a main control unit; the 3 energy storage systems require 3 main control units, 3×43 module equalizing units.
In this embodiment, the master control module uses an MK60 microprocessor based on an ARM-core-M4 core as a core, and the master control unit uses an MK66 microprocessor based on an ARM-core-M4 core as a core.
As shown in fig. 3, the equalization control method for an energy storage system provided in this embodiment includes the following steps:
step 1: and calculating the unit time balanced voltage of each balanced module.
Each module balancing unit SCU is an existing product, the balancing current I of each balancing module can be obtained according to the product specification of the module balancing unit SCU, and the balancing voltage in unit time of each balancing module is calculated according to the balancing current I of each balancing module and is input to the main control unit. Since q=uc, q=i/t, u=i/Ct is present, and the equalization voltage dU per unit time is obtained by deriving t from both sides of the equation.
Step 2: real-time voltage data is acquired and classified.
The SCU has the functions of collecting state information such as voltage, temperature and the like in real time, communicating in real time and processing data. Each equalization module corresponds to a super capacitor in the module, each equalization module acquires real-time voltage corresponding to the super capacitor and sends the real-time voltage to the main control module, and the main control module acquires m in the corresponding module 1 Real-time voltage of each super capacitor and corresponding to m 1 Filtering the real-time voltage and processing the processed m 1 The real-time voltages are sent to the main control unit. For example, 43 modules include 43 SCUs, and the master control module in each SCU obtains real-time voltages of 8 supercapacitors in the corresponding module and performs filtering processing on the 8 real-time voltages. In this embodiment, the real-time voltage is the real-time terminal voltage of the supercapacitor.
In this embodiment, an amplitude limiting and average filtering algorithm is used to eliminate interference signals in the real-time voltage.
The MU receives the real-time voltage sent by the main control module in each SCU to obtain M real-time voltages after filtering. For example, the MU receives 8 real-time voltages sent by the main control module in each SCU, obtains 344 real-time voltages in total, and establishes a linked list to cache the 344 real-time voltages. Because 688 super capacitor monomers are in a 2 parallel 344 string structure, the voltage of each parallel joint is equal, so that only the real-time voltage of 344 strings of super capacitors is required to be collected, and the correspondence between the equalization module and the super capacitor monomers in the module also means that m is equal to m in the equalization module and the module 1 And (5) corresponding to the serial super capacitor monomers.
In this embodiment, the data sampling period of the master control module is 500ms, and the communication period of the mu and the master control module is 500ms.
Main controlAfter the unit obtains the real-time voltages of the M supercapacitors, the M supercapacitors are divided into K categories according to the discrete degree of the real-time voltages of the M supercapacitors and marked as U 1 ,U 2 ,…,U i ,…,U K, wherein Ui Indicating class i. The higher the degree of discretization, the more categories are separated; the higher the equalization control accuracy, the more the categories are classified.
The classification algorithm has various types, such as a mean method, a variance method, a multi-classification logistic regression method, a multi-classification neural network, a multi-classification decision tree, a K-means clustering algorithm and the like, and the K-means clustering algorithm has the advantages of high speed and strong robustness compared with the mean method or the variance method, and can effectively improve the equalization efficiency, so that the M super capacitors are divided into K categories by adopting the K-means clustering algorithm, and the specific implementation steps are as follows:
step 2.1: and determining a K value according to the process deviation of the super capacitor, namely screening K clusters, wherein K is a positive integer greater than or equal to 2.
In this embodiment, the K value is 3, that is, three clusters of the degraded monomer, the inferior monomer and the normal monomer are selected for performing equalization control on the three clusters.
Step 2.2: and selecting M data from the M real-time voltages as initial center points, wherein the M initial center points are in one-to-one correspondence with the K clusters.
The initial center points are the center points of the clusters, and thus in order to correspond to K clusters, the number of initial center points is the same as the number of clusters, i.e., m=k. In this embodiment, m is 3, and the initial center point is selected by the following steps: and sequencing the M real-time voltages, selecting the minimum real-time voltage in the sequencing as the initial center point of the deteriorated monomer cluster, and the middle real-time voltage in the sequencing as the initial center point of the inferior monomer cluster, wherein the maximum real-time voltage in the sequencing as the initial center point of the normal monomer cluster. The minimum real-time voltage, the middle real-time voltage and the maximum real-time voltage are respectively used as three clusters of a degradation monomer, a worse monomer and a normal monomer, and the initial center point corresponds to the screened target group category, so that the clustering times can be reduced, and the convergence rate is increased.
Step 2.3: the euclidean distance between the M real-time voltages and each initial center point or center point is calculated separately.
Taking 344 real-time voltages and 3 initial center points as examples, respectively calculating Euclidean distances between 344 real-time voltages and a first initial center point (e.g. a minimum real-time voltage), respectively calculating Euclidean distances between 344 real-time voltages and a second initial center point (e.g. an intermediate real-time voltage), respectively calculating Euclidean distances between 344 real-time voltages and a third initial center point (e.g. a maximum real-time voltage), and totally calculating 344×3 (M×m) times.
Step 2.4: and distributing each real-time voltage to the initial center point with the minimum Euclidean distance or the cluster corresponding to the center point to obtain K clusters.
Three clusters of the degraded monomer, the inferior monomer and the normal monomer are respectively U 1 、U 2 、U 3 Three clusters U 1 、U 2 、U 3 Corresponding initial center point or center point is C 1 、C 2 、C 3 Assuming an initial center point, C 1 、C 2 、C 3 The values of the voltage sensor are respectively the minimum real-time voltage, the middle real-time voltage and the maximum real-time voltage. 344 real-time voltages can be obtained from the step 2.3 and respectively correspond to C 1 、C 2 、C 3 Euclidean distance between them, if at a certain real-time voltage and C 1 、C 2 、C 3 In Euclidean distance between the real-time voltage and the initial center point C 2 The Euclidean distance between the two is minimum, and the real-time voltage is distributed to the initial center point C 2 Corresponding cluster U 2 In the middle, 344 real-time voltages are all distributed to three clusters U by analogy 1 、U 2 、U 3 Is a kind of medium.
Step 2.5: the center point of each cluster is calculated.
K clusters can be obtained in the step 2.4, and the center point of each cluster is calculated by adopting a mean value method. For example, for cluster U i Calculate the cluster U i Average of all real-time voltages as a gatherClass U i Is defined by a center point of the lens.
Step 2.6: repeating the steps 2.3-2.5 until the clustering algorithm converges.
The condition for the clustering algorithm to converge is that the center point is no longer changed. In this embodiment, the clustering algorithm converges as follows: the convergence number is more than or equal to 3, wherein the initial value of the convergence number is 0, and when the center point of each cluster at the current time is the same as the center point of the cluster at the last time, the convergence number is +1. Illustratively, in the jth iteration, three clusters U 1 、U 2 、U 3 The center points of the (c) are the same as those of the j-1 th iteration, and the convergence number is +1.
Step 2.7: calculating the mean value of each cluster after convergence to obtain K mean values; sorting K means, i.e. C 1 ≤C 2 ≤…≤C i ≤…≤C K, wherein C1 ,C 2 ,…,C i ,…,C K Respectively, are clustered U 1 ,U 2 ,…,U i ,…,U K Is a mean value of (c).
Calculating the center point of each cluster by adopting a mean value method to obtain three clusters U 1 、U 2 、U 3 Corresponding center point C 1 、C 2 、C 3 . In this embodiment, three clusters U 1 、U 2 、U 3 Respectively corresponding to the degraded monomer group, the inferior monomer group and the normal monomer group, thus, C 1 ≤C 2 ≤C 3 。
Step 3: calculating the average value of the real-time voltages of M super capacitors
Step 4: when class i U i Mean and average of (2)When the difference is larger than the set threshold, calculating the ith class U i The specific calculation formula of the time for all the super capacitors to execute the balancing task is as follows:
wherein ,Tij Represents class i U i Time of the j-th super capacitor to execute the equalization task, V ij Represents class i U i Real-time voltage of jth super capacitor of (V) Are all Represents class i U i Equalizing voltage in unit time of equalizing module corresponding to jth super capacitor, C i-1 Represents class i-1U i-1 Mean value of C i-1 Is of the ith class U i The equilibrium target value of all super capacitors. The time for all the supercapacitors in all the categories to execute the balancing task can be calculated by the formula (1).
If it isGreater than the set threshold, C is K-1 As cluster U K Is a target value for equalization; if->Greater than the set threshold, C is K-2 As cluster U K-1 Is a target value for equalization; and so on, if->Greater than the set threshold, C is 2 As cluster U 3 Is a target value for equalization; if->Greater than the set threshold, C is 1 As cluster U 2 Wherein i.gtoreq.2.
Exemplary, ifGreater than the set threshold, C is 2 As cluster U 3 Is a target value for equalization; if it isGreater than the set threshold, C is 1 As cluster U 2 Wherein i.gtoreq.2. The MU sends the balance target value to the SCU, and the real-time voltage of the super capacitor in each cluster is controlled at the corresponding balance target value, so that the optimal configuration and the safe reliability of the energy utilization rate of the energy storage system are realized. For the degraded monomer group U 1 The balance control is not performed, namely the interference of the deteriorated super capacitor monomer in the balance control is eliminated, the energy loss of the whole energy storage system caused by the individual deterioration of the super capacitor monomer is avoided, and the energy utilization rate and the balance efficiency are improved. If- >If the threshold value is smaller than or equal to the first threshold value, the clustering U is described 3 The MU does not need to perform equalization control and does not send an equalization target value to the SCU.
The value range of the set threshold is determined by rated voltage of the super capacitor, maximum allowable capacity deviation and clustering number. When the K value is equal to 3, the range of the set threshold values is wherein ,VForehead (forehead) Rated voltage delta of super capacitor min 、δ max The minimum correction deviation and the maximum correction deviation of the rated capacity of the super capacitor are respectively obtained by taking the difference of internal resistance and the like into consideration on the basis of the maximum allowable deviation of the capacity; when the K value is more than 3, the value ranges of the set threshold values are all V 0 V (K/3), where V 0 And setting a threshold value range when the K value is equal to 3. The smaller the threshold value is, the better the equalization control effect is, and the corresponding control efficiency is reduced.
Taking the standard single rated capacity 9500F, rated voltage 2700mV and maximum allowable capacity deviation of 5% as an example when the K value is equal to 3, comprehensively considering the differences of internal resistance and the like, and setting a calculation formula of a threshold value when the value range of the corrected deviation is 2% -4%:
wherein ,VForehead (forehead) Rated voltage delta of super capacitor min 、δ max Respectively the minimum correction deviation and the maximum correction deviation of the rated capacity of the super capacitor, Maximum value of threshold>Since the value is the minimum value of the threshold, when the K value is equal to 3, the value range of the threshold is set to be 50 mV to 100mV.
Step 5: according to class i U i Time T for the j-th super capacitor to execute equalization task ij Calculating the dormancy time of the super capacitor
In this embodiment, the calculation formula of the sleep time is:
wherein ,represents class i U i In the j-th super capacitor, eta represents a temperature rise balance coefficient, eta is equal to the ratio of the heat dissipation capacity of the corresponding equalization module in unit time to the heat productivity of the corresponding equalization module in unit time, and the general temperature rise balance coefficient eta is 1 or 2.
Step 6: the main control unit sends an equalization instruction to each main control module, wherein the equalization instruction comprises the time for executing an equalization task, an equalization target value and dormancy time of all super capacitors in the corresponding module.
According to equations (1) and (4), the main control unit may calculate the time and sleep time for performing the balancing task for the M supercapacitors, and the average value of each class (i.e., obtain the balancing target value of each class, and thus obtain the balancing target value of each supercapacitor). The main control unit sends the equalization command corresponding to each module to the main control module, so that the main control module controls the super capacitor and the equalization module in the module to execute the equalization task according to the equalization command, namely, the equalization module consumes redundant energy in the super capacitor or compensates the energy lacking in the super capacitor to enable the real-time voltage of the super capacitor to be consistent with the equalization target value, the consistency control of the real-time voltage of the super capacitor in each category is realized, and the energy utilization rate is improved.
Step 7: each main control module judges whether the dormancy count of each super capacitor in the corresponding module is greater than 0; the initial value of dormancy count of each super capacitor is 0; if the dormancy count is greater than 0, the dormancy count is reduced by 1, and dormancy is continued; otherwise go to step 8.
Each super capacitor corresponds to a sleep time and a time for performing an equalization task. If the initial value of the dormancy count of each super capacitor is set to be 0, devices in the equalization module do not work and do not generate heat when the equalization task is not performed, forced dormancy is not needed to cool, and the equalization task is directly performed in the step 8.
In this embodiment, the equalization instruction further includes an enable bit, and a step of determining validity of the equalization instruction is further included between steps 7 and 8, which is specifically implemented as follows: when the enable bit is valid, the equalization instruction is valid, and the step 8 is shifted to; otherwise go to step 10. In this embodiment, an enable bit of 1 indicates that the balanced instruction is valid, and an enable bit of 0 indicates that the balanced instruction is invalid.
Step 8: the equilibrium count is incremented by 1, wherein the initial value of the equilibrium count of each super capacitor is 0.
Before the equalization task is executed, the initial value of the equalization count is 0, and the equalization task enters dormancy after the execution of the equalization task (namely, the real-time voltage of the super capacitor reaches the equalization target value) is finished through the accumulation of the equalization count, so that the situation that the equalization task enters the dormancy state without the execution is avoided.
Step 9: judging whether the equilibrium count is greater than or equal to the time for executing the equilibrium task corresponding to the super capacitor; if not, adding 1 to the balance count, and continuing to execute the balance task; and if not, stopping executing the equalization task, resetting the equalization count, and setting the dormancy count as the dormancy time of the super capacitor.
The equilibrium count of the super capacitor is smaller than the time of executing the equilibrium task of the super capacitor, which indicates that the equilibrium task is not executed and needs to be executed continuously; the balance count of the super capacitor is greater than or equal to the time of executing the balance task of the super capacitor, which indicates that the balance task is executed, devices in the balance module generate heat due to the execution of the balance task, and the heat of the devices in the balance module needs to be reduced through dormancy before the next execution of the balance task, so when the balance count of the super capacitor is greater than or equal to the time of executing the balance task of the super capacitor, the balance count is cleared, and the dormancy count is set to be the dormancy time of the super capacitor.
The temperature of the device in the balancing module is reduced to the temperature when the balancing task is not executed by dormancy in the dormancy time, so that the problem that the service life of the device is influenced due to overheating of the device caused by continuously executing the balancing task by the balancing module is avoided. The dormancy in the dormancy time calculated by the formula (4) can reduce the temperature raised by the device for executing the primary equalization task to the temperature when the device does not execute the equalization task, so that the balance of the heat generated by executing the equalization task and the heat dissipation by dormancy is achieved, and the service life of the device and the reliability of the system are improved.
Step 10: and the main control module acquires the latest equalization instruction according to the set equalization period, and repeats the steps 7-9, wherein the equalization period is greater than the sampling period.
In this embodiment, the equalization period is set to 4s.
The embodiment also provides an energy storage system balance control system, wherein the energy storage system is composed of N parallel M strings of super capacitors, and each N parallel M 1 The serial super capacitors form a module, n modules, wherein n is multiplied by m 1 =m. Taking an energy storage tramcar as an example, 3 groups of energy storage systems are generally configured, each group of energy storage systems consists of 2 parallel 344 strings (total 688) of super capacitorsEvery 2 and 8 strings constitute one module (as shown in fig. 1), 43 modules in total.
As shown in fig. 2, the energy storage system equalization control system comprises a main control unit and a plurality of module equalization units, wherein each module equalization unit comprises a main control module and a plurality of equalization modules; each module corresponds to a module balancing unit, each balancing module corresponds to a super capacitor in the module, and a plurality of module balancing units correspond to a main control unit. For the energy storage system composed of 2 parallel 344 strings of super capacitors, every 2 parallel 8 strings of super capacitors form a module, 43 modules are provided, each module has 43 module equalizing units, 8 equalizing modules are provided in each module equalizing unit, and the 43 module equalizing units correspond to a main control unit; the 3 energy storage systems require 3 main control units, 3×43 module equalizing units.
In this embodiment, the master control module uses an MK60 microprocessor based on an ARM-core-M4 core as a core, and the master control unit uses an MK66 microprocessor based on an ARM-core-M4 core as a core.
The balancing module is used for collecting real-time voltage of the super capacitor and consuming redundant energy in the super capacitor or compensating the energy lacking in the super capacitor when the balancing task is executed.
The main control module is used for: obtaining m in corresponding module 1 Real-time voltages of the super capacitors are filtered and then sent to the main control unit; acquiring an equalization instruction sent by a main control unit according to a set equalization period, and controlling an equalization module and super capacitors in a corresponding module to execute an equalization task according to the equalization instruction, namely judging whether the dormancy count of each super capacitor in the module is greater than 0 according to the equalization instruction, wherein the initial value of the dormancy count of each super capacitor is 0; if the dormancy count is greater than 0, the dormancy count is reduced by 1, and dormancy is continued; if the sleep count is less than or equal to 0, adding 1 to the balance count, wherein the initial value of the balance count of each super capacitor is 0; judging whether the balance count is greater than or equal to the time for executing the balance task corresponding to the super capacitor; if the equalization count is less than the time to perform the equalization task, the equalization meter is set Adding 1 to continue to execute the equalization task; and if the balance count is greater than or equal to the time for executing the balance task, stopping executing the balance task, resetting the balance count, and setting the sleep count as the sleep time of the super capacitor.
The main control unit is used for: acquiring real-time voltages of super capacitors sent by all main control modules and acquiring unit time balanced voltage of each balanced module; m super capacitors are divided into K categories (see steps 2.1-2.7 for details) and are marked as U 1 ,U 2 ,…,U i ,…,U K, wherein Ui Represents class i; calculating the average value of the real-time voltages of M super capacitorsWhen class i U i Mean and mean>When the difference is larger than the set threshold, calculating the ith class U i The specific calculation formula of the time for all the super capacitors to execute the balancing task is shown in the formula (1);
according to class i U i Time T for the j-th super capacitor to execute equalization task ij Calculating the dormancy time of the super capacitor(as shown in formula (4)); and sending an equalization instruction to each main control module, wherein the equalization instruction comprises the time for executing an equalization task by all the super capacitors in the module, an equalization target value and a sleep time.
The working process of the balance control system of the energy storage system can refer to the specific description of the balance control method of the energy storage system, and the description is omitted herein.
The embodiment also provides a device, which comprises a memory, a processor and a computer program stored in the memory and capable of running on the processor, wherein the processor executes the computer program to realize the steps of the energy storage system balance control method.
The computer program may be divided into one or more modules/units, which are stored in the memory and executed by the processor to accomplish the present invention, for example. The one or more modules/units may be a series of computer program instruction segments capable of performing the specified functions, which instruction segments describe the execution of the computer program in the computer device. For example, the computer program may be divided into a module voltage balancing unit SCU, and a main control unit MU, each unit functioning specifically as described above.
The computer equipment can be a desktop computer, a notebook computer, a palm computer, a cloud server and other computing equipment. The computer device may include, but is not limited to, a processor, a memory. Those skilled in the art will appreciate that the energy storage system equalization control system is merely an example of a computer device and is not meant to be limiting as the device, may include more or fewer components than the system, or may combine certain components, or different components, e.g., the computer device may also include input and output devices, network access devices, buses, etc.
The processor may be a central processing unit (Central Processing Unit, CPU), but may also be other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), off-the-shelf programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The memory may be used to store the computer program and/or module, and the processor may implement various functions of the energy storage system equalization control system by running or executing the computer program and/or module stored in the memory and invoking data stored in the memory. The memory may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function, and the like; the storage data area may store data created according to the use of the cellular phone, etc. In addition, the memory may include high-speed random access memory, and may also include non-volatile memory, such as a hard disk, memory, plug-in hard disk, smart Media Card (SMC), secure Digital (SD) Card, flash Card (Flash Card), at least one disk storage device, flash memory device, or other volatile solid-state storage device.
The computer program when executed by a processor implements the steps of the energy storage system equalization control method.
The modules/units integrated into the energy storage system balance control system may be stored in a computer readable storage medium if implemented in the form of software functional units and sold or used as a stand alone product. Based on such understanding, the present invention may implement all or part of the flow of the method of the above embodiment, or may be implemented by a computer program to instruct related hardware, where the computer program may be stored in a computer readable storage medium, and when the computer program is executed by a processor, the computer program may implement the steps of each of the method embodiments described above. Wherein the computer program comprises computer program code which may be in source code form, object code form, executable file or some intermediate form etc. The computer readable medium may include: any entity or device capable of carrying the computer program code, a recording medium, a U disk, a removable hard disk, a magnetic disk, an optical disk, a computer Memory, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), an electrical carrier signal, a telecommunications signal, a software distribution medium, and so forth. It should be noted that the computer readable medium contains content that can be appropriately scaled according to the requirements of jurisdictions in which such content is subject to legislation and patent practice, such as in certain jurisdictions in which such content is subject to legislation and patent practice, the computer readable medium does not include electrical carrier signals and telecommunication signals.
The foregoing disclosure is merely illustrative of specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art will readily recognize that changes and modifications are possible within the scope of the present invention.
Claims (10)
1. An energy storage system balance control method, wherein the energy storage system is composed of N parallel M strings of super capacitors, and each N parallel M strings of super capacitors 1 The serial super capacitors form a module, n modules, wherein n is multiplied by m 1 =m; each module corresponds to a module balancing unit, and each module balancing unit comprises a main control module and m 1 Each equalization module corresponds to a super capacitor in the module, and n module equalization units correspond to a main control unit; characterized in that the method comprises the steps of:
step 1: calculating the equalizing voltage of each equalizing module in unit time according to the equalizing current of each equalizing module, and inputting the equalizing voltage into the main control unit;
step 2: the main control unit acquires real-time voltages of M super capacitors acquired and transmitted by all the module equalizing units according to the sampling period, and classifies the M super capacitors into K categories which are recorded as U 1 ,U 2 ,…,U i ,…,U K, wherein Ui Represents class i;
step 3: calculating the average value of the real-time voltages of M super capacitors
Step 4: when class i U i Mean and average of (2)When the difference is larger than the set threshold, calculating the ith class U i The specific calculation formula of the time for all the super capacitors to execute the balancing task is as follows:
wherein ,Tij Represents class i U i Time of the j-th super capacitor to execute the equalization task, V ij Represents class i U i Real-time voltage of jth super capacitor of (V) Are all Represents class i U i Equalizing voltage in unit time of equalizing module corresponding to jth super capacitor, C i-1 Represents class i-1U i-1 Mean value of C i-1 Is of the ith class U i Equalizing target values of all super capacitors;
step 5: according to class i U i Time T for the j-th super capacitor to execute equalization task ij Calculating the dormancy time of the super capacitor
Step 6: the main control unit sends an equalization instruction to the main control module, wherein the equalization instruction comprises time for executing an equalization task, an equalization target value and dormancy time corresponding to all super capacitors in the module;
step 7: the main control module judges whether the dormancy count of each super capacitor in the corresponding module is greater than 0; the initial value of dormancy count of each super capacitor is 0;
if the dormancy count is greater than 0, the dormancy count is reduced by 1, and dormancy is continued; otherwise, turning to step 8;
Step 8: adding 1 to the equilibrium count, wherein the initial value of the equilibrium count of each super capacitor is 0;
step 9: judging whether the balance count is greater than or equal to the time for executing the balance task corresponding to the super capacitor;
if not, adding 1 to the balance count, and continuing to execute the balance task; otherwise, stopping executing the equalization task, resetting the equalization count, and setting the dormancy count as the dormancy time of the super capacitor;
step 10: and the main control module acquires the latest equalization instruction according to a set equalization period, and repeats the steps 7-9, wherein the equalization period is greater than the sampling period.
2. The energy storage system equalization control method of claim 1, wherein: in the step 2, the M super capacitors are divided into K categories by adopting a K-means clustering algorithm, and the specific implementation steps are as follows:
step 2.1: determining a K value according to the process deviation of the super capacitor, namely screening K clusters, wherein K is a positive integer greater than or equal to 2;
step 2.2: selecting M data from the M real-time voltages as center points, wherein the M center points are in one-to-one correspondence with K clusters;
step 2.3: respectively calculating Euclidean distances between M real-time voltages and each central point;
Step 2.4: distributing each real-time voltage to the clusters corresponding to the center point with the smallest Euclidean distance to obtain K clusters;
step 2.5: calculating the center point of each cluster;
step 2.6: repeating the steps 2.3-2.5 until the clustering algorithm converges;
step 2.7: calculating the mean value of each cluster after convergence to obtain K mean values; sorting K means, i.e. C 1 ≤C 2 ≤…≤C i ≤…≤C K, wherein C1 ,C 2 ,…,C i ,…,C K Respectively, are clustered U 1 ,U 2 ,…,U i ,…,U K Is a mean value of (c).
3. The energy storage system equalization control method of claim 2, wherein: in the step 2.6, the convergence condition of the clustering algorithm is as follows: the convergence number is more than or equal to 3, wherein the initial value of the convergence number is 0, and when the center point of each cluster at the current time is the same as the center point of the cluster at the last time, the convergence number is +1.
4. The energy storage system equalization control method of claim 1, wherein: in the step 4, when the K value is equal to 3, the value ranges of the set threshold values are all wherein ,VForehead (forehead) Rated voltage delta of super capacitor min 、δ max The minimum correction deviation and the maximum correction deviation of the rated capacity of the super capacitor are respectively;
when the K value is more than 3, the value ranges of the set threshold values are all V 0 V (K/3), where V 0 And setting a threshold value range when the K value is equal to 3.
5. The energy storage system equalization control method of any one of claims 1-4, wherein: in the step 5, the calculation formula of the sleep time is as follows:
wherein ,represents class i U i And the dormancy time of the j-th super capacitor, eta represents a temperature rise balance coefficient, and eta is equal to the ratio of the heat dissipation capacity per unit time to the heat productivity per unit time of the corresponding equalization module.
6. The energy storage system equalization control method of claim 1, wherein: the equalization instruction further comprises an enabling bit, and a step of judging the validity of the equalization instruction is further included between the step 7 and the step 8, and the specific implementation process is as follows: when the enabling bit is valid, the equalization instruction is valid, and the step 8 is carried out; otherwise go to step 10.
7. An energy storage system balance control system comprises a main control unit and a plurality of module balance units, wherein each module balance unit comprises a main control module and a plurality of balance modules; the energy storage system consists of N-to-M strings of super capacitors, wherein each N-to-M 1 The serial super capacitors form a module, n modules, wherein n is multiplied by m 1 =m; each module corresponds to a module equalizing unit, each equalizing moduleThe block corresponds to a super capacitor in the module, and n module balancing units correspond to a main control unit; the method is characterized in that:
The balancing module is used for collecting real-time voltage of the super capacitor and consuming redundant energy in the super capacitor or compensating the energy lacking in the super capacitor when the balancing task is executed;
the main control module is used for: obtaining m in corresponding module 1 Real-time voltages of the super capacitors are filtered and then sent to the main control unit; acquiring an equalization instruction sent by a main control unit according to a set equalization period, and controlling an equalization module and super capacitors in a corresponding module to execute an equalization task according to the equalization instruction, namely judging whether the dormancy count of each super capacitor in the module is greater than 0 according to the equalization instruction, wherein the initial value of the dormancy count of each super capacitor is 0; if the dormancy count is greater than 0, the dormancy count is reduced by 1, and dormancy is continued; if the sleep count is less than or equal to 0, adding 1 to the balance count, wherein the initial value of the balance count of each super capacitor is 0; judging whether the balance count is greater than or equal to the time for executing the balance task corresponding to the super capacitor; if the balance count is less than the time for executing the balance task, adding 1 to the balance count, and continuing to execute the balance task; if the balance count is greater than or equal to the time for executing the balance task, stopping executing the balance task, resetting the balance count, and setting the sleep count as the sleep time of the super capacitor;
The main control unit is used for: acquiring real-time voltages of super capacitors sent by all main control modules and acquiring unit time balanced voltage of each balanced module; dividing M supercapacitors into K categories, denoted as U 1 ,U 2 ,…,U i ,…,U K, wherein Ui Represents class i; calculating the average value of the real-time voltages of M super capacitorsWhen class i U i Mean and mean>When the difference is larger than the set threshold, calculating the ith class U i The specific calculation formula of the time for all the super capacitors to execute the balancing task is as follows:
wherein ,Tij Represents class i U i Time of the j-th super capacitor to execute the equalization task, V ij Represents class i U i Real-time voltage of jth super capacitor of (V) Are all Represents class i U i Equalizing voltage in unit time of equalizing module corresponding to jth super capacitor, C i-1 Represents class i-1U i-1 Mean value of C i-1 Is of the ith class U i Equalizing target values of all super capacitors;
according to class i U i Time T for the j-th super capacitor to execute equalization task ij Calculating the dormancy time of the super capacitorAnd sending an equalization instruction to the main control module, wherein the equalization instruction comprises the time for executing an equalization task by all the super capacitors in the module, an equalization target value and a sleep time.
8. The energy storage system equalization control system of claim 7, wherein said master control unit, when dividing M supercapacitors into K categories, is configured to:
Obtaining K values, namely screening K clusters, wherein K is a positive integer greater than or equal to 2;
selecting M data from the M real-time voltages as center points, wherein the M center points are in one-to-one correspondence with K clusters;
respectively calculating Euclidean distances between M real-time voltages and each central point;
distributing each real-time voltage to the clusters corresponding to the center point with the smallest Euclidean distance to obtain K clusters;
calculating the center point of each cluster;
judging whether the clustering algorithm is converged, and calculating the mean value of each cluster after convergence when the clustering algorithm is converged to obtain K mean values; sorting K means, i.e. C 1 ≤C 2 ≤…≤C i ≤…≤C K, wherein C1 ,C 2 ,…,C i ,…,C K Respectively, are clustered U 1 ,U 2 ,…,U i ,…,U K Is a mean value of (c).
9. An energy storage system equalization control device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the energy storage system equalization control method according to any of claims 1-6 when executing the program.
10. A storage medium having stored thereon a computer program, which when executed by a processor implements a method of controlling equalization of an energy storage system according to any of claims 1 to 6.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103269096A (en) * | 2013-05-14 | 2013-08-28 | 国家电网公司 | Battery pack equilibrium method based on clustering analysis |
| CN103633695A (en) * | 2013-11-22 | 2014-03-12 | 国家电网公司 | Improved lithium battery pack equalizing method and equalizing circuit thereof |
| CN112563591A (en) * | 2020-12-11 | 2021-03-26 | 吉林大学 | Storage battery pack balance control method |
| CN112968484A (en) * | 2021-02-03 | 2021-06-15 | 宜昌科赛新能源科技有限公司 | Energy balancing method and device for lithium battery |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102563754B1 (en) * | 2017-08-07 | 2023-08-04 | 삼성전자주식회사 | Battery management method and system for predicting battery state |
-
2021
- 2021-11-09 CN CN202111320718.5A patent/CN113839451B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103269096A (en) * | 2013-05-14 | 2013-08-28 | 国家电网公司 | Battery pack equilibrium method based on clustering analysis |
| CN103633695A (en) * | 2013-11-22 | 2014-03-12 | 国家电网公司 | Improved lithium battery pack equalizing method and equalizing circuit thereof |
| CN112563591A (en) * | 2020-12-11 | 2021-03-26 | 吉林大学 | Storage battery pack balance control method |
| CN112968484A (en) * | 2021-02-03 | 2021-06-15 | 宜昌科赛新能源科技有限公司 | Energy balancing method and device for lithium battery |
Non-Patent Citations (1)
| Title |
|---|
| A Novel Active Equalization Method for Series-Connected Battery Packs Based on Clustering Analysis With Genetic Algorithm;Sun Jinlei et al.;《IEEE TRANSACTIONS ON POWER ELECTRONICS》;第36卷(第7期);第页 * |
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