CN113836857A - Circuit board lead adjusting method and device - Google Patents

Circuit board lead adjusting method and device Download PDF

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Publication number
CN113836857A
CN113836857A CN202010590362.6A CN202010590362A CN113836857A CN 113836857 A CN113836857 A CN 113836857A CN 202010590362 A CN202010590362 A CN 202010590362A CN 113836857 A CN113836857 A CN 113836857A
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pin
wire
circuit board
name
schematic diagram
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王隆峰
廖天宇
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Maipu Communication Technology Co Ltd
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Maipu Communication Technology Co Ltd
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Priority to CN202010590362.6A priority Critical patent/CN113836857A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/392Floor-planning or layout, e.g. partitioning or placement
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2115/00Details relating to the type of the circuit
    • G06F2115/12Printed circuit boards [PCB] or multi-chip modules [MCM]

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  • Computer Hardware Design (AREA)
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  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

The application provides a circuit board lead adjusting method and device, comprising the following steps: receiving a request for checking a change schematic diagram, and sending a request for obtaining a change lead name to a server; receiving pin wire name information returned by the server; updating the local name of the lead connected with the corresponding pin number in the schematic diagram according to the mapping relation between the global name and the local name, wherein the schematic diagram is a working schematic diagram of the circuit board design diagram; and displaying the schematic diagram with the local name changed for the schematic diagram designer to view. The method realizes the interchange of the local names of the changed wires in the schematic diagram, so that a schematic diagram designer can directly determine whether the changed wires in the schematic diagram meet the requirements from the principle perspective, the schematic diagram designer does not need to artificially replace the names by contrasting the relationship between the global names and the local names, and the workload of the schematic diagram designer is reduced.

Description

Circuit board lead adjusting method and device
Technical Field
The application relates to the technical field of electrical elements, in particular to a circuit board lead adjusting method and device.
Background
In the prior art, after a Printed Circuit Board (PCB) designer completes the change of a lead connected to a pin of a PCB design drawing, the PCB design drawing with the changed lead is sent to a schematic diagram designer, and the schematic diagram designer compares the changed PCB design drawing with the schematic diagram to determine whether the lead is accurately changed from a principle perspective.
Because the wires connected with the pins in the PCB design drawing are usually named by global names and the wires connected with the pins in the schematic drawing are usually named by local names, a schematic drawing designer is usually required to manually correspond the global names to the local names and then judge whether the changed principle is accurate, which brings a large amount of work to the schematic drawing designer.
Disclosure of Invention
An object of the embodiments of the present application is to provide a method and an apparatus for adjusting a circuit board wire, so as to solve the problem of a large workload of a schematic diagram designer in the prior art.
In a first aspect, an embodiment of the present application provides a method for adjusting a circuit board wire, where the method includes: receiving a request for checking a change schematic diagram, and sending a request for obtaining a change lead name to a server; receiving pin wire name information returned by the server, wherein the pin wire name information comprises a plurality of pin numbers and the global name of a changed wire connected with each pin number in the plurality of pin numbers, and the pin corresponding to each pin number is changed by the connected wire in a circuit board design drawing; updating the local name of the lead connected with the corresponding pin number in a schematic diagram according to the mapping relation between the global name and the local name, wherein the schematic diagram is a working schematic diagram of the circuit board design diagram; and displaying the schematic diagram of the changed local name.
In the above embodiment, after receiving a requirement for checking a modified schematic diagram from a schematic diagram designer, the circuit board wire adjustment apparatus may first obtain pin wire name information from a server, where the pin wire name information includes a pin number of a pin to which a connection wire has been modified and a global name of a wire to which each pin number is connected. The circuit board lead adjusting device can update the local names of the leads connected with the corresponding pin numbers in the schematic diagram according to the mapping relation between the global names and the local names. The method directly realizes the interchange of the local names of the changed wires in the schematic diagram, so that a schematic diagram designer can directly determine whether the changed wires in the schematic diagram meet the requirements from the principle perspective, the schematic diagram designer does not need to artificially replace the names by contrasting the relationship between the global names and the local names, and the workload of the schematic diagram designer is reduced.
In one possible design, before the updating the local name of the wire connected to the corresponding pin number in the schematic diagram according to the mapping relationship between the global name and the local name, the method further includes: and establishing a mapping relation between the global name and the local name.
In the above-described embodiment, the name can be changed more smoothly by establishing the mapping relationship between the global name and the local name.
In one possible design, the establishing a mapping relationship between the global names and the local names includes: searching a chip corresponding to the same chip position number in a schematic diagram according to the chip position number of the chip with the wire change in the circuit board design diagram; according to the pin number of the chip with the wire change in the circuit board design drawing, searching a pin with the same number as the pin number in a corresponding chip of the schematic drawing; acquiring the global name of a wire before change, which is connected in a circuit board design drawing, of a pin corresponding to a pin number with the changed wire; acquiring the local name of a wire connected with a pin with the same pin number in the schematic diagram; and establishing a mapping relation between the global name and the local name.
In the above embodiment, the mapping relationship between the global name of the circuit board design drawing and the local name of the schematic drawing is established, and the chips to be established may be determined from the circuit board design drawing and the schematic drawing according to the chip bit numbers; then, respectively determining pins with changed leads in a circuit board design drawing and a schematic drawing according to the pin numbers of the chips; then, the global name of the wire of a certain pin before change connected in the circuit board design drawing and the local name of the wire of the pin connected in the schematic drawing are obtained, the wire of the circuit board design drawing before change and the wire of the schematic drawing are the same wire, therefore, the mapping relation between the global name and the local name is established.
In one possible design, after the displaying alters the schematic diagram of the local name, the method further includes: receiving a line-transferring refund instruction and sending line-transferring refund information to the server; or receiving a tuning confirmation instruction, updating the schematic diagram and generating a netlist document of the updated schematic diagram; uploading the netlist document to the server.
In the above embodiment, the schematic diagram designer can obtain two results, i.e., a result that the requirement is satisfied or not satisfied, after determining whether the wire changed in the schematic diagram satisfies the requirement from the schematic perspective. If the schematic diagram designer judges that the changed lead does not meet the requirement from the principle angle, a line adjusting and returning instruction can be triggered to enable the circuit board lead adjusting device to send line adjusting and returning information to the server; if the schematic diagram designer judges that the changed lead meets the requirement from the principle perspective, a line adjusting confirmation instruction can be triggered, the schematic diagram is updated according to the changed lead, and a netlist document corresponding to the updated schematic diagram is generated. The netlist document records the updated information of the schematic diagram, and after the netlist document is uploaded to the server, the circuit board design diagram can be kept consistent with the schematic diagram according to the latest netlist document stored in the server.
In one possible design, the updating the local name of the wire connected to the corresponding pin number in the schematic diagram according to the mapping relationship between the global name and the local name includes: searching a chip corresponding to the same chip position number in a schematic diagram according to the chip position number of the chip with the wire change in the circuit board design diagram; according to the pin number of the chip with the wire change in the circuit board design drawing, searching a pin with the same number as the pin number in a corresponding chip of the schematic drawing; and for the same pin in the circuit board design drawing and the schematic drawing, the following operations are carried out: if one pin of the circuit board design drawing is suspended, the same pin in the schematic drawing is connected with a lead, the lead connected with the same pin in the schematic drawing is deleted, and a mark representing deletion is marked on the same pin; if a pin of the circuit board design drawing is connected with a wire, the same pin in the schematic drawing is suspended, the connected wire is added for the same pin in the schematic drawing, and a mark for representing addition is marked on the same pin, wherein the name of the added wire is a local name corresponding to the global name of the pin of the circuit board design drawing; if the same pin in the circuit board design drawing and the schematic drawing is connected with a lead, changing the name of the lead connected with the pin of the schematic drawing into a local name corresponding to the global name of the pin connecting lead of the circuit board design drawing, and marking the same pin in the schematic drawing with a mark for representing change.
In a second aspect, an embodiment of the present application provides a method for adjusting a circuit board wire, where the method includes: receiving a first pin selection request, selecting a first pin corresponding to the first pin selection request, and marking pins belonging to the same line-tuning group as the first pin, wherein a lead capable of being mutually changed and connected between every two pins in a plurality of pins belonging to the same line-tuning group; receiving a second pin selection request, and selecting a second pin in the pins belonging to the same wire regulation grouping with the first pin; popping up an inquiry interface to inquire whether a lead wire connected with the first pin and a lead wire connected with the second pin are exchanged; in response to an acknowledge swap instruction, swapping the wire connected to the first pin with the wire connected to the second pin; or in response to a cancel swap instruction, the wire connected with the first pin and the wire connected with the second pin are kept as the same.
In the above embodiment, the circuit board designer may operate the circuit board design drawing, select the first pin in the circuit board design drawing, and when the first pin is selected, at least one pin belonging to the same tuning group as the first pin is marked to prompt the circuit board designer that the wire connected to the first pin may be connected to which pins. The circuit board designer may select the second pin from at least one pin belonging to the same pacing group as the first pin. When the second pin is selected by the circuit board designer, an inquiry interface can be popped up to inquire whether the wires connected with the first pin and the second pin are interchanged or not, and the interchange of the first pin and the second pin is finished or cancelled according to the selection of the circuit board designer.
In one possible design, after the swapping the wires connected to the first pin and the wires connected to the second pin in response to the acknowledge swap instruction, the method further includes: generating a wire change circuit board document, wherein the wire change circuit board document comprises the name of a circuit board with a wire change, the chip bit number of a chip with the wire change, the pin number of a pin with the wire change, the global name of a wire connected with the pin with the wire change before the wire change and the global name of a wire connected with the pin with the wire change after the wire change; and sending the wire change circuit board document to a server.
In the above-described embodiment, the wire-change circuit board document may be automatically generated after the wire exchange of the two pins is completed. The wire change circuit board document records the name of the circuit board with the wire change, the bit number of the chip with the wire change, the pin number with the wire change and the global name of the wire connected before and after the wire change of the pin sending the wire change. The wire-change circuit board document is sent to a server so that when the changed schematic diagram is to be checked, the pin wire name information in the wire-change circuit board document is obtained from the server.
In one possible design, before the receiving a first pin selection request and selecting a first pin corresponding to the first pin selection request, the method further includes: marking a plurality of chips with the same chip type as a primary screening and adjusting line group according to the chip type; obtaining a plurality of pins of allowed adjusted wires in the preliminary screening wire grouping and power supply pins corresponding to the plurality of pins, wherein the plurality of pins of the allowed adjusted wires are pins with configurable functions; and dividing pins with the same power supply voltage corresponding to the power supply pins into final selected tuning line groups, wherein the final selected tuning line groups are determined tuning line groups.
In the foregoing embodiment, a plurality of chips with the same chip type may be first divided into the same group, then power supply pins corresponding to each pin are respectively obtained for a plurality of pins allowing to be tuned in the same group, and the pins with the same power supply voltage where the power supply pins are located are divided into the final tuning line group, so as to implement the grouping process of the pins. And the leads connected between every two pins in the final selection line-adjusting group can be interchanged.
In a third aspect, an embodiment of the present application provides a circuit board wire adjusting apparatus, where the apparatus includes: the request sending module is used for receiving a request for checking the change schematic diagram and sending a request for obtaining the name of the change lead to the server; the wire name receiving module is used for receiving pin wire name information returned by the server, wherein the pin wire name information comprises a plurality of pin numbers and the global name of a changed wire connected with each pin number in the plurality of pin numbers, and the pin corresponding to each pin number is changed by the connected wire in a circuit board design drawing; the mapping change module is used for updating the local names of the wires connected with the corresponding pin numbers in a schematic diagram according to the mapping relation between the global names and the local names, wherein the schematic diagram is a working schematic diagram of the circuit board design diagram; and the image display module is used for displaying the schematic diagram of the changed local name.
In one possible design, the apparatus further includes: and the mapping relation establishing module is used for establishing the mapping relation between the global name and the local name.
In one possible design, the mapping relation establishing module is specifically configured to search, in a schematic diagram, chips corresponding to the same chip bit number according to the chip bit number of the chip with the wire change in the circuit board design diagram; according to the pin number of the chip with the wire change in the circuit board design drawing, searching a pin with the same number as the pin number in a corresponding chip of the schematic drawing; acquiring the global name of a wire before change, which is connected in a circuit board design drawing, of a pin corresponding to a pin number with the changed wire; acquiring the local name of a wire connected with a pin with the same pin number in the schematic diagram; and establishing a mapping relation between the global name and the local name.
In one possible design, the apparatus further includes: the line adjusting operation module is used for receiving a line adjusting rejection instruction and sending line adjusting rejection information to the server; or receiving a tuning confirmation instruction, updating the schematic diagram and generating a netlist document of the updated schematic diagram; uploading the netlist document to the server.
In one possible design, the mapping change module is specifically configured to search, in a schematic diagram, chips corresponding to the same chip bit number according to the chip bit number of the chip with the wire change in the circuit board design diagram; according to the pin number of the chip with the wire change in the circuit board design drawing, searching a pin with the same number as the pin number in a corresponding chip of the schematic drawing; and for the same pin in the circuit board design drawing and the schematic drawing, the following operations are carried out: if one pin of the circuit board design drawing is suspended, the same pin in the schematic drawing is connected with a lead, the lead connected with the same pin in the schematic drawing is deleted, and a mark representing deletion is marked on the same pin; if a pin of the circuit board design drawing is connected with a wire, the same pin in the schematic drawing is suspended, the connected wire is added for the same pin in the schematic drawing, and a mark for representing addition is marked on the same pin, wherein the name of the added wire is a local name corresponding to the global name of the pin of the circuit board design drawing; if the same pin in the circuit board design drawing and the schematic drawing is connected with a lead, changing the name of the lead connected with the pin of the schematic drawing into a local name corresponding to the global name of the pin connecting lead of the circuit board design drawing, and marking the same pin in the schematic drawing with a mark for representing change.
In a fourth aspect, embodiments of the present application provide a circuit board wire alignment apparatus, including: the device comprises a first pin selection module, a first pin selection module and a second pin selection module, wherein the first pin selection module is used for receiving a first pin selection request, selecting a first pin corresponding to the first pin selection request, and marking pins belonging to the same line-tuning group as the first pin, wherein in a plurality of pins belonging to the same line-tuning group, wires which can be mutually and alternately connected can be arranged between every two pins; the second pin selection module is used for receiving a second pin selection request and selecting a second pin in the pins belonging to the same wire tuning group as the first pin; the inquiry interface popping module is used for popping an inquiry interface to inquire whether a lead connected with the first pin and a lead connected with the second pin are exchanged; the pin operation module is used for responding to an exchange confirmation instruction and exchanging the conducting wire connected with the first pin and the conducting wire connected with the second pin; or in response to a cancel swap instruction, the wire connected with the first pin and the wire connected with the second pin are kept as the same.
In one possible design, the apparatus further includes: the system comprises a document generation module, a document generation module and a document generation module, wherein the document of the wire change circuit board comprises the name of the circuit board with the wire change, the chip bit number of a chip with the wire change, the pin number of a pin with the wire change, the global name of a wire connected with the pin with the wire change before the wire change and the global name of a wire connected with the pin with the wire change after the wire change; and the document sending module is used for sending the wire change circuit board document to a server.
In one possible design, the apparatus further includes: the grouping module is used for marking a plurality of chips with the same chip type as a primary screening line group according to the chip type; obtaining a plurality of pins of allowed adjusted wires in the preliminary screening wire grouping and power supply pins corresponding to the plurality of pins, wherein the plurality of pins of the allowed adjusted wires are pins with configurable functions; and dividing pins with the same power supply voltage corresponding to the power supply pins into final selected tuning line groups, wherein the final selected tuning line groups are determined tuning line groups.
In a fifth aspect, an embodiment of the present application provides an electronic device, including the method in the first aspect or any optional implementation manner of the first aspect.
In a sixth aspect, the present application provides a readable storage medium having stored thereon an executable program which, when executed by a processor, performs the method of the first aspect or any of the optional implementations of the first aspect.
In a seventh aspect, the present application provides an executable program product, which when run on a computer, causes the computer to perform the method of the first aspect or any possible implementation manner of the first aspect.
In order to make the aforementioned and other objects, features and advantages of the present invention comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.
Fig. 1 is a schematic flow chart illustrating a circuit board lead adjustment method according to an embodiment of the present disclosure;
FIG. 2 is a flow chart illustrating a part of steps of a circuit board lead adjustment method according to an embodiment of the present application;
fig. 3 is a schematic flow chart illustrating a specific implementation of a circuit board lead adjustment method according to an embodiment of the present disclosure;
FIG. 4 is a flowchart illustrating a specific step of step S130 in FIG. 1;
fig. 5 is a block diagram illustrating a structure of a circuit board wire adjusting device according to an embodiment of the present application;
fig. 6 is a block diagram illustrating a specific implementation of a circuit board wire adjusting apparatus according to an embodiment of the present disclosure.
Detailed Description
In contrast to the embodiments, in the design stage of the PCB board, in order to reduce the number of vias of the wires on the PCB board, or reduce the routing length of the wires, it is usually necessary to adjust the wires for certain chip pin connections. The connection relationship of the wires on the PCB is determined by the schematic diagram, and thus the adjustment of the wires needs to be performed simultaneously on the PCB design diagram and the schematic diagram.
In the prior art, when a PCB designer draws a PCB design drawing, wires connected to pins in the PCB design drawing are usually changed. After the PCB designer changes the PCB design drawing, the PCB design drawing with the changed lead is sent to a schematic diagram designer, and the schematic diagram designer determines whether the lead is changed without errors in principle according to the schematic diagram.
The wires connected with the pins in the PCB design drawing are usually named by global names, and the wires connected with the pins in the schematic drawing are usually named by local names, so that a schematic drawing designer needs to correspond the wire names of the PCB design drawing and the wire names in the schematic drawing according to a comparison table of the global names and the local names before judging according to the principle. The lead names of the two diagrams are manually corresponding, so that a large workload is brought to a schematic diagram designer.
The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.
Referring to fig. 1, fig. 1 shows a circuit board wire adjusting method provided in an embodiment of the present application, where the method may be executed by a circuit board wire adjusting device, the circuit board wire adjusting device may be applied to a terminal used by a schematic diagram designer, and the terminal may be a mobile terminal such as a mobile phone and a tablet computer, or may be a computer, and the method specifically includes the following steps S110 to S140:
step S110, receiving a request for viewing the change schematic diagram, and sending a request for obtaining the change lead name to a server.
The change schematic view request is a request for viewing a schematic view after a wire change.
The changed lead name obtaining request is a request for obtaining the global name of the changed lead, and the request for obtaining the global name of the changed lead is requested to the server in response to the change schematic diagram viewing request.
And step S120, receiving pin wire name information returned by the server.
The pin conductor name information includes a plurality of pin numbers, and a global name of a changed conductor connected to each of the plurality of pin numbers. The pins corresponding to each pin number are changed by connecting wires in the circuit board design drawing.
Step S130, updating the local name of the wire connected to the corresponding pin number in the schematic diagram according to the mapping relationship between the global name and the local name.
Wherein the schematic diagram is a working schematic diagram of the circuit board design diagram.
The lead wire connected to the pin with the pin number a is not changed as follows: the original conductor with the global name ABC001 is changed into the conductor with the global name XYZ 010. The wire connected to the pin with pin number b is changed as follows: the original conductor with the global name of XYZ010 is changed into a conductor with the global name of ABC 001. That is, the wires connected to the pin with the pin number a and the pin with the pin number b are interchanged.
If the local name of the conductor with global name ABC001 is c001 and the local name of the conductor with global name XYZ010 is z010, the name of the conductor connected to the pin with pin number a in the schematic diagram can be changed from c001 to z010 and the name of the conductor connected to the pin with pin number b can be changed from z010 to c 001.
Step S140, displaying the schematic diagram with the changed local name.
After receiving the requirement for viewing the change schematic diagram, the circuit board lead adjusting device firstly obtains the pin lead name information from the server, wherein the pin lead name information comprises the pin number of the pin of which the connecting lead is changed and the global name of the lead connected with each pin number. The circuit board lead adjusting device can update the local names of the leads connected with the corresponding pin numbers in the schematic diagram according to the mapping relation between the global names and the local names.
The method realizes the interchange of the local names of the changed wires in the schematic diagram, so that a schematic diagram designer can directly determine whether the changed wires in the schematic diagram meet the requirements from the principle perspective, the name replacement is not required to be carried out by manually contrasting the mapping relation between the global names and the local names, and the workload of the schematic diagram designer is reduced.
Optionally, referring to fig. 4, in an embodiment, the step S130 may specifically include the following steps S131 to S133:
step S131, according to the chip position number of the chip with the wire change in the circuit board design drawing, searching the chip corresponding to the same chip position number in the schematic drawing.
Step S132, according to the pin number of the chip with the lead change in the circuit board design drawing, searching the corresponding chip of the schematic drawing for the pin with the same number as the pin number.
Step S133, for the same pin in the circuit board design drawing and the schematic drawing, the following operations are performed:
if a pin of the circuit board design drawing is suspended, the same pin in the schematic drawing is connected with a lead, the lead connected with the same pin in the schematic drawing is deleted, and a mark representing deletion is marked on the same pin;
if one pin of the circuit board design drawing is connected with a lead, the same pin in the schematic drawing is suspended, the connected lead is added for the same pin in the schematic drawing, and a mark for representing addition is marked on the same pin, wherein the name of the added lead is a local name corresponding to the global name of the pin of the circuit board design drawing;
if the same pin in the circuit board design drawing and the schematic drawing is connected with a lead, the name of the lead connected with the pin of the schematic drawing is changed into a local name corresponding to the global name of the pin connecting lead of the circuit board design drawing, and a mark representing change is marked on the same pin in the schematic drawing.
The change relation of the pin connection of the circuit board design drawing can be directly reflected in the schematic drawing according to the mapping relation of the global name and the local name, different changes correspond to different marks, and for example, a mark for deleting the representation, a mark for increasing the representation and a mark for changing the representation can be displayed in different colors. The local name before change can be marked beside the mark representing change, so that a schematic diagram designer can know the change condition of the pin more intuitively, and the schematic diagram designer can judge the change condition more conveniently in principle.
It can be understood that the changed schematic diagram is a revocable schematic diagram, and if the schematic diagram designer wants to refute the lead change of the circuit board designer, the schematic diagram can be restored to the original state by triggering the revoking action; if the schematic diagram designer agrees with the lead change identifier of the circuit board designer and can execute the confirmation action, the mark trace of the schematic diagram can be absorbed, the changed schematic diagram is used as a new schematic diagram, and the schematic diagram designer does not need to artificially delete the leads, add the leads and change the local names of the leads.
Optionally, in the process of adding a connecting wire to the same pin in the schematic diagram, the direction of the pin may be determined, so that the connecting wire and the pin keep the same direction and extend from the position of the pin. The length over which the connection line extends may be determined from the local name of the connection line. For example, the number of characters of the name of the wire can be obtained, the length of the connecting wire corresponding to the number of the characters is determined, whether the space corresponding to the length of the connecting wire is intersected with other wires or not is judged, and if not, the wire is drawn in a schematic diagram; if so, the length of the conducting wire can be shortened, so that the conducting wire can not be crossed with other conducting wires.
Optionally, after step S140, the method further comprises: receiving a line-transferring refund instruction and sending line-transferring refund information to the server; or receiving a tuning confirmation instruction, updating the schematic diagram and generating a netlist document of the updated schematic diagram; uploading the netlist document to the server.
After judging whether the wire changed in the schematic diagram meets the requirement from the principle angle, a schematic diagram designer can obtain two results which meet the requirement or not.
If the schematic diagram designer judges that the changed lead does not meet the requirement from the principle angle, a line adjusting and returning instruction can be triggered to enable the circuit board lead adjusting device to send line adjusting and returning information to the server; if the schematic diagram designer judges that the changed lead meets the requirement from the principle perspective, a line adjusting confirmation instruction can be triggered, so that the circuit board lead adjusting device updates the schematic diagram according to the changed lead and generates a netlist document corresponding to the updated schematic diagram.
The operation of updating the schematic diagram of the circuit board lead adjusting device comprises the following operations: the lead of the pin connection of a chip is deleted in the schematic diagram, the lead of the pin connection of a chip is added, and the local name of the lead connected with the pin of the chip is changed.
The netlist document records the updated information of the schematic diagram, and after the netlist document is uploaded to the server, a circuit board designer can actively acquire the latest netlist document from the server, so that the circuit board design diagram can be consistent with the schematic diagram according to the latest netlist document stored in the server.
Optionally, before step S130, the method may further include: and establishing a mapping relation between the global name and the local name.
Referring to fig. 2, establishing a mapping relationship between the global name and the local name may specifically be implemented by steps S210 to S250:
and step S210, searching a chip corresponding to the same chip bit number in a schematic diagram according to the chip bit number of the chip with the wire change in the circuit board design diagram.
The chip bit number is identification information for identifying the uniqueness of the chip, and the chip bit number is the same in the circuit board design drawing and the schematic drawing, which means the same chip. Therefore, the chip with the changed transmission wire can be searched from the schematic diagram according to the chip bit number.
Step S220, according to the pin number of the chip with wire change in the circuit board design drawing, searching the corresponding chip of the schematic drawing for the pin with the same number as the pin number.
After the chips are determined in the schematic diagram, different pin numbers represent unique pins in the same chip. Therefore, the same pin can be identified in the schematic diagram according to the pin number of the pin with the wire change in the circuit board design diagram.
Step S230, obtaining the global name of the wire before the change, which is connected in the circuit board design drawing, of the pin corresponding to the pin number where the wire change occurs.
Step S240, obtaining the local name of the wire connected to the pin with the same pin number in the schematic diagram.
After the pin is determined in the schematic diagram, the global name of the wire before the wire change occurs, which is connected to the pin in the circuit board design diagram, and the local name of the wire, which is connected to the pin in the schematic diagram, can be respectively obtained.
Step S250, establishing a mapping relationship between the global name and the local name.
The lead before change connected in the circuit board design drawing and the lead connected in the schematic drawing are the same lead, so that the mapping relation between the global name and the local name is established.
The mapping relation between the global names and the local names can be established in advance; or when the local name of the wire is required to be acquired, the local name can be established on the spot according to the scheme. The timing of the mapping establishment should not be construed as a limitation of the present application.
Referring to fig. 3, fig. 3 is a schematic flow chart illustrating a specific implementation manner of a circuit board wire adjusting method according to an embodiment of the present application, where the method is executed by a circuit board wire adjusting device, the circuit board wire adjusting device may be applied to a terminal used by a circuit board designer, the terminal may be a mobile terminal such as a mobile phone, a tablet computer, or a computer, and specifically includes the following steps S310 to S340:
step S310, receiving a first pin selection request, selecting a first pin corresponding to the first pin selection request, and marking pins belonging to the same tuning group as the first pin.
The circuit board designer can trigger the first pin selection request in various ways, for example, the circuit board designer can select the first pin in a way that the mouse clicks the first pin in the circuit board design drawing, or can select the first pin in a way that the finger clicks the first pin in the circuit board design drawing displayed on the touch screen interface. The specific manner in which the first pin election request is triggered should not be construed as limiting the application.
And in the plurality of pins belonging to the same line-adjusting group, every two pins can be mutually connected with a wire in a changing way. After the circuit board designer selects the first pin, the pins grouped by the same line adjustment with the first pin are marked, so that the circuit board designer can conveniently select the proper pins, and the change of the lead connected with the two pins is carried out.
Optionally, when a pin of the same tuning line group as the first pin is marked, the pin of the same tuning line group may be set to be highlighted, or a special symbol may be marked on the pin of the same tuning line group, and the specific manner of marking should not be construed as limiting the application.
Step S320, receiving a second pin selection request, and selecting a second pin of the pins belonging to the same tuning group as the first pin.
The circuit board designer may trigger the second pin selection request in various manners, for example, the circuit board designer may select the second pin by clicking the second pin in the circuit board design drawing with a mouse, or may select the second pin by clicking the second pin in the circuit board design drawing displayed on the touch screen interface with a finger. The specific manner in which the second pin opt-in request is triggered should not be construed as a limitation of the present application.
And step S330, popping up an inquiry interface to inquire whether the conducting wire connected with the first pin and the conducting wire connected with the second pin are exchanged.
Step S340, responding to the confirmed exchange instruction, and exchanging the conducting wire connected with the first pin and the conducting wire connected with the second pin; or in response to a cancel swap instruction, the wire connected with the first pin and the wire connected with the second pin are kept as the same.
When the second pin is selected by the circuit board designer, the circuit board lead adjusting device can pop up an inquiry interface to inquire whether the leads connected with the first pin and the second pin are interchanged or not, and the interchange of the first pin and the second pin is completed or cancelled according to the selection of the circuit board designer.
The circuit board designer may repeat the above steps S310 to S340 a plurality of times, thereby implementing the change of the plurality of pin connection wires.
Optionally, after exchanging the wires of the first pin connection with the wires of the second pin connection in response to the confirmation exchange instruction, the method further comprises:
generating a wire change circuit board document, wherein the wire change circuit board document comprises the name of a circuit board with a wire change, the chip bit number of a chip with the wire change, the pin number of a pin with the wire change, the global name of a wire connected with the pin with the wire change before the wire change and the global name of a wire connected with the pin with the wire change after the wire change; and sending the wire change circuit board document to a server.
Alternatively, the above-described wire-altering circuit board document may be generated when the circuit board designer selects the first pin, and the document may be named by the circuit board name. The wire-change circuit board document may record the model number of the chip in addition to the name of the circuit board in which the wire change occurs, the chip bit number of the chip in which the wire change occurs, the pin number of the pin in which the wire change occurs, the global name of the wire connected to the pin in which the wire change occurs before the wire change, and the global name of the wire connected to the pin in which the wire change occurs after the wire change.
Optionally, the first pin and the second pin may be both connected with a wire, and the first pin and the second pin are selected to realize the exchange of the wires connected with the first pin and the second pin; only one of the first pin and the second pin can be connected with a conducting wire, the conducting wire is not connected with the first pin, and the conducting wire is changed from being connected with the first pin to being connected with the second pin by selecting the first pin and the second pin if the second pin is not connected. The names of the pins to which no wires are connected may be represented by NULL.
After the circuit board lead adjusting device completes the lead exchange of the two pins, a lead change circuit board document can be automatically generated. The wire change circuit board document records the name of the circuit board with the wire change, the bit number of the chip with the wire change, the pin number with the wire change and the global name of the wire connected before and after the wire change of the pin sending the wire change. The wire-changing circuit board document is sent to a server, so that when a schematic diagram designer wants to check the changed schematic diagram, the circuit board wire adjusting device obtains the pin wire name information in the wire-changing circuit board document from the server. The schematic diagram designer can reject the problematic tuning line, and the schematic diagram designer and the circuit board designer can repeatedly interact until the tuning line is finished.
Optionally, before step S310, the method further includes: marking a plurality of chips with the same chip type as a primary screening and adjusting line group according to the chip type; obtaining a plurality of pins of allowed adjusted wires in the preliminary screening wire grouping and power supply pins corresponding to the plurality of pins, wherein the plurality of pins of the allowed adjusted wires are pins with configurable functions; and dividing pins with the same power supply voltage corresponding to the power supply pins into final selected tuning line groups, wherein the final selected tuning line groups are determined tuning line groups.
The chip types include a Complex Programmable Logic Device (CPLD) chip, a Field Programmable Gate Array (FPGA) chip, a General-purpose input/output (GPIO) chip, a switch chip, and a Physical layer interface (PHY) chip.
The method comprises the steps of dividing a plurality of chips with the same chip type into the same group, then respectively obtaining a power supply pin corresponding to each pin for a plurality of pins allowing to be tuned in the same group, and dividing the pins with the same power supply voltage where the power supply pins are located into final tuning line groups, thereby realizing the grouping process of the pins. And the leads connected between every two pins in the final selection line-adjusting group can be interchanged.
After the line adjusting group is determined, the type of the chip, the pin number allowing the line to be adjusted, the power supply pin corresponding to the pin where the pin number allowing the line to be adjusted is located and the line adjusting group of the pin can be stored in a chip database, and the chip database can be located in a circuit board wire adjusting device or a server.
Next, a circuit board lead adjustment method will be described with specific examples:
without setting the PCB designation PB030MBH010, a circuit board designer wants to change the conductive lines connected to the pin a17 and the pin B22 in the chip with the bit number U22 in the PCB design drawing. The chip with the bit number of U22 has the model number of 010677, the global name of a wire connected with the pin A17 in the PCB design drawing is PORT _ LED22, and the global name of a wire connected with the pin B22 in the PCB design drawing is RESET _ PHY.
When the circuit board designer selects one of A17 or B22 (without first selecting A17), since A17 and B22 belong to the same tuning group, the other circuit board lead adjusting device is marked, and at this time, a lead modified circuit board document PB030MBH010.txt with the same name as the name of the set PCB can be generated. After the circuit board designer selects a17 and B22 in sequence, the inquiry interface pops up to inquire whether to swap the conductor of the a17 connection with the conductor of the B22 connection. The following can be recorded in the document pb030mbh010.txt after receiving a confirmation exchange command triggered by the circuit board designer:
PCB:PB030MBH010
Part Reference:U22
Part Number:*010677
Pin Number Forward Net After Net
A17 ;PORT_LED22 ; RESET_PHY
B22 ;RESET_PHY ; PORT_LED22
the document may be sent to the server by the circuit board lead adjustment device. A folder with the same name as the document pb030mbh010.txt can be established at the server: PB030MBH010 folder.
When a schematic diagram designer wants to request to view a schematic diagram after the lead is changed, the circuit board lead adjusting device sends a lead name changing obtaining request to a server, so that the document or part of the content in the document is obtained: the global name of the changed wire connected to each of the plurality of pins and the plurality of pin numbers of the connected wire is changed.
Then, the circuit board lead adjusting device can directly establish the mapping relation between the global names and the local names, and then update the local names of the leads connected with the corresponding pin numbers in the schematic diagram according to the mapping relation; the local name of the wire connected with the corresponding pin number in the schematic diagram can be updated according to the pre-established mapping relationship.
Then, a schematic diagram designer directly judges whether the changed lead in the schematic diagram meets the requirements from the perspective of the principle for the changed schematic diagram. In the event that it is determined that the requirements are met, the circuit board wire alignment device may update the schematic.
The updating schematic diagram is executed by a cadence background TCL script, and part of operation codes are executed as follows:
deleting signal lines on pins
set lend[$Pin_DboWire GetEndPoint$lStatus]
set lendx[expr[DboTclHelper_sGetCPointX$lend].0/100]
set lendy[expr[DboTclHelper_sGetCPointY$lend].0/100]
SelectObject$lendx$lendy 0
Delete
Drawing signal lines and giving names to the lines
PlaceWire$PinEndx$PinEndy$NewOverX$PinEndy
set NewMidX[expr$PinEndx+0.1]
PlaceNetAlias$NewMidX$PinEndy$Pin_NewNetName
Wire name replacement
DboAlias_SetName$Wire_DboAlias$CsPin_NewNetName
After the schematic diagram is updated, the circuit board lead adjusting device can automatically generate a netlist document of the updated schematic diagram; uploading the netlist document to the server. In the uploading process, a PB030MBH010_ netlist _1 folder can be created under the PB030MBH010 folder under the server. The newly generated netlist document is stored in the folder of PB030MBH010_ netlist _ 1.
If there is a new automatically generated netlist document, a new folder can be created under the PB030MBH010 folder under the server: and the PB030MBH010_ netlist _2 folder is used for storing the netlist document generated by updating.
By analogy, when the nth reticulation document is made, a new folder is created under the PB030MBH010 folder under the server: PB030MBH010_ netlist _ n folder.
A circuit board designer actively acquires the latest netlist document from a server, so that a circuit board design diagram can be consistent with a schematic diagram according to the latest netlist document stored in the server.
PCB:PB030MBH010
Part Reference:U22
Part Number:*010677
Netlist:PB030MBH010_netlist_n
Pin Number Forward Net After Net
A17 ;PORT_LED22 ; RESET_PHY
B22 ;RESET_PHY ; PORT_LED22
Referring to fig. 5, fig. 5 shows a circuit board wire adjustment apparatus provided in the present application, which is applied to the circuit board wire adjustment apparatus, the apparatus 400 includes:
the request sending module 410 is configured to receive a request for viewing a change schematic diagram, and send a request for obtaining a change conductor name to a server.
The wire name receiving module 420 is configured to receive pin wire name information returned by the server, where the pin wire name information includes a plurality of pin numbers and a global name of a wire after change of connection of each pin number in the plurality of pin numbers, and a pin corresponding to each pin number is changed by a wire that has been connected in a circuit board design drawing.
And the mapping change module 430 is configured to update the local name of the wire connected to the corresponding pin number in a schematic diagram according to a mapping relationship between the global name and the local name, where the schematic diagram is a working schematic diagram of the circuit board design diagram.
And an image display module 440, configured to display the schematic diagram of the changed local name.
The device further comprises:
and the mapping relation establishing module is used for establishing the mapping relation between the global name and the local name.
The mapping relation establishing module is specifically used for searching chips corresponding to the same chip bit number in the schematic diagram according to the chip bit number of the chip with the lead change in the circuit board design diagram; according to the pin number of the chip with the wire change in the circuit board design drawing, searching a pin with the same number as the pin number in a corresponding chip of the schematic drawing; acquiring the global name of a wire before change, which is connected in a circuit board design drawing, of a pin corresponding to a pin number with the changed wire; acquiring the local name of a wire connected with a pin with the same pin number in the schematic diagram; and establishing a mapping relation between the global name and the local name.
The line adjusting operation module is used for receiving a line adjusting rejection instruction and sending line adjusting rejection information to the server; or receiving a tuning confirmation instruction, updating the schematic diagram and generating a netlist document of the updated schematic diagram; uploading the netlist document to the server.
The circuit board lead adjusting device shown in fig. 5 is the same as the circuit board lead adjusting method shown in fig. 1, and the description thereof is omitted here.
Referring to fig. 6, fig. 6 shows a circuit board wire adjusting apparatus provided in an embodiment of the present application, which is applied to a terminal used by a circuit board designer, and the apparatus 500 includes:
a first pin selecting module 510, configured to receive a first pin selecting request, select a first pin corresponding to the first pin selecting request, and mark a pin belonging to the same tuning group as the first pin, where, in multiple pins belonging to the same tuning group, a wire that can be connected to each other is changed between every two pins.
And a second pin selecting module 520, configured to receive a second pin selecting request, and select a second pin of the pins belonging to the same tuning group as the first pin.
And an inquiry interface popping module 530 for popping an inquiry interface to inquire whether to exchange the lead wire connected with the first pin and the lead wire connected with the second pin.
A pin operating module 540, configured to swap, in response to an acknowledge swap instruction, a wire connected to the first pin and a wire connected to the second pin; or in response to a cancel swap instruction, the wire connected with the first pin and the wire connected with the second pin are kept as the same.
The device further comprises:
the file generation module is used for generating a wire change circuit board file, wherein the wire change circuit board file comprises the name of a circuit board with a wire change, the chip bit number of a chip with the wire change, the pin number of a pin with the wire change, the global name of a wire connected with the pin with the wire change before the wire change, and the global name of a wire connected with the pin with the wire change after the wire change.
And the document sending module is used for sending the wire change circuit board document to a server.
The grouping module is used for marking a plurality of chips with the same chip type as a primary screening line group according to the chip type; obtaining a plurality of pins of allowed adjusted wires in the preliminary screening wire grouping and power supply pins corresponding to the plurality of pins, wherein the plurality of pins of the allowed adjusted wires are pins with configurable functions; and dividing pins with the same power supply voltage corresponding to the power supply pins into final selected tuning line groups, wherein the final selected tuning line groups are determined tuning line groups.
The circuit board lead adjusting device shown in fig. 6 corresponds to the circuit board lead adjusting method shown in fig. 2, and the description thereof is omitted here.
The circuit board lead adjusting method and the circuit board lead adjusting device can realize the lead of the same type of chips which is connected in a cross-chip changing manner; the circuit board designer and the schematic diagram designer can interact in time, the original serial working mode is converted into parallel working, and the efficiency is improved; the circuit board lead adjusting device can automatically modify the schematic diagram according to the circuit diagram line adjusting requirements, and errors caused by manual negligence are avoided.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions when actually implemented, and for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some communication interfaces, and may be in an electrical, mechanical or other form.
In addition, units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
Furthermore, the functional modules in the embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.
In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims (10)

1. A circuit board lead adjustment method is characterized by comprising the following steps:
receiving a request for checking a change schematic diagram, and sending a request for obtaining a change lead name to a server;
receiving pin wire name information returned by the server, wherein the pin wire name information comprises a plurality of pin numbers and the global name of a changed wire connected with each pin number in the plurality of pin numbers, and the pin corresponding to each pin number is changed by the connected wire in a circuit board design drawing;
updating the local name of the lead connected with the corresponding pin number in a schematic diagram according to the mapping relation between the global name and the local name, wherein the schematic diagram is a working schematic diagram of the circuit board design diagram;
and displaying the schematic diagram of the changed local name.
2. The method according to claim 1, wherein before the updating the local name of the wire connected to the corresponding pin number in the schematic diagram according to the mapping relationship between the global name and the local name, the method further comprises:
and establishing a mapping relation between the global name and the local name.
3. The method of claim 2, wherein the establishing the mapping relationship between the global names and the local names comprises:
searching a chip corresponding to the same chip position number in a schematic diagram according to the chip position number of the chip with the wire change in the circuit board design diagram;
according to the pin number of the chip with the wire change in the circuit board design drawing, searching a pin with the same number as the pin number in a corresponding chip of the schematic drawing;
acquiring the global name of a wire before change, which is connected in a circuit board design drawing, of a pin corresponding to a pin number with the changed wire;
acquiring the local name of a wire connected with a pin with the same pin number in the schematic diagram;
and establishing a mapping relation between the global name and the local name.
4. The method of claim 1, wherein after the exposing the schematic graph with the changed local name, the method further comprises:
receiving a line-transferring refund instruction and sending line-transferring refund information to the server; or
Receiving a tuning confirmation instruction, updating the schematic diagram and generating a netlist document of the updated schematic diagram;
uploading the netlist document to the server.
5. The method according to claim 1, wherein the updating the local name of the wire connected to the corresponding pin number in the schematic diagram according to the mapping relationship between the global name and the local name comprises:
searching a chip corresponding to the same chip position number in a schematic diagram according to the chip position number of the chip with the wire change in the circuit board design diagram;
according to the pin number of the chip with the wire change in the circuit board design drawing, searching a pin with the same number as the pin number in a corresponding chip of the schematic drawing;
and for the same pin in the circuit board design drawing and the schematic drawing, the following operations are carried out:
if one pin of the circuit board design drawing is suspended, the same pin in the schematic drawing is connected with a lead, the lead connected with the same pin in the schematic drawing is deleted, and a mark representing deletion is marked on the same pin;
if a pin of the circuit board design drawing is connected with a wire, the same pin in the schematic drawing is suspended, the connected wire is added for the same pin in the schematic drawing, and a mark for representing addition is marked on the same pin, wherein the name of the added wire is a local name corresponding to the global name of the pin of the circuit board design drawing;
if the same pin in the circuit board design drawing and the schematic drawing is connected with a lead, changing the name of the lead connected with the pin of the schematic drawing into a local name corresponding to the global name of the pin connecting lead of the circuit board design drawing, and marking the same pin in the schematic drawing with a mark for representing change.
6. A circuit board lead adjustment method is characterized by comprising the following steps:
responding to a first pin selection request, selecting a first pin corresponding to the first pin selection request, and marking pins belonging to the same line-adjusting grouping with the first pin, wherein in a plurality of pins belonging to the same line-adjusting grouping, wires which can be mutually and alternately connected are arranged between every two pins;
receiving a second pin selection request, and selecting a second pin in the pins belonging to the same wire regulation grouping with the first pin;
popping up an inquiry interface to inquire whether a lead wire connected with the first pin and a lead wire connected with the second pin are exchanged;
in response to an acknowledge swap instruction, swapping the wire connected to the first pin with the wire connected to the second pin; or
And in response to the instruction of canceling the exchange, keeping the conductor connected with the first pin and the conductor connected with the second pin as the same.
7. The method of claim 6, wherein after the receiving an acknowledge swap instruction to swap the wires connected to the first pin with the wires connected to the second pin, the method further comprises:
generating a wire change circuit board document, wherein the wire change circuit board document comprises the name of a circuit board with a wire change, the chip bit number of a chip with the wire change, the pin number of a pin with the wire change, the global name of a wire connected with the pin with the wire change before the wire change and the global name of a wire connected with the pin with the wire change after the wire change;
and sending the wire change circuit board document to a server.
8. The method of claim 6, wherein prior to said receiving a first pin election request, said first pin election request electing a corresponding first pin, said method further comprises:
marking a plurality of chips with the same chip type as a primary screening and adjusting line group according to the chip type;
obtaining a plurality of pins of allowed adjusted wires in the preliminary screening wire grouping and power supply pins corresponding to the plurality of pins, wherein the plurality of pins of the allowed adjusted wires are pins with configurable functions;
and dividing pins with the same power supply voltage corresponding to the power supply pins into final selected tuning line groups, wherein the final selected tuning line groups are determined tuning line groups.
9. A circuit board wire alignment apparatus, comprising:
the request sending module is used for receiving a request for checking the change schematic diagram and sending a request for obtaining the name of the change lead to the server;
the wire name receiving module is used for receiving pin wire name information returned by the server, wherein the pin wire name information comprises a plurality of pin numbers and the global name of a changed wire connected with each pin number in the plurality of pin numbers, and the pin corresponding to each pin number is changed by the connected wire in a circuit board design drawing;
the mapping change module is used for updating the local names of the wires connected with the corresponding pin numbers in a schematic diagram according to the mapping relation between the global names and the local names, wherein the schematic diagram is a working schematic diagram of the circuit board design diagram;
and the image display module is used for displaying the schematic diagram of the changed local name.
10. A circuit board wire alignment apparatus, comprising:
the device comprises a first pin selection module, a first pin selection module and a second pin selection module, wherein the first pin selection module is used for receiving a first pin selection request, selecting a first pin corresponding to the first pin selection request, and marking pins belonging to the same line-tuning group as the first pin, wherein in a plurality of pins belonging to the same line-tuning group, wires which can be mutually and alternately connected can be arranged between every two pins;
the second pin selection module is used for receiving a second pin selection request and selecting a second pin in the pins belonging to the same wire tuning group as the first pin;
the inquiry interface popping module is used for popping an inquiry interface to inquire whether a lead connected with the first pin and a lead connected with the second pin are exchanged;
the pin operation module is used for responding to an exchange confirmation instruction and exchanging the conducting wire connected with the first pin and the conducting wire connected with the second pin; or in response to a cancel swap instruction, the wire connected with the first pin and the wire connected with the second pin are kept as the same.
CN202010590362.6A 2020-06-24 2020-06-24 Circuit board lead adjusting method and device Pending CN113836857A (en)

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