CN113835940A - Method, system, equipment and storage medium for setting serial interrupt mode - Google Patents
Method, system, equipment and storage medium for setting serial interrupt mode Download PDFInfo
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- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
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Abstract
The invention provides a method, a system, equipment and a storage medium for setting a serial interrupt mode, wherein the method comprises the steps of communicating a sending end and a receiving end of a serial port to be tested; sending a first data packet through a sending end of the serial port to be tested in different interrupt modes, and receiving a second data packet through a receiving end of the serial port to be tested; judging the data receiving rate in different interrupt modes according to the number of the second data packets and the number of the first data packets; the second data packet is a valid first data packet; and comparing the data receiving rate in different interrupt modes to determine the interrupt mode of the current system. The invention also provides a system, equipment and a storage medium for setting the serial interrupt mode based on the method for setting the serial interrupt mode. The invention automatically detects the serial port communication condition under different modes and automatically configures the interrupt mode, thereby improving the development efficiency and the test efficiency and avoiding spending much time to solve the relevant problems caused by the mode setting error.
Description
Technical Field
The invention belongs to the technical field of computer firmware development, and particularly relates to a method, a system, equipment and a storage medium for setting a serial interrupt mode.
Background
Serial IRQ (SIRQ) is a single signal wire reporting interrupt requests on an actual hardware connection that can be used to transfer information between a host and a device. This signal line is synchronized to the PCI clock, following the tri-state protocol of the PCI signal. The CPU and SIO are connected via the LPC bus, which contains the SIRQ signal inside it, which is used for interrupt requests, as shown in fig. 1, which shows a schematic diagram of SOC connection to SIO.
SIRQ has two modes to choose from, one is Continuous mode, i.e., Continuous mode, and one is Quiet mode, i.e., static mode. One difference between these two modes is that the initiator of the Start frame is different, and Continuous is similar to the polling mode, and consumes power compared to the Quiet mode. This mode needs to be set manually empirically. In the BIOS development process, if the set mode is not matched with the actual design, many problems may be caused, such as serial printing is not output, and a serial device is not working properly. The debugging process may go through long experimentation to locate the problem, and a great deal of labor and time may be invested in the process to correct the problem. Therefore, the technical problem that the correct Serial IRQ mode is automatically identified and optimized, and unnecessary debugging time is reduced is required to be solved. Improper SIRQ configuration may cause problems such as slow serial output or no input response. The Debug process may go through long experimentation to locate the problem, and a great deal of labor and time may be invested in the process to correct the problem.
Disclosure of Invention
In order to solve the above technical problems, the present invention provides a method, system, device and storage medium for setting a serial interrupt mode. The development efficiency and the test efficiency are improved, and the problem that a lot of time is spent on solving the related problems caused by mode setting errors is avoided.
In order to achieve the purpose, the invention adopts the following technical scheme:
a method of setting a serial interrupt mode, comprising the steps of:
the sending end and the receiving end of the serial port to be detected are communicated;
sending a first data packet through a sending end of the serial port to be tested in different interrupt modes, and receiving a second data packet through a receiving end of the serial port to be tested; judging the data receiving rate in different interrupt modes according to the number of the second data packets and the number of the first data packets; the second data packet is a valid first data packet;
and comparing the data receiving rate in different interrupt modes to determine the interrupt mode of the current system.
Further, the sending the first data packet through the sending end of the serial port to be tested in different interrupt modes, and receiving the second data packet through the receiving end of the serial port to be tested further includes:
sending a first data packet through a sending end of a serial port to be detected in different interrupt modes, judging whether data is received within preset time, and if the data is not received, failing to transmit;
if the data is received, the received data and the sent first data packet are verified, and if the verification is successful, the transmission is successful; if the check fails, the transmission is failed;
and finishing sending all the data packets, and counting all the received second data packets.
Further, the data receiving rate is the number of second data packets/the number of first data packets.
Further, the determining the interrupt mode of the current system by comparing the sizes of the data receiving rates in the different interrupt modes specifically includes: and selecting the interrupt mode corresponding to the maximum data receiving rate as the interrupt mode of the current system.
Further, the determining the interrupt mode of the current system by comparing the magnitudes of the data receiving rates in the different interrupt modes further includes: if the data receiving rate is the same in different interrupt modes, the interrupt mode of the system is arbitrarily selected.
Further, if the data is received, the received data and the sent first data packet are verified, and if the verification is successful, the transmission is successful; if the check fails, the method for failed transmission is as follows:
receiving data, firstly checking whether a start mark and a stop mark exist, and if any one of the start mark and the stop mark does not exist, marking the data as invalid data;
if the received data contains the start mark and the stop mark, performing cyclic redundancy check on the received data, and if the cyclic redundancy check passes, determining the received data to be valid data, otherwise, determining the received data to be invalid data.
Further, after the transmitting end and the receiving end of the serial port to be detected are communicated, the system input and output system inquires whether the flag bit is set, and if the flag bit is not set, an interrupt mode is configured; the flag bit is used for marking whether the test is performed or not.
The invention also provides a system for setting the serial interrupt mode, which comprises a communication module, a test mode and a comparison module;
the communication module is used for communicating a sending end and a receiving end of the serial port to be tested;
the test module is used for sending a first data packet through a sending end of the serial port to be tested in different interrupt modes and receiving a second data packet through a receiving end of the serial port to be tested; judging the data receiving rate in different interrupt modes according to the number of the second data packets and the number of the first data packets; the second data packet is a valid first data packet;
the comparison module is used for comparing the data receiving rates under different interrupt modes to determine the interrupt mode of the current system.
The invention also proposes a device comprising:
a memory for storing a computer program;
a processor for implementing the method steps when executing the computer program.
The invention also proposes a readable storage medium having stored thereon a computer program which, when being executed by a processor, carries out the method steps.
The effect provided in the summary of the invention is only the effect of the embodiment, not all the effects of the invention, and one of the above technical solutions has the following advantages or beneficial effects:
the invention provides a method, a system, equipment and a storage medium for setting a serial interrupt mode, wherein the method comprises the steps of communicating a sending end and a receiving end of a serial port to be tested; sending a first data packet through a sending end of the serial port to be tested in different interrupt modes, and receiving a second data packet through a receiving end of the serial port to be tested; judging the data receiving rate in different interrupt modes according to the number of the second data packets and the number of the first data packets; the second data packet is a valid first data packet; and comparing the data receiving rate in different interrupt modes to determine the interrupt mode of the current system. The invention also provides a system, equipment and a storage medium for setting the serial interrupt mode based on the method for setting the serial interrupt mode. The invention is used for solving the problems that improper SIRQ configuration in the prior art causes slow serial port output or no input response and the like. The data receiving rate of the serial port is tested in different interrupt modes, and the interrupt mode of the system is determined by judging the magnitude of the data receiving rate in different interrupt modes. The invention automatically detects the serial port communication condition under different modes and automatically configures the interrupt mode, thereby improving the development efficiency and the test efficiency and avoiding spending much time to solve the relevant problems caused by the mode setting error.
Drawings
FIG. 1 is a schematic diagram illustrating the connection between SOC and SIO in the prior art;
fig. 2 is a signal connection diagram of an SIO serial port in embodiment 1 of the present invention;
fig. 3 is a flowchart of a method for setting a serial interrupt mode according to embodiment 1 of the present invention;
fig. 4 is a schematic diagram of a system for setting a serial interrupt mode according to embodiment 2 of the present invention.
Detailed Description
In order to clearly explain the technical features of the present invention, the following detailed description of the present invention is provided with reference to the accompanying drawings. The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. To simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. It should be noted that the components illustrated in the figures are not necessarily drawn to scale. Descriptions of well-known components and processing techniques and procedures are omitted so as to not unnecessarily limit the invention.
Example 1
The embodiment 1 of the invention provides a method for setting a serial interrupt mode, which is used for automatically testing the serial communication condition of SIRQ in different modes and automatically configuring the interrupt mode. The Serial IRQ (SIRQ) is a single signal wire reporting an interrupt request on an actual hardware connection, and can be used for transferring information between a host and a device.
Before testing, the signal connection between the sending end and the receiving end of the serial port to be tested is needed. As shown in fig. 2, which is a signal connection diagram of an SIO serial port in embodiment 1 of the present invention, only after TX (transmitting end) and RX (receiving end) are connected, automatic detection and configuration may be performed.
Before the test program runs, it is first detected whether the serial ports TX and RX of the SIO are connected, and if so, the test can be started. After the input and output system is started, a flag bit is inquired, and if the flag bit is not set, the automatic configuration action is started, which indicates that the test is not performed.
After the test is started, sending a first data packet through a sending end of the serial port to be tested in different interrupt modes, and receiving a second data packet through a receiving end of the serial port to be tested; judging the data receiving rate in different interrupt modes according to the number of the second data packets and the number of the first data packets; the second packet is a valid first packet.
Firstly, a default SIRQ mode of a system is kept for testing, the testing process is that the SOC sends a large number of data packets to the outside through a serial port, after each data packet is sent, the SOC waits for receiving the data packet, and if the data packet is not received within a certain time after the data packet is sent, the transmission is considered to be failed. If the data is received within the specified time, the data is checked with the sent data, if the data is checked correctly, the data is considered to be transmitted successfully once, otherwise, the data is considered to be transmitted unsuccessfully. And repeating the data transmission and verification work until all the data packets are transmitted. After the data is sent, the effective number of the received complete data packets is counted and compared with the number of the sent data packets, a percentage (effective receiving rate) is given, the result is stored in a variable, then the SIRQ mode is changed, and the detection is repeated. The two results are compared, and the mode with higher effective receiving rate is selected as the serial interrupt mode of the system.
Although the mode of serial interrupts may be automatically configured. However, when the result of setting the SIRQ mode to be the Continuous mode and the result of setting the SIRQ mode to be the Quiet mode have little difference, the two modes can be shown, and the user can configure the two modes according to actual needs. The Quiet mode is selected if power savings are desired, and the Continuous mode is selected if performance preference is desired.
After the automatic configuration work is completed, a completion flag bit is recorded, the system inquires the flag bit when the system is started next time, and the automatic configuration work cannot be performed if the flag bit is set.
Fig. 3 is a flowchart of a method for setting a serial interrupt mode according to embodiment 1 of the present invention.
And sending the data packet to a receiving end based on the current SIRQ mode. 10000 data packets are transmitted by default, the content of each data packet is the same, and the requirement of 10000 times is achieved by a circular transmission mode. The number of such transmissions can be adjusted, and if not, can be reduced as many times to reduce the auto-configuration time. The transmitted data format needs to be transmitted according to the structure shown in table 1 below. After a data packet is sent, the data sending completion flag bit of the serial port needs to be checked to ensure that the data sending is completed. After the data transmission is completed, the receiving end starts to receive the data, and the received data needs to be analyzed so as to ensure that the received data is complete and effective.
The following table 1 is a data structure:
| AABB | ...... | CRC | CCDD |
| start mark | Data of | Data CRC check result | Stop sign |
The received data firstly checks the start mark and the stop mark, if the two marks are not existed, the data at the receiving end is considered to be incomplete, and the data is marked as invalid data. If the received data contains the start mark and the stop mark, the CRC check is carried out on the data, the check result is compared with the transmitted CRC check result, if the check result is not consistent with the transmitted CRC check result, the data is considered to be invalid data, otherwise, the data is recorded as one effective data transmission. Wherein the CRC check is a cyclic redundancy check. Meanwhile, if the receiving end cannot receive the data for a long time after the data is sent and the waiting time is exceeded (the time is set to be 1 minute by default), the data transmission is considered to be failed and is recorded as one-time invalid transmission. After 10000 times of data transmission and reception are carried out circularly, the number of the received effective data is compared with the number of transmission times, and the result is stored in a variable.
SIRQ after one mode of test is completed, the other mode is automatically changed, and the test is restarted. The test procedure is the same as the above test procedure, and the results of the test are stored in variables.
The test results of the two modes are compared, and if the difference is large, the mode with high effective receiving rate is selected as the SIRQ default mode. If the difference between the two is not large and is basically consistent, the display result allows the user to select the power saving mode or the performance mode.
The test results of the two modes are compared, and if the difference is large, the mode with high effective receiving rate is selected as the SIRQ default mode. If the difference between the two is not large and is basically consistent, the display result allows the user to select the power saving mode or the performance mode.
The invention aims to solve the problems that improper SIRQ configuration can cause slow serial port output or no input response and the like. The Debug process may go through long experimentation to locate the problem, and a great deal of labor and time may be invested in the process to correct the problem. Therefore, the correct Serial IRQ mode is automatically identified and optimized, unnecessary debugging time can be reduced, and development efficiency is greatly improved.
Example 2
Based on the method for setting the serial interrupt mode in embodiment 1 of the present invention, embodiment 2 of the present invention further provides a system for setting the serial interrupt mode, for example, fig. 4 is a schematic diagram of the system for setting the serial interrupt mode in embodiment 2 of the present invention, and the system includes a communication module, a test module, and a comparison module;
the communication module is used for communicating a sending end and a receiving end of the serial port to be detected;
the test module is used for sending a first data packet through a sending end of the serial port to be tested in different interrupt modes and receiving a second data packet through a receiving end of the serial port to be tested; judging the data receiving rate in different interrupt modes according to the number of the second data packets and the number of the first data packets; the second data packet is a valid first data packet;
the comparison module is used for comparing the data receiving rates under different interrupt modes to determine the interrupt mode of the current system.
The process executed by the communication module is as follows: before the test program runs, it is first detected whether the serial ports TX and RX of the SIO are connected, and if so, the test can be started. After the input and output system is started, a flag bit is inquired, and if the flag bit is not set, the automatic configuration action is started, which indicates that the test is not performed. The TX (transmitting) and RX (receiving) signals are connected before the automatic detection and configuration can be performed.
The test module executes the following processes: sending a first data packet through a sending end of a serial port to be detected in different interrupt modes, judging whether data is received within preset time, and if the data is not received, failing to transmit; if the data is received, the received data and the sent first data packet are verified, and if the verification is successful, the transmission is successful; if the check fails, the transmission is failed; and finishing sending all the data packets, and counting all the received second data packets.
Wherein, the data receiving rate is the number of the second data packets/the number of the first data packets.
Receiving data, firstly checking whether a start mark and a stop mark exist, and if any one of the start mark and the stop mark does not exist, marking the data as invalid data; if the received data contains the start mark and the stop mark, performing cyclic redundancy check on the received data, and if the cyclic redundancy check passes, determining the received data to be valid data, otherwise, determining the received data to be invalid data.
The process realized by the comparison module is as follows: and selecting the interrupt mode corresponding to the maximum data receiving rate as the interrupt mode of the current system. If the data receiving rate is the same in different interrupt modes, the interrupt mode of the system is arbitrarily selected.
The invention aims to solve the problems that improper SIRQ configuration can cause slow serial port output or no input response and the like. The Debug process may go through long experimentation to locate the problem, and a great deal of labor and time may be invested in the process to correct the problem. Therefore, the correct Serial IRQ mode is automatically identified and optimized, unnecessary debugging time can be reduced, and development efficiency is greatly improved.
Example 3
The invention also proposes a device comprising:
a memory for storing a computer program;
a processor for implementing the method steps when executing the computer program as follows:
fig. 3 is a flowchart of a method for setting a serial interrupt mode according to embodiment 1 of the present invention. Before testing, the signal connection between the sending end and the receiving end of the serial port to be tested is needed.
And sending the data packet to a receiving end based on the current SIRQ mode. 10000 data packets are transmitted by default, the content of each data packet is the same, and the requirement of 10000 times is achieved by a circular transmission mode. The number of such transmissions can be adjusted, and if not, can be reduced as many times to reduce the auto-configuration time. The transmitted data format needs to be transmitted according to the structure shown in table 1 below. After a data packet is sent, the data sending completion flag bit of the serial port needs to be checked to ensure that the data sending is completed. After the data transmission is completed, the receiving end starts to receive the data, and the received data needs to be analyzed so as to ensure that the received data is complete and effective.
The following table 1 is a data structure:
| AABB | ...... | CRC | CCDD |
| start mark | Data of | Data CRC check result | Stop sign |
The received data firstly checks the start mark and the stop mark, if the two marks are not existed, the data at the receiving end is considered to be incomplete, and the data is marked as invalid data. If the received data contains the start mark and the stop mark, the CRC check is carried out on the data, the check result is compared with the transmitted CRC check result, if the check result is not consistent with the transmitted CRC check result, the data is considered to be invalid data, otherwise, the data is recorded as one effective data transmission. Wherein the CRC check is a cyclic redundancy check. Meanwhile, if the receiving end cannot receive the data for a long time after the data is sent and the waiting time is exceeded (the time is set to be 1 minute by default), the data transmission is considered to be failed and is recorded as one-time invalid transmission. After 10000 times of data transmission and reception are carried out circularly, the number of the received effective data is compared with the number of transmission times, and the result is stored in a variable.
SIRQ after one mode of test is completed, the other mode is automatically changed, and the test is restarted. The test procedure is the same as the above test procedure, and the results of the test are stored in variables.
The test results of the two modes are compared, and if the difference is large, the mode with high effective receiving rate is selected as the SIRQ default mode. If the difference between the two is not large and is basically consistent, the display result allows the user to select the power saving mode or the performance mode.
The test results of the two modes are compared, and if the difference is large, the mode with high effective receiving rate is selected as the SIRQ default mode. If the difference between the two is not large and is basically consistent, the display result allows the user to select the power saving mode or the performance mode.
The invention aims to solve the problems that improper SIRQ configuration can cause slow serial port output or no input response and the like. The Debug process may go through long experimentation to locate the problem, and a great deal of labor and time may be invested in the process to correct the problem. Therefore, the correct Serial IRQ mode is automatically identified and optimized, unnecessary debugging time can be reduced, and development efficiency is greatly improved.
Need to explain: the technical solution of the present invention also provides an electronic device, including: the communication interface can carry out information interaction with other equipment such as network equipment and the like; and the processor is connected with the communication interface to realize information interaction with other equipment, and is used for executing a method for setting the serial interrupt mode provided by one or more technical schemes when running a computer program, and the computer program is stored on the memory. Of course, in practice, the various components in an electronic device are coupled together by a bus system. It will be appreciated that a bus system is used to enable communications among the components. The bus system includes a power bus, a control bus, and a status signal bus in addition to a data bus. The memory in the embodiments of the present application is used to store various types of data to support the operation of the electronic device. Examples of such data include: any computer program for operating on an electronic device. It will be appreciated that the memory can be either volatile memory or nonvolatile memory, and can include both volatile and nonvolatile memory. Among them, the nonvolatile Memory may be a Read Only Memory (ROM), a Programmable Read Only Memory (PROM), an Erasable Programmable Read-Only Memory (EPROM), an Electrically Erasable Programmable Read-Only Memory (EEPROM), a magnetic random access Memory (FRAM), a Flash Memory (Flash Memory), a magnetic surface Memory, an optical disk, or a Compact Disc Read-Only Memory (CD-ROM); the magnetic surface storage may be disk storage or tape storage. Volatile memory can be Random Access Memory (RAM), which acts as external cache memory. By way of illustration and not limitation, many forms of RAM are available, such as Static Random Access Memory (SRAM), Synchronous Static Random Access Memory (SSRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SDRAM), Double Data Rate Synchronous Dynamic Random Access Memory (DDRSDRAM), Enhanced Synchronous Dynamic Random Access Memory (ESDRAM), Enhanced Synchronous Dynamic Random Access Memory (Enhanced DRAM), Synchronous Dynamic Random Access Memory (SLDRAM), Direct Memory (DRmb Access), and Random Access Memory (DRAM). The memories described in the embodiments of the present application are intended to comprise, without being limited to, these and any other suitable types of memory. The method disclosed in the embodiments of the present application may be applied to a processor, or may be implemented by a processor. The processor may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuits of hardware in a processor or instructions in the form of software. The processor may be a general purpose processor, a DSP (Digital Signal Processing, i.e., a chip capable of implementing Digital Signal Processing technology), or other programmable logic device, discrete gate or transistor logic device, discrete hardware components, etc. The processor may implement or perform the methods, steps, and logic blocks disclosed in the embodiments of the present application. A general purpose processor may be a microprocessor or any conventional processor or the like. The steps of the method disclosed in the embodiments of the present application may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software modules may be located in a storage medium located in a memory where a processor reads the programs in the memory and in combination with its hardware performs the steps of the method as previously described. When the processor executes the program, corresponding processes in the methods of the embodiments of the present application are implemented, and for brevity, are not described herein again.
Example 4
The invention also proposes a readable storage medium on which a computer program is stored, which, when executed by a processor, implements the method steps of:
fig. 3 is a flowchart of a method for setting a serial interrupt mode according to embodiment 1 of the present invention. Before testing, the signal connection between the sending end and the receiving end of the serial port to be tested is needed.
And sending the data packet to a receiving end based on the current SIRQ mode. 10000 data packets are transmitted by default, the content of each data packet is the same, and the requirement of 10000 times is achieved by a circular transmission mode. The number of such transmissions can be adjusted, and if not, can be reduced as many times to reduce the auto-configuration time. The transmitted data format needs to be transmitted according to the structure shown in table 1 below. After a data packet is sent, the data sending completion flag bit of the serial port needs to be checked to ensure that the data sending is completed. After the data transmission is completed, the receiving end starts to receive the data, and the received data needs to be analyzed so as to ensure that the received data is complete and effective.
The following table 1 is a data structure:
| AABB | ...... | CRC | CCDD |
| start mark | Data of | Data CRC check result | Stop sign |
The received data firstly checks the start mark and the stop mark, if the two marks are not existed, the data at the receiving end is considered to be incomplete, and the data is marked as invalid data. If the received data contains the start mark and the stop mark, the CRC check is carried out on the data, the check result is compared with the transmitted CRC check result, if the check result is not consistent with the transmitted CRC check result, the data is considered to be invalid data, otherwise, the data is recorded as one effective data transmission. Wherein the CRC check is a cyclic redundancy check. Meanwhile, if the receiving end cannot receive the data for a long time after the data is sent and the waiting time is exceeded (the time is set to be 1 minute by default), the data transmission is considered to be failed and is recorded as one-time invalid transmission. After 10000 times of data transmission and reception are carried out circularly, the number of the received effective data is compared with the number of transmission times, and the result is stored in a variable.
SIRQ after one mode of test is completed, the other mode is automatically changed, and the test is restarted. The test procedure is the same as the above test procedure, and the results of the test are stored in variables.
The test results of the two modes are compared, and if the difference is large, the mode with high effective receiving rate is selected as the SIRQ default mode. If the difference between the two is not large and is basically consistent, the display result allows the user to select the power saving mode or the performance mode.
The test results of the two modes are compared, and if the difference is large, the mode with high effective receiving rate is selected as the SIRQ default mode. If the difference between the two is not large and is basically consistent, the display result allows the user to select the power saving mode or the performance mode.
The invention aims to solve the problems that improper SIRQ configuration can cause slow serial port output or no input response and the like. The Debug process may go through long experimentation to locate the problem, and a great deal of labor and time may be invested in the process to correct the problem. Therefore, the correct Serial IRQ mode is automatically identified and optimized, unnecessary debugging time can be reduced, and development efficiency is greatly improved.
Embodiments of the present application further provide a storage medium, that is, a computer storage medium, specifically, a computer-readable storage medium, for example, a memory storing a computer program, where the computer program is executable by a processor to perform the steps of the foregoing method. The computer readable storage medium may be Memory such as FRAM, ROM, PROM, EPROM, EEPROM, Flash Memory, magnetic surface Memory, optical disk, or CD-ROM.
Those of ordinary skill in the art will understand that: all or part of the steps for implementing the method embodiments may be implemented by hardware related to program instructions, and the program may be stored in a computer readable storage medium, and when executed, the program performs the steps including the method embodiments; and the aforementioned storage medium includes: a removable storage device, a ROM, a RAM, a magnetic or optical disk, or various other media that can store program code. Alternatively, the integrated units described above in the present application may be stored in a computer-readable storage medium if they are implemented in the form of software functional modules and sold or used as independent products. Based on such understanding, the technical solutions of the embodiments of the present application may be essentially implemented or portions thereof that contribute to the prior art may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling an electronic device (which may be a personal computer, a server, or a network device) to execute all or part of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a removable storage device, a ROM, a RAM, a magnetic or optical disk, or various other media that can store program code.
For a description of a relevant part in the device and the storage medium for setting the serial interrupt mode provided in the embodiment of the present application, reference may be made to detailed descriptions of a corresponding part in the method for setting the serial interrupt mode provided in embodiment 1 of the present application, and details are not described here again.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Furthermore, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include elements inherent in the list. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element. In addition, parts of the above technical solutions provided in the embodiments of the present application, which are consistent with the implementation principles of corresponding technical solutions in the prior art, are not described in detail so as to avoid redundant description.
Although the embodiments of the present invention have been described with reference to the accompanying drawings, the scope of the present invention is not limited thereto. Various modifications and alterations will occur to those skilled in the art based on the foregoing description. And are neither required nor exhaustive of all embodiments. On the basis of the technical scheme of the invention, various modifications or changes which can be made by a person skilled in the art without creative efforts are still within the protection scope of the invention.
Claims (10)
1. A method of setting a serial interrupt mode, comprising the steps of:
the sending end and the receiving end of the serial port to be detected are communicated;
sending a first data packet through a sending end of the serial port to be tested in different interrupt modes, and receiving a second data packet through a receiving end of the serial port to be tested; judging the data receiving rate in different interrupt modes according to the number of the second data packets and the number of the first data packets; the second data packet is a valid first data packet;
and comparing the data receiving rate in different interrupt modes to determine the interrupt mode of the current system.
2. The method as claimed in claim 1, wherein the sending the first data packet through the sending end of the serial port to be tested and receiving the second data packet through the receiving end of the serial port to be tested in different interrupt modes further comprises:
sending a first data packet through a sending end of a serial port to be detected in different interrupt modes, judging whether data is received within preset time, and if the data is not received, failing to transmit;
if the data is received, the received data and the sent first data packet are verified, and if the verification is successful, the transmission is successful; if the check fails, the transmission is failed;
and finishing sending all the data packets, and counting all the received second data packets.
3. The method of claim 1, wherein the data reception rate is the number of second packets/the number of first packets.
4. The method according to claim 1, wherein the determining the interrupt mode of the current system by comparing the magnitudes of the data receiving rates in the different interrupt modes specifically comprises: and selecting the interrupt mode corresponding to the maximum data receiving rate as the interrupt mode of the current system.
5. The method of claim 4, wherein said comparing the data reception rates of the different interrupt modes to determine the interrupt mode of the current system further comprises: if the data receiving rate is the same in different interrupt modes, the interrupt mode of the system is arbitrarily selected.
6. The method of claim 2, wherein if the data is received, the received data is checked against the first data packet sent, and if the check is successful, the transmission is successful; if the check fails, the method for failed transmission is as follows:
receiving data, firstly checking whether a start mark and a stop mark exist, and if any one of the start mark and the stop mark does not exist, marking the data as invalid data;
if the received data contains the start mark and the stop mark, performing cyclic redundancy check on the received data, and if the cyclic redundancy check passes, determining the received data to be valid data, otherwise, determining the received data to be invalid data.
7. The method according to claim 6, wherein after the transmitting end and the receiving end of the serial port to be tested are connected, the system input/output system queries whether a flag bit is set, and if not, the interrupt mode starts to be configured; the flag bit is used for marking whether the test is performed or not.
8. A system for setting a serial interrupt mode is characterized by comprising a communication module, a test module and a comparison module;
the communication module is used for communicating a sending end and a receiving end of the serial port to be tested;
the test module is used for sending a first data packet through a sending end of the serial port to be tested in different interrupt modes and receiving a second data packet through a receiving end of the serial port to be tested; judging the data receiving rate in different interrupt modes according to the number of the second data packets and the number of the first data packets; the second data packet is a valid first data packet;
the comparison module is used for comparing the data receiving rates under different interrupt modes to determine the interrupt mode of the current system.
9. An apparatus, comprising:
a memory for storing a computer program;
a processor for implementing the method steps of any one of claims 1 to 7 when executing the computer program.
10. A readable storage medium, characterized in that the readable storage medium has stored thereon a computer program which, when being executed by a processor, carries out the method steps of any one of claims 1 to 7.
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| CN104461814A (en) * | 2013-09-16 | 2015-03-25 | 研祥智能科技股份有限公司 | Serial port testing method and system of computer |
| CN108282385A (en) * | 2018-01-25 | 2018-07-13 | 迈普通信技术股份有限公司 | Port testing method and communication equipment |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104461814A (en) * | 2013-09-16 | 2015-03-25 | 研祥智能科技股份有限公司 | Serial port testing method and system of computer |
| CN108282385A (en) * | 2018-01-25 | 2018-07-13 | 迈普通信技术股份有限公司 | Port testing method and communication equipment |
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