CN113821701B - Method and device for improving circuit access efficiency - Google Patents

Method and device for improving circuit access efficiency Download PDF

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CN113821701B
CN113821701B CN202111198745.XA CN202111198745A CN113821701B CN 113821701 B CN113821701 B CN 113821701B CN 202111198745 A CN202111198745 A CN 202111198745A CN 113821701 B CN113821701 B CN 113821701B
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张涌
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Xiamen Semiconductor Industry Technology Research And Development Co ltd
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Abstract

The invention discloses a method and a device for improving circuit access efficiency, wherein the method comprises the following steps: classifying and analyzing the input data to obtain first-class data and second-class data; transmitting the first type data to a target position by adopting a channel preset coding mode, and judging the cold and hot of the second type data; acquiring thermal data in the second class of data, determining corresponding pre-generated data according to the thermal data, and transmitting the corresponding pre-generated data to the target position; therefore, by classifying the input data, the data which does not need to be transferred through the shift register can skip the data shift link, so that the time cost of data access is saved, and the overall access efficiency of the circuit is improved.

Description

Method and device for improving circuit access efficiency
Technical Field
The invention relates to the technical field of semiconductors, in particular to a method for improving circuit access efficiency and a device for improving the circuit access efficiency.
Background
In the related art, the existing deep learning-based memory peripheral circuit design generally adopts a mode of N groups of shift registers to shift the input data needing dot product operation to a corresponding state before starting the operation, and when the operation is completed, the shift operation of the next wave needs to be waited; this approach requires a longer shift register chain to shift when the dot-product operation array is large, which results in the overall system operating speed being stuck on the shift time of the input data, thus reducing the access efficiency of the circuit.
Disclosure of Invention
The present invention aims to solve at least to some extent one of the technical problems in the above-described technology. Therefore, an object of the present invention is to provide a method for improving access efficiency of a circuit, which extracts data without successive shift operation by classifying and analyzing input data, and rapidly transmits the data to corresponding positions by adopting a channel preset coding mode; meanwhile, cold and hot data analysis is carried out on the data needing to be shifted, so that the overall access efficiency of the circuit is improved.
A second object of the present invention is to propose a computer readable storage medium.
A third object of the present invention is to propose a chip.
A fourth object of the invention is to propose a computer programme product.
A fifth object of the present invention is to provide an apparatus for improving circuit access efficiency.
To achieve the above objective, an embodiment of a first aspect of the present invention provides a method for improving circuit access efficiency, including the following steps: classifying and analyzing the input data to obtain first-class data and second-class data; transmitting the first type data to a target position by adopting a channel preset coding mode, and judging the cold and hot of the second type data; and acquiring thermal data in the second class of data, determining corresponding pre-generated data according to the thermal data, and transmitting the corresponding pre-generated data to the target position.
According to the method for improving the circuit access efficiency, firstly, input data are subjected to classification analysis to obtain first-class data and second-class data, then the first-class data are transmitted to a target position in a channel preset coding mode, and cold and hot judgment is carried out on the second-class data; then, acquiring thermal data in the second class of data, determining corresponding pre-generated data according to the thermal data, and transmitting the corresponding pre-generated data to a target position; therefore, by classifying the input data, the data which does not need to be transmitted through the shift register can skip the shift link, so that the time cost of data access is saved, and the overall access efficiency of the circuit is improved.
In addition, the method for improving the access efficiency of the circuit according to the embodiment of the present invention may further have the following additional technical features:
optionally, after the cold and hot determination is performed on the second type of data, the method further includes: and acquiring cold data in the second type of data, shifting the cold data by adopting a shift register mode, and then transmitting the cold data to the target position.
Optionally, performing a classification analysis on the input data includes: and separating data corresponding to a plurality of different convolution channels in the input data according to the characteristic analysis of the data network layer, and taking the data as the first type of data.
Optionally, performing cold and hot judgment on the second class data includes: carrying out Gaussian distribution on the second class data according to the configurable zero point positions, and determining hot spots; and carrying out cold and hot judgment on the second type of data according to the hot spot.
Optionally, a zero point is set as the hot spot.
Optionally, the data distributed in the preset ranges at two sides of the hot spot is used as the thermal data.
To achieve the above object, a computer readable storage medium according to a second aspect of the present invention stores a program for improving circuit access efficiency, which when executed by a processor, implements the method for improving circuit access efficiency as described above.
According to the computer readable storage medium of the embodiment of the invention, the program for improving the circuit access efficiency is stored, so that the processor can realize the method for improving the circuit access efficiency when executing the program for improving the circuit access efficiency, thereby improving the overall access efficiency of the circuit.
In order to achieve the above object, an embodiment of the present invention provides a chip, including a memory, a processor, and a program stored in the memory and capable of being executed on the processor, where the processor implements the method for improving the circuit access efficiency according to the above method when executing the program.
According to the chip provided by the embodiment of the invention, the program which can be run on the processor and used for improving the circuit access efficiency is stored through the memory, so that the processor can realize the method for improving the circuit access efficiency when executing the program, and the overall access efficiency of the circuit is improved.
To achieve the above object, a computer program product according to a fourth aspect of the present invention includes a computer program, which when executed by a processor implements a method for improving access efficiency of a circuit as described above.
According to the computer program product of the embodiment of the invention, the method for improving the circuit access efficiency is realized when the computer program product is executed by a processor, so that the overall access efficiency of a circuit is improved.
In order to achieve the above objective, an apparatus for improving circuit access efficiency according to a fifth aspect of the present invention includes a data classification module, configured to perform classification analysis on input data to obtain first-class data and second-class data; the first transmission module is used for transmitting the first type of data to a target position in a channel preset coding mode; the judging module is used for judging the cold and hot of the second type of data; and the second transmission module is used for acquiring the thermal data in the second class of data, determining corresponding pre-generated data according to the thermal data and transmitting the corresponding pre-generated data to the target position.
According to the device for improving the circuit access efficiency, the data classification module is arranged to perform classification analysis on input data to obtain first-class data and second-class data, and the first transmission module adopts a channel preset coding mode to transmit the first-class data to a target position; the judging module judges the cold and hot of the second type of data; the second transmission module acquires thermal data in the second class of data, determines corresponding pre-generated data according to the thermal data, and transmits the corresponding pre-generated data to a target position; therefore, by classifying the input data, the data which does not need to be transmitted through the shift register can skip the shift link, so that the time cost of data access is saved, and the overall access efficiency of the circuit is improved.
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FIG. 1 is a flow chart of a method for improving circuit access efficiency according to an embodiment of the invention;
FIG. 2 is a flow chart of a method for improving circuit access efficiency according to an embodiment of the invention;
fig. 3 is a schematic structural diagram of a data transmission manner according to an embodiment of the present invention;
fig. 4 is a block diagram of an apparatus for improving circuit access efficiency according to an embodiment of the present invention.
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative and intended to explain the present invention and should not be construed as limiting the invention.
In order that the above-described aspects may be better understood, exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present invention are shown in the drawings, it should be understood that the present invention may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
In order to better understand the above technical solutions, the following detailed description will refer to the accompanying drawings and specific embodiments.
Referring to fig. 1, fig. 1 is a flowchart of a method for improving circuit access efficiency according to an embodiment of the invention, as shown in fig. 1, the method for improving circuit access efficiency includes the following steps:
step 101, classifying and analyzing the input data to obtain first-class data and second-class data.
That is, input data to be subjected to a dot product operation is analyzed so as to be divided into two types of data (first type data and second type data); the first type of data is data which does not need successive shift operation, and the second type of data is data which needs shift.
As one embodiment, assuming that N groups of input data need to be subjected to dot product operation, analyzing N groups of data to be input, and extracting data (N-M) groups which do not need to be subjected to successive shift operation to obtain first class data; and extracting the rest data M groups needing to be shifted to obtain second-class data.
As a specific embodiment, according to the characteristic analysis of the data network layer, the data corresponding to a plurality of different convolution channels in the input data are separated to be used as the first type of data.
That is, input data is input into a deep learning convolutional neural network model (CNN) for processing to obtain an output classification category.
It should be noted that, according to the characteristic analysis of the data network layer, when the multi-channel output operation is performed, a phenomenon that one input data corresponds to M different convolution channels is generated, and the data are separated to be used as the first type of data, so that the data are transmitted through the coding transmission path, and the data transmission is accelerated, and when the convolution kernel output passes more, the effect is more obvious.
Step 102, transmitting the first type data to the target position by adopting a channel preset coding mode, and judging the temperature of the second type data.
That is, the data which does not need to be subjected to successive shift operation is quickly transferred to the position of the operation unit in a channel preset coding mode, and the second type data which needs to be subjected to shift is subjected to cold and hot judgment so as to further classify the second type data.
It should be noted that, as shown in fig. 3, for the input classification control information and the corresponding first type data, multiple copies of the data may be directly transferred to the operation unit according to the characteristics of the network structure, or corresponding preset data may be generated according to the classification control information code, so that the time that the data needs to be transferred through shift originally is saved, and the access efficiency of the overall network operation is improved.
As a specific embodiment, the determining of the second class of data includes: carrying out Gaussian distribution on the second class data according to the configurable zero point positions, and determining hot spots; and judging the cold and hot of the second type of data according to the hot spot.
As one example, the zero point is set as a hot spot.
As one example, data distributed within a preset range on both sides of a hot spot is taken as thermal data.
That is, the hot spot register is configured to generate a gaussian distribution of the second type of data according to the zero point position and to obtain hot spot data according to the configured hot data range.
It should be noted that, gaussian distribution is performed on the input second type of data according to configurable zero positions, and the zero point is set as a starting point of thermal data, namely, a hot spot; when data is distributed on both sides of a hot spotWhen the range is within, taking the data of the interval as thermal data; in addition, thermal data is data that occurs more often.
And step 103, acquiring thermal data in the second class of data, determining corresponding pre-generated data according to the thermal data, and transmitting the corresponding pre-generated data to the target position.
That is, after the thermal data is acquired, the thermal data is generated into corresponding pre-generated data through an internal pre-data circuit, and the corresponding pre-generated data is transmitted to the target position; thereby improving the overall access efficiency of the circuit.
In addition, fig. 2 is a flow chart of a method for improving access efficiency of a circuit according to an embodiment of the invention; as shown in fig. 2, the method for improving the access efficiency of the circuit further includes:
and 104, acquiring cold data in the second type of data, shifting the cold data by adopting a shift register mode, and transmitting the cold data to the target position.
That is, the second class data is subjected to cold and hot judgment, wherein if the second class data is hot data, the hot data in the second class data is acquired, corresponding pre-generated data is determined according to the hot data, and the corresponding pre-generated data is transmitted to the target position; if the data is not hot data, the data is cold data, the cold data in the second type of data is obtained, the cold data is shifted by adopting a shift register mode, and then the cold data is transmitted to the target position.
In summary, according to the method for improving the access efficiency of the circuit according to the embodiment of the invention, firstly, the input data is classified and analyzed to obtain the first class data and the second class data, then, the first class data is transmitted to the target position by adopting the channel preset coding mode, and the second class data is subjected to cold and hot judgment; then, acquiring thermal data in the second class of data, determining corresponding pre-generated data according to the thermal data, and transmitting the corresponding pre-generated data to a target position; therefore, the input data is classified for multiple times, so that the data which does not need to be transmitted through the shift register can skip the shift link, the time cost of data access is saved, and the overall access efficiency of the circuit is improved.
In order to achieve the above-mentioned embodiments, a computer-readable storage medium according to a second aspect of the present invention stores thereon a program for improving circuit access efficiency, which when executed by a processor, implements a method for improving circuit access efficiency as described above.
According to the computer readable storage medium of the embodiment of the invention, the program for improving the circuit access efficiency is stored, so that the processor can realize the method for improving the circuit access efficiency when executing the program for improving the circuit access efficiency, thereby improving the overall access efficiency of the circuit.
In order to achieve the foregoing embodiments, a chip according to an embodiment of the third aspect of the present invention includes a memory, a processor, and a program stored in the memory and capable of being executed on the processor, where the processor implements the method for improving the circuit access efficiency as described above.
According to the chip provided by the embodiment of the invention, the program which can be run on the processor and used for improving the circuit access efficiency is stored through the memory, so that the processor can realize the method for improving the circuit access efficiency when executing the program, and the overall access efficiency of the circuit is improved.
In order to implement the above-mentioned embodiments, a computer program product according to a fourth aspect of the present invention comprises a computer program which, when executed by a processor, implements a method for improving the access efficiency of a circuit as described above.
According to the computer program product of the embodiment of the invention, the method for improving the circuit access efficiency is realized when the computer program product is executed by a processor, so that the overall access efficiency of a circuit is improved.
In order to achieve the foregoing embodiments, an embodiment of the present invention further provides an apparatus for improving circuit access efficiency, as shown in fig. 4, where the apparatus for improving circuit access efficiency includes: the device comprises a data classification module 201, a first transmission module 202, a judgment module 203 and a second transmission module 204.
The data classification module 201 is configured to perform classification analysis on input data to obtain first class data and second class data;
a first transmission module 202, configured to transmit the first type of data to the target location by adopting a channel preset encoding manner;
the judging module 203 is configured to perform cold and hot judgment on the second type data;
the second transmission module 204 is configured to obtain thermal data in the second class data, determine corresponding pre-generated data according to the thermal data, and transmit the corresponding pre-generated data to the target location.
It should be noted that the above description of the method for improving the circuit access efficiency is also applicable to the device for improving the circuit access efficiency, and will not be described herein.
In summary, according to the device for improving the access efficiency of the circuit of the embodiment of the invention, the data classification module is configured to perform classification analysis on the input data to obtain the first type data and the second type data, and the first transmission module transmits the first type data to the target position in a channel preset coding mode; the judging module judges the cold and hot of the second type of data; the second transmission module acquires thermal data in the second class of data, determines corresponding pre-generated data according to the thermal data, and transmits the corresponding pre-generated data to a target position; therefore, by classifying the input data, the data which does not need to be transmitted through the shift register can skip the shift link, so that the time cost of data access is saved, and the overall access efficiency of the circuit is improved.
It will be appreciated by those skilled in the art that embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
It should be noted that in the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The use of the words first, second, third, etc. do not denote any order. These words may be interpreted as names.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
In the description of the present invention, it should be understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
In the present invention, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
In the present invention, unless expressly stated or limited otherwise, a first feature "up" or "down" a second feature may be the first and second features in direct contact, or the first and second features in indirect contact via an intervening medium. Moreover, a first feature being "above," "over" and "on" a second feature may be a first feature being directly above or obliquely above the second feature, or simply indicating that the first feature is level higher than the second feature. The first feature being "under", "below" and "beneath" the second feature may be the first feature being directly under or obliquely below the second feature, or simply indicating that the first feature is less level than the second feature.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms should not be understood as necessarily being directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.
While embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the invention, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the invention.

Claims (8)

1. A method for improving circuit access efficiency, the method comprising:
classifying and analyzing the input data to obtain first-class data and second-class data;
transmitting the first type data to a target position by adopting a channel preset coding mode, and judging the cold and hot of the second type data;
acquiring thermal data in the second class of data, determining corresponding pre-generated data according to the thermal data, and transmitting the corresponding pre-generated data to the target position;
the method comprises the steps of inputting input data into a deep learning convolutional neural network model for processing, and analyzing the input data needing dot product operation so as to be divided into two types of data, wherein the first type of data is data needing no successive shift operation, and the second type of data is data needing shift operation;
wherein, carry out cold and hot judgement to the second class data, include: carrying out Gaussian distribution on the second class data according to the configurable zero point positions, and determining hot spots; and carrying out cold and hot judgment on the second type of data according to the hot spot.
2. The method of claim 1, wherein after performing the cold-hot determination on the second type of data, the method further comprises:
and acquiring cold data in the second type of data, shifting the cold data by adopting a shift register mode, and then transmitting the cold data to the target position.
3. A method according to claim 1 or 2, wherein classifying the input data comprises:
and separating data corresponding to a plurality of different convolution channels in the input data according to the characteristic analysis of the data network layer, and taking the data as the first type of data.
4. The method of claim 1, wherein a zero point is set as the hot spot.
5. The method according to claim 1, characterized in that data distributed in a preset range on both sides of the hot spot is used as the thermal data.
6. A computer-readable storage medium, on which a program for improving circuit access efficiency is stored, which program, when executed by a processor, implements a method for improving circuit access efficiency according to any one of claims 1-5.
7. A chip comprising a memory, a processor and a program stored on the memory and operable on the processor to promote circuit access, wherein the processor, when executing the program to promote circuit access, implements a method for promoting circuit access according to any one of claims 1-5.
8. An apparatus for improving circuit access efficiency, comprising:
the data classification module is used for performing classification analysis on the input data to obtain first-class data and second-class data;
the first transmission module is used for transmitting the first type of data to a target position in a channel preset coding mode;
the judging module is used for judging the cold and hot of the second type of data;
the second transmission module is used for acquiring thermal data in the second class of data, determining corresponding pre-generated data according to the thermal data and transmitting the corresponding pre-generated data to the target position;
the data classification module is also used for inputting input data into the deep learning convolutional neural network model for processing, analyzing the input data needing dot product operation so as to be divided into two types of data, wherein the first type of data is data needing no successive shift operation, and the second type of data is data needing shift;
the judging module is further used for carrying out Gaussian distribution on the second class data according to the configurable zero position to determine hot spots; and carrying out cold and hot judgment on the second type of data according to the hot spot.
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