CN113805029A

CN113805029A - Temperature sensing detection system and method

Info

Publication number: CN113805029A
Application number: CN202110966111.8A
Authority: CN
Inventors: 谭英军; 方建超; 宫志强; 于廷华
Original assignee: Qingdao Richmat Intelligence Technology Inc
Current assignee: Qingdao Richmat Intelligence Technology Inc
Priority date: 2021-08-23
Filing date: 2021-08-23
Publication date: 2021-12-17

Abstract

The invention relates to a temperature sensing detection system and a temperature sensing detection method, wherein the temperature sensing detection system comprises a power plug (1), the power plug (1) is electrically connected with a controller box (2), and the controller box (2) is connected with a connector (5) of an object (3) to be heated through a connecting wire (4); the object (3) to be heated has a heater (6) and a temperature sensor RT7 for detecting the temperature of the object (3) to be heated; the invention has reasonable design, compact structure and convenient use.

Description

Temperature sensing detection system and method

Technical Field

The invention relates to a temperature sensing detection system and a temperature sensing detection method.

Background

Known systems check whether a power control element has failed by detecting the waveform of the current flowing through the element. However, in the case where the thyristor MOS malfunctions due to self-triggering, the half-wave current passing through the thyristor MOS is substantially the same as the normal operation current, and thus it is impossible to detect the malfunction by the conventional method of discriminating the waveform. For this reason, people are used to detect secondary phenomena caused by thyristor MOS self-triggering faults, such as abnormal rise in temperature, but this method does not guarantee complete safety. And when the power control thyristor MOS for directly or indirectly controlling the heater power supply malfunctions, for example, due to self-triggering, the heater remains in the energized state despite the temperature detection circuit issuing a shutdown signal, and becomes dangerous. Therefore, this must be avoided by some means. And the power controlling thyristor MOS will remain in a conducting state when an element, such as a transistor, used to trigger the thyristor MOS is shorted or out of conduction. The heater may remain energized due to a failure of one of the components in the circuit despite the presence of a shutdown signal from the temperature control circuit. This is mainly due to the failure of the power control thyristor MOS itself and the failure of its trigger circuit. The same failure may also be caused by other causes, for example, failure of two or more components. Safety measures are also required to prevent such failures.

Disclosure of Invention

In view of the above problems, the present invention proposes to invent a temperature-sensitive detection system, according to which the output of a temperature detection circuit is logically compared with the terminal voltage on a power control thyristor MOS by a fault detection circuit, which has the function of stopping the supply of power to a heater when the thyristor MOS is in a conducting state, despite the presence of an OFF signal from the temperature detection circuit. Therefore, the failure detection circuit is suitable for directly detecting the failure of the thyristor MOS itself, thus ensuring high safety and being able to reliably detect the self-triggering failure of the thyristor MOS.

The circuit for triggering a power controlled thyristor MOS of the invention employs a system in which the charging and discharging of the capacitor uses two transistors, i.e. the capacitor is first charged by the first transistor and then discharged by the second transistor to trigger the power controlled thyristor MOS. Therefore, any one thyristor MOS cannot trigger the thyristor MOS when it is short-circuited or opened. This ensures safety.

According to the invention, a fusible insulation is provided between the heater and the conductor connected to the fuse or similar current breaker. When the temperature of the heater abnormally rises to a predetermined temperature due to the above-mentioned reasons, the insulator melts with the heat, short-circuits the heater and the conductor, and opens the circuit breaker to secure safety.

Drawings

Fig. 1 is a view showing the appearance of an electric blanket or an electric bed sheet, which is one application of the present invention. FIG. 2 is a circuit diagram showing an overall embodiment of a temperature control circuit useful with the blanket or sheet of the present invention. Fig. 3 is a structural view showing a temperature sensor. Fig. 4 is a block diagram showing a heater. Fig. 5 is a graph showing temperature-resistance characteristics of the temperature sensor. Fig. 6 is a diagram showing the characteristics of the proportional control mode and the hysteresis control mode. Fig. 7 is a schematic diagram showing the high hold mode. Fig. 8 is a circuit diagram in which a control circuit is shown in block diagram form. Fig. 9 is a circuit diagram showing a logic circuit of each block included in the control circuit. Fig. 10 is a circuit diagram showing a reset voltage detection circuit embodying the present invention. Fig. 11 is a circuit diagram showing another reset voltage detection circuit embodying the present invention. Fig. 12a and 12b are diagrams showing waveforms involved in the operation of the voltage detection circuit. Fig. 13 is a circuit diagram showing another reset voltage detection circuit embodying the present invention. Fig. 14 is a schematic diagram showing a zero voltage detection circuit. Fig. 15 is a waveform diagram showing the operation of the circuit. Fig. 16 is a diagram showing a waveform shaping circuit embodying the present invention. Fig. 17 is a diagram showing another waveform shaping circuit embodying the present invention. Fig. 18 is a diagram showing a pulse detection circuit embodying the present invention. Fig. 19 is a waveform diagram showing the operation of the pulse detection circuit. Fig. 20 is a circuit diagram showing a charge amplifier embodying the present invention. Fig. 21 is a diagram showing a hysteresis control selection circuit embodying the present invention. Fig. 22 is a schematic diagram of a high hold selection circuit embodying the present invention. Fig. 23 is a circuit diagram showing a self-triggering output amplifier embodying the present invention. Fig. 24 is a diagram showing a voltage detection circuit and a detection timing circuit of a self-triggering detection unit embodying the present invention. Fig. 25 is a waveform diagram showing the same operation. Fig. 26 is a diagram showing an intermediate output circuit of the first counter embodying the present invention. Fig. 27 is a waveform diagram showing an operation in the proportional control mode. Fig. 28 is a waveform diagram showing an operation under the hysteresis control. Fig. 29 is a waveform diagram showing a self-trigger detection operation. Fig. 30 is a diagram showing a circuit for a hold high setting operation and a stop operation. Fig. 31 is a diagram showing another circuit for holding the high setting operation and the stop operation. Fig. 32 is an overall view showing another embodiment in which the current passing through the heater is controlled by a relay and fig. 33 is an overall view showing another embodiment in which the current passing through the heater is controlled by a relay. Fig. 34 is a waveform diagram showing the same operation; fig. 35 is an overall circuit diagram showing an embodiment including a heater and a temperature sensor, which are assembled together in the form of an electric wire.

Detailed Description

Referring to fig. 1-35, the present invention relates to a temperature control system for an electric blanket, an electric bed sheet, an electric floor, an electric carpet, etc., and more particularly, to securing the safety of components in the circuit thereof from malfunction or failure.

As shown in fig. 1, a power plug (1) for connecting an alternating current of 100V is electrically connected with a controller box (2), and the controller box (2) is connected with a connector (5) of an object (3) to be heated through a connecting wire (4);

the object (3) to be heated is preferably a blanket for an electric blanket or a sheet for an electric blanket.

The object (3) to be heated has a heater (6) and a temperature sensor RT7 for detecting the temperature of the object (3) to be heated. A power switch 8 and a dial 9 for setting the temperature of an object (3) to be heated, and a mode selection hysteresis control selection switch 10 for selectively controlling the temperature of the object (3) to be heated are provided in the controller box (2), and the mode selection hysteresis control selection switch 10 has two mode selections. As shown in fig. 6, the mode selection hysteresis control selection switch 10 is a proportional control mode in which the temperature of the object (3) to be heated is controlled at a constant level at any time, and another control mode is a hysteresis control mode in which the temperature of the object (3) to be heated is varied within a predetermined temperature range.

The controller box (2) is provided with a knob switch (11) for starting a high setting operation, a power supply indicator lamp (12), and a heating and energizing indicator lamp (13). As shown in fig. 7, one of the two modes is a high-position holding mode in which the object (3) to be heated is heated at a high-position temperature for a certain period of time irrespective of the temperature set by the dial 9, and thereafter returned to the temperature set by the dial 9. The other mode is a normal mode other than the high-order hold mode, in which the temperature is controlled at a level set on the dial 9. When the heater (6) is energized, the heating energization indicator lamp 13 is turned on.

The heater (6) has a structure shown in fig. 4, and includes a heating core (51); a heating coil (48) is wound around the heating core wire (51), a fusible resin coating (50) is wound around the heating coil (48), and a sheath (52) of a safety yarn (49) is wound around the fusible resin coating (50). The heaters are in a string shape.

The temperature sensor RT7 is in the form of a string as shown in fig. 3. The temperature sensor RT7 includes a core wire 39 and an inner winding 36 surrounding the core wire 39; a temperature sensing element 38 with a plastic thermistor R covering the winding 37 is arranged outside the inner winding 36, and a sheath 40 is arranged outside the covering winding 37; the temperature sensing element 38 has a characteristic which varies with temperature and a layer impedance, z.sub.7, exists between the inner winding 36 and the cover winding 37, having the characteristic shown in figure 5.

Fig. 2 shows, as an example, the overall circuit of an embodiment of the present invention. The power supply noise filter comprises a power supply plug (1), a power supply switch 8, a fuse FU14 and a power supply noise filter 15 which are electrically connected in sequence;

the power supply noise filter 15 includes a choke coil 16, a capacitor 17, and a surge absorber 18; the input current is output in multiple paths through a choke coil 16, one path passes through a capacitor 17 and a surge absorber 18 loop which are connected in parallel, and the other path passes through a series protection resistor R64 and a power indicator lamp 12 loop; one circuit is connected with the input end of the power supply 19; one is connected with the input end of the temperature setting circuit 26;

the power supply 19 comprises a diode D20, resistors R21 and R22, capacitors C23 and C24 and a Zener diode D25;

one path of current of the power supply noise filter 15 is fed through a diode D20, and is output after being filtered by a resistor R21, a capacitor C23 primary filter, a resistor R22 and a capacitor C24 secondary filter, and the output current is connected with a Zener diode D25 loop in an inverse mode;

the temperature setting circuit 26 includes a variable resistor R27 with a dial 9 and a limiting resistor R28;

the input of the temperature setting circuit 26 is electrically connected with a limiting resistor R28 and is divided into two paths, and one path of the input is connected with the temperature detection circuit 29 after passing through the variable resistor R27;

the temperature detection circuit 29 comprises a neon lamp L30 as a pulse trigger element, a capacitor C31, a resistor R32, a pulse transformer TC33 and a temperature sensor RT 7;

the input current of the temperature detection circuit 29 passes through the covering winding 37 and the primary coil 34 of the pulse transformer TC33 in sequence, then passes through the capacitor C31 and the resistor R32 which are connected in parallel, and then is connected with one end of a neon lamp L30 (neon lamp); the other end of the neon lamp L30 is connected with the inner winding 36;

a temperature detection circuit 29 for dividing a voltage into a set resistance R rate Rx determined by a temperature adjustment resistor R27 and an impedance z.sub.7 of a temperature sensor RT7, where Rx is the sum of r.sub.27+ r.sub.28, a value r.sub.27 of the temperature adjustment resistor R27, and a value r.sub.28 of a limit resistor R28;

when the voltage V.sub.z7 between the inner winding 36 and the cover winding 37 is greater than the discharge starting voltage V.sub.B0 of the neon lamp L30, i.e. when V.sub.B0 V.sub.z7, the neon lamp L30 is triggered, allowing the pulse transformer TC33 to act through the capacitor 31 and the resistor R32 to provide a current output, which occurs when the temperature setting of the object (3) to be heated is low;

when v.b 0 > v.sub.z7, i.e. when the object (3) to be heated is at a set high temperature, the neon light L30 is not activated.

The control circuit U41 performs the main control operations, including the integrated circuit IC; the integrated circuit IC has 1 st to 16 th pins;

one end of a secondary coil 35 of the pulse transformer TC33 is connected to a pin 2 of the integrated circuit IC, and the other end of the secondary coil is in a loop;

the resistor R42 is connected to the output end of the pin 16 and the choke coil 16 respectively to detect the voltage of the a-c line, i.e. the output line of the choke coil 16 with the A node, and to multiply the voltage of the integrated circuit IC and the voltage of the a-c line, i.e. the output line of the choke coil 16 with the A node;

the other output path of the limiting resistor R28 is electrically connected with one input contact 56 'of the high-level operating switch, one output contact 56' of the high-level operating switch is output, and the other input contact of the high-level operating switch is connected with the output end of the variable resistor R27; another output contact pin 3; the high level operates the knob of the switch pulling switch 11 to realize the on-off of the contact and is connected with the pin 3 of the integrated circuit IC.

The integrated circuit IC is electrically connected with a trigger circuit C-R circuit 43 for triggering the thyristor MOS 47; the C-R circuit 43 includes a resistor R44 and a capacitor C45. The two ends of the resistor R44 are connected between the pin 13 and the pin 14; capacitor C45 is connected between pin 13 and the loop; the loop is grounded;

when the temperature of the object (3) to be heated is lower than the set value, the output current of the temperature detection circuit 29 is fed to the pin 2 of the integrated circuit IC, the pin 2 is input to control the output current of the pin 14 to be fed to the trigger circuit C-R circuit 43, and the capacitor C45 is charged through the resistor R44.

The gate pin 12 and the drain of the thyristor MOS47 are connected with the loop, and the source passes through the pin 15 of the resistor R57 and is connected with one end of the heating winding (48); the other end A point of the heating winding (48) is connected with one output end of the choking coil 16; the input end of the safety wire (49) is connected with the output end of the inner winding 36; the output end of the safety wire (49) is connected with a heating resistor R55 and a loop B point; after the heating resistor R55 is heated, the on-off of the fuse FU14 is controlled;

when the voltage on the a-C line, the output line (note) of choke coil 16 where node a is present, approaches positive circulation and crosses zero, capacitor C45 discharges through pin 13 and the gate of thyristor MOS47 is triggered at the zero crossing through pin 12. Thyristor MOS47 is turned on to energize heater (6). The gate of thyristor MOS47 is connected back through gate resistor rcystron MOS 46.

When the heater (6) is accidentally heated to a set high temperature threshold, the fusible resin coating (50) melts, and the heating wire 48 contacts the safety wire 49, a temperature-induced signal current exceeding the set threshold flows through the circuit shown in fig. 2: point a-heater wire 48-contact portion-safety wire 49-heater resistor R55-point B, heater resistor R55 heats and thermally breaks fuse FU14, interrupting the flow of current for safety.

Under normal conditions, a small current of the temperature-induced signal current below a set threshold flows through: the temperature setting resistor R27, the temperature sensor RT7, the safety line 49, and the heating resistor R55, but the heating resistor R55 does not cause the fuse FU14 to open.

Pin 10 of the integrated circuit IC is an output terminal for disabling the high set operation, which is connected back through gate resistor R53 and to the gate of thyristor MOS 54; the other end of the grid resistor R53 is grounded, the thyristor MOS54 is in a loop, and the source is connected with one output end of the choke coil 16 through a coil L56; coil L56 controls the make and break of contacts 56 'and 56' of the high setting hold switch; when the gate resistor R53 and thyristor MOS54 are triggered, coil L56 is energized, causing the contacts 56' and 56 "of the high setting hold switch to be opened.

Next, an arrangement for securing the self-triggering state of the thyristor MOS47 will be described. Resistor R57 checks the terminal voltage of thyristor MOS47 to energize heater (6). When thyristor MOS47 is in a half-wave conducting state, thyristor MOS47 is in a self-triggering state, considered a hazard strategy, despite the absence of an output from temperature detection circuit 29, and accordingly despite the absence of an input to pin 2 of integrated circuit IC. Under the dangerous strategy state, the terminal voltage of the thyristor MOS47 is received to the pin 15 of the integrated circuit IC through the resistor R57, and logic operation is performed in the integrated circuit IC to provide the thyristor MOS58 with the trigger output current from the pin 11. This output turns on thyristor MOS58, causing resistor R59 to generate heat, heating fuse FU14 and hot-cutting the fuse.

The source of the thyristor MOS47 is connected with one output of the choke coil 16 through a diode D61 and a resistor R62 which are connected in series; when the thyristor MOS47 completely fails due to a short circuit, safety is ensured in the following manner. Since there is an excessive current through the heater (6) at this time, there is a danger that a negative half-cycle voltage is applied to the resistor R62 through the diode D61, so that the resistor R62 generates heat to thermally break the fuse FU14, interrupting the flow of current.

Fig. 8 shows a control block of the control circuit U41. The interior of the integrated circuit IC is defined by a line of two points, and the external parts of the integrated circuit IC, which are not relevant to the features of the present invention, are not shown. Which comprises

A reset unit a and a zero pulse generator B for detecting a zero-crossing voltage on an output line of a node a of a choke coil 16, which is a line a-c as an IC control time base, through a resistor R42 to form a zero-crossing pulse;

a waveform shaping unit C that receives the output of the temperature sensor RT7 in the form of pulses from the pulse transformer TC33 and shapes the output into a specified waveform;

a 2-bit frequency divider D which receives the temperature detection output signal from the waveform shaping unit C and generates a trigger pulse at a zero point cross point when the voltage of an output line of the a-C line, i.e. the choke coil 16, at which the node A exists, becomes a positive value or a negative value;

a charge amplifier E for charging a capacitor C45 through a resistor R44;

a discharge amplifier F receiving the charge stored in the capacitor C45 through a pin 13 and sending out the charge through a pin 12 to trigger the thyristor MOS 47;

a hysteresis control selector G receiving a signal from the mode selection hysteresis control selection switch 10 through a 4 th pin and turning off when hysteresis control is selected;

ta, as shown in fig. 6, to provide temperature fluctuations to the object (3) to be heated;

a first counter I, including a T-type flip-flop, connected together in n stages, counting the power supply frequency for a time delta.ta, holding thyristor MOS47 inactive for a set period delta.ta with respect to hysteresis control logic unit H; when the set time period delta. ta elapses, the reset unit a resets the hysteresis control logic unit H to trigger the thyristor MOS47 again;

a second counter K, comprising a T-flip-flop, connected in n stages, defining a high hold period, DELTA.tH;

a high-level hold selector J, the contacts 56' and 56 ″ being closed when the high-level hold knob switch 11 is manipulated; when the contact 56' is closed, the temperature setting resistor R27 is bypassed, resulting in the highest temperature setting regardless of the setting of resistor R27; when the 3 rd pin is connected to the closed contact 56 ″, the high set hold high level selector J connects the hysteresis control counter I directly with the high set hold counter K, so that the first counter I and the second counter K count the high set hold time shown in fig. 7 delta. th; when the high-level hold selector J is set to the high-setting hold, the hysteresis control hysteresis selector G does not function when under the hysteresis control, allowing the proportional control to be performed during the high-setting operation;

a memory L for holding a high setting value, the memory L making the first counter I usable also as a low counter holding a high setting value; during high set point operation, the memory L stores a signal indicating that the first counter I has completed counting and sends an output to the second counter K which maintains a high set value;

an output amplifier M for stopping holding the high set value and providing an output to trigger the thyristor MOS54, causing coil L56 to open the high set value holding contacts 56' and 56 "; the failure of a diode in the circuit and the self-triggering state of the thyristor MOS47 are detected through the logic between the waveform shaping unit C and a detector N for detecting the terminal voltage of the thyristor MOS 47;

if there is no output from the waveform shaping unit C but there is no input voltage to the voltage detector N, the thyristor MOS47 is in a self-triggered state, and therefore, the output of the voltage detector N is sent to the self-triggered amplifier P in relation to the timing of the timing detector O switched at the setting stage of the power supply positive cycle, the amplified signal from the self-triggered amplifier P is output to the triggered thyristor MOS, and the fuse FU14 is thermally broken by the heat generated by the resistor R59;

fig. 9 shows a logic diagram of the circuit. The module in fig. 8 is surrounded by a broken line in fig. 9. The gates g.sub.1 to g.sub.28 are provided by the IIL process. The input corresponds to the gate of a transistor and the output is of a multi-transistor type with an open source. Reset set type flip-flops rs.sub.1 to rs.sub.5 are also provided by the IIL process. Shown at T is a T-type flip-flop at the T input and the Q output. Solid line rectangular blocks a to Q are analog circuits of a general bipolar structure. Bipolar cells a to Q will be described before the logic description with reference to fig. 9.

A circuit a for detecting a reset voltage with the control power supply Vcc of the reset unit a is described. An embodiment of this circuit is shown in fig. 10 and 11, and the waveforms involved in its operation are shown in fig. 12a and 12 b. Referring to fig. 10 and 11; when the control voltage Vcc on pin 1 increases from zero V, transistor a5, transistor a.sub.5, remains off until the threshold v.sub.rs is reached, and when v.sub.rs is exceeded, transistor a5 is brought into the on state; v.rs ═ 3.x.v.sub.be, where the gate-drain voltages of transistors a2 through a6, i.e., transistors a.sub.2 through a.sub.6, i.e., transistor a.sub.4, are v.sub.be. The transistors a.sub.4 and a.sub.5 in the circuit of fig. 10 provide a current mirror circuit. When Vcc becomes equal to or greater than v.sub.rs, current i.sub.1 begins to flow through resistor ra.sub.1, i.e., resistor Ra1, and introduces substantially the same current as current i.sub.1 between the source and drain of transistor a.sub.5; in the circuit of fig. 11, the current mirror circuit of fig. 10 is adapted to be used as a current amplifier by replacing the transistor a.sub.4 with a resistor ra.sub.6.

Fig. 12a and 12b show the operation of the circuit. When the power switch 8 is closed, the capacitors C23, C24 of the power supply 19 function to increase the control power Vcc over time; such as the vcc shown in fig. 12 a. When v.sub.rs is the reset voltage, transistor a.sub.5 remains non-conductive until time tr.sub.2, as shown by the waveform of fig. 12 b. After time tr.sub.2, Vcc > v.sub.rs, so transistor a.sub.5 is brought to full conduction for time delta.t. Assuming that the logic cell operating voltage is v.sub.l, the logic cell is brought into normal operation at time tr.sub.1, but is held in reset by transistor a.sub.5. At time tr.sub.2, transistor a.sub.5 is turned on, taking the logic cell out of the reset state. Furthermore, when the counter mirror is changed to a current amplifier, the switching time of transistor a.sub.5. delta.t is shortened, as seen by the waveforms of fig. 12b, resulting in satisfactory operation.

Fig. 13 shows another embodiment of the reset voltage detection circuit a (in the figure, the a value is expressed in the text as a.sub. A reset threshold voltage v.sub.rs is provided by transistors a.sub.2, a.sub.3 and a.sub.4 through a differential amplifier provided by transistors a.sub.7 and a.sub.8; the voltages v.sub.rs and vcc, which depend on the voltage division over the resistors ra.sub.13 and a.sub.14, are detected to determine the operation of the transistor a.sub.5. In short, the reset voltage detector circuit a detects a voltage rise Vcc of the control power supply Vcc, and when the control power supply Vcc is lower than a set threshold value v.sub.rs from the power-off, the holding transistor a.sub.5 is turned off to reset the logic unit.

A zero point voltage detection circuit B for the zero point pulse generator B will be described. One embodiment of this circuit is shown in fig. 14, and the waveforms involved in its operation are shown in fig. 15. With the circuit of fig. 14, it is intended that the v.sub.ce "waveforms of" b.sub.14 "and" b.sub.19 "shown in fig. 15 are obtained when the impression of the supply voltage v.sub.ac on the 16 th and 5 th pins crosses the zero level. The operation of the circuit of fig. 14 will be described, starting from the reference time t.sub.o in fig. 15 when the supply voltage v.sub.ac is zero. When the supply voltage v.sub.ac of the 16 th pin starts to rotate, a current "i.sub.ce of b.sub.11" shown in fig. 15 starts to flow between the source and the drain of the transistor b.sub.11. At this time, the supply voltage v.sub.ac exceeds the gate voltage of the transistor b.sub.11, i.e., the gate-drain-log voltage v.sub.bes of the transistor b.sub.8 biased by the resistor rb.sub.7, and the bias voltage is added to the gate-drain-log voltage v.sub.be of the transistor b.sub.11, i.e., 2 v.sub.be. The i.sub.ce through transistor b.sub.11 energizes the current mirror consisting of transistors b.sub.13 and b.sub.14 through transistor b.sub.12, giving "v.sub.ce of b.sub.14" in fig. 15. Thereafter, the supply voltage v.sub.ac reaches a peak and starts to drop towards a negative value, but before time t.sub.1, i.e. as long as v.sub.ac.gtoreq.2v.sub.be, transistor b.sub.14 remains conductive. When the v.sub.ac subsequently becomes less than 2v.sub.be, the transistor b.sub.14 is brought out of conduction, resulting in the waveform "v.sub.cb of b.sub.14" shown in fig. 15. The transistor b.sub.10 and the transistor b.sub.11 form a current mirror in combination. For reference, the current mirror causes the gate current i.sub.b through the resistor rb.sub.1 to be approximately equal to the source current i.sub.c through the resistor rb.sub.3. A waveform shaping circuit b.sub.20 is provided to increase the switching speed of the transistor b.sub.14, the structure of which will be described later with reference to fig. 16 and 17. The input voltage and the output voltage of this circuit are in phase. When the supply voltage v.sub.ac in fig. 15 starts to go from zero level to a negative value at time t.sub.1, the gate voltage of the transistor b.sub.15 is kept at the gate voltage of the transistor b.sub.8, i.e. the aforementioned bias voltage v.sub.bes. When the gate-drain sign voltage of the transistor b.sub.15 is v.sub.be, if v.sub.be v.sub.bes and v.sub.be-v.sub.be ═ delta.v.sub.be, the following occurs.

When vertline.v.sub.ac.vertline. >. vertline.v.sub.be.vertline, transistor b.sub.15 is brought into conduction. At this time, the gate current of the transistor b.sub.15 flows from the control power supply v.sub.cc through the resistor rb.sub.7, then through the gate and the drain of the transistor b.sub.15, and then through the resistor rb.sub.1 into the power supply v.sub.ac. This occurs after time t.sub.1.DELTA.t.sub.N. Thus, the current "i.sub.ce of b.sub.15" shown in fig. 15 flows through the source of the transistor b.sub.15, causing the transistors b.sub.16, b.sub.17 and b.sub.18, b.sub.19 to provide a current mirror and giving the voltage waveform "v.sub.ce of b.sub.19" in fig. 15. If v.sub.be and v.sub.be-v.sub.be are 0, the following occurs: this state is maintained for a period of time before time t.sub.2. Since the transistors b.sub.15 and b.sub.18 are identical in the v.sub.be, the transistor b.sub.15 functions when the v.sub.ac is equal to zero V. The time t.sub.n in fig. 15 is therefore zero. Thus, "i.sub.ce of b.sub.15" and "v.sub.ce of b.sub.19" in fig. 15 are obtained at t.sub.1 and t.sub.2. Further if the v.sub.be is and the v.sub.be-v.sub.be ++. delta.v.sub.be, time in fig. 15. Delta.t.sub.n is to the left of t.sub.1. This is in direct contrast to the case of v.sub.be v.sub.bes and v.sub.be-v.sub.be ═ delta.v.sub.be.

In short, the transistors b.sub.14 and b.sub.19 perform the switching operation shown in fig. 15. The output waveform is further shaped by shaping units b.sub.20 and b.sub.21 shown in fig. 16 and 17.

With the circuit of fig. 16, the transistor b.sub.14 has a multi-source, an RS flip-flop (consisting of gates g.sub.31 and g.sub.32) includes a measurer g.sub.30 to perform the waveform shaping. The output given by gate 31 is a sharp wave pattern.

The circuit shown in fig. 17 comprises an amplifier of the IIL configuration as a waveform shaping unit b.sub.20, which comprises a gate consisting of an injection resistor rb.21 and transistors b.sub.22 and b.sub.23, and transistors b.sub.24 and b.sub.25 for amplifying the current. The pulse detection circuit C of the waveform shaping unit C will be described. One embodiment of this circuit is shown in fig. 18, and the waveforms involved are shown in fig. 19. When the heated object (3) to be heated has a low temperature, the impedance z.sub.7 on the

inner windings

36 and 37 of the sensor 7 shown in fig. 18 is low. Therefore, when the power supply voltage v.sub.ac in fig. 19 increases to a specified level, the layer voltage v.sub.z7 of the sensor 7 exceeds the discharge start voltage v.sub.bo of the neon lamp L30, triggering the lamp. Thus, the secondary winding 35 of the pulse transformer TC33 gives a pulse of waveform t.sub.p in fig. 19. In the pulse transformer TC33, the polarity of the windings is determined such that when the supply voltage v.sub.ac is in the negative half-cycle, the pulses from neon light L30 are reversed to negative values when transferred from the primary winding to the secondary winding, which thus provides positive voltage pulses of waveform t.sub.p 1. Thus, the circuit is adapted to detect the temperature when the supply voltage v.sub.ac is in negative cycles. The waveform t.sub.p2 generated in the positive cycle is a negative voltage regardless of the subsequent operation. The pulse voltage t.sub.p1 applied to

pins

2 and 5 shown in fig. 18 causes the drain-mark follower transistor c.sub.3 to operate, which in turn energizes the current mirror consisting of transistors c.sub.4 and c.sub.5. As a result, as shown in fig. 19, the transistor c.sub.5 functions for a period of delta.t.sub.p. The negative voltage pulse t.sub.p2 reversely biases the transistor c.sub.3 through the transistor c.sub.6 and the resistor rc.sub.1 without operating the transistor c.sub.5. During the time period from t.sub.3 to t.sub.4 shown in fig. 19, the neon lamp L30 will not be triggered with transistor c.sub.5 remaining non-conductive.

In short, the pulse detection circuit c of fig. 18 receives the pulse t.sub.p1 generated in the negative cycle of the power supply voltage v.sub.ac as an effective temperature detection signal.

The amplifiers E and F for triggering the thyristor MOS47 will now be described. Fig. 20 shows an embodiment of the circuit. Referring to fig. 20, when the output of gate g.sub.10 falls to "0", transistors e.sub.4 and e.sub.5 of amplifier E are biased and operate through resistors re.sub.1 and e.sub.2, charging capacitor C45 through resistor R44. When the supply voltage v.sub.ac crosses zero, the gate g.sub.11 temporarily drops to "0", whereby the transistors f.sub.5 and f.sub.6 of the amplifier F are biased and rendered conductive by the resistors rf.sub.1 and f.sub.2. By this action, the charge on the capacitor C45 is temporarily discharged in a pulse form, triggering the thyristor MOS47 through the 12 th pin. When the capacitor C45 is charged through the gate g.sub.10, the gate g.sub.11 is kept at "1", and does not receive any discharge signal, which will be described later.

The detection circuits G and J for the hysteresis control selector G and the high-set hold high-level hold selector J will be described. Fig. 21 shows an embodiment of a circuit for hysteresis-controlling the selector G, and fig. 22 shows an embodiment of a circuit for holding the selector J at a high level. Referring to fig. 21, resistors rg.sub.1, g.sub.2, g.sub.3 and transistors g.sub.4, g.sub.5 provide a current mirror. The hysteresis control selection switch 10, when turned off, puts the transistor g.sub.5 into a conducting state, setting the system in a hysteresis control mode. The circuit of the high-level hold selector J shown in fig. 22 is identical in structure to the circuit of the hysteresis control selector G shown in fig. 21. The high setting holds the switch contact 56 "which, when closed, causes the transistor j.sub.5 to be taken out of conduction.

Next, a voltage detection circuit N for detecting self-triggering of the thyristor MOS47, and a detection timing circuit O will be described. Referring to fig. 24, circuit N checks whether thyristor MOS47 is in a conducting state, including resistors rn.sub.1, n.sub.2 and transistors n.sub.3 to n.sub.7. When the transistor n.sub.4 is turned on, the voltage on the 15 th and 5 th pins delta.va is equal to or greater than the gate-to-drain voltage 3v.sub.be of the three transistors n.sub.4, n.sub.5 and n.sub.6. On the other hand, the forward voltage drop v.sub.f between the anode and the cathode of the thyristor MOS47 is set to be less than 3v.sub.be when it is brought to conduction. Therefore, when the power supply voltage v.sub.ac exceeds the threshold voltage 3v.sub.be of the transistor n.sub.4 within the time delta.t.sub.c, the source current "i.ce of n.sub.4" is thus "0" in the transistor n.sub.7 shown in fig. 25 when the thyristor MOS47 is in the "OFF" state (no signal is input to the gate), as shown in fig. 25. Until delta.t.sub.c time, the "v.sub.ce of n.sub.7" remains "0" until time t.sub.c, at which the supply voltage v.sub.ce becomes a negative value of zero level. Next, when the thyristor MOS47 enters the connected state, the transistors n.sub.4 and n.sub.7 are in the "OFF" state, and the "v.sub.ce" of n.sub.7 is maintained for the period of t.sub.2 to t.sub.3 as shown in fig. 25. The power supply voltage v.sub.ac is applied to the 16 th pin through the timing detection circuit O. The reference voltage of the transistors o.sub.11 and o.sub.12 providing the differential amplifier is the voltage v.sub.st at the midpoint between the resistors ro.sub.3 and o.sub.4. V.st ═ 2.5v.sub.be, where v.sub.be is the gate-to-drain voltage of transistor o.sub.8. This voltage is divided by the resistors ro.sub.3 and o.sub.4(o.sub.3 ═ o.sub.4) to give 0.5 v.sub.be. Thus, when the voltage on the 16 th pin due to the supply voltage v.sub.ac exceeds the voltage v.sub.st, the transistors o.sub.12, the transistors o.sub.13 and o.sub.14 forming a current mirror, and the transistors o.sub.15 and o.sub.16 also providing a current mirror are all made conductive. Therefore, when the power supply voltage v.sub.ac exceeds 2v.sub.be, as shown in fig. 15, the current is shunted to the zero pulse generator B through the resistor rb.sub.1 shown in fig. 14, and thus, as shown in fig. 25, the voltages at the 16 th and 5 th pins rise gradually from 2 v.sub.be. This voltage is higher than 2.5v.sub.be (the threshold voltage v.sub.st of the differential amplifier composed of the transistors o.sub.11 and o.sub.12) shown in fig. 25 for a period of time. In this circuit, it is necessary to make.delta.t.sub.s longer than.delta.t.sub.c.

A circuit Q for extracting an intermediate output from the multistage first counter I will be described. Fig. 26 shows an embodiment of the circuit in which the first counter I comprises T-type flip-flops connected in n stages and is divided into two blocks, namely a block of t.sub.il to t.sub.ix and a block of t.sub.iy to t.sub.in. By this counter I, the output q.sub.ix of one block and the input t.sub.iy of the other block, when directly coupled, provide a directly coupled counter. However, when the function of the entire circuit including many stages is checked, there arises a problem that it takes too long time to obtain the output q.sub.in from the final stage even when the rectangular wave input of the first stage is fed into T at high speed. Therefore, the first block including t.sub.il to t.sub.ix performs operation check in case of input to T (output of 8 th pin for judgment), and is separated from the second block including t.sub.iy to t.sub.in performs check in case of input to 9 th pin of rectangular wave (output of q.sub.in for judgment). Therefore, in order to shorten the required operation check time, the circuit Q is inserted into the middle portion of the counter I. In fig. 26, transistors q.sub.4 and q.sub.5 provide a constant voltage supply. Transistor q.sub.6 acts as an output buffer, while transistors q.sub.7 and q.sub.8 provide an input buffer and form a current mirror.

The control operation will be described below mainly with reference to fig. 9.

The proportional control mode shown in fig. 6 will be described first. In this operation, the hysteresis control selector switch 10 is open, while the contacts 56' and 56 "of the high setting hold switch are open. In this state, the power switch 8 is turned off, and when the object to be heated (3) to be heated has a low temperature, the system performs the operation shown in fig. 27. The gate g.sub.13 of the zero pulse generator B in fig. 9 resets the flip-flop rs.sub.1 of the waveform shaping unit C at "0" as seen in fig. 27. When the temperature sensor RT7 subsequently emits a pulse t.sub.p1, the flip-flop rs.sub.1 is set, at which time the output Q of the flip-flop rs.sub.1 changes from "1" to "0", and consequently the gate g.sub.9 changes from "0" to "1", and the gate g.sub.10 changes from "1" to "0". As the gate g.sub.10 goes to "0", the amplifier E is energized, starting to charge the capacitor C45 through the resistor R44. In other words, the temperature sensor RT7 triggers the neon light L30, which in turn begins to charge the capacitor C45. Immediately before time t.sub.2, when the supply voltage v.sub.ac changes from negative to positive, the gate g.sub.13 changes from "1" to "0", so that the flip-flop rs.sub.1 is reset again. With reset, the output Q of the flip-flop rs.sub.1 returns from "0" to "1". Thus, a signal that reverses from "1" to "0" at gate g.sub.33 is applied to the input of T-type flip-flop T, so that at the falling edge of input T, the output Q of this flip-flop changes from "0" to "1". The gate g.sub.10 is changed to "1" to stop the charging of the capacitor C45 and at the same time to make the discharge amplifier F function, and the output is input to the 12 th pin. Immediately after the supply voltage v.sub.ac becomes positive after time t.sub.2, the gate g.sub.12 changes from "0" to "1", as a result of which the AND output of the gates g.sub.14 AND g.sub.15 drops from "1" to "0". The outputs of g.sub.14 and g.sub.15 are delta.t, during which both gates g.sub.12 and g.sub.13 are "0". Even after the time period T, the output Q of the T-type flip-flop T is "1", but since the AND outputs of the gates g.sub.14 AND g.sub.15 are "0", the gate g.sub.11 becomes "1", AND the charging of the capacitor C45 is stopped. Therefore, only at the zero crossing of the supply voltage v.sub.ac around time t.sub.2 during.delta.t will the output from pin 12 be produced and trigger the thyristor MOS47, which in turn energises the heating wire 48. After the time delta.t has elapsed, gate g.sub.11 changes from "0" to "1", and thus the output of gate g.sub.10 changes from "1" to "0", thereby starting to charge capacitor C45 through resistor R44. Near the time t.sub.3 when the voltage v.sub.ac goes from positive to negative, the zero crossing pulse occurs again, delta.t AND the AND output of the output Q of the flip-flop rs.sub.2 AND the output of the gate g.sub.14. Before the time t.sub.3 arrives, the AND output of the gates g.sub.14 AND g.sub.15 changes from "0" to- "1", thereby changing the output Q of the flip-flop T to "1". Gate g.sub.11 drops to "0", again discharging capacitor C45. As the gater g.sub.10 changes from "0" to "1", the charging of the capacitor C45 is interrupted at this time. At the same time, the AND output of the output Q of the flip-flop rs.sub.2 AND the output of the gate g.sub.14 changes from "0" to "1". This output is anded with the output Q of the T-flip-flop T AND fed into gate g.sub.4, which changes from "1" to "0" AND gate g.sub.33 changes from "0" to "1". During delta.t time after time t.sub.3, the AND output of the output Q of flip-flop rs.sub.2 AND the output of gate g.sub.14 falls from "1" to "0". Thus, gate g.sub.4 changes from "0" to "1", and gate g.sub.33 changes from "1" to "0". At the falling edge of the output of gate g.sub.33, the output Q of T-flip flop T returns from "1" to "0". In short, the T-type flip-flop T performs one count under the set AND reset signals from the flip-flop rs.sub.1, AND the zero-crossing pulse generated when the set output Q of the flip-flop T AND the voltage v.sub.ac become negative. In other words, the temperature is sensed during the positive or negative cycle of the voltage v.sub.ac and in response to the generated signal, a two-bit thyristor trigger pulse is issued at zero when the voltage is going to be positive or negative. Although thyristors are used as thyristor MOS47 in fig. 9, TRIACs may also be advantageously used for this purpose as appropriate for the particular device under consideration. Fig. 27 shows that during the time from t.sub.5 to t.sub.8, since the temperature of the object to be heated (3) is higher than the set level, there is no pulse from the sensor 7 to trigger the neon light L30. Since the flip-flop rs.sub.1 is held in the reset position, the above operation does not occur during this period. When the gate g.sub.10 is in the "1" state, the capacitor C45 is not charged, the output Q of the T-type flip-flop is "0", the gate g.sub.11 is in the "1" state, and thus the discharge amplifier F is maintained in the inactive state. Therefore, the voltage at leg 12 is zero. When the neon lamp L30 is activated again as the temperature of the object (3) to be heated decreases, the above operation continues. The thyristor MOS47 is triggered to energize the heater wire 48. Therefore, through the series of operations, the temperature can be controlled in the proportional control mode shown in fig. 6.

The hysteresis control mode shown in fig. 6 will be described. At this time, the hysteresis control selection switch 10 is turned off. With the hysteresis control selection switch 10 closed, the gate g.sub.19 changes from "1" to "0", and the gate g.sub.20 changes from "0" to "1". Since gate g.sub.1 is already in the "1" state, gate g.sub.3 changes from "0" to "1" and gate g.sub.22 changes from "1" to "0". Thus, the first counter for hysteresis competition is brought out of its reset state. As the gate g.sub.5 changes from "0" to "1" at the same time, the flip-flops rs.sub.3 and rs.sub.4 of the hysteresis control logic unit H are also brought out of the reset state. With respect to the description of the operation in the hysteresis control mode, please refer to fig. 9 and 28, the time t.sub.1 shown in fig. 28 is taken as a starting point. During t.sub.1 to t.sub.5, the circuit performs the operations described with reference to fig. 27. The output of the 12 th pin is sufficient to trigger the thyristor MOS47, energizing the heating wire 48. That is, the temperature of the item is continuously rising with the pulse t.sub.p generated by the neon light L30. When the temperature of the object (3) to be heated reaches the set value, the lamp (30) is no longer activated and the cyclically generated pulse t.sub.p2 is extinguished. It is detected whether the temperature of the article reaches the set value by detecting the extinction of the pulse at time t.sub.5, at which time the output from the 12 th pin to the thyristor MOS47 is stopped to deenergize the heating wire 48. However, since the temperature of the object (3) to be heated slightly exceeds the set value, no pulse is generated for a certain period of time. After which the temperature starts to drop and reaches the set level t.sub.s or

T.sub.s-. delta.t.sub.s, when this temperature difference is preset, neon L30 is triggered around time t.sub.8 and produces a pulse t.sub.p 3. The time t.sub.d shown in fig. 28 depends on the structure and temperature of the object (3) to be heated. Although the time of t.sub.d is shown to correspond to several cycles of the voltage v.sub.ac for the sake of illustration of the problem, this time period is actually longer. The regenerated pulse t.sub.p3 is detected and counted by the first counter I. When the first counter I counts pulses, the thyristor MOS47 is kept non-conductive. The timed output of the first counter I unlocks the gate output of the thyristor MOS47, with the result that the thyristor MOS47 is triggered again. When the hysteresis control selection switch 10 is kept off, the above-described operation is repeated, thereby obtaining the temperature fluctuation shown in fig. 16. Fig. 28 is a time chart showing the foregoing operation. In the time t.sub.5 to t.sub.6 in fig. 28, no pulse t.sub.p is transmitted when the voltage v.sub.ac is negative, the flip-flop rs.sub.1 of the waveform shaping unit C is not set and keeps the output Q at "1", and thus the T-type flip-flop T is kept inoperative. Since the t.sub.6 gate g.sub.12 changes from "0" to "1" after delta.t.sub.p time, the output Q of the flip-flop rs.sub.1 AND the output Q of the T-type flip-flop T AND the AND output of the gate g.sub.12 are fed into the gate g.sub.6 as inputs, resulting in a "1" to "0". Gate g.sub.6 sets flip-flop rs.sub.3, whose output Q changes from "0" to "1", and gate g.sub.8 changes from "1" to "0". The T-flip flop holds the output Q at "0". Therefore, the gate g.sub.11 unconditionally gives "1", disabling the discharge amplifier F without the trigger output from the 12 th pin to the thyristor MOS 47. When the supply voltage v.sub.ac is negative during the period t.sub.7 to t.sub.8, the temperature of the object (3) to be heated will drop, allowing the neon L30 to generate a pulse t.sub.p3, setting the flip-flop rs.sub.1, changing the output Q of the flip-flop rs.sub.1 from "0" to "1". Since the output Q of the flip-flop rs.sub.3 is "1" at this time, the gate g.sub.7 changes from "1" to "0". This output sets flip-flop rs.sub.4, changing its output Q from "0" to "1". The output Q of the flip-flop rs.sub.2 changes from "0" to "1" for a time delta.t, at which zero crossing the voltage v.sub.ac changes to a negative value at about time t.sub.9. The output Q of the flip-flop rs.sub.4 is therefore "1" and the output Q is "1", so that the output of the gate g.sub.21.

At the edge where the input T falls from "1" to "0", the output Q of the first counter flip-flop t.sub.i1 changes from "0" to "1". At the zero-crossing point at which the power supply voltage v.sub.ac becomes negative at time t.sub.11, the input T of the first flip-flop t.sub.i1 changes from "1" to "0", and thus the output Q of the first flip-flop t.sub.i1 returns from "1" to "0", performing the frequency dividing operation twice. Since the first counter I is multi-stage, the above operation is continuously repeated as shown in fig. 9. Before time t.sub.n, i.e. before the end of the time of the last n-th flip-flop t.sub.in, at the edge where the input T of the first flip-flop t.sub.i1 drops from "1" to "0", the output Q of the last flip-flop t.sub.in changes from "0" to "1". After the output Q becomes "1", the first counter I, t.sub.i1 is reset to i.sub.iz. At the same time, the output of gate g.sub.5 changes from "1" to "0", resetting flip-flops rs.sub.3 and rs.sub.4 of hysteresis control logic unit H to the initial state. Thus, gate g.sub.8 returns from "0" to "1" and unlocks the output Q of T-flip flop T. This reset state continues until a time (period.delta.t.sub.n) before the time t.sub.n + 1. With the positive zero crossing pulse provided by the output Q of the flip-flop rs.sub.2 and the output of the gate g.sub.15, the rise of delta.t (when the voltage v.sub.ac goes from negative to positive), i.e. from "0" to "1", the gate g.sub.16 changes from "1" to "0", and the gate g.sub.23 therefore, the output Q of the final flip-flop t.sub.in drops from "1" to "0", leaving the flip-flops t.sub.il to t.sub.iz of the first counter I out of the reset state. Therefore, during the period from time t.sub.n to t.sub.n +1, when the voltage v.sub.ac is in the negative half period, the flip-flops t.sub.i1 to t.sub.iz are held in the reset state, thereby reliably returning to the initial state. Further, when the output Q of the final flip-flop t.sub.in is decreased from "1" to "0", the input of the gate g.sub.16 is changed from "1" to "0", the reset pulse of the final flip-flop t.sub.in is eliminated, and thus self-reset. The time period t.sub.9 to t.sub.n is the count time t.sub.i of the first counter I for hysteresis control. Since the temperature of the object (3) to be heated drops within the time period t.sub.i, a pulse t.sub.pn has been generated during the period t.sub.n to t.sub.n +1 after the time period t.sub.i, the trigger rs.sub.1 of the waveform shaping unit C is set in response to the pulse t.sub.pn and resumes normal operation. Thyristor MOS47 is triggered to energize heater wire 48. By repeating the series of operations, the temperature of the object (3) to be heated is varied over the swing, i.e., range,. delta.t.sub.d, shown in fig. 6. When the hysteresis control selection switch 10 is opened, the gate g.sub.20 resets the hysteresis control logic unit H and the flip-flops rs.sub.3 and rs.sub.4 of the first counter I, and the system is switched to the proportional control mode.

The high setting operation and the stop operation shown in fig. 7 will be described. The temperature setting dial 9 is rotated to set the variable resistor rver 27 to a resistance R ratio, thereby obtaining a temperature t.sub.st shown by a wavy line in fig. 7. Then, a knob switch 11 for holding the high setting operation is pulled to close the contacts 56' and 56 "of the selector switch. When the system is operating with the power switch off, it is assumed that the hysteresis control selection switch 10 is open to provide the proportional control mode. The gate g.sub.17 of the high set hold high level hold selector J is set to "0" and the gate g.sub.18 is set to "1". The gate g.sub.17 brings the second counter K for holding the high set value out of the reset state, while the gate g.sub.18 brings the flip-flop rs.sub.5 of the memory L out of the reset state. Gate g.sub.17 also sets the input of gate g.sub.8 to "0". Thus, gate g.sub.8 retains the output "1". Thus, the output Q of the T-type flip-flop T is not locked and the output is continuously fed into the thyristor MOS47 to provide the proportional control mode. In other words, even if the hysteresis control mode is selected with the hysteresis control selection switch 10 turned off, selection of the high hold mode automatically results in the proportional control mode, as shown by the waveform in fig. 7 (B). Since the first counter I is used as a part of the high hold counter in addition to the hysteresis control counter, the counter is started in the same manner as in the hysteresis control. More specifically, referring to fig. 28, as the pulse t.sub.p continuously generated by the neon lamp L30 reaches the set temperature (high set), the pulse t.sub.p disappears. Upon detection of a subsequently issued pulse t.sub.p3, the first counter I starts dividing at time t.sub.9. Thereafter, in a period from t.sub.n to t.sub.n +1, as shown in fig. 28, the time of the final flip-flop t.sub.in of the first counter I arrives, and thus the final flip-flop t.sub.in is reset at the time of delta.t.sub.n before the time of t.sub.n + 1. When the system is set to operate at a high level, the gate g.sub.18 changes the output Q of the first flip-flop t.sub.k1 of the second counter K from "0" to "1" at the edge where the output Q of the final flip-flop t.sub.in falls from "1" to "0" as shown in fig. 28. This means that the output of the first counter I for hysteresis control is brought to the flip-flop t.sub.k 1. The output Q, which is brought to flip-flop t.sub.k1, changes the output of gate g.sub.24 from "1" to "0", resetting flip-flop rs.sub.5. As the output Q of the flip-flop rs.sub.5 changes from "1" to "0", the set terminal of the flip-flop rs.sub.4 remains at "0" to keep the output Q of the flip-flop rs.sub.4 at "1" so that negative zero crossing pulses are continuously fed into the first counter I. Further, when the output Q of the flip-flop rs.sub.5 is "0", the input of the gate g.sub.16 and the reset terminal R of the first counter I is "0", thereby preventing any reset signal from being input to the counter. The time required to complete the above operation after time t.sub.5 is.DELTA.t.sub.A, which is the same as the count time of the hysteresis control mode. The counter will count step by step even if the output Q of the last flip-flop t.sub.in changes from "0" to "1" without resetting (flip-flop rs.sub.5 locked), due to the negative zero crossing pulses, delta.t, being continuously applied to the input of the first flip-flop t.sub.i 1. After the time t.sub.k shown in fig. 7 elapses, the output Q of the last flip-flop t.sub.kn of the second counter K changes from "0" to "1". Next in the positive cycle of the voltage v.sub.ac, when the gate g.sub.12 changes from "0" to "1", the AND output of the output Q of the final flip-flop t.sub.kn AND the output of the gate g.sub.12 is fed into the gate g.sub.27, whose output therefore falls from "1" to "0", driving the amplifier M, which in turn triggers the thyristor MOS54 through the 10 th pin. Coil L56 is energized. Thyristor MOS54 is triggered by gate g.sub.12 only during the positive half-cycle. When the coil is energized, the contacts 56' and 56 "of the high set point hold switch are opened. Therefore, the temperature therefore drops to a level determined by the resistance R rate of the resistor R27 set by the knob 9, and is adjusted to a usual level. With the opening of the contact 56 ″, the high setting operation high level keeps the selector J returned to the initial state. As gate g.sub.17 becomes "1" and gate g.sub.18 becomes "0", gate g.sub.17 resets the second counter K to the initial state.

Next, an operation that occurs when the contacts 56' and 56 ″ of the high-order hold switch are closed, for example, at time t.sub.d in fig. 7, when operating in the hysteresis control mode, the hysteresis control selection switch 10 is closed will be described. At this time, the first counter I for hysteresis control is performing a counting operation. When the contacts 56' and 56 "are closed, the output of gate g.sub.17 changes from" 1 "to" 0", bringing the second counter K out of its reset state and ready to receive an input. The input of gate g.sub.8 is unlocked and its output changes from "0" to "1". Gate g.sub.11 acts immediately upon the output Q of the T-flip flop T causing the amplifier F to trigger the thyristor MOS47 and energise the heater. Therefore, the temperature of the object (3) to be heated starts to rise at time t.sub.D. The gate g.sub.18 brings the flip-flop rs.sub.5 of the memory L out of the reset state. However, the first counter I continues to count. When the time of the last flip-flop t.sub.in of the first counter I has expired, the output is taken to the first flip-flop t.sub.k1 of the second counter K, whose output Q is "1". The output Q of flip-flop t.sub.k1 sets flip-flop rs.sub.5, whose output Q changes from "1" to "0". At this time, as already described with respect to the hysteresis control mode, the first counter I is fully reset, while the flip-flops rs.sub.3 and rs.sub.4 of the hysteresis control logic unit H are also reset. When the temperature of the object (3) to be heated reaches the high temperature set point, the neon lamp L30 no longer emits any pulses t.sub.p. When the pulse t.sub.p3 is transmitted, the flip-flops rs.sub.3 and rs.sub.4 of the hysteresis control logic unit H are set by the operation already described with reference to fig. 28. With the setting of the flip-flop rs.sub.4, the output Q of the flip-flop rs.sub.4 changes from "0" to "1", as a result of which a positive zero-crossing pulse is generated, delta.t is again fed to the input T of the first flip-flop t.sub.i1 of the first counter I, so that it performs a frequency-dividing operation. After the completion of the given counter operation, the time of the last trigger t.sub.kn of the second counter K has come, at which time the gates g.sub.27 and g.sub.12 act on the amplifier M, which in turn triggers the thyristor MOS54, causing the coil L56 to open the contacts 56' and 56 "in the same way as already described. During high hold, the system is set to proportional control mode, as shown in fig. 7, giving maximum heat. Thus, when the contacts 56' and 56 "are closed at time t.sub.D shown in FIG. 7 during the hysteresis control, the active high hold operating period is the operating duration T.sub.K of the second counter K, which is shorter than when the switch is operated from the beginning. Resistor R66 and capacitor 67, shown in fig. 2 and 9 in parallel with contact 56", prevent wobbling of contact 56" when opened by coil L56, thereby eliminating erroneous operation that would otherwise result in contact 56 ". Several cycles of the supply voltage v.sub.ac are required to keep the contacts 56 "properly open. Therefore, without the capacitor 67, the high hold selector J would be active at the moment the contact 56 "is opened, causing the first counter I and the second counter K to resume counting, resulting in an extended high hold period. The use of the capacitor 67 ensures stable operation.

The diode failure of the thyristor MOS47 and the safe operation for its self-triggering will be described. In this state, the thyristor MOS47 is in the on state regardless of the output of the temperature sensor RT7, and the heating wire 48 is kept energized, resulting in a continuous rise in the temperature of the object (3) to be heated, and a fire or the like may be caused. Therefore, the system must be equipped with means for ensuring safety to prevent such accidents. Fig. 29 shows a timing chart of the safety operation in the self-triggered state. During the time t.sub.1 to t.sub.5 in fig. 29, the system is in a normal state, where the temperature of the object to be heated (3) is low and the pulse t.sub.p from the neon lamp 3 results in the 12 th pin output, which normally triggers the thyristor MOS 47. In the following time period t.sub.5 to t.sub.7, the temperature of the object (3) to be heated reaches the set value, the thyristor MOS47 is in the "off" state, and no pulse t.sub.p is generated. During this stop, the input from the self-triggering amplifier P of the gate g.sub.34 is the AND output of the gate g.sub.26, the output of the voltage detection unit N AND the output of the gate g.sub.25, AND is therefore "0". The system is designed in such a way that: in the positive cycle of the voltage v.sub.ac from time t.sub.6 to t.sub.7 in fig. 29, the gate g.sub.25 changes from "0" to "1" with a time delay of delta.t.sub.n, the gate g.sub.26 changes from "0" to "1", with a time delay of delta.t.sub.s, the output of the cell N changes from "1" to "0", with a time delay of delta.t.sub.c, because the MOS thyristor 47 is in the "OFF" state (see fig. 24 and 25). This means that the circuits of the voltage detection unit N (for determining the time delta.t.c) and the self-triggered detection timing circuit O (for determining the time delta.t.s) are adjusted to delta.t.c. Therefore, the input of the gate g.sub.34 is "0" and the output is "1". Since the input of the amplifier P is "1" and the output thereof is "0", no output is provided to the thyristor MOS58 (see fig. 23). The state of the system is shown during t.sub.7 to t.sub.11 when thyristor MOS47 fails, e.g., diode failure or self-triggering failure. At this time, it is assumed that the neon light L30 does not generate a pulse t.sub.p, i.e. the temperature of the item is above the set value. During time t.sub.8 to t.sub.9, the voltage v.sub.ac is in a positive cycle and the thyristor MOS47 immediately turns on, even in the absence of a signal at the gate, so the voltage detector N is in an "OFF" state, giving an output of "1". Gate g.sub.25 changes from "0" to "1" after time t.sub.8. The time delay of the gate g.sub.26 of the timing circuit O is detected to change from "0" to "1". Accordingly, the output of gate g.sub.34 will be fed into amplifier P, which is a parallel output of the output of gate g.sub.26, the output of unit N and the output of gate g.sub.25. Therefore, the output of the amplifier P changes from "0" to "1" with a time delay of.delta.t.sub.s, and the thyristor MOS58 is triggered by the 11 th pin to start heating the resistor R59. During the time period t.sub.9 to t.sub.10, the voltage v.sub.ac is in the negative half cycle, the thyristor MOS58 loses conductivity and does not heat the resistor R59. Repeating the operation from t.sub.8 to t.sub.9 when the voltage v.sub.ac is positive during t.sub.10 to t.sub.11; after time t.sub.10. delta.t.sub.s, thyristor MOS58 is brought into conduction to heat resistor R59. By this operation, the temperature of the resistor R59 rises, and the fuse FU14 is thermally broken to stop the supply of power.

Although a combination of resistor R59 and fuse 14 is used in the systems shown in fig. 8, 9 and 29, a single circuit breaker, such as a magnetic circuit breaker with set and reset coils, may be used.

Safety is further ensured by amplifying the output from the fault detection circuit with a power control element or transistor and passing the amplified current through a current fuse to stop the power supply to the heater.

In addition, when the temperature of the heated material (3) is lower than the temperature t.sub.s set by the knob 9, the thyristor MOS47 is self-triggered, the self-triggered state is not immediately detected, and the resistor R59 is not heated. When the temperature of the object (3) exceeds the temperature set by the knob (9), and then the neon lamp pulse is extinguished, the self-triggering state is detected, and the resistor R59 is electrified. In short, in order to secure the safety of the self-triggering state of the thyristor MOS47, the output of the temperature sensor RT7 is checked, and the output is compared with the output of the thyristor MOS47 operated therewith, so that the operation of the thyristor MOS47 is detected without the output of the temperature sensor RT7, causing the safety circuit to function. To ensure proper safety function, the self-trigger detection time.DELTA.t.sub.S and the time for which the voltage detection unit N operates.DELTA.t.sub.C are maintained in the relation of.DELTA.t.sub.S when the thyristor MOS47 is in the OFF state, whereby the thyristor MOS47 is checked to be normal or not after the object to be heated (3) reaches the temperature setting.

The circuit for triggering the thyristor MOS47 to drive the heating wire 48 has the following fail-safe characteristic. Devices for heating the human body in contact with them must be adapted to precise temperature control and have high safety. Generally, high precision multi-function control requires a complex circuit consisting of more components. As a result, the circuit becomes susceptible to component failure. Therefore, high precision and versatility are contradictory to fail-safe functions. In order to enable the circuit of the present invention to operate a variety of functions with high precision while ensuring protection against component failure, the trigger circuit of thyristor MOS47 includes an oscillating system providing either a "0" or "1" output or input, and thyristor MOS47 is tuned to be triggered only in the event of charge accumulation in capacitor C45. First, the fail-safe feature that triggers the operation of the thyristor MOS47 will be described. In the negative half-cycle of the supply voltage v.sub.ac from time t.sub.1 to t.sub.2 in fig. 27, the flip-flop rs.sub.1 of the waveform shaping unit D is in a reset state, the output Q is "0", the output Q is "1", and then the neon lamp L30 emits a pulse t.sub.p 1. Since the output Q of the T-type flip-flop T is "0" and the output Q thereof is "1", the output of the gate g.sub.9 is "0" and the gate g.sub.10 is "1". The amplifier E stops working and does not charge the capacitor C45. In addition, since the output Q of the T-type flip-flop T is "0", the gate g.sub.11 is in the "1" state, so that the amplifier F also loses its operation capability. Subsequently, the neon lamp L30 emits a pulse t.sub.p1, setting the flip-flop rs.sub.1, as a result of which the output Q of the flip-flop rs.sub.1 changes from "1" to "0" and the output of the gate g.sub.10 changes from "1" to "0", thereby charging the capacitor C45. As the trigger rs.sub.1 is reset to zero crossing by the gate g.sub.13, the state of the T-type trigger T changes; its output Q changes from "0" to "1", and the output Q changes from "1" to "0". As the gate g.sub.11 changes from "1" to "0", the amplifier F charges the capacitor C45 and the thyristor MOS47 is triggered. These successive operations will be summarized as follows.

(1) When the flip-flop rs.sub.1 is not active (reset state), the trigger capacitor C45 is not charged; when the flip-flop rs.sub.1 enters the active state (set state), the capacitor is charged.

(2) The flip-flop rs.sub.1 is brought out of operation (reset) by a zero-crossing pulse. Rest.fwdarw.set.fwdarw.rest of the flip-flop rs.sub.1 results in a change of the output Q of the flip-flop rs.sub.1 of "1". fwdarw. "0". fwdarw. "1". This oscillating waveform a-c waveform (oscillating waveform) is subjected to the frequency division action of a T-type flip-flop T.

(3) The change in the output Q of the T-type flip-flop T discharges the energy accumulated in the capacitor C45.

With these features (1) to (3), the following results can be achieved, for example, in the event of a failure of some of the components. The output Q remains "1" if the flip-flop rs.sub.1 fails when it is out of operation (reset state). Accordingly, the input of gate g.sub.9 remains "1", and thus gate g.sub.10 is in the "1" state. Capacitor C45 will not be charged, rendering thyristor MOS47 inoperative. If the flip-flop rs.sub.1 fails (is in a set state) during operation, the output Q of the flip-flop rs.sub.1 is "1", and the output Q thereof is "0". However, since the output Q of the flip-flop rs.sub.1 does not change alternately to "1". fwdarw. "0". fwdarw. "1", and the T-type flip-flop T cannot divide and is reset without changing its input T, its output Q is "0" and its output Q is "1". At this time, the gates g.sub.9 and g.sub.10 cause the amplifier E to charge the capacitor C45, but since the output Q of the T-type flip-flop T is "0", the gate g.sub.11 becomes "1", and the amplifier F stops operating and does not trigger the thyristor MOS 47. Therefore, in case of a failure of the flip-flop rs.sub.1, the thyristor MOS47 has no trigger output. If T-flip flop T fails and fails to operate (reset), output Q of T-flip flop T remains "0" and output Q "1". In response to the pulse t.sub.p, the flip-flop rs.sub.1 is alternately inverted, and only when the output Q of the flip-flop rs.sub.1 falls to "0", the capacitor C45 is charged through the gates g.sub.9 and g.sub.10, but since the output Q of the T-type flip-flop T remains "0", the gate g.sub.11 becomes "1", and the amplifier F stops operating. The output for triggering the thyristor MOS47 is not generated and is therefore safe. If T-flip flop T fails and becomes operational (set), the output of T-flip flop T is still "1" and the output Q is "0". Since the output Q is "0", the gates g.sub.9 and g.sub.10 keep the amplifier E operating, charging the capacitor C45 through the resistor R44. With the output Q of the flip-flop T in the "1" state, the gate g.sub.11 keeps the discharge amplifier F operating. In this state, the current Ia flowing through the resistor R44 does not accumulate in the capacitor C45, but flows to the gate of the thyristor MOS 47. The current Ia is given by # # EQU1# #. # EQU2# # where Vcc is the voltage across the zener 25 in the control circuit, v.sub.gk is the voltage across the gate and cathode of the thyristor MOS47, r.sub.44 is the value of the resistor R44, Er is the internal resistance R rate of the amplifier E, and Fr is the internal resistance R rate of the discharge amplifier F. In general, in the case of a 2A-type thyristor MOS, a non-trigger current i.sub.g (a gate current that does not trigger in any state) is 0.2 mA. Therefore, if the value of the resistor R44 is determined to be ia.sub.gk, the current flowing through the charge amplifier E flows entirely through the discharge amplifier F as a bypass even if the T-type flip-flop T malfunctions during operation (in the set state). Since this current Ia does not trigger the thyristor MOS47, safety is ensured. The same is true of gates g.sub.9, g.sub.10, g.sub.11, charge amplifier E and discharge amplifier F to ensure safety. Next, when the hysteretic control logic unit H fails while it is out of operation, gate g.sub.8 gives an output of "1" and the system returns to the proportional control mode. When the unit H fails (short-circuits) while operating, the output of the gate g.sub.8 is "0", bringing the gate g.sub.11 into the "1" state and keeping the discharge amplifier F inactive. The thyristor MOS47 will not be triggered and is therefore safe. When the zero pulse generator B, which generates clock pulses as a time base for the control system, fails, no alternating signal will occur. "0". fwdarw. "1". fwdarw. "0" and provides a time reference. Thus, the logic gate remains "1" or "0" and the thyristor MOS47 will have no trigger pulse and therefore be safe.

Briefly, the circuit of the present invention includes a series of components that are periodically reset, set and reset, the capacitor being charged (not discharged when charged) and discharged (not charged when discharged) to trigger the thyristor MOS47, thereby providing fail safety in the event of a component failure. When thyristor MOS47 fails completely due to a short circuit, safety is maintained in the following manner. As shown in fig. 2 and 8, the thyristor MOS operates in the entire band of the power supply voltage v.sub.ac. In the event of a fault, the diode 61 energizes the resistor R62 causing it to heat up during the negative half-cycle of the voltage v.sub.ac. The temperature of the resistor R62 rises, thermally disconnecting the fuse 14 and stopping the power supply.

Local overheating of the heater (6) occurs even if the circuit shown in fig. 2 is in normal operation. In this case, safety can be ensured by the following manner. Fig. 4 shows the structure of the heater (6) in which a meltable resin 50 is interposed between the heater wire 48 and the safety wire 49. The temperature may build up locally for one reason or another, for example, when the heater is locally prevented from dissipating heat. With the continued operation, the temperature further rises, eventually melting the resin 50, bringing the safety wire 49 into contact with the heating wire 48. As a result, a large current flows through: the circuit at point a, the heating wire 48, the contact part, the safety wire 49, the resistor R55 and the point B causes the resistor R55 to generate heat, so that the fuse FU14 is thermally cut off and the power supply is stopped, thereby ensuring safety.

In addition, the safety circuit may be adjusted so that a short-circuit current generated by short-circuiting the heater and the conductor passes through the current fuse to stop the power supply to the heat-generating load.

G.sub.28 in fig. 8 and 9 is a test element for checking the proper functioning of the control unit 41, in particular when it is made as an IC on a chip. The integrated circuit can be tested by examining hFE and ICBO between

pins

6 and 7. If the attributes between these pins are found to be within the specified range, the circuit will operate properly.

The lamp 13 in fig. 2 is only switched on when the thyristor MOS47 is conducting, indicating the energisation of the heating wire 48.

Fig. 30 shows another embodiment for maintaining the high setting and stopping the high setting operation. In fig. 30, the coil L56 is replaced by a relay having a set coil L561 and a reset coil L562, and the rotary switch 11 is replaced by a push-type rotary switch 111 combined with a normally open contact 112. When the system is set to high operation, the knob switch 111 is pressed to energize the set coil L561 through the contact 112, thereby closing the contacts 56' and 56 "and bringing the system into high operation. The thyristor MOS54 is triggered by pin 10 to energize the reset coil L562, opening the contacts 56' and 56 "and taking the system out of high set operation.

Fig. 31 shows a modification of the circuit shown in fig. 30. The modified circuit further comprises a push-button knob switch 113 for manual reset in combination with a normally open contact 114. The reset coil L562 can be energized from the outside through the contact 114 to perform manual reset.

Fig. 32 shows a circuit in which the load is an inductive relay. Components performing the same function as in the circuit of figure 2 are indicated by the same numerals. In fig. 32, thyristor MOS47 energizes transfer relay 69 with two

windings

691 and 692 to control energization of heater (6), which normally opens contact 70. The voltage on the secondary winding of transfer relay 69 is full-wave rectified by a full-wave diode bridge 71. When the thyristor MOS47 is triggered, a short circuit current flows through the secondary winding and an increased current flows through the primary winding 691 to close the contact 70.

In the circuit of the present invention, which includes the control circuit 41, the temperature is sensed during a half cycle of the voltage v.sub.ac, and the pulse t.sub.p generated during the half cycle provides a 2-bit thyristor MOS trigger pulse, as previously described, so that the thyristor MOS47 is triggered on a full wave without exception, and is not half-wave triggered. If the temperature is sensed during the positive half cycle and the thyristor MOS is triggered only during the negative half cycle, then the temperature is sensed during the following negative half cycle and the thyristor MOS is triggered only during the positive half cycle, the following problems may occur. There is no problem if the discharge voltage v.sub.bop of the neon lamp L30 in the positive half period is equal to the discharge voltage v.sub.bon thereof in the negative half period, and in a range, when the temperature of the object (3) to be heated approaches a set level, if v.sub.bop is not equal to v.sub.bon, the neon lamp L30 malfunctions only in the negative half period or the positive half period of the voltage v.sub.ac. In this case, the thyristor MOS47 is triggered only when the voltage v.sub.ac is in a positive or negative cycle, so when the load is a relay, the relay can be vibrated, causing hot sticking of the relay contacts. Furthermore, in the case where the load is an induction motor, the motor does not rotate because only half-wave current flows and the direct current portion is likely to cause thermal damage to the motor. However, in the case of the control circuit 41 of the present invention, a 2-bit trigger pulse is generated to constantly trigger the thyristor MOS in the full-wave range, thereby ensuring the flow of the alternating current. Therefore, the circuit is suitable for inductive loads.

The temperature setting unit 26 shown in fig. 33 includes a resistor R79 for allowing hysteresis of the temperature in the operation under the hysteresis control. As has been described with reference to fig. 2, 9 and 28, when the temperature of the object (3) to be heated reaches the set value, the first counter I for hysteresis control starts the counting operation after the continuously generated pulses t.sub.p disappear, as shown in fig. 28. The resistor R79 in fig. 33 determines this period t.sub.d and allows a pulse t.sub.p to be generated at delta.toff when the temperature of the object (3) to be heated drops from the set off temperature TOFF, resulting in a temperature difference. More specifically, when the object (3) to be heated is heated by the heating wire 48, the contact of the changeover relay 69 is closed. This connects the resistor R79 in parallel with the resistor R28 and the variable resistor R27. The parallel resistance r.sub.y is given by # EQU3#, where r.sub.76 is ignored. When a temperature TOFF determined by r.sub.y (less than r.sub.27 plus r.sub.28) is reached, thyristor MOS47 is brought out of conduction, transfer relay 69 de-energizes, and heater wire 48 de-energizes. In this case, the resistor R79 on the same side as the resistor R27 (via the heating wire 48) is connected to the layer impedance z.sub.7 of the

inner windings

36 and 37 of the sensor 7. Subsequently, when the temperature of the object (3) to be heated drops delta.toff, the impedance z.sub.7 increases, discharging the neon lamp L30, producing a pulse t.sub.p. Thus, in the arrangement of fig. 33, the off period of the thyristor MOS47 in the hysteresis control mode delta.t.sub.a is the sum of the period t.sub.d depending on the temperature difference and the time t.sub.i determined by the count time of the first counter I controlled by hysteresis. This system has the following features. (1) When the object (3) to be heated has good warmth retention properties, the reduced heat dissipation allows the temperature of the object to be gently lowered. The period delta.t.sub.a in fig. 6 is substantially determined by the temperature difference delta.toff. Thus, the time t.sub.d > of the delta.toff > the time t.sub.i of the first counter K. (2) When the object (3) to be heated allows good heat dissipation, the temperature of the object (3) to be heated rapidly decreases, with the result that delta.t.sub.a in fig. 6 is substantially determined by the time of the first counter I. The time t.d. of delta.toff < < the time t.i. of the first counter I. In particular, when the heating wire 48 is adjusted to be opened and closed by a relay or similar device having contacts, the system allows the contacts to be serviced for a longer period of time, thereby increasing the lifetime as the device is kept out of operation during t.sub.i.

When the resistance R79 in fig. 32 can be adjusted, the temperature fluctuates, delta.t.sub.d can be determined according to the use environment of the article or the user's request. Although not shown, when the number of flip-flops for the first counter I shown in fig. 9 is selectively changed, the temperature fluctuation delta.t.sub.d becomes variable.

The same advantages as described above can also be obtained by another embodiment to be described below. When the temperature sensed by the sensor 7 is low, the layer impedance z.sub.7 is large, so that the neon light L30 is triggered at an early stage of the voltage v.sub.ac, generating several pulses t.sub.p within a half cycle of the voltage v.sub.ac. As the temperature rises and approaches the set level, only one pulse t.sub.p will be emitted during the late phase of the half cycle of the voltage v.sub.ac. The pulses t.sub.p are counted by a counter during which the heating wire 48 is kept de-energized to achieve the same effect as described above.

The hysteresis control method described above is temperature-dependent, i.e., the period during which the heating wire 48 remains inactive varies according to the drop in temperature of the object (3) to be heated from the set temperature TOFF, i.e., is heat-dissipation-dependent.

According to another embodiment described below, the off-period of the heating wire 48 is determined only over time. The flip-flop rs.sub.4 is eliminated from the hysteresis control logic unit H of fig. 9 and the input of the gate g.sub.21 coupled to the output Q of the flip-flop rs.sub.4 is coupled to the output Q of the flip-flop rs.sub.3. This is no longer related to the time t.sub.d, so that it is possible to operate the first counter I when the pulse t.sub.p disappears. Unlike the conventional temperature control system using a temperature difference, the heating wire 48 may be constantly kept inactive for a period of time set by the timer t.sub.i, thereby eliminating power failure due to frequent switching actions and vibration of the relay 60, which may occur in the case of low home power capacity. More specifically, referring to fig. 33, when the temperature difference delta.toff is obtained only by using the resistor R79, when the transfer relay 69 is energized, the heating wire 48 is energized, the power supply voltage v.sub.ac decreases, the value of the resistor R79 increases, and as a result, the voltage decrease turns off the neon lamp L30 that has been ignited. Therefore, the thyristor MOS47 is pulled out, the relay 69 is de-energized, the heater wire 48 is de-energized, and the voltage v.sub.ac is restored to the original level. This again turns on neon L30 and energizes the relay through thyristor MOS 47. In this way, the relay 69 is susceptible to chattering. This becomes unavoidable when the heating wire 48 has a large power capacity. To avoid this inconvenience, it is necessary to use a very low value of resistor r.sub.79 to provide a very large temperature difference delta.toff. The circuit of the invention has the feature that the above-mentioned drawbacks are overcome by a simple first timer I which stops the operation of the heating wire 48.

The circuit of fig. 32 operates in the following manner to ensure safety in the event of a part failure. When the contact 70 of the transfer relay 69 is thermally stuck, the heater (6) will be kept energized, and there is a danger. When the temperature of the object (3) to be heated reaches the set level in this state, the neon lamp L30 stops generating the pulse t.sub.p, and therefore, no trigger pulse is inputted from the 12 th pin to the thyristor MOS 47. The thyristor MOS47 is brought to an "OFF" state, allowing resistor R74 to trigger thyristor MOS58 and cause resistor R59 to generate heat. Thereafter, the temperature of the resistor R59 rises, with the result that the fuse FU14 is thermally broken to stop the power supply and ensure safety. Further, when the thyristor MOS47 is short-circuited, the transfer relay 69 continues to operate, and the heater (6) is kept energized through the contact 70, and thus is dangerous. In this case, the voltage of the thyristor MOS47 is detected by the resistor R57, and the self-triggering circuit of the control unit 41 functions to give a trigger pulse to the thyristor MOS58 through the 11 th pin. The thyristor MOS58 is brought into a conducting state, and the resistor R59 generates heat, thereby thermally disconnecting the fuse FU14 and stopping power supply, thereby ensuring safety. Furthermore, when the heater (6) is locally overheated, the heater wire 48 is in contact with the safety wire 49, and current is passed through the resistors R55 and 62 through the

diodes

61 and 68, the principle of which is the same as that already described with reference to fig. 2. As a result, the resistor R55 or 62 generates heat, thereby thermally breaking the fuse 78 and safely de-energizing the heater (6).

In the following, another embodiment will be described, in which the load is inductive. Fig. 34 shows a circuit thereof. Components performing the same function as shown in fig. 32 are denoted by the same reference numerals. The circuit of fig. 34 differs from that of fig. 32 in that the thyristor MOS47 is triggered with direct current by using a transistor 80. Fig. 35 shows waveforms involved in the operation of the circuit shown in fig. 34. Referring to fig. 35, the circuit operates in the following manner. When one pulse t.sub.p is generated in the negative period of the power supply voltage v.sub.ac, the output of the 14 th pin of the control unit 41 and the output of the 12 th pin thereof have the waveforms shown in fig. 35, as described previously. While in the circuits of fig. 2 and 32, the 12 th pin provides a trigger pulse to the thyristor MOS47, in the circuit of fig. 35, the 12 th pin does not provide a trigger pulse. The terminal voltage on the capacitor C45 for charging or discharging is detected by the emitter follower type transistor 80 (see fig. 35, terminal voltage c.sub.45). When the "terminal voltage c.sub.45" of fig. 35 is generated, the voltage across the resistors R81 and 82, the thyristor MOS47 is triggered to direct current. Thus, the operation of transfer relay 69 involves a waveform, so reliable operation results regardless of the R/L value of relay 69. When the neon pulse t.sub.p disappears as a result of the temperature rise of the article, the terminal voltage c.sub.45 of the capacitor C45 falls, as shown in fig. 35, and the thyristor MOS47 is brought out at time t.sub.8, de-energizing the transfer relay 69.

The circuit of fig. 34 includes a fail-safe function, and the terminal voltage of capacitor C45 is only generated when all components are operating properly, as previously described. This voltage is amplified by an emitter follower type amplifier including a transistor 80 triggering a thyristor MOS47 with direct current. Thus, the circuit can operate reliably even under inductive loads, while maintaining a failsafe function. With respect to other features, the circuit operates in exactly the same manner as in fig. 33.

Fig. 35 shows a circuit comprising a heater (6) and a temperature sensor RT7, which are combined in the form of wires, whereas the circuits shown in fig. 2, 32 and 34 use a sensor 7 and a heater (6), which are arranged in two wires, respectively. The member 50 provided between the heater line 48 and the safety line 49 is composed of a temperature sensitive organic semiconductor having the characteristics of fig. 5. The two-wire type circuit shown in fig. 2 operates in exactly the same manner. During the negative cycles of the supply voltage v.sub.ac, the layer voltages on the heater and safety lines 49 are used by the neon light L30 to detect the temperature, and the generated pulses t.sub.p are used to control the temperature. The single wire circuit has a feature that its structure is simpler than that of the two wire circuit.

Although the above-described embodiment employs the thyristor MOS as the power control element, the present invention is not limited to the use of the thyristor MOS alone, and the thyristor MOS may of course be replaced by a bidirectional semiconductor control element, a relay, or the like as needed.

The system of the present invention having the above-described structure has the following advantages.

(1) In order to ensure safety in the event of a self-triggering, short-circuit or the like failure in a power control thyristor MOS for directly or indirectly controlling the supply of power to a heater, a failure detection circuit is provided for comparing the output of the temperature detection circuit with the voltage across the thyristor MOS so that the supply of power to the heater is stopped by a fuse or the like current breaker when the thyristor MOS is in an ON state despite the presence of an OFF signal of the temperature detection circuit. Therefore, the fault detection circuit is suitable for directly detecting the fault of the thyristor MOS, ensures high safety and can reliably detect the self-triggering fault of the thyristor MOS, which cannot be detected by the traditional waveform distinguishing system. (2) When any thyristor MOS for triggering the power control thyristor MOS is short-circuited or disconnected, the thyristor MOS cannot be triggered, thereby ensuring the safety. (3) When the temperature of the heater rises to an abnormal level for reasons other than those described above, for example, due to a failure of two or more components, the meltable insulation material provided for the heater melts, short-circuiting the heater and the conductor opposite thereto, and opening the current breaker to ensure safety. (4) The combination of the above features ensures safety when the circuit of any one component fails.

Claims

1. A temperature sensing detection system, characterized by: the heating device comprises a power plug (1), wherein the power plug (1) is electrically connected with a controller box (2), and the controller box (2) is connected with a connector (5) of an object (3) to be heated through a connecting wire (4); the object (3) to be heated has a heater (6) and a temperature sensor RT7 for detecting the temperature of the object (3) to be heated;

a power switch 8 and a dial 9 for setting the temperature of the object (3) to be heated, and a mode selection hysteresis control selection switch 10 for selectively controlling the temperature of the object (3) to be heated are provided in the controller box (2);

a knob switch 11 for starting a high setting operation, a power indicator lamp 12 and a heating and electrifying indicator lamp 13 are arranged in the controller box (2); in the high-position holding mode, the object (3) to be heated is heated at a high-position temperature which is irrelevant to the temperature set by the dial plate (9) for a set time, and then returns to the temperature set by the dial plate (9); in the normal mode, the temperature is controlled at a level set on the dial 9; when the heater (6) is energized, the heating energization indicator lamp 13 is turned on;

the heater (6) includes a heating core (51); a heating coil (48) wound around the heating core wire (51), a fusible resin coating (50) wound around the heating coil (48), and a sheath (52) of a safety yarn (49) wound around the fusible resin coating (50);

the temperature sensor RT7 includes a core wire 39 and an inner winding 36 surrounding the core wire 39; a temperature sensing element 38 with a plastic thermistor R covering the winding 37 is arranged outside the inner winding 36, and a sheath 40 is arranged outside the covering winding 37; the temperature sensing element 38 has a characteristic which varies with temperature and a layer resistance exists between the inner winding 36 and the cover winding 37.

2. The temperature sensing detection system of claim 1, wherein: mode selection the hysteresis control selection switch 10 includes two mode selections, one of which is a proportional control mode, the temperature of the object (3) to be heated is controlled at a constant level at any time; the other control mode is a hysteresis control mode in which the temperature of the object (3) to be heated is changed within a predetermined temperature range.

3. A temperature sensing detection system, characterized by: having circuitry; comprises a power plug (1), a power switch 8, a fuse FU14 and a power noise filter 15 which are electrically connected in sequence;

the input of the temperature setting circuit 26 is electrically connected and divided into two paths through a limiting resistor R28, and one path is connected to the temperature detection circuit 29 after passing through a variable resistor R27;

the input current of the temperature detection circuit 29 passes through the covering winding 37 and the primary coil 34 of the pulse transformer TC33 in sequence, then passes through the capacitor C31 and the resistor R32 which are connected in parallel, and then is connected with one end of the neon lamp L30; the other end of the neon lamp L30 is connected with the inner winding 36;

the control circuit U41 performs control operations, including integrated circuits IC; the integrated circuit IC has 1 st to 16 th pins;

the resistor R42 is connected to the pin 16 and the output end of the choke coil 16 respectively to detect the output voltage of the choke coil 16 and multiply the integrated circuit IC with the a-c line, i.e. the output voltage of the choke coil 16 with the A node;

the other output path of the limiting resistor R28 is electrically connected with one input contact 56 'of the high-level operating switch, one output contact 56' of the high-level operating switch is output, and the other input contact of the high-level operating switch is connected with the output end of the variable resistor R27; another output contact pin 3; a knob of a pull switch 11 of the high-level operation switch realizes the on-off of a contact and is connected with a pin 3 of the integrated circuit IC;

the integrated circuit IC is electrically connected with a trigger circuit C-R circuit 43 for triggering the thyristor MOS 47; the C-R circuit 43 includes a resistor R44 and a capacitor C45; the two ends of the resistor R44 are connected between the pin 13 and the pin 14; capacitor C45 is connected between pin 13 and the loop; the loop is grounded;

when the temperature of the object (3) to be heated is lower than the set value, the output current of the temperature detection circuit 29 is sent to the pin 2 of the integrated circuit IC, the pin 2 is input to control the output current of the pin 14 to be sent to the trigger circuit C-R circuit 43, and the capacitor C45 is charged through the resistor R44;

the gate pin 12 and the drain of the thyristor MOS47 are connected with the loop, and the source passes through the pin 15 of the resistor R57 and is connected with one end of the heating winding (48); the other end A point of the heating winding (48) is connected with one output end of the choking coil 16; the input end of the safety wire (49) is connected with the output end of the inner winding 36; the output end of the safety wire (49) is connected with a heating resistor R55 and a loop B point; the heating resistor R55 is heated to control the on/off of the fuse FU 14.

4. The temperature sensing detection system of claim 3, wherein: when the voltage V.sub.z7 between the inner winding 36 and the cover winding 37 is greater than the discharge starting voltage V.sub.B0 of the neon lamp L30, i.e. when V.sub.B0 V.sub.z7, the neon lamp L30 is triggered, allowing the pulse transformer TC33 to act through the capacitor 31 and the resistor R32 to provide a current output, which occurs when the temperature setting of the object (3) to be heated is low;

when the V.sub.B0 is more than the V.sub.z7, namely when the object (3) to be heated is at a set high temperature, the neon lamp L30 can not be triggered;

when the output line voltage of choke coil 16, where node a is present, approaches positive circulation and crosses zero, capacitor C45 discharges through pin 13, and the gate of thyristor MOS47 is triggered at the zero crossing through pin 12; the thyristor MOS47 is conducted to electrify the heater (6); the grid of the thyristor MOS47 is connected with the loop through a gate resistor Rthyristor MOS 46;

when the heater (6) is heated to a set high temperature threshold, the fusible resin coating (50) melts and the heating wire 48 contacts the safety wire 49, a temperature-induced signal current exceeding the set threshold flows through the circuit: point A, a heating wire 48, a contact part, a safety wire 49, a heating resistor R55 and a point B, wherein the heating resistor R55 heats and thermally breaks the fuse FU14, and the current flow is interrupted to ensure safety;

under normal conditions, a small current of the temperature-induced signal current below a set threshold flows through: the temperature setting resistor R27, the temperature sensor RT7, the safety wire 49, and the heating resistor R55 are in circuit, but the heating resistor R55 cannot cause the fuse FU14 to be disconnected;

5. The temperature sensing detection system of claim 3, wherein: a scheduling strategy to ensure the self-triggered state safety of the thyristor MOS47 is included, i.e. resistor R57 checks the terminal voltage of the thyristor MOS47 in order to energize the heater (6); when thyristor MOS47 is in a half-wave conducting state, thyristor MOS47 is in a self-triggering state, considered a hazard strategy, despite the absence of an output from temperature detection circuit 29, and accordingly despite the absence of an input to pin 2 of integrated circuit IC;

under the dangerous strategy state, the terminal voltage of the thyristor MOS47 is received to the pin 15 of the integrated circuit IC through the resistor R57, and logic operation is carried out in the integrated circuit IC to provide the trigger output current from the pin 11 for the thyristor MOS 58; this output turns on thyristor MOS58, causing resistor R59 to generate heat, heating fuse FU14 and hot-cutting the fuse;

the source of the thyristor MOS47 is connected with one output of the choke coil 16 through a diode D61 and a resistor R62 which are connected in series; when the thyristor MOS47 completely fails due to a short circuit, safety is ensured in the following manner; since there is an excessive current through the heater (6) at this time, there is a danger that a negative half-cycle voltage is applied to the resistor R62 through the diode D61, so that the resistor R62 generates heat to thermally break the fuse FU14, interrupting the flow of current.

6. The control circuit of the temperature sensing detection system is characterized in that: comprises an integrated circuit IC internally defined by two points and a line, which comprises

a waveform shaping unit C that receives the output of the temperature sensor RT7 in a pulse form from the pulse transformer TC33 and shapes the output into a specified waveform;

a 2-bit frequency divider D which receives the temperature detection output signal from the waveform shaping unit C and generates a trigger pulse at a zero point crossing point when an output line voltage of an a-C line, i.e., a choke coil 16, having an A node, becomes a positive value or a negative value;

a charge amplifier E for charging a capacitor C45 through a resistor R44;

a discharge amplifier F receiving the charge stored in the capacitor C45 through a 13 th pin and sending out the charge through a 12 th pin to trigger the thyristor MOS 47;

-a hysteresis control logic unit H stopping the 2-bit divider D for a set period of time delta.ta to provide temperature fluctuations for the object (3) to be heated;

a first counter I, including a T-type flip-flop, connected together in n stages, counting the power supply frequency for a time delta.ta, holding thyristor MOS47 inactive for a set period delta.ta with respect to hysteresis control logic unit H; ta, after a set time period, reset unit a resets hysteresis control logic unit H to again trigger thyristor MOS 47;

a high-level hold selector J, the contacts 56' and 56 ″ being closed when the high-level hold knob switch 11 is manipulated; when the contact 56' is closed, the temperature setting resistor R27 is bypassed, resulting in the highest temperature setting regardless of the setting of resistor R27; when the 3 rd pin is connected to the closed contact 56", the high set hold high level selector J connects the hysteresis control counter I directly to the high set hold counter K, so that the first counter I and the second counter K count the high set hold time delta th; when the high-level hold selector J is set to the high-setting hold, the hysteresis control hysteresis selector G does not function when under the hysteresis control, allowing the proportional control to be performed during the high-setting operation;

a memory L for holding a high setting value, the memory L making the first counter I usable also as a low counter holding a high setting value; during high set point operation, the memory L stores a signal indicating that the first counter I has completed counting and sends an output to the second counter K which maintains a high set point;

an output amplifier M for stopping holding the high set point and providing an output to trigger the thyristor MOS54, causing coil L56 to open the high set point holding contacts 56' and 56 "; the failure of a diode in the circuit and the self-triggering state of the thyristor MOS47 are detected through the logic between the waveform shaping unit C and a detector N for detecting the terminal voltage of the thyristor MOS 47;

if the voltage detector N, the timing detector O, and the self-triggering amplifier P do not have the output of the waveform shaping unit C but the voltage detector N has no input voltage, the thyristor MOS47 is in the self-triggering state, and therefore, the output of the voltage detector N is sent to the self-triggering amplifier P in relation to the timing of the timing detector O switched at the setting stage of the power supply positive cycle, the amplified signal from the self-triggering amplifier P is output to the triggering thyristor MOS, and the fuse FU14 is thermally broken by the heat generated by the resistor R59.

7. A control circuit of a temperature sensing detection system is characterized in that: in an integrated circuit IC, a reset unit A has a circuit a for detecting a reset voltage with a control power supply Vcc of the reset unit A;

when the control voltage Vcc on pin 1 of the integrated circuit IC increases from zero V, the transistor a.sub.5 remains off until the threshold v.sub.rs is reached, when v.sub.rs is exceeded, the transistor a.sub.5 is brought into the on-state; v.sub.rs ═ 3. x.v.sub.be;

wherein the gate-drain sign voltage of the transistors a.sub.2 to a.sub.5, i.e. the transistor a.sub.4, is v.sub.be; transistors a.sub.4 and a.sub.5 provide a current mirror circuit; when Vcc becomes equal to or greater than v.sub.rs, current i.sub.1 starts to flow through resistor ra.sub.1, i.e., resistor ra.sub.1, and the same current as current i.sub.1 is introduced between the source and drain of transistor a.sub.5;

the function of the capacitors C23, C24 of the power supply 19 is to increase the control power supply Vcc over time when the power switch 8 is closed; when v.sub.rs is the reset voltage, transistor a.sub.5 remains non-conductive until time tr.sub.2, and Vcc v.sub.rs after time tr.sub.2, so transistor a.sub.5 is brought fully conductive for time delta.t; assuming that the logic cell operating voltage is v.sub.l, the logic cell is brought into normal operation at time tr.sub.1, but is held in reset by transistor a.sub.5; at time tr.sub.2, transistor a.sub.5 is turned on, leaving the logic cell out of the reset state;

when the counter mirror is changed to a current amplifier, the switching time of transistor a.sub.5.

8. The control circuit of the temperature sensing detection system according to claim 6, wherein: further comprising transistors a.sub.7 and a.sub.8 to provide a differential amplifier, the reset threshold voltage v.sub.rs being provided by transistors a.sub.2, a.sub.3 and a.sub.4; detecting the voltages v.sub.rs and vcc dependent on the voltage division over the resistors ra.sub.13 and a.sub.14 to determine the operation of the transistor a.sub.5;

the reset voltage detector circuit a detects the voltage rising Vcc of the control power supply Vcc, and when the control power supply Vcc is lower than a set threshold value V.sub.RS from the power off, the transistor a.sub.5 is kept to be not conducted so as to reset the logic unit;

a zero voltage detection circuit B for the zero pulse generator B obtains "v.sub.ce of b.sub.14" and "v.sub.ce of b.sub.19" waveforms when the impression of the supply voltage v.sub.ac on the 16 th and 5 th pins crosses the zero level;

starting from a reference time t.sub.o when the supply voltage v.sub.ac of the 16 th pin starts to rotate, a current "i.sub.ce of b.sub.11" starts to flow between the source and the drain of the transistor b.sub.11; the supply voltage v.sub.ac exceeds the gate voltage of the transistor b.sub.11, the gate-drain-sign voltage v.sub.bes of the transistor b.sub.8 biased by the resistor rb.sub.7, the bias voltage plus the gate-drain-sign voltage v.sub.be of the transistor b.sub.11, i.e. v.bes-v.sub.be-. delta.v.sub.be;

the i.sub.ce through transistor b.sub.11 energizes the current mirror consisting of transistors b.sub.13 and b.sub.14 through transistor b.sub.12,

the supply voltage v.sub.ac reaches a peak and begins to fall towards a negative value, but before time t.sub.1, transistor b.sub.14 remains conductive as long as v.sub.ac.gtoreq.2v.sub.be;

when the v.sub.ac subsequently becomes less than 2v.sub.be, the transistor b.sub.14 is brought out of conduction, resulting in a waveform "v.sub.cb of b.sub.14";

the transistor b.sub.10 in combination with the transistor b.sub.11 forms a current mirror which causes the gate current i.sub.b through the resistor rb.1 to be equal or approximately equal to the source current i.sub.c through the resistor rb.3;

the switching speed of the transistor b.sub.14 is improved through the waveform shaping circuit b.sub.20, and the input voltage and the output voltage of the waveform shaping circuit b.sub.20 are in phase; when the supply voltage v.sub.ac starts to go from zero level to a negative value at time t.sub.1, the gate voltage of the transistor b.sub.15 is kept at the gate voltage of the transistor b.sub.8, i.e. the bias voltage v.sub.bes; when the gate-drain sign voltage of the transistor b.sub.15 is v.sub.be, if v.sub.be v.sub.bes and v.sub.be-v.sub.be ═ delta.v.sub.be, the following occurs:

when the transistor b.sub.15 is brought into conduction, at this time, the gate current of the transistor b.sub.15 flows from the control power supply v.sub.cc through the resistor rb.sub.7, then through the gate and the drain of the transistor b.sub.15, and through the resistor rb.sub.1 into the power supply v.sub.ac, which occurs after time t.sub.1 delta.t.sub.n;

a current "i.e. ce of b.sub.15" flows through the source of the transistor b.sub.15, causing the transistors b.sub.16, b.sub.17 and b.sub.18, b.sub.19 to provide a current mirror and give a voltage waveform "v.sub.ce of b.sub.19";

when v.sub.be and v.sub.be-v.sub.be are 0, the following occurs: maintaining the state for a set period of time prior to time t.sub.2; the transistors b.sub.15 and b.sub.18 are identical in v.sub.be, when v.sub.ac is equal to zero V, the transistor b.sub.15 is active, the time t.sub.n is zero, "i.sub.ce of b.sub.15" and "v.sub.ce of b.sub.19" are obtained at t.sub.1 and t.sub.2;

if v.be.be.v.sub.bes, and v.be-v.sub.be ═ delta.v.sub.be, delta.t.sub.n is to the left of t.sub.1, which is exactly the opposite of the case of v.be.v.sub.bes and v.sub.be-v.sub.be ═ delta.v.sub.be;

when the transistors b.sub.14 and b.sub.19 perform switching operation, the output waveforms are shaped by the shaping units b.sub.20 and b.sub.21;

the transistor b.sub.14 comprises a multi-source and an RS trigger; the RS trigger comprises gates G.sub.31 and G.sub.32, waveform shaping is performed through a measurer G.sub.30, and the output given by the gate G.sub.31 is a sharp waveform;

an amplifier, a waveform shaping unit b.sub.20 adopting an IIL structure, which comprises a gate composed of an injection resistor Rb.sub.21 and transistors b.sub.22 and b.sub.23, and transistors b.sub.24 and b.sub.25 for amplifying current;

for the pulse detection circuit C of the waveform shaping unit C, when the heated object (3) to be heated has a set low temperature, the impedance z.sub.7 on the inner winding 36 and the cover winding 37 of the sensor 7 is low; when the supply voltage v.sub.ac increases to a specified level, the layer voltage v.sub.z7 of the sensor 7 exceeds the discharge starting voltage v.sub.bo of the neon lamp L30, triggering the lamp, the secondary winding 35 of the pulse transformer TC33 has pulses with a waveform t.sub.p;

in the pulse transformer TC33, the polarity of its winding, i.e. when the supply voltage v.sub.ac is in the negative half-cycle, the pulses from neon lamp L30 are reversed to negative values when transferred from the primary winding to the secondary winding of the pulse transformer TC33, the secondary winding thus providing positive voltage pulses with the waveform t.sub.p 1; the circuit is adapted to detect temperature when the supply voltage v.sub.ac is in negative circulation; the waveform t.sub.p2 generated in the positive cycle is a negative voltage; the pulse voltage t.sub.p1 applied to the 2 nd and 5 th pins causes the operation of the drain-mark follower transistor c.sub.3, which in turn causes the current mirror consisting of transistors c.sub.4 and c.sub.5 to be energized, the transistor c.sub.5 acting for a period of delta.t.sub.p;

the negative voltage pulse t.sub.p2 reverse biases the transistor c.sub.3 through the transistor c.sub.6 and the resistor rc.sub.1 without operating the transistor c.sub.5; during the time period from t.sub.3 to t.sub.4, with transistor c.sub.5 remaining non-conductive, neon L30 will not be triggered;

the pulse detection circuit c receives a pulse t.sub.p1 generated in a negative cycle of the power supply voltage v.sub.ac as an effective temperature detection signal;

for amplifiers E and F used to trigger thyristor MOS47, when the output of gate g.sub.10 falls to "0", transistors e.sub.4 and e.sub.5 of amplifier E are biased and operate through resistors re.sub.1 and e.sub.2, charging capacitor C45 through resistor R44; when the supply voltage v.sub.ac crosses zero, the gate g.sub.11 temporarily drops to "0", whereby the transistors f.sub.5 and f.sub.6 of the amplifier F are biased and rendered conductive through the resistors rf.sub.1 and f.sub.2, so that the charge on the capacitor C45 is temporarily discharged in pulses, triggering the thyristor MOS47 through the 12 th pin; when the capacitor C45 is charged through the gate g.sub.10, the gate g.sub.11 is held at "1", and does not receive any discharge signal;

for the detection circuits G and J respectively used for the hysteresis control magnetic hysteresis selector G and the high setting and keeping high level keeping selector J, the resistors Rg.sub.1, g.sub.2 and g.sub.3 and the transistors g.sub.4 and g.sub.5 provide current mirror images;

a hysteresis control selection switch 10, which, when turned off, causes the transistor g.sub.5 to enter a conducting state and sets the system in a hysteresis control mode; the circuit of the high-level hold selector J is identical in structure to the circuit of the hysteresis control selector G; high setting the hold switch contact 56", when closed, takes transistor j.sub.5 out of conduction;

for a voltage detection circuit N for detecting self-triggering of the thyristor MOS47 and a detection timing circuit O, the circuit N checks whether the thyristor MOS47 is in a conducting state, the circuit N including resistors rn.sub.1, n.sub.2 and transistors n.sub.3 to n.sub.7; when the transistor n.sub.4 is turned on, the voltage on the 15 th and 5 th pins, delta.va, is equal to or greater than the gate-drain-programming voltage 3v.sub.be of the three transistors n.sub.4, n.sub.5 and n.sub.6; the forward voltage drop v.sub.f between the anode and the cathode of the thyristor MOS47 is set to be less than 3v.sub.be when brought into conduction; when the power supply voltage V.sub.AC exceeds the threshold voltage 3V.sub.BE of the transistor n.sub.4 within the time Delta.t.sub.c, the thyristor MOS47 is in an OFF state, and no signal is input to the grid; the source voltage "v.sub.ce" of the i.ce "transistor n.sub.7 of the source current" n.sub.4 "is" 0 "; delta.t.sub.c time, up to time t.sub.c, at which the supply voltage v.sub.ce becomes a negative value of zero level, the "v.sub.ce for n.sub.7" remains "0"; when thyristor MOS47 enters the connected state, transistors n.sub.4 and n.sub.7 are in the "OFF" state, and the "v.sub.ce" of n.sub.7 is maintained for a period of time from t.sub.2 to t.sub.3; the power supply voltage v.sub.ac is applied to the 16 th pin through the timing detection circuit O; providing that the reference voltage of the transistors o.sub.11 and o.sub.12 of the differential amplifier is the voltage v.sub.st at the midpoint between the resistors ro.sub.3 and o.sub.4;

v.st ═ 2.5v.sub.be, where v.sub.be is the gate-to-drain voltage of transistor o.sub.8; this voltage is divided by the resistors ro.sub.3 and o.sub.4 to give 0.5v.sub.be, o.sub.3 o.sub.4; when the voltage on pin 16 due to the supply voltage v.sub.ac exceeds the voltage v.sub.st, the transistors o.sub.12, the transistors o.sub.13 and o.sub.14 forming a current mirror, and the transistors o.sub.15 and o.sub.16 also providing a current mirror are all made conductive; when the supply voltage v.sub.ac exceeds 2v.sub.be, the current is shunted to the zero pulse generator B through the resistor rb.sub.1, and thus the voltages on the 16 th and 5 th pins rise from 2 v.sub.be; which is above 2.5v.sub.be for a period of time, the threshold voltage v.sub.st of the differential amplifier consisting of transistors o.sub.11 and o.sub.12, in which circuit delta.t.sub.s must be longer than delta.t.sub.c;

a circuit Q for extracting an intermediate output from a first counter I of a plurality of stages, wherein the first counter I includes T-type flip-flops connected in n stages and is divided into two blocks, i.e., a block of t.sub.il to t.sub.ix and a block of t.sub.iy to t.sub.in; by means of a first counter I, the output q.sub.ix of one block and the input t.sub.iy of another block, when directly coupled, a directly coupled counter is provided;

a first block of the 8 th pin output from t.sub.il to t.sub.ix for judgment is checked for operation when inputted to T, and a second block of the q.sub.in output from t.sub.iy to t.sub.in for judgment is checked for rectangular wave inputted to the 9 th pin, separately;

a circuit Q is inserted in the middle part of the first counter I, the transistors q.sub.4 and q.sub.5 providing a constant voltage supply; transistor q.sub.6 acts as an output buffer, while transistors q.sub.7 and q.sub.8 provide an input buffer and form a current mirror;

for the proportional control mode, the hysteresis control select switch 10 is open, while the contacts 56' and 56 "of the high setting hold switch are open, and the power switch 8 is closed; when the gate G.sub.13 of the zero pulse generator B is 0, the trigger RS.sub.1 of the waveform shaping unit C is reset;

when the temperature sensor RT7 subsequently emits a pulse t.sub.p1, the flip-flop rs.sub.1 is set, at which point the output Q of the flip-flop rs.sub.1 changes from "1" to "0", and therefore the gate g.sub.9 changes from "0" to "1", and the gate g.sub.10 changes from "1" to "0"; as the gate g.sub.10 goes to "0", the amplifier E is energized, starting to charge the capacitor C45 through the resistor R44, the temperature sensor RT7 triggers the neon light L30 and starts to charge the capacitor C45 again; immediately before time t.sub.2, when the supply voltage v.sub.ac changes from negative to positive, the gate g.sub.13 changes from "1" to "0", so that the flip-flop rs.sub.1 is reset again; with reset, the output Q of flip-flop rs.sub.1 returns from "0" to "1"; therefore, a signal that reverses from "1" to "0" at gate g.sub.33 is applied to the input of the T-type flip-flop T, and therefore, at the falling edge of the input T, the output Q of the flip-flop changes from "0" to "1"; change gate g.sub.10 to "1" to stop charging of capacitor C45 while enabling discharge amplifier F to function, input output to pin 12; after the supply voltage v.sub.ac becomes positive after time t.sub.2, the gate g.sub.12 changes from "0" to "1", as a result of which the AND output of the gates g.sub.14 AND g.sub.15 drops from "1" to "0"; the outputs of g.sub.14 and g.sub.15 are delta.t, during which both gates g.sub.12 and g.sub.13 are "0"; after the time period T, the output Q of the T-type flip-flop T is "1", but since the AND output of the gates g.sub.14 AND g.sub.15 is "0", the gate g.sub.11 becomes "1", AND the charging of the capacitor C45 is stopped; therefore, only at the zero crossing of the supply voltage v.sub.ac around time t.sub.2 during delta.t will the output from pin 12 be produced and trigger the thyristor MOS47, which in turn energises the heating wire 48; after the lapse of time delta.t, the gate g.sub.11 changes from "0" to "1", and therefore, the output of the gate g.sub.10 changes from "1" to "0", thereby starting to charge the capacitor C45 through the resistor R44; near the time t.sub.3 when the voltage v.sub.ac changes from positive to negative, a zero crossing pulse occurs again, AND the output Q of the flip-flop rs.sub.2 AND the AND output of the gate g.sub.14; before the time t.sub.3 arrives, the AND output of the gates g.sub.14 AND g.sub.15 changes from "0" to- "1", thereby causing the output Q of the flip-flop T to change to "1"; gate g.sub.11 drops to "0", discharging capacitor C45 again; as the gater g.sub.10 changes from "0" to "1", the charging of the capacitor C45 is interrupted at this time; at the same time, the AND output of the output Q of the flip-flop rs.sub.2 AND the output of the gate g.sub.14 changes from "0" to "1"; this output is anded with the output Q of the T-flip-flop T AND fed into gate g.sub.4, which changes from "1" to "0" AND gate g.sub.33 changes from "0" to "1"; the AND output of the output Q of the flip-flop rs.sub.2 AND the output of the gate g.sub.14 falls from "1" to "0" within delta.t time after time t.sub.3; thus, gate g.sub.4 changes from "0" to "1", and gate g.sub.33 changes from "1" to "0"; at the falling edge of the output of gate g.sub.33, the output Q of T-flip flop T returns from "1" to "0"; the T-type flip-flop T performs one counting under the set AND reset signals from the flip-flop rs.sub.1 AND zero crossing pulses generated when the set output Q of the flip-flop T AND the voltage v.sub.ac become negative, performs two counting under AND output of delta.t AND returns; detecting temperature in positive or negative period of voltage V.sub.AC, responding to the generated signal, and sending out a two-bit thyristor trigger pulse at zero point when the voltage is converted into positive or negative; during the time from t.sub.5 to t.sub.8, since the temperature of the object (3) to be heated is higher than the set level, there is no pulse from the sensor 7 to trigger the neon light L30; since the trigger rs.sub.1 is held in the reset position; when the gate g.sub.10 is in the "1" state, the capacitor C45 is not charged, the output Q of the T-type flip-flop is "0", the gate g.sub.11 is in the "1" state, and therefore the discharge amplifier F is kept in the inactive state; therefore, the voltage of the 12 th pin is zero, and when the neon lamp L30 is triggered again as the temperature of the object (3) to be heated decreases, the above operation continues; thyristor MOS47 is triggered, energizing heater wire 48;

for the hysteresis control mode, the hysteresis control selection switch 10 is turned off; with the closing of the hysteresis control selection switch 10, the gate g.sub.19 changes from "1" to "0", and the gate g.sub.20 changes from "0" to "1"; since gate g.sub.1 is already in the "1" state, gate g.sub.3 changes from "0" to "1", and gate g.sub.22 changes from "1" to "0"; thus, the first counter I for hysteresis competition is brought out of its reset state; as the gate g.sub.5 changes from "0" to "1" at the same time, the flip-flops rs.sub.3 and rs.sub.4 of the hysteresis control logic unit H are also brought out of the reset state;

with regard to the hysteretic control mode, time t.sub.1 is taken as a starting point, and during t.sub.1 to t.sub.5, the output of pin 12 is sufficient to trigger thyristor MOS47, thereby energizing heater wire 48; the temperature of the object is continuously increased along with the pulse t.sub.p generated by the neon lamp L30; when the temperature of the object (3) to be heated reaches a set value, the lamp (30) is no longer triggered, and the cyclically generated pulse t.sub.p2 is extinguished;

detecting whether the temperature of the article reaches a set value by detecting the extinction of the pulse at time t.sub.5, at which time the output from the 12 th pin to the thyristor MOS47 is stopped to deenergize the heating wire 48; since the temperature of the object (3) to be heated exceeds a set value, no pulse is generated for a certain period of time; thereafter the temperature begins to drop and reaches a set level t.sub.s or t.sub.s-. delta.t.sub.s, when this temperature difference is preset neon L30 is triggered around time t.sub.8 and produces a pulse t.sub.p 3; the time t.sub.d depends on the structure and temperature of the object (3) to be heated; the time of t.sub.d is shown as corresponding to several cycles of the voltage v.sub.ac; the regenerated pulse t.sub.p3 is detected and counted by the first counter I; while the first counter I counts pulses, the thyristor MOS47 is kept non-conductive; the timed output of the first counter I unlocks the gate output of the thyristor MOS47, with the result that the thyristor MOS47 is triggered again; when the hysteresis control selection switch 10 is kept off, the above operation is repeated, thereby obtaining temperature fluctuation.

In the time from t.sub.5 to t.sub.6, no pulse t.sub.p is transmitted when the voltage V.sub.AC is a negative value, the trigger RS.sub.1 of the waveform shaping unit C is not set and keeps the output Q to be 1, so the T-shaped trigger T is kept not working; since the t.sub.6 gate g.sub.12 changes from "0" to "1" after delta.t.sub.p time, the output Q of the flip-flop rs.sub.1 AND the output Q of the T-type flip-flop T AND the AND output of the gate g.sub.12 are fed into the gate g.sub.6 as inputs, resulting in a "1" to "0"; gate g.sub.6 sets flip-flop rs.sub.3, whose output Q changes from "0" to "1", and gate g.sub.8 changes from "1" to "0"; the T-type flip-flop keeps the output Q at '0'; therefore, gate g.sub.11 unconditionally gives "1", disabling the discharge amplifier F without a trigger output from pin 12 to the thyristor MOS 47; when the supply voltage v.sub.ac is negative during the period t.sub.7 to t.sub.8, the temperature of the object (3) to be heated will drop, allowing the neon lamp L30 to generate a pulse t.sub.p3, setting the flip-flop rs.sub.1, changing the output Q of the flip-flop rs.sub.1 from "0" to "1"; since the output Q of the flip-flop rs.sub.3 is "1" at this time, the gate g.sub.7 changes from "1" to "0"; this output sets flip-flop rs.sub.4, changing its output Q from "0" to "1"; the output Q of the flip-flop rs.sub.2 changes from "0" to "1" for a time of.delta.t, at the zero crossing point the voltage v.sub.ac becomes negative at a time t.sub.9; thus, the output Q of the flip-flop rs.sub.4 is "1" and the output Q is "1", so that the output of the gate g.sub.21;

on the edge where the input T falls from "1" to "0", the output Q of the first counter flip-flop t.sub.i1 changes from "0" to "1"; at a zero-crossing point at which the power supply voltage v.sub.ac becomes negative at time t.sub.11, the input T of the first flip-flop t.sub.i1 changes from "1" to "0", and thus the output Q of the first flip-flop t.sub.i1 returns from "1" to "0", performing a frequency dividing operation twice; since the first counter I is multi-stage, the above operation is continuously repeated;

before time t.sub.n, i.e. before the end of the time of the last n-th flip-flop t.sub.in, at the edge where the input T of the first flip-flop t.sub.i1 drops from "1" to "0", the output Q of the last flip-flop t.sub.in changes from "0" to "1"; after the output Q is changed into 1, resetting the first counter I, T.sub.I1 to I.sub.Iz; meanwhile, the output of the gate G.sub.5 is changed from '1' to '0', and the triggers RS.sub.3 and RS.sub.4 of the hysteresis control logic unit H are reset to an initial state; therefore, gate g.sub.8 returns from "0" to "1" and unlocks the output Q of T-flip flop T; this reset state continues until the period before time t.sub.n +1, delta.t.sub.n; as the positive zero crossing pulse provided by the output Q of the flip-flop rs.sub.2 and the output of the gate g.sub.15 changes from "1" to "0" as the voltage v.sub.ac changes from negative to positive, the rise of delta.t, i.e. from "0" to "1", the gate g.sub.16 changes from "1" to "0", and the gate g.sub.23, and therefore the output Q of the final flip-flop t.sub.in drops from "1" to "0", leaving the flip-flops t.sub.il to t.sub.iz of the first counter I out of the reset state; thus, during the time from t.sub.n to t.sub.n +1, when the voltage v.sub.ac is in the negative half-cycle, the flip-flops t.sub.i1 to t.sub.iz are held in the reset state, returning to the initial state; further, when the output Q of the final flip-flop t.sub.in falls from "1" to "0", the input of the gate g.sub.16 changes from "1" to "0", the reset pulse of the final flip-flop t.sub.in is eliminated, and thus self-reset; the time period t.sub.9 to t.sub.n is the count time t.sub.i of the first counter I for hysteresis control; as the temperature of the object (3) to be heated drops within the time period t.sub.i, a pulse t.sub.pn has been generated during the period t.sub.n to t.sub.n +1 after the time period t.sub.i, the trigger rs.sub.1 of the waveform shaping unit C is set in response to the pulse t.sub.pn and normal operation is resumed; thyristor MOS47 is triggered, energizing heater wire 48; by repeating the series of operations, the temperature of the object (3) to be heated is varied within the range,. delta.t.sub.d;

when the hysteresis control selection switch 10 is opened, the gate g.sub.20 resets the hysteresis control logic unit H and the flip-flops rs.sub.3 and rs.sub.4 of the first counter I, and the system is converted into the proportional control mode;

for the high setting operation and the stop operation, the temperature setting dial 9 is rotated, and the variable resistor R27 is set to a resistance R rate, thereby obtaining a temperature t.sub.st; then, a knob switch 11 for maintaining the high setting operation is pulled, and the contacts 56' and 56 ″ of the selector switch are closed; when operating with the power switch off, it is assumed that the hysteresis control selection switch 10 is open to provide a proportional control mode; gate g.sub.17 of the high-set-hold high-level hold selector J is set to "0", and gate g.sub.18 is set to "1"; the gate g.sub.17 brings the second counter K for holding the high set value out of the reset state, while the gate g.sub.18 brings the flip-flop rs.sub.5 of the memory L out of the reset state; gate g.sub.17 also sets the input of gate g.sub.8 to "0"; thus, gate g.sub.8 retains the output "1"; thus, the output Q of the T-type flip-flop T is not locked and the output is continuously fed into the thyristor MOS47 to provide the proportional control mode; selecting the hysteresis control mode when the selection hysteresis control selection switch 10 is off, selecting the high hold mode also automatically results in the proportional control mode; since the first counter I is used as a part of the high hold counter in addition to the hysteresis control counter, the first counter I is started in the same manner as that used for the hysteresis control; when the pulse t.sub.p continuously generated by the neon lamp L30 reaches the high-level set temperature, the pulse t.sub.p disappears; upon detection of a subsequently issued pulse t.sub.p3, the first counter I starts dividing at time t.sub.9; thereafter, the time of the final flip-flop t.sub.in of the first counter I is reached in the time period from t.sub.n to t.sub.n +1, such that the final flip-flop t.sub.in is reset at delta.t.sub.n time before t.sub.n +1 time; when operating at a high level, the output Q of the gate g.sub.18 at the final flip-flop t.sub.in falls from "1" to the edge of "0", and the output Q of the first flip-flop t.sub.k1 of the second counter K changes from "0" to "1"; the output of the first counter I for hysteresis control is taken to the flip-flop t.sub.k 1; the output Q provided to the flip-flop t.sub.k1 changes the output of the gate g.sub.24 from "1" to "0", resetting the flip-flop rs.sub.5; as the output Q of the flip-flop rs.sub.5 changes from "1" to "0", the set terminal of the flip-flop rs.sub.4 remains at "0" to keep the output Q of the flip-flop rs.sub.4 at "1" so that negative zero crossing pulses are continuously fed into the first counter I; when the output Q of the flip-flop rs.sub.5 is "0", the input of the reset terminal R of the gate g.sub.16 and the first counter I is "0"; the time required to complete the above operation after time t.sub.5 is delta.t.sub.a, which is the same as the count time of the hysteresis control mode;

the flip-flop rs.sub.5 is locked and the first counter I counts step by step due to the negative zero crossing pulses.delta.t being continuously applied to the input of the first flip-flop t.sub.i1 even if the output Q of the last flip-flop t.sub.in changes from "0" to "1" without being reset; after the time t.sub.k has elapsed, the output Q of the last flip-flop t.sub.kn of the second counter K changes from "0" to "1"; next, in the positive cycle of the voltage v.sub.ac, when the gate g.sub.12 changes from "0" to "1", the AND output of the output Q of the final flip-flop t.sub.kn AND the output of the gate g.sub.12 is sent to the gate g.sub.27, whose output therefore drops from "1" to "0", driving the amplifier M, triggering the thyristor MOS54 through the 10 th pin; coil L56 was energized; thyristor MOS54 is triggered by gate g.sub.12 only during the positive half cycle; when coil L56 is energized, the contacts 56' and 56 "of the high set point hold switch are opened; the temperature therefore drops to a level determined by the rate of resistance R of the resistance R27 set by the knob and is adjusted to the usual level; with the opening of the contact 56 ″, the high setting operation high level holds the selector J back to the initial state; as the gate g.sub.17 becomes "1", the gate g.sub.18 becomes "0", and the gate g.sub.17 resets the second counter K to the initial state;

when the contacts 56' and 56 "of the high hold switch are closed, at time t.sub.d, when operating in the hysteresis control mode, the hysteresis control selector switch 10 is closed, and the first counter I for hysteresis control is performing a counting operation; when the contacts 56' and 56 "are closed, the output of gate g.sub.17 changes from" 1 "to" 0", bringing the second counter K out of its reset state and ready to receive an input; the input of gate g.sub.8 is unlocked and its output changes from "0" to "1"; gate g.sub.11 acts on the output Q of the T-type flip-flop T, causing amplifier F to trigger thyristor MOS47, thereby energizing the heater; thus, the temperature of the object (3) to be heated starts rising at time t.sub.d; the gate g.sub.18 brings the flip-flop rs.sub.5 of the memory L out of the reset state; however, the first counter I continues to count; when the time of the last flip-flop t.sub.in of the first counter I arrives, the output is brought to the first flip-flop t.sub.k1 of the second counter K, whose output Q is "1"; the output Q of the flip-flop t.sub.k1 sets the flip-flop rs.sub.5, whose output Q changes from "1" to "0"; at this time, in the hysteresis control mode, the first counter I is completely reset, and at the same time, the flip-flops rs.sub.3 and rs.sub.4 of the hysteresis control logic unit H are also reset; when the temperature of the object (3) to be heated reaches the high temperature set value, the neon lamp L30 does not emit any pulse t.sub.p any more; when the pulse t.sub.p3 is transmitted, the flip-flops rs.sub.3 and rs.sub.4 of the hysteresis control logic unit H are set; with the setting of the flip-flop rs.sub.4, the output Q of the flip-flop rs.sub.4 changes from "0" to "1", as a result of which a positive zero-crossing pulse is generated, delta.t is again fed to the input T of the first flip-flop t.sub.i1 of the first counter I, a frequency division operation being performed; after the specified counting operation has been completed, the last trigger t.sub.kn of the second counter K has timed out, at which time the gates g.sub.27 and g.sub.12 act on the amplifier M, triggering the thyristor MOS54, causing the coil L56 to open the contacts 56' and 56 "in the same way; during high hold, the system is set to proportional control mode, giving maximum heat; when the contacts 56' and 56 "are closed at time t.sub.d during the hysteresis control, the high hold operating period is the operating duration t.sub.k of the second counter K and is shorter than when the switch is operated from the beginning. N cycles of the supply voltage v.sub.ac are required to keep the contact 56 "properly open;

diode failure and safe operation for its self-triggering of thyristor MOS 47; during the time t.sub.1 to t.sub.5, the system is in normal state, where the temperature of the object to be heated (3) is low, the pulse t.sub.p from the neon lamp 3 results in the 12 th pin output, triggering the thyristor MOS 47; in the following time period t.sub.5 to t.sub.7, the temperature of the object (3) to be heated reaches a set value, the thyristor MOS47 is in an "off" state, no pulse t.sub.p is generated; during this stop, the input from the self-triggering amplifier P of the gate g.sub.34 is the AND output of the gate g.sub.26, the output of the voltage detection unit N AND the output of the gate g.sub.25, AND is therefore "0"; in the positive cycle of the voltage v.sub.ac from time t.sub.6 to t.sub.7, the gate g.sub.25 changes from "0" to "1", with a time delay of.delta.t.sub.n, the gate g.sub.26 changes from "0" to "1", with a time delay of.delta.t.sub.s, the output of the cell N changes from "1" to "0", with a time delay of.delta.t.sub.c, because the thyristor MOS47 is in the "OFF" state; the voltage detection unit N for determining time.DELTA.t.C and the circuit of the self-trigger detection timing circuit O for determining time.DELTA.t.S are adjusted to.DELTA.t.C.DELTA.t.S; thus, the input of gate g.sub.34 is "0" and the output is "1"; since the input of the amplifier P is "1" and the output thereof is "0", no output is provided to the thyristor MOS 58;

during the period from t.sub.7 to t.sub.11 when the thyristor MOS47 fails, the diode fails or self-triggering fails, assuming that the neon light L30 does not generate a pulse t.sub.p, the temperature of the article is higher than the set value; during time t.sub.8 to t.sub.9, the voltage v.sub.ac is in positive circulation, the thyristor MOS47 is immediately turned on, in the absence of a signal at the gate, so the voltage detector N is in an "OFF" state, giving an output of "1"; gate g.sub.25 changes from "0" to "1" after time t.sub.8. delta.t.sub.n time; the time delay of the gate g.sub.26 of the detection timing circuit o.delta.t.sub.s changes from "0" to "1"; the output of gate g.sub.34 will be fed to an amplifier P, which is a parallel output of the output of gate g.sub.26, the output of unit N and the output of gate g.sub.25; therefore, the output of the amplifier P changes from "0" to "1" with a time delay of.delta.t.sub.s and starts to heat the resistor R59 by triggering the thyristor MOS58 through pin 11; in the time period from t.sub.9 to t.sub.10, the voltage v.sub.ac is in a negative half cycle, the thyristor MOS58 loses conductivity, and does not heat the resistor R59; repeating the operation from t.sub.8 to t.sub.9 when the voltage v.sub.ac is positive during t.sub.10 to t.sub.11; delta. t.sub.s, after time t.sub.10, thyristor MOS58 is brought into conduction to heat resistor R59, causing the temperature of resistor R59 to rise and thermally break fuse FU14 to stop supplying power;

when the temperature of the heated object (3) is lower than the temperature T.sub.S set by the knob 9, the thyristor MOS47 is self-triggered, the self-triggering state cannot be immediately detected, and the resistor R59 cannot be heated; when the temperature of the object (3) to be heated exceeds the temperature set by the knob (9), and then the neon lamp is extinguished, the self-triggering state is detected, and the resistor R59 is electrified; in order to ensure safety against the self-triggered state of the thyristor MOS47, the output of the temperature sensor RT7 is checked, and compared with the output of the thyristor MOS47 operated therewith, so that the operation of the thyristor MOS47 is detected without the output of the temperature sensor RT7, causing the safety circuit to function; when the thyristor MOS47 is in the "OFF" state, the self-trigger detection time.delta.t.s and the time for which the voltage detection unit N operates.delta.t.c are maintained in the relation of.delta.t.c. <.delta.t.s, whereby after the object (3) to be heated reaches the temperature setting, the thyristor MOS47 is checked to be normal or not;

the circuit for triggering the thyristor MOS47 to drive the heating wire 48 has a fail-safe characteristic; the trigger circuit of thyristor MOS47 includes an oscillating system providing either a "0" or "1" output or input, and thyristor MOS47 is tuned to be triggered only in the event of a charge accumulation in capacitor C45; firstly, in the negative half period of the power supply voltage v.sub.ac from time t.sub.1 to t.sub.2, the flip-flop rs.sub.1 of the waveform shaping unit D is in a reset state, the output Q is "0", and the output Q is "1"; then, a neon lamp L30 emits a pulse t.sub.p1; since the output Q of the T-type flip-flop T is "0" and the output Q thereof is "1", the output of the gate g.sub.9 is "0" and the gate g.sub.10 is "1"; the amplifier E stops working and does not charge the capacitor C45; in addition, because the output Q of the T-type trigger T is '0', the gate G.sub.11 is in '1' state, and the amplifier F also loses working capacity; subsequently, the neon lamp L30 emits a pulse t.sub.p1, setting the flip-flop rs.sub.1, as a result of which the output Q of the flip-flop rs.sub.1 changes from "1" to "0" and the output of the gate g.sub.10 changes from "1" to "0", thereby charging the capacitor C45; as the trigger rs.sub.1 is reset to zero crossing by the gate g.sub.13, the state of the T-type trigger T changes; the output Q is changed from '0' to '1', and the output Q is changed from '1' to '0'; as the gate g.sub.11 changes from "1" to "0", the amplifier F charges the capacitor C45 and the thyristor MOS47 is triggered.

9. A temperature sensing detection method is characterized in that: the following steps are carried out in the following manner,

a circuit a for detecting reset voltage by using a control power supply Vcc of a reset unit A; first, when the control voltage Vcc on pin 1 of the integrated circuit IC increases from zero V, the transistor a.sub.5 remains off until the threshold v.sub.rs is reached, and when v.sub.rs is exceeded, the transistor a.sub.5 is brought into the on state; v.sub.rs ═ 3. x.v.sub.be; then, when Vcc becomes equal to or greater than v.sub.rs, the current i.sub.1 starts to flow through the resistor ra.sub.1, i.e., the resistor ra.sub.1, and the same current as the current i.sub.1 is introduced between the source and the drain of the transistor a.sub.5; secondly, when the power switch 8 is closed, the capacitors C23, C24 of the power supply 19 function to increase the control power Vcc over time; again, when v.sub.rs is the reset voltage, transistor a.sub.5 remains non-conductive until time tr.sub.2 and, after time tr.sub.2, Vcc v.sub.rs, so transistor a.sub.5 is brought to full conduction for time delta.t; thereafter, at time tr.sub.2, transistor a.sub.5 is turned on, leaving the logic cell out of the reset state; then, the reset voltage detector circuit a detects the voltage rise Vcc of the control power supply Vcc, and when the control power supply Vcc is lower than a set threshold value V.sub.RS from the power supply off, the transistor a.sub.5 is kept off to reset the logic unit;

step two, for a zero voltage detection circuit B of a zero pulse generator B, firstly, when the impression of a power supply voltage V.sub.AC on a 16 th pin and a5 th pin crosses a zero level, obtaining V.sub.CE of B.sub.14 and V.sub.CE of B.sub.19 waveforms; then, starting from the reference time t.sub.o when the power supply voltage v.sub.ac of the 16 th pin is zero, when the power supply voltage v.sub.ac of the 16 th pin starts to rotate, a current "i.sub.ce of b.sub.11" starts to flow between the source and the drain of the transistor b.sub.11; secondly, the supply voltage v.sub.ac exceeds the gate voltage of the transistor b.sub.11, the gate-drain-sign voltage v.sub.bes of the transistor b.sub.8 biased by the resistor rb.sub.7, the bias voltage plus the gate-drain-sign voltage v.sub.be of the transistor b.sub.11, i.e. the voltage v.sub.be

V.sub.BES-V.sub.BE＝-.DELTA.V.sub.BE；

The current mirror consisting of transistors b.sub.13 and b.sub.14 is energized through transistor b.sub.12 by the i.sub.ce of transistor b.sub.11, the supply voltage v.sub.ac reaches a peak value and starts to drop towards a negative value, but before time t.sub.1, transistor b.sub.14 remains conductive as long as v.sub.ac.oreq.2v.sub.be; again, when the v.sub.ac subsequently becomes less than 2v.sub.be, the transistor b.sub.14 is brought out of conduction, resulting in the waveform "v.sub.cb of b.sub.14"; thereafter, the transistor b.sub.10 in combination with the transistor b.sub.11 forms a current mirror which causes the gate current i.sub.b through the resistor rb.1 to be equal or approximately equal to the source current i.sub.c through the resistor rb.3; then, the switching speed of the transistor b.sub.14 is improved through the waveform shaping circuit b.sub.20, and the input voltage and the output voltage of the waveform shaping circuit b.sub.20 are in the same phase; further, when the power supply voltage v.sub.ac starts to change from a zero level to a negative value at time t.sub.1, the gate voltage of the transistor b.sub.15 is maintained at the gate voltage of the transistor b.sub.8, i.e., the bias voltage v.sub.bes; immediately thereafter, when the gate-drain sign voltage of the transistor b.sub.15 is v.sub.be, if v.sub.be and v.sub.be-v.sub.be ═ delta.v.sub.be, the following occurs: when the transistor b.sub.15 is brought into conduction, the gate current of the transistor b.sub.15 flows from the control power supply v.sub.cc through the resistor rb.sub.7; next, through the gate and the drain of the transistor b.sub.15, the supply v.sub.ac flows through the resistor rb.sub.1, which occurs after time t.sub.1.delta.t.sub.n; further, the current "i.ce of b.sub.15" flows through the source of the transistor b.sub.15, so that the transistors b.sub.16, b.sub.17, b.sub.18, b.sub.19 provide current mirror images, and a voltage waveform "v.sub.ce of b.sub.19" is given; still later, when v.sub.be and v.sub.be-v.sub.be 0, the following occurs: holding this state for a set period of time prior to time t.sub.2, transistors b.sub.15 and b.sub.18 being identical in v.sub.be, transistor b.sub.15 is active when v.sub.ac is equal to zero V, time t.sub.n is zero, "i.sub.ce of b.sub.15" and "v.sub.ce of b.sub.19" are obtained at t.sub.1 and t.sub.2; next, if the v.sub.be is v.sub.bes and the v.sub.be-v.sub.be + delta.v.sub.be, delta.t.sub.n is to the left of t.sub.1, which is exactly the opposite of the v.sub.be v.sub.bes and v.sub.be-delta.v.sub.be; when the transistors b.sub.14 and b.sub.19 perform switching operation, the output waveforms are shaped by the shaping units b.sub.20 and b.sub.21;

step three, for the pulse detection circuit C of the waveform shaping unit C, first, when the heated object (3) to be heated has a set low temperature, the impedance z.sub.7 on the inner winding 36 and the cover winding 37 of the sensor 7 is low; then, when the power supply voltage v.sub.ac increases to a specified level, the layer voltage v.sub.z7 of the sensor 7 exceeds the discharge start voltage v.sub.bo of the neon lamp L30, triggering the lamp, the secondary winding 35 of the pulse transformer TC33 has a pulse with a waveform t.sub.p; secondly, when the supply voltage v.sub.ac is in the negative half-cycle, the pulse from neon L30 is reversed to a negative value when transferred from the primary winding of pulse transformer TC33 to the secondary winding, which thus provides a positive voltage pulse with waveform t.sub.p 1; again, when the supply voltage v.sub.ac is in the negative cycle, the circuit is adapted to detect temperature, the waveform t.sub.p2 generated in the positive cycle is a negative voltage, the pulse voltage t.sub.p1 applied to the 2 nd and 5 th pins causes the leaky follower transistor c.sub.3 to operate, which in turn energizes the current mirror consisting of transistors c.sub.4 and c.sub.5, the transistor c.sub.5 acting for a period of delta.t.sub.p; thereafter, the negative voltage pulse t.sub.p2 reverse biases the transistor c.sub.3 through the transistor c.sub.6 and the resistor rc.sub.1 without operating the transistor c.sub.5; then, in the time period from t.sub.3 to t.sub.4, under the condition that the transistor c.sub.5 is kept non-conductive, the neon lamp L30 will not be triggered, and the pulse detection circuit c receives the pulse t.sub.p1 generated in the negative cycle of the power supply voltage v.sub.ac as an effective temperature detection signal;

step four, for the amplifiers E and F used to trigger the thyristor MOS47, first, when the output of the gate g.sub.10 falls to "0", the transistors e.sub.4 and e.sub.5 of the amplifier E are biased and operate through the resistors re.sub.1 and e.sub.2, charging the capacitor C45 through the resistor R44; then, when the supply voltage v.sub.ac crosses zero, the gate g.sub.11 temporarily drops to "0", whereby the transistors f.sub.5 and f.sub.6 of the amplifier F are biased and rendered conductive through the resistors rf.sub.1 and f.sub.2, so that the charge on the capacitor C45 is temporarily discharged in pulses, triggering the thyristor MOS47 through the 12 th pin; secondly, when the capacitor C45 is charged through the gate g.sub.10, the gate g.sub.11 is kept at "1", and does not receive any discharge signal;

step five, as for detection circuits G and J respectively used for a hysteresis control hysteresis selector G and a high setting and holding high level holding selector J, firstly, resistors Rg.sub.1, g.sub.2 and g.sub.3 and transistors g.sub.4 and g.sub.5 provide current mirror images; then, a hysteresis control selection switch 10 is turned off, so that a transistor g.sub.5 is in a conducting state, and the system is set to be in a hysteresis control mode; the circuit of the high-level hold selector J is identical in structure to the circuit of the hysteresis control selector G; second, the high setting holds the switch's contact 56", which when closed, causes the transistor j.sub.5 to be off-conduction;

step six, for a voltage detection circuit N and a detection timing circuit O for detecting the self-triggering of the thyristor MOS47, firstly, the circuit N checks whether the thyristor MOS47 is in a conducting state, when the transistor n.sub.4 is conducted, the voltages on the 15 th and 5 th pins are delta.Va equal to or more than the grid-leakage-recording voltage 3V.sub.BE of the three transistors n.sub.4, n.sub.5 and n.sub.6; then, when the forward voltage drop v.sub.f between the anode and the cathode of the thyristor MOS47 is brought on, it is set to be less than 3 v.sub.be; secondly, when the supply voltage v.sub.ac exceeds the threshold voltage 3v.sub.be of the transistor n.sub.4 within the time delta.t.sub.c, no signal is input to the gate when the thyristor MOS47 is in the "OFF" state, the source voltage v.sub.ce of the i.ce "transistor n.sub.7 of the source current" n.sub.4 "is" 0 "until delta.t.sub.c time before the time t.sub.c when the supply voltage v.sub.ce becomes the negative value of the zero level, the v.sub.ce of the" n.sub.7 "remains" 0 "; again, when the thyristor MOS47 enters the connected state, the transistors n.sub.4 and n.sub.7 are in the "OFF" state, the "v.sub.ce" of n.sub.7 is maintained for a period of time from t.sub.2 to t.sub.3; thereafter, the supply voltage v.sub.ac is applied to the 16 th pin through the timing detection circuit O, and the reference voltage of the transistors o.sub.11 and o.sub.12 providing the differential amplifier is the voltage v.sub.st of the midpoint between the resistances ro.sub.3 and o.sub.4; then, v.sub.st 2.5v.sub.be, where v.sub.be is the gate-drain voltage of the transistor o.sub.8, this voltage is divided by the resistors ro.sub.3 and o.sub.4, yielding 0.5v.sub.be, o.sub.3 o.sub.4; thereafter, when the voltage on the 16 th pin due to the supply voltage v.sub.ac exceeds the voltage v.sub.st, the transistors o.sub.12, the transistors o.sub.13 and o.sub.14 forming a current mirror, and the transistors o.sub.15 and o.sub.16 also providing a current mirror are all made conductive; then, when the power supply voltage v.sub.ac exceeds 2v.sub.be, the current is shunted to the zero pulse generator B through the resistor rb.sub.1, and thus, the voltages on the 16 th and 5 th pins rise from 2 v.sub.be; later, the voltage is above 2.5v.sub.be for a period of time, the threshold voltage v.sub.st of the differential amplifier consisting of transistors o.sub.11 and o.sub.12, in which circuit delta.t.sub.s must be longer than delta.t.sub.c;

step seven, a circuit Q for extracting intermediate outputs from a first counter I of a plurality of stages, first, by means of the first counter I, an output q.sub.ix of one block and an input t.sub.iy of another block, when directly coupled, a directly coupled counter is provided; then, a first block of the 8 th pin output from t.sub.il to t.sub.ix for judgment is checked for operation when it is input to T, and a second block of the q.sub.in output from t.sub.iy to t.sub.in for judgment is checked for rectangular wave input to the 9 th pin, separately; secondly, a circuit Q is inserted in the middle part of the first counter I, and transistors q.sub.4 and q.sub.5 provide a constant voltage power supply; again, transistor q.sub.6 acts as an output buffer, while transistors q.sub.7 and q.sub.8 provide an input buffer and form a current mirror;

step eight, when the proportional control mode is executed, first, the hysteresis control selection switch 10 is turned on, the contacts 56' and 56 ″ of the high setting hold switch are turned on, and the power switch 8 is turned off; then, when the gate g.sub.13 of the zero pulse generator B is "0", the flip-flop rs.sub.1 of the waveform shaping unit C is reset; secondly, when the temperature sensor RT7 subsequently emits a pulse t.sub.p1, the flip-flop rs.sub.1 is set, at which time the output Q of the flip-flop rs.sub.1 changes from "1" to "0", and therefore the gate g.sub.9 changes from "0" to "1", and the gate g.sub.10 changes from "1" to "0"; as the gate g.sub.10 goes to "0", the amplifier E is energized, starting to charge the capacitor C45 through the resistor R44, the temperature sensor RT7 triggers the neon light L30 and starts to charge the capacitor C45 again; immediately before time t.sub.2, when the supply voltage v.sub.ac changes from negative to positive, the gate g.sub.13 changes from "1" to "0", thereby resetting the flip-flop rs.sub.1 again; with reset, the output Q of flip-flop rs.sub.1 returns from "0" to "1", so that the signal that reverses from "1" to "0" at gate g.sub.33 is applied to the input of T-type flip-flop T, so that at the falling edge of input T, the output Q of this flip-flop changes from "0" to "1"; again, gate g.sub.10 is changed to "1" to stop the charging of capacitor C45 while the discharge amplifier F is enabled, inputting the output to pin 12; thereafter, when the supply voltage v.sub.ac becomes positive after time t.sub.2, gate g.sub.12 changes from "0" to "1", with the result that the AND output of gates g.sub.14 AND g.sub.15 drops from "1" to "0"; later, the outputs of g.sub.14 and g.sub.15 are delta.t, during which both gates g.sub.12 and g.sub.13 are "0"; after the time period T, the output Q of the T-type flip-flop T is "1", but since the AND output of the gates g.sub.14 AND g.sub.15 is "0", the gate g.sub.11 becomes "1", AND the charging of the capacitor C45 is stopped; later, only at the zero crossing of the supply voltage v.sub.ac around time t.sub.2 during delta.t will the output from pin 12 be produced and trigger the thyristor MOS47, which in turn energises the heating wire 48; after the lapse of time delta.t, the gate g.sub.11 changes from "0" to "1", and therefore, the output of the gate g.sub.10 changes from "1" to "0", thereby starting to charge the capacitor C45 through the resistor R44; immediately thereafter, near time t.sub.3 when the voltage v.sub.ac changes from positive to negative, a zero crossing pulse occurs again, AND the output Q of the flip-flop rs.sub.2 AND the AND output of the gate g.sub.14; next, before the time t.sub.3 arrives, the AND output of the gates g.sub.14 AND g.sub.15 changes from "0" to- "1", so that the output Q of the flip-flop T changes to "1"; still later, gate g.sub.11 drops to "0", again discharging capacitor C45; as the gater g.sub.10 changes from "0" to "1", the charging of the capacitor C45 is interrupted at this time, AND at the same time, the AND output of the output Q of the flip-flop rs.sub.2 AND the output of the gate g.sub.14 changes from "0" to "1", which is anded with the output Q of the T-type flip-flop T AND is sent to the gate g.sub.4, which changes from "1" to "0", AND the gate g.sub.33 changes from "0" to "1"; in delta.t time after time t.sub.3, the AND output of the output Q of flip-flop rs.sub.2 AND the output of gate g.sub.14 drops from "1" to "0", thus gate g.sub.4 changes from "0" to "1" AND gate g.sub.33 changes from "1" to "0"; immediately thereafter, at the falling edge of the output of gate g.sub.33, the output Q of T-flip flop T returns from "1" to "0"; further, the T-type flip-flop T performs a count once under the set AND reset signals from the flip-flop rs.sub.1, AND a zero crossing pulse generated when the set output Q of the flip-flop T AND the voltage v.sub.ac become negative, performs a count twice under the AND output of delta.t AND returns; detecting the temperature in a positive or negative cycle of the voltage v.sub.ac, and in response to the generated signal, emitting a two-bit thyristor trigger pulse at zero when the voltage is to be converted to positive or negative; during the time from t.sub.5 to t.sub.8, since the temperature of the object (3) to be heated is higher than the set level, there is no pulse from the sensor 7 to trigger the neon light L30; immediately thereafter, since the flip-flop rs.sub.1 is held in the reset position, when the gate g.sub.10 is in the "1" state, the capacitor C45 is not charged, while the output Q of the T-type flip-flop is "0", the gate g.sub.11 is in the "1" state, and therefore the discharge amplifier F is held in the inactive state, and therefore the voltage at the 12 th pin is zero, when the neon lamp L30 is triggered again as the temperature of the object (3) to be heated decreases, the above operation continues, the thyristor MOS47 is triggered, energizing the heating wire 48;

step nine, when the hysteresis control mode is executed, firstly, the hysteresis control selection switch 10 is turned off, and with the switching off of the hysteresis control selection switch 10, the gate g.sub.19 is changed from "1" to "0", and the gate g.sub.20 is changed from "0" to "1"; then, since the gate g.sub.1 is already in the "1" state, the gate g.sub.3 changes from "0" to "1", and the gate g.sub.22 changes from "1" to "0"; secondly, the first counter I for hysteresis competition is brought out of its reset state; as the gate g.sub.5 changes from "0" to "1" at the same time, the flip-flops rs.sub.3 and rs.sub.4 of the hysteresis control logic unit H are also brought out of the reset state;

step ten, when the hysteresis control mode is executed, firstly, the time t.sub.1 is taken as a starting point, and during the period from t.sub.1 to t.sub.5, the output of the 12 th pin is enough to trigger the thyristor MOS47, so that the heating wire 48 is electrified; then, with the pulse t.sub.p generated by the neon lamp L30, the temperature of the object is continuously increased; secondly, when the temperature of the object (3) to be heated reaches a set value, the neon lamp L30 is not triggered any more, and the pulse t.sub.p2 generated circularly is extinguished;

step eleven, first, detecting whether the temperature of the article reaches a set value by detecting the extinction of the pulse at time t.sub.5, at which time the output from the 12 th pin to the thyristor MOS47 is stopped to deenergize the heating wire 48; then, since the temperature of the object (3) to be heated exceeds a set value, no pulse is generated for a certain period of time; thereafter, the temperature begins to drop and reaches a set level t.sub.s or t.sub.s-. delta.t.sub.s, when such a temperature difference is preset, neon L30 is triggered around time t.sub.8 and produces a pulse t.sub.p 3; secondly, the time t.sub.d, which depends on the structure and temperature of the object (3) to be heated, is shown to correspond to several cycles of the voltage v.sub.ac, the reproduced pulses t.sub.p3 being detected and counted by a first counter I; again, when the first counter I counts pulses, the thyristor MOS47 is kept non-conductive, the timing output of the first counter I unlocks the gate output of the thyristor MOS47, and as a result the thyristor MOS47 is triggered again; thereafter, when the hysteresis control selection switch 10 is kept off; repeating the above operations, thereby obtaining a temperature fluctuation delta.t.sub.d; immediately afterwards, in the time t.sub.5 to t.sub.6, no pulse t.sub.p is emitted when the voltage v.sub.ac is negative, the flip-flop rs.sub.1 of the waveform shaping unit C is not set and keeps the output Q at "1", so the T-type flip-flop T is kept inoperative; next, since the t.sub.6 gate g.sub.12 changes from "0" to "1" after delta.t.sub.p time, the output Q of the flip-flop rs.sub.1 AND the output Q of the T-type flip-flop T AND the AND output of the gate g.sub.12 are fed into the gate g.sub.6 as inputs, resulting in a "1" to "0"; gate g.sub.6 sets flip-flop rs.sub.3 whose output Q changes from "0" to "1", while gate g.sub.8 changes from "1" to "0", the T-flip-flop keeps output Q "0"; next, gate g.sub.11 unconditionally gives "1", disabling the discharge amplifier F without triggering output from pin 12 to the thyristor MOS 47; next, when the supply voltage v.sub.ac is negative during the period from t.sub.7 to t.sub.8, the temperature of the object (3) to be heated will drop, allowing the neon lamp L30 to generate a pulse t.sub.p3, thereby setting the flip-flop rs.sub.1, changing the output Q of the flip-flop rs.sub.1 from "0" to "1", since at this time the output Q of the flip-flop rs.sub.3 is "1", the gate g.sub.7 from "1" to "0", this output sets the flip-flop rs.sub.4, changing its output Q from "0" to "1", the output Q of the flip-flop rs.sub.2 from "0" to "1", the time is. Next, the output Q of the flip-flop rs.sub.4 is "1", and the output Q is "1", so that the output of the gate g.sub.21; next, at the edge where the input T falls from "1" to "0", the output Q of the first counter flip-flop t.sub.i1 changes from "0" to "1"; next, at a zero-crossing point at which the power supply voltage v.sub.ac becomes a negative value at time t.sub.11, the input T of the first flip-flop t.sub.i1 changes from "1" to "0", and therefore, the output Q of the first flip-flop t.sub.i1 returns from "1" to "0", performing a frequency dividing operation twice; since the first counter I is multi-stage, the above operation is continuously repeated; next, before time t.sub.n, i.e., before the end of the time of the last nth flip-flop t.sub.in, at the edge where the input T of the first flip-flop t.sub.i1 drops from "1" to "0", the output Q of the last flip-flop t.sub.in changes from "0" to "1"; next, after the output Q is changed to "1", the first counter I, t.sub.i1 is reset to i.sub.iz, and at the same time, the output of the gate g.sub.5 is changed from "1" to "0", and the flip-flops rs.sub.3 and rs.sub.4 of the hysteresis control logic unit H are reset to the initial state; thus, the gate g.sub.8 returns from "0" to "1" and unlocks the output Q of the T-flip-flop T, this reset state persists until the period preceding the time t.sub.n +1, delta.t.sub.n; next, as the voltage v.sub.ac changes from negative to positive, with a positive zero crossing pulse provided by the output Q of the flip-flop rs.sub.2 and the output of the gate g.sub.15, the rise of delta.t, i.e. from "0" to "1", the gate g.sub.16 changes from "1" to "0", and the gate g.sub.23, and therefore, the output Q of the final flip-flop t.sub.in drops from "1" to "0", leaving the flip-flops t.sub.il to t.sub.iz of the first counter I out of the reset state; next, during the period from time t.sub.n to t.sub.n +1, when the voltage v.sub.ac is in the negative half period, the flip-flops t.sub.i1 to t.sub.iz are held in the reset state to return to the initial state, and further, when the output Q of the final flip-flop t.sub.in falls from "1" to "0", the input of the gate g.sub.16 changes from "1" to "0", the reset pulse of the final flip-flop t.sub.in is eliminated, and thus self-reset; next, the time period t.sub.9 to t.sub.n is the count time t.sub.i of the first counter I for hysteresis control; as the temperature of the object (3) to be heated drops within the time period t.sub.i, a pulse t.sub.pn has been generated during the period t.sub.n to t.sub.n +1 after the time period t.sub.i, the trigger rs.sub.1 of the waveform shaping unit C is set in response to the pulse t.sub.pn and normal operation is resumed; thyristor MOS47 is triggered, energizing heater wire 48; by repeating this step operation, the temperature of the object (3) to be heated is varied within the range,. delta.t.sub.d; when the hysteresis control selection switch 10 is opened, the gate g.sub.20 resets the hysteresis control logic unit H and the flip-flops rs.sub.3 and rs.sub.4 of the first counter I, and the system is converted into the proportional control mode;

a twelfth step of rotating the temperature setting dial 9 for the high setting operation and the stop operation to set the variable resistor R27 to a resistance R rate to obtain a temperature t.sub.st; then, a knob switch 11 for maintaining the high setting operation is pulled, and the contacts 56' and 56 ″ of the selector switch are closed; secondly, when operating with the power switch off, it is assumed that the hysteresis control selection switch 10 is open to provide a proportional control mode; gate g.sub.17 of the high-set-hold high-level hold selector J is set to "0", and gate g.sub.18 is set to "1"; again, gate g.sub.17 brings the second counter K for holding the high set value out of the reset state, while gate g.sub.18 brings the flip-flop rs.sub.5 of the memory L out of the reset state, gate g.sub.17 also sets the input of gate g.sub.8 to "0", so gate g.sub.8 retains the output "1", so the output Q of the T-type flip-flop T is not locked and the output is continuously fed into the thyristor MOS47 to provide the proportional control mode; then, the hysteresis control mode is selected under the condition that the selection hysteresis control selection switch 10 is turned off, and the selection of the high holding mode also automatically leads to the proportional control mode; then, the first counter I is used as a part of a high-retention counter besides a hysteresis control counter, and the starting mode of the first counter I is the same as that used for hysteresis control; when the pulse t.sub.p continuously generated by the neon lamp L30 reaches the high-level set temperature, the pulse t.sub.p disappears; upon detection of a subsequently issued pulse t.sub.p3, the first counter I starts dividing at time t.sub.9; thereafter, the time of the final flip-flop t.sub.in of the first counter I is reached in the time period from t.sub.n to t.sub.n +1, such that the final flip-flop t.sub.in is reset at delta.t.sub.n time before t.sub.n +1 time; when operating at a high level, the output Q of the gate g.sub.18 at the final flip-flop t.sub.in falls from "1" to the edge of "0", and the output Q of the first flip-flop t.sub.k1 of the second counter K changes from "0" to "1"; the output of the first counter I for hysteresis control is taken to the flip-flop t.sub.k1, the output Q taken to the flip-flop t.sub.k1 changes the output of the gate g.sub.24 from "1" to "0", resetting the flip-flop rs.sub.5; as the output Q of the flip-flop rs.sub.5 changes from "1" to "0", the set terminal of the flip-flop rs.sub.4 remains at "0" to keep the output Q of the flip-flop rs.sub.4 at "1" so that negative zero crossing pulses are continuously fed into the first counter I; when the output Q of the flip-flop rs.sub.5 is "0", the input of the reset terminal R of the gate g.sub.16 and the first counter I is "0"; the time required to complete the above operation after time t.sub.5 is delta.t.sub.a, which is the same as the count time of the hysteresis control mode; next, as a negative zero crossing pulse.delta.t is continuously applied to the input terminal of the first flip-flop t.sub.i1, even if the output Q of the last flip-flop t.sub.in changes from "0" to "1" without being reset, the flip-flop rs.sub.5 is locked, and the first counter I counts step by step; next, after the time t.sub.k elapses, the output Q of the last flip-flop t.sub.kn of the second counter K changes from "0" to "1"; next, in the positive cycle of the voltage v.sub.ac, when the gate g.sub.12 changes from "0" to "1", the AND output of the output Q of the final flip-flop t.sub.kn AND the output of the gate g.sub.12 is sent to the gate g.sub.27, whose output therefore drops from "1" to "0", driving the amplifier M, triggering the thyristor MOS54 through the 10 th pin; coil L56 was energized; thyristor MOS54 is triggered by gate g.sub.12 only during the positive half cycle; when coil L56 is energized, the contacts 56' and 56 "of the high set point hold switch are opened; next, the temperature thus drops to a level determined by the rate of resistance R of the resistance R27 set by the knob, and is adjusted to a usual level; with the opening of the contact 56 ″, the high setting operation high level holds the selector J back to the initial state; as the gate g.sub.17 becomes "1", the gate g.sub.18 becomes "0", and the gate g.sub.17 resets the second counter K to the initial state;

thirteenth, when the contacts 56' and 56 ″ of the high hold switch are closed, first, at time t.sub.d, when operating in the hysteresis control mode, the hysteresis control selection switch 10 is closed, and the first counter I for hysteresis control is performing a counting operation; when the contacts 56' and 56 "are closed, the output of gate g.sub.17 changes from" 1 "to" 0", bringing the second counter K out of its reset state and ready to receive an input; the input of gate g.sub.8 is unlocked and its output changes from "0" to "1"; then, the gate g.sub.11 acts on the output Q of the T-type flip-flop T, causing the amplifier F to trigger the thyristor MOS47, thereby energizing the heater, so that the temperature of the object (3) to be heated starts to rise at time t.sub.d, and the gate g.sub.18 brings the flip-flop rs.sub.5 of the memory L out of the reset state; however, the first counter I continues to count; next, when the time of the last flip-flop t.sub.in of the first counter I arrives, the output is brought to the first flip-flop t.sub.k1 of the second counter K, whose output Q is "1"; the output Q of the flip-flop t.sub.k1 sets the flip-flop rs.sub.5, whose output Q changes from "1" to "0"; at this time, in the hysteresis control mode, the first counter I is completely reset, and at the same time, the flip-flops rs.sub.3 and rs.sub.4 of the hysteresis control logic unit H are also reset; when the temperature of the object (3) to be heated reaches the high temperature set value, the neon lamp L30 does not emit any pulse t.sub.p any more; when the pulse t.sub.p3 is transmitted, the flip-flops rs.sub.3 and rs.sub.4 of the hysteresis control logic unit H are set; with the setting of the flip-flop rs.sub.4, the output Q of the flip-flop rs.sub.4 changes from "0" to "1", as a result of which a positive zero-crossing pulse is generated, delta.t is again fed to the input T of the first flip-flop t.sub.i1 of the first counter I, a frequency division operation being performed; after the specified counting operation has been completed, the last trigger t.sub.kn of the second counter K has timed out, at which time the gates g.sub.27 and g.sub.12 act on the amplifier M, triggering the thyristor MOS54, causing the coil L56 to open the contacts 56' and 56 "in the same way; during high hold, the system is set to proportional control mode, giving maximum heat; when the contacts 56' and 56 "are closed at time t.sub.d during the hysteresis control, the high hold operating period is the operating duration t.sub.k of the second counter K and is shorter than when the switch is operated from the beginning. N cycles of the supply voltage v.sub.ac are required to keep the contact 56 "properly open;

fourteenth, diode failure of thyristor MOS47 and safe operation against its self-triggering, first, during time t.sub.1 to t.sub.5, the system is in normal state, where the temperature of the object to be heated (3) is low, the pulse t.sub.p from neon lamp 3 causes the 12 th pin to output, triggering thyristor MOS 47; in the following time period t.sub.5 to t.sub.7, the temperature of the object (3) to be heated reaches a set value, the thyristor MOS47 is in an "off" state, no pulse t.sub.p is generated; during this stop, the input from the self-triggering amplifier P of the gate g.sub.34 is the AND output of the gate g.sub.26, the output of the voltage detection unit N AND the output of the gate g.sub.25, AND is therefore "0"; in the positive cycle of the voltage v.sub.ac from time t.sub.6 to t.sub.7, the gate g.sub.25 changes from "0" to "1", with a time delay of.delta.t.sub.n, the gate g.sub.26 changes from "0" to "1", with a time delay of.delta.t.sub.s, the output of the cell N changes from "1" to "0", with a time delay of.delta.t.sub.c, because the thyristor MOS47 is in the "OFF" state; the voltage detection unit N for determining time.DELTA.t.C and the circuit of the self-trigger detection timing circuit O for determining time.DELTA.t.S are adjusted to.DELTA.t.C.DELTA.t.S; thus, the input of gate g.sub.34 is "0" and the output is "1"; then, since the input of the amplifier P is "1" and the output thereof is "0", no output is provided to the thyristor MOS 58; then, during the period from t.sub.7 to t.sub.11 when the thyristor MOS47 fails, the diode fails or the self-triggering fails, assuming that the neon lamp L30 does not generate the pulse t.sub.p, the temperature of the article is higher than the set value; secondly, during the time t.sub.8 to t.sub.9, the voltage v.sub.ac is in positive circulation, the thyristor MOS47 is immediately turned on, and in the absence of a signal at the gate, the voltage detector N is therefore in an "OFF" state, giving an output of "1"; again, gate g.sub.25 changes from "0" to "1". delta.t.sub.n time after time t.sub.8, detecting that gate g.sub.26 of timing circuit O changed from "0" to "1" in time delay of delta.t.sub.s, the output of gate g.sub.34 will be fed to amplifier P, which is a parallel output of the output of gate g.sub.26, the output of cell N and the output of gate g.sub.25, thus, the output of amplifier P changed from "0" to "1" in time delay of delta.t.sub.s and through pin 11 triggering thyristor MOS58, heating resistor R59 begins; in the time period from t.sub.9 to t.sub.10, the voltage v.sub.ac is in a negative half cycle, the thyristor MOS58 loses conductivity, and does not heat the resistor R59; repeating the operation from t.sub.8 to t.sub.9 when the voltage v.sub.ac is positive during t.sub.10 to t.sub.11; delta. t.sub.s, after time t.sub.10, thyristor MOS58 is brought into conduction to heat resistor R59, causing the temperature of resistor R59 to rise and thermally break fuse FU14 to stop supplying power; next, when the temperature of the heated material (3) is lower than the temperature t.sub.s set by the knob 9, the thyristor MOS47 is self-triggered, the self-triggering state is not immediately detected, and the resistor R59 is not heated; next, after the temperature of the object (3) to be heated exceeds the temperature set by the knob 9, and then the neon lamp is extinguished, the self-triggering state is detected, and the resistor R59 is electrified; next, in order to secure the safety of the self-triggered state of the thyristor MOS47, the output of the temperature sensor RT7 is checked, and the output is compared with the output of the thyristor MOS47 operated therewith, so that the operation of the thyristor MOS47 is detected without the output of the temperature sensor RT7, causing the safety circuit to function; when the thyristor MOS47 is in the "OFF" state, the self-trigger detection time.delta.t.s and the time for which the voltage detection unit N operates.delta.t.c are maintained in the relation of.delta.t.c. <.delta.t.s, whereby after the object (3) to be heated reaches the temperature setting, the thyristor MOS47 is checked to be normal or not;

step fifteen, the circuit for triggering the thyristor MOS47 to drive the heating wire 48 has a fail-safe characteristic; firstly, in the negative half period of the power supply voltage v.sub.ac from time t.sub.1 to t.sub.2, the flip-flop rs.sub.1 of the waveform shaping unit D is in a reset state, the output Q is "0", and the output Q is "1"; then, a neon lamp L30 emits a pulse t.sub.p1; since the output Q of the T-type flip-flop T is "0" and the output Q thereof is "1", the output of the gate g.sub.9 is "0" and the gate g.sub.10 is "1"; the amplifier E stops working and does not charge the capacitor C45; in addition, because the output Q of the T-type trigger T is '0', the gate G.sub.11 is in '1' state, and the amplifier F also loses working capacity; subsequently, the neon lamp L30 emits a pulse t.sub.p1, setting the flip-flop rs.sub.1, as a result of which the output Q of the flip-flop rs.sub.1 changes from "1" to "0" and the output of the gate g.sub.10 changes from "1" to "0", thereby charging the capacitor C45; as the trigger rs.sub.1 is reset to zero crossing by the gate g.sub.13, the state of the T-type trigger T changes; the output Q is changed from '0' to '1', and the output Q is changed from '1' to '0'; as the gate g.sub.11 changes from "1" to "0", the amplifier F charges the capacitor C45 and the thyristor MOS47 is triggered.

10. A temperature sensing detection system and method are characterized in that: s1, when the flip-flop rs.sub.1 is not operating, i.e., reset state, the trigger capacitor C45 is not charged; when the flip-flop rs.sub.1 enters the working state (set state), the capacitor is charged;

s2, the flip-flop rs.sub.1 is brought out of operation by a zero-crossing pulse, i.e. reset state; rest.fwdarw.set.fwdarw.rest of the flip-flop rs.sub.1 results in a change of the output Q of the flip-flop rs.sub.1 of "1". fwdarw. "0". fwdarw. "1"; the waveform of the oscillation waveform a-c is subjected to the frequency division action of a T-shaped trigger T;

at S3, the change in the output Q of the T flip-flop T discharges the energy accumulated in the capacitor C45.