CN113781949A

CN113781949A - Image display method, DDIC, display screen module and terminal

Info

Publication number: CN113781949A
Application number: CN202111130179.9A
Authority: CN
Inventors: 高延凯; 王月文; 蔡辉跃
Original assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Current assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Priority date: 2021-09-26
Filing date: 2021-09-26
Publication date: 2021-12-10
Anticipated expiration: 2041-09-26
Also published as: WO2023046164A1; CN113781949B

Abstract

The embodiment of the application discloses an image display method, a DDIC, a display screen module and a terminal. The method comprises the following steps: DDIC receives the nth frame image data sent by AP, wherein n is a positive integer; responding to the fact that the historical display sending rate of the AP meets the display delay condition, the DDIC carries out display delay operation on the image data of the nth frame, and the display delay operation is used for delaying the display of the image of the nth frame; in response to completion of the display delay operation, the DDIC controls the display screen to display the nth frame image based on the nth frame image data. In the embodiment of the application, the problem of picture flicker and jitter caused by DDIC refresh frequency jump due to AP output frame rate fluctuation can be avoided by setting the display delay condition, thereby being beneficial to improving the stability of DDIC refresh frequency in the image display process and achieving the effect of improving the image display quality.

Description

Image display method, DDIC, display screen module and terminal

Technical Field

The embodiment of the application relates to the technical field of display, in particular to an image display method, a digital still integrated circuit (DDIC), a display screen module and a terminal.

Background

With the continuous development of display screen technologies, more and more display screens capable of supporting high-refresh-rate display are developed, and when a high-frame-rate application program is operated or in the sliding operation process, the fluency of a picture can be improved by setting the display screen to be in a high-refresh-rate mode.

For a Display screen adopting an Application Processor (AP) -Display Driver chip (DDIC) -Panel (Panel) driving architecture, in an image Display process, the DDIC adaptively adjusts a refresh frequency according to an output frame rate (i.e., a rate of outputting image data) of the AP, so as to achieve adaptive frequency conversion.

However, the output frame rate of the AP may fluctuate within a certain range, which may cause fluctuation of the refresh frequency of the DDIC, and when the refresh frequency jumps greatly, the problem of flicker and jitter of the picture may occur, which may affect the image display quality.

Disclosure of Invention

The embodiment of the application provides an image display method, a DDIC, a display screen module and a terminal. The technical scheme is as follows:

in one aspect, an embodiment of the present application provides an image display method, which is used for a DDIC of a display screen, and the method includes:

receiving nth frame image data sent by an AP (access point), wherein n is a positive integer;

responding to the historical display sending rate of the AP meeting the display delay condition, and performing display delay operation on the nth frame of image data, wherein the display delay operation is used for delaying the display of the nth frame of image;

in response to the completion of the display delay operation, controlling the display screen to display the nth frame image based on the nth frame image data.

On the other hand, the embodiment of the present application provides a DDIC, where the DDIC chip is applied to a display screen, and the DDIC is configured to:

performing display delay operation on the nth frame of image data in response to the historical display sending rate of the AP meeting a display delay condition, wherein the display delay operation is used for delaying image display;

and controlling the display screen to display the nth frame image based on the nth frame image data in response to the display delay operation being completed.

On the other hand, the embodiment of the application provides a display screen module, which comprises a display screen and a DDIC, wherein the DDIC is used for driving the display screen, and the DDIC is used for realizing the image display method according to the above aspect.

On the other hand, an embodiment of the present application provides a terminal, where the terminal includes an application processor AP, a display screen, and a display driver chip DDIC, where the AP and the DDIC are connected by a mobile industry processor interface MIPI, and the DDIC is used to implement the image display method according to the above aspect.

In the embodiment of the application, by introducing a display delay mechanism, after receiving image data sent by an AP, a DDIC determines whether a display delay condition is met or not based on the historical display sending rate of the AP, and postpones an image display process when the display delay condition is met; compared with the method that image display is carried out immediately after DDIC receives image data sent by AP, scattered acceleration requests of AP can be filtered by setting a display delay condition (namely the AP display sending rate is temporarily increased to cause the image data to be sent and displayed in advance, and the display sending rate after the temporary increase cannot be kept), the problem that the DDIC refreshing frequency jumps greatly due to the fluctuation of the AP display sending rate is avoided, and further, the problem that pictures flicker and shake are caused is solved, the stability of DDIC refreshing frequency in the image display process is improved, and the effect of improving the image display quality is achieved.

Drawings

FIG. 1 is a diagram illustrating an image display process under the AP-DDCI-Panel architecture;

FIG. 2 is a schematic diagram illustrating an image data transmission method according to an embodiment of the present disclosure;

FIG. 3 illustrates a flow chart of an image display method shown in an exemplary embodiment of the present application;

FIG. 4 is a graph comparing refresh frequency with and without the introduction of a display delay mechanism;

FIG. 5 illustrates a flow chart of an image display method shown in another exemplary embodiment of the present application;

FIG. 6 is a schematic diagram of Vsync, VBP, Vact, and VFP in accordance with an exemplary embodiment;

FIG. 7 is a schematic diagram illustrating an implementation of a display delay process according to an exemplary embodiment of the present application;

FIG. 8 is a schematic diagram of an implementation of a display delay process shown in another exemplary embodiment of the present application;

FIG. 9 is a schematic diagram illustrating an implementation of an image rescanning process according to an exemplary embodiment of the present application;

FIG. 10 is a flow chart of an image display process provided by another embodiment of the present application;

fig. 11 is a block diagram illustrating a structure of a terminal according to an exemplary embodiment of the present application.

Detailed Description

To make the objects, technical solutions and advantages of the present application more clear, embodiments of the present application will be described in further detail below with reference to the accompanying drawings.

Reference herein to "a plurality" means two or more. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship.

As shown in fig. 1, under the AP-DDIC-Panel architecture, an AP side first performs layer rendering through an Application program (App), then performs layer composition on a rendered layer through a surface flicker (layer composer) to obtain image data, and further sends (writes) the image data to the DDIC through MIPI. The DDIC stores the image data sent by the AP in a Buffer (Buffer), and controls the Display screen (Panel) to perform image refresh Display (Display) by scanning (reading) the image data in the Buffer. In implementing adaptive frequency conversion, the DDIC adaptively adjusts the refresh rate based on the AP's presentation rate (i.e., the amount of image data that the AP delivers to the DDIC per unit time, or the rate at which the AP delivers image data to the DDIC). For example, DDIC may decrease the refresh rate when the output frame rate of the AP decreases, and may increase the refresh rate when the output frame rate of the AP increases.

In the self-adaptive frequency conversion process, the change of the refresh frequency within a short time in a small range does not affect the image display quality, and when the refresh frequency changes within a short time in a large range (namely, jumps greatly), the problems of flicker, jitter and the like occur, so that the image display quality is affected.

For example, in some scenes, the AP side changes the display rate from 60Hz to 45Hz in a short time due to the fluctuation of the image data preparation speed at the AP side, and then changes the refresh frequency of the DDIC from 60Hz to 45Hz, which will not cause the flicker of the picture, and when the refresh frequency of the DDIC changes from 45Hz to 72Hz, the flicker of the picture will occur due to the too large change amplitude of the refresh frequency.

In order to solve the above technical problem, in the embodiment of the present application, a display delay mechanism is introduced at the DDIC side. Under the mechanism, as shown in fig. 2, after the DDIC receives the image data sent by the AP, the display delay condition detection is performed on the historical display sending rate of the AP according to the receiving time position of the image data, and when the display delay condition is detected to be met, the display delay operation is performed on the image data through the refresh frequency stabilizing algorithm, so that the phenomenon that the refresh frequency of the DDIC jumps greatly due to the scattered acceleration request of the AP side is avoided, the effect of stabilizing the refresh frequency of the DDIC is achieved, and the problem of display image flicker caused by the jump is further reduced. Wherein the historical display sending rate is the transmission rate when the AP transmits a plurality of frames of image data before the current display frame to the DDIC.

For example, in the process of running a game application with a reference frame rate of 60FPS, when the refresh frequency of the DDIC for the (n-1) th frame is less than 60Hz and the AP sends the image data of the nth frame in advance (i.e. when the frequency of sending the image data is greater than 60Hz), if the DDIC immediately controls the display screen to display an image according to the image data of the nth frame, the refresh frequency of the DDIC jumps (for example, from 45Hz to 72 Hz); after a display delay mechanism is introduced, the DDIC performs display delay operation on the nth frame image when determining that the nth frame image meets the display delay condition based on the historical display sending rate of the AP, that is, the display screen is controlled to perform image display after delaying for a period of time after receiving the nth frame image data, so as to avoid the large jump of the refresh frequency of the DDIC (for example, the refresh frequency is changed from 72Hz to 60Hz after the display delay operation).

The method provided by the embodiment of the application is applied to the terminal, and the DDIC in the display screen of the terminal executes the image display method. The terminal may include a smart phone, a tablet computer, a wearable device (such as a smart watch), a portable personal computer, a smart television, and the like, and the specific type of the terminal is not limited in the embodiments of the present application.

Referring to fig. 3, a flowchart illustrating an image display method according to an exemplary embodiment of the present application is shown. The method comprises the following steps:

step 301, receiving nth frame image data sent by the AP, where n is a positive integer.

When the DDIC is ready to refresh the next frame of image, a Tearing Effect (TE) signal is output, and the AP sends the prepared image data to the DDIC by detecting the TE signal, so that the DDIC performs image scanning (or referred to as frame scanning). The TE signal output by the DDIC may be a single-TE (single TE) signal or a multiple-TE (multiple TE) signal. The single-TE signal is a continuous high-level TE signal output by the DDIC, and the multiple-TE signal is a continuous TE signal output by the DDIC according to a preset frequency, where the preset frequency may be a light emitting frequency of the display screen, for example, the frequency of the multiple-TE signal output by the DDIC is 360 Hz. Accordingly, when the DDIC outputs a single-TE signal, the AP transmits new image data to the DDIC when detecting that the TE signal is in a high level state; when the DDIC outputs a multiple-TE signal, the AP transmits new image data to the DDIC upon detecting a rising edge of the TE signal.

When the image rendering speed of the AP side is increased (the image rendering speed is related to factors such as image complexity and the like), the AP sends and displays at a higher speed compared with the current display sending speed, namely, compared with sending and displaying in advance, correspondingly, the DDIC immediately scans images after receiving image data, and the refreshing frequency of the DDIC is correspondingly increased; when the image rendering speed of the AP side is reduced, the AP display sending will be delayed, correspondingly, the DDIC scans the image after receiving the image data, and the refreshing frequency of the DDIC is correspondingly reduced. However, if the DDIC performs image scanning immediately after receiving image data, if there is a large fluctuation in the image rendering speed, the scattered acceleration request on the AP side causes a jump in the refresh frequency of the DDIC, resulting in a flicker of the screen. Among them, a phenomenon that the image data preparation speed of the AP side is greatly increased in a short time and cannot be maintained for a long time (that is, the image data preparation speed of the AP side is greatly decreased in a short time) is called a scatter acceleration, and image data transmitted to the DDIC by the AP when the scatter acceleration occurs is regarded as a scatter acceleration request.

And step 302, responding to the fact that the historical display sending rate of the AP meets the display delay condition, and performing display delay operation on the nth frame image data, wherein the display delay operation is used for delaying the display of the nth frame image.

In order to reduce the fluctuation of the refresh frequency and avoid the occurrence of flicker, in the embodiment of the present application, after the DDIC receives the image data sent by the AP, it is required to detect whether the nth frame image meets the display delay condition according to the historical display sending rate of the AP, that is, detect whether the current acceleration request of the AP is a scattered acceleration request, and perform the display delay operation on the nth frame image data to delay the display of the nth frame image when the acceleration request is the scattered acceleration request (that is, when the display delay condition is met).

Optionally, the historical presentation rate is used to characterize the rate at which the AP has sent image data over the last period of time. In some embodiments, based on the historical display rate, the DDIC may identify whether the AP has continuously sent the display in advance within a recent period of time, and then filter the sporadic acceleration requests on the AP side (i.e., filter the non-continuous display in advance), so as to avoid a large jump in the refresh frequency of the DDIC due to the sporadic acceleration requests.

In one possible implementation, the display delay operation DDIC performs the display delay operation based on the target refresh frequency, thereby stabilizing the refresh frequency of the DDIC at the target refresh frequency.

And step 303, in response to the completion of the display delay operation, controlling the display screen to display the nth frame image based on the nth frame image data.

After the display delay operation of the image data of the nth frame is finished, the DDIC carries out image scanning and controls the display screen to display the image of the nth frame based on the image data of the nth frame.

By adopting the scheme provided by the embodiment of the application, the DDIC filters scattered acceleration requests of the AP, so that the stability of DDIC refreshing frequency is improved; meanwhile, the display delay mechanism is controlled by the DDIC through hardware logic, and the AP is not needed for control, so that the timeliness and the accuracy of the control process are improved.

In an illustrative example, as shown in fig. 4, without introducing a display delay mechanism, the refresh frequency of the DDIC jumps from 45Hz to 72Hz during the display of the 5 th and 6 th frame images, and jumps from 51Hz to 72Hz during the display of the 13 th and 14 th frame images. After the display delay mechanism is introduced, the refresh frequency of the DDIC is changed from 45Hz to 60Hz during the display of the 5 th and 6 th frame images, and the refresh frequency of the DDIC is changed from 51Hz to 60Hz during the display of the 13 th and 14 th frame images.

To sum up, in the embodiment of the present application, by introducing a display delay mechanism, after receiving image data sent by an AP, a DDIC determines whether a display delay condition is satisfied based on a historical display sending rate of the AP, and postpones an image display process when the display delay condition is satisfied; compared with the method that image display is carried out immediately after DDIC receives image data sent by AP, scattered acceleration requests of AP can be filtered by setting a display delay condition (namely the AP display sending rate is temporarily increased to cause the display sending of the image data to be sent in advance, and the display sending rate after the temporary increase cannot be kept), the problem that the DDIC refreshing frequency is greatly jumped due to the fluctuation of the AP output frame rate display sending rate, and further, the picture flicker and jitter are caused is avoided, the stability of DDIC refreshing frequency in the image display process is improved, and the effect of improving the image display quality is achieved.

In one possible embodiment, DDIC determines whether there is an advance display by the AP based on the receiving position of the image data (the receiving position is used to indicate the time when the image data is received), and records the number of consecutive times of advance display by the AP, which is used to represent the number of frames in which the AP transmits image data to DDIC in advance, by using a counter, so as to identify and filter the sporadic acceleration request on the AP side based on the consecutive times, for example, when the number of consecutive times of advance display is 3, image data indicating the latest 3 frames of images are all sent to DDIC by the AP in advance. The following description will be made using exemplary embodiments.

Referring to fig. 5, a flowchart illustrating an image display method according to another exemplary embodiment of the present application is shown. The method comprises the following steps:

step 501, receiving nth frame image data sent by an AP, where n is a positive integer.

In one possible implementation, after the DDIC receives the image data of the nth frame, it is first determined whether the image data of the nth frame is sent to the display in advance based on the receiving position of the image data. With respect to the specific manner of determining whether to send the display ahead, in one possible embodiment, the DDIC determines a first column forward interval (VFP) duration based on the first refresh frequency, and defines that image data received within the first VFP duration belongs to image data that is sent ahead, and defines that image data received outside the first VFP duration belongs to image data that is not sent ahead.

Schematically, the relationship between a Vertical synchronization Signal (Vsync), a column Back Porch (VBP), a column active row number (Vact), and a VFP is shown in fig. 6, where Vact is a frame scanning process, and VFP is a waiting process after the frame scanning is completed.

In general, the frame rate during the running of an application is kept stable as a whole, and in order to reduce the display power consumption while ensuring the display fluency, the refresh frequency of the DDIC needs to be kept as consistent as possible with the basic frame rate of the application. Therefore, in this embodiment, the DDIC determines the first refresh frequency matched with the reference frame rate in the foreground application running process as the target refresh frequency, and determines whether the AP is to be sent to the display in advance based on the first VFP duration corresponding to the first refresh frequency.

The matching between the target refresh frequency and the reference frame rate means that a difference between the target refresh frequency and the reference frame rate is smaller than a threshold (for example, the threshold is 5Hz), and optionally, the target refresh frequency is equal to the reference frame rate, or the target refresh frequency is slightly larger than the reference frame rate, or the target refresh frequency is slightly smaller than the reference frame rate.

In an illustrative example, when the reference frame rate applied by the foreground station is 60Hz, the DDIC determines that the first refresh rate is 60 Hz.

In a possible embodiment, the DDIC determines in advance a corresponding relationship between different refresh frequencies and a VFP time length based on a highest refresh frequency of the display screen, where the VFP time length is an integral multiple of an EM cycle, that is, the VFP time length is a pulse time length of at least one emission pulse (EM pulse), and a period in which the display screen emits light once is the EM cycle. For example, when the EM frequency of the display screen is 360Hz, the duration of each EM period is 2.8 ms.

In an illustrative example, the correspondence between the refresh frequency of the DDIC and the VFP is shown in table one.

Watch 1

Refresh frequency	VFP
		90Hz	2.8ms (1 EM period)
60Hz	8.3ms (3 EM periods)
		30Hz	25ms (9 EM periods)

In conjunction with the data shown in Table one, the DDIC determines that the first VFP duration is 8.3ms when the first refresh frequency is 60 Hz.

Optionally, the DDIC detects whether the receiving position of the nth frame image data is within the first VFP duration, and if so, determines that the nth frame image data is sent to display earlier, and performs the following step 502.

Step 502, in response to receiving the image data of the nth frame within the first VFP duration corresponding to the first refresh frequency, obtaining a count value of a counter, where the count value of the counter is used to represent the number of consecutive times that the AP is sent and displayed in advance.

When it is determined that the image data of the nth frame is sent to the display in advance, the DDIC needs to further determine whether the image data of the nth frame is scattered and sent to the display in advance based on the historical sending rate of the AP before the image data of the nth frame. In some embodiments, if several consecutive frames of image data before the nth frame of image data are also sent to be displayed in advance, the DDIC determines that the AP side continues to send to be displayed in advance; if the image data of a plurality of continuous frames before the nth frame of image data has the non-advanced display, the DDIC determines that the AP side has not continuously advanced display, namely the AP side has scattered advanced display.

In this embodiment, the DDIC records the number of consecutive times that the AP is sent in advance through the counter, and when the image data of the nth frame is sent in advance, the DDIC determines whether the AP continues to be sent in advance based on the count value of the counter. Wherein, the initial count value of the counter is 0.

Further, the DDIC detects whether the count value of the counter reaches a count threshold, if not, the DDIC determines that the AP is not continuously sent to the display in advance, determines that a display delay condition is met, and executes the following steps 503 to 505; if the count threshold is reached, the DDIC determines that the AP continues to be sent to the display in advance, determines that the display delay condition is not satisfied, and performs the following steps 506 to 507.

The counting threshold may be preset or may be customized by a user, which is not limited in this embodiment.

In one illustrative example, when the count threshold is set to 2, indicating that the AP is continuously advanced presentation when 3 consecutive frames (including the current frame) of image data are advanced presentation, the DDIC determines that the AP is continuously advanced presentation.

And step 503, in response to that the count value of the counter is smaller than the count threshold, determining that the historical display sending rate of the AP meets the display delay condition, and performing display delay operation on the image data of the nth frame based on the first VFP time length.

When the count value of the counter is smaller than the count threshold value, the DDIC determines that the display delay condition is satisfied and the image of the nth frame needs to be displayed with a delay. In one possible implementation, in order to make the refresh frequency of the DDIC as stable as possible at the first refresh frequency, the DDIC performs a display delay operation on the nth frame image data based on the first VFP duration, so as to avoid a sudden increase in the refresh frequency when the nth frame image is displayed within the first VFP duration.

In some embodiments, the DDIC determines the delay duration of the display delay operation based on the first VFP duration and the receiving position of the nth frame image data, so as to perform the display delay operation on the nth frame image data based on the delay duration, that is, in response to the waiting duration after the scanning of the (n-1) th frame is completed not reaching the first VFP duration, the DDIC does not control the display screen to display the nth frame image based on the nth frame image data, and thus, the nth frame image is prevented from being displayed in advance due to being sent to display in advance. The delay time length is the time length of delaying the scanning of the nth frame by the DDIC, and the delay time length is the interval between the receiving position of the image data of the nth frame and the position corresponding to the time length of the first VFP.

In an illustrative example, when DDIC receives the nth frame image data at the 2 nd EM period, and DDIC determines that the first VFP duration is 3 EM periods, DDIC determines that the nth frame image needs to be displayed with a delay of 1 EM period; when the DDIC receives the image data of the nth frame in the 1 st EM period and the DDIC determines that the first VFP duration is 3 EM periods, the DDIC determines that the image of the nth frame needs to be displayed after delaying for 2 EM periods. Illustratively, as shown in fig. 7, when the base frame rate of the foreground application is 60FPS, the DDIC determines that the duration of the first VFP is 3 EM periods, so as to detect whether new image data sent by the AP is received within 3 EM periods after the image scanning of the current frame is completed. Since the DDIC receives the 6 th frame image data within the first VFP duration (at 2 nd EM cycle), the DDIC determines that the 6 th frame image data is sent to the display in advance, and acquires that the current count value of the counter is 0 (none of the 1 st to 5 th frame image data is sent to the display in advance). Since the current count value is smaller than the count threshold (2), the DDIC determines that the display delay condition is satisfied, and determines that the display delay operation of 1 EM cycle is required for the 6 th frame image data.

Step 504, update the counter value of the counter.

In one possible embodiment, after the display delay condition detection is completed, the DDIC needs to update the count value of the counter, i.e., perform an add-on operation based on the current count value.

Illustratively, as shown in fig. 7, the DDIC updates the count value of the counter from 0 to 1.

Of course, in other possible embodiments, when the image data of the nth frame is received within the first VFP duration corresponding to the first refresh frequency, the DDIC may also update the count value of the counter first, and then perform the display delay condition detection (compared to a scheme of updating the count value after detecting first, and the count threshold needs to be increased by 1 in a scheme of updating the count value after updating the count value first), which is not described herein again.

And 505, in response to that the waiting time length after the scanning of the (n-1) th frame is completed reaches the first VFP time length, controlling the display screen to display the image of the (n) th frame based on the image data of the (n) th frame.

And when the waiting time length after the scanning of the (n-1) th frame is finished reaches the time length of the first VFP, the DDIC controls the display screen to display images based on the image data of the (n) th frame, so that the refreshing frequency of the DDIC is stabilized at the first refreshing frequency.

Illustratively, as shown in fig. 7, if the DDIC performs image scanning immediately after receiving image data without introducing a display delay mechanism, when the AP has a temporary display advance in transmitting image data of frame 6, the refresh frequency of the DDIC suddenly rises to 72 Hz; when the AP has 1 EM period delay in the process of sending the 7 th frame of image data, the refresh frequency of the DDIC is suddenly reduced to 45Hz, so that the refresh frequency jumps in a large range; under the condition of introducing a display delay mechanism, when DDIC receives the image data of the 6 th frame sent and displayed by AP in advance, because the counting value of the counter does not reach the counting threshold value, DDIC does not directly scan the image, but carries out 1 EM period display delay operation, so that the refresh frequency is kept at 60 Hz; when the AP has 1 EM period delay in the process of sending the 7 th frame of image data, the refresh frequency of the DDIC is reduced from 60Hz to 51Hz, and the stability of the refresh frequency is obviously improved.

And step 506, responding to the counting value of the counter being larger than or equal to the counting threshold value, determining that the historical display sending rate of the AP does not meet the display delay condition, and controlling the display screen to display the nth frame image based on the nth frame image data.

When the counting value of the counter reaches the counting threshold value, the AP is indicated to be continuously sent to display in advance in the latest period, namely, a continuous acceleration request exists, the DDIC determines that the display delay condition is not met, and therefore image scanning is carried out based on the image data of the nth frame, and the refreshing frequency of the DDIC is enabled to be consistent with the sending and displaying rate of the AP.

Illustratively, as shown in fig. 8, when receiving the 4 th frame image data which is sent to the display by the AP in advance, since the count value 0 of the counter < the count threshold 2, the DDIC determines that the display delay condition is satisfied, thereby performing the display delay operation (delaying for 2 EM cycles) on the 4 th frame image data; when receiving the image data of the 5 th frame which is sent to be displayed in advance by the AP, the DDIC determines that the display delay condition is met because the counting value 1 of the counter is less than the counting threshold value 2, so that the image data of the 5 th frame is subjected to the display delay operation (delayed by 1 EM period); when receiving the image data of the 6 th frame which is sent to display by the AP in advance, since the count value of the counter is 2 which is the count threshold 2, the DDIC determines that the display delay condition is not satisfied, that is, the image data of the 6 th frame is not subjected to display delay, but image scanning is immediately performed.

In step 507, the count value of the counter is updated.

In a possible implementation, the DDIC also needs to update the count value of the counter in case the display delay condition is not satisfied. Illustratively, as shown in fig. 8, the DDIC updates the counter value of the counter to 3 upon receiving the image data of the 6 th frame that the AP sent in advance.

In the embodiment, the DDIC determines whether the AP has a display sending in advance based on the position relationship between the receiving position of the image data and the first VFP duration, and records the continuous times of the AP sending in advance by using a counter, so as to identify and filter scattered acceleration requests at the AP side based on the continuous times, and avoid the fluctuation of the refresh frequency of the DDIC caused by the scattered acceleration requests; moreover, the display delay judgment is realized by utilizing the counter, the realization process is simple, and the judgment timeliness of the display delay opportunity is improved.

Since the first refresh frequency is matched with the reference frame rate of the foreground application, and there may be a difference between the reference frame rates of different foreground applications, for example, the reference frame rate of the game application is 60FPS, and the reference frame rate of the instant messaging application is 45FPS, in order to enable the refresh frequency of the DDIC to be adapted to the currently running foreground application, in a possible implementation manner, the AP sends a control instruction including the reference frame rate corresponding to the foreground application to the AP when detecting that the foreground application is running. Correspondingly, after receiving the control command sent by the AP, the DDIC determines a first refresh frequency based on the reference frame rate in the control command, and further sets a first VFP duration based on the first refresh frequency. Optionally, the DDIC determines the first refresh frequency based on the reference frame rate, so as to determine the first VFP duration based on a corresponding relationship between the refresh frequency and the VFP duration.

In one possible scenario, when there is a large delay in AP-side presentation, DDIC needs to rescan (rescanning) the currently displayed image and continue outputting the TE signal after rescanning so that the AP can send image data to DDIC when the TE signal is detected. In one possible implementation, in addition to determining whether the AP is advanced for display based on the first VFP duration corresponding to the first refresh frequency, the DDIC needs to determine whether the AP has an excessive amplitude for display delay based on the second VFP duration corresponding to the second refresh frequency.

Optionally, in response to that the nth frame of image data is not received in the first VFP duration and the nth frame of image data is received in the second VFP duration corresponding to the second refresh frequency, the DDIC determines that the nth frame of image data is slightly delayed, and correspondingly, if the continuous early display of the AP side is interrupted before the nth frame of image data, the count value of the counter is reset. For example, the DDIC resets the counter value of the counter to 0.

And the second refresh frequency is less than the first refresh frequency, so that the second VFP time length corresponding to the second refresh rate is greater than the first VFP time length corresponding to the first refresh rate, and the second VFP time length is also an integral multiple of the EM period. In one illustrative example, when the first refresh rate is 60Hz, the second refresh rate is 30Hz, and the second VFP duration is a duration corresponding to 9 EM cycles.

Illustratively, as shown in fig. 7, in the case of introducing the display delay mechanism, the DDIC receives the image data of the 7 th frame sent by the AP outside the duration of the first VFP (at the 7 th EM cycle), thereby resetting the count value of the counter to 0; as shown in fig. 8, DDIC receives the image data of the 7 th frame transmitted by the AP outside the first VFP duration (at the 6 th EM period), thereby resetting the count value of the counter to 0.

Optionally, in response to not receiving the image data of the n-th frame within the second VFP duration, the DDIC resets the count value of the counter, and controls the display screen to repeatedly display the image of the n-1 th frame based on the image data of the n-1 th frame.

For example, as shown in fig. 9, when DDIC receives the 4 th frame of image data sent by AP within the first VFP duration corresponding to the first refresh frequency of 60Hz, and still does not receive the 4 th frame of image data sent by AP within the second VFP duration corresponding to the second refresh frequency of 30Hz, DDIC determines that there is an excessive presentation delay at the AP end, thereby resetting the count value of the counter, and rescans the 3 rd frame of image based on the 3 rd frame of image data, wherein during the rescanning of the 3 rd frame of image, DDIC continues to output the TE signal, so that the AP transmits the prepared 4 th frame of image data when detecting the TE signal.

In one illustrative example, the process by which the DDIC controls the display screen to display an image is shown in fig. 10.

Step 1001 detects whether image data transmitted by the AP is received. If the image data is not received, go to step 1002; if the image data is received, step 1004 is executed.

Alternatively, the DDIC detects whether image data is received at the same frequency as the EM frequency (the image data sent by the AP is identified by 0x 2C).

In step 1002, it is checked whether Temp _ Extend _ Pulse (temporary extension Pulse) reaches ADFR _ Max _ Extend _ Pulse (ADFR extension Pulse upper limit). If ADFR _ Max _ Extend _ Pulse is reached, go to step 1008; if ADFR _ Max _ Extend _ Pulse is not reached, step 1003 is executed.

The Temp _ extended _ Pulse is the number of EM cycles that have passed after the image scanning, the ADFR _ Max _ extended _ Pulse is the second VFP duration in the above embodiment, and the display frequency conversion technology that is automatically implemented by the DDIC in the frequency conversion range is called Adaptive Dynamic Frame Rate (ADFR).

In step 1003, add operation is performed on Temp _ Extend _ Pulse.

Step 1004, check if Temp _ Extend _ Pulse is less than ADFR _ Delay _ Extend _ Pulse _ Threshold (ADFR extended Pulse Threshold). If yes, go to step 1005; if so, go to step 1008.

The ADFR _ Delay _ extended _ Pulse _ Threshold is the first VFP duration in the above embodiment.

In step 1005, it is detected whether the Temp _ Delay _ Count is smaller than the ADFR _ Delay _ Count _ Threshold. If yes, go to step 1006; if so, go to step 1009.

Wherein, Temp _ Delay _ Count is the Count value of the counter in the above embodiment, and ADFR _ Delay _ Count _ Threshold is the Count Threshold.

In step 1006, add one to Temp _ Delay _ Count.

Step 1007, Delay Temp _ Extend _ Pulse to ADFR _ Delay _ Extend _ Pulse _ Threshold.

The DDIC performs display delay operation when the display delay condition is met, and performs image scanning when the waiting time length after image scanning reaches the first VFP time length.

In step 1008, Temp _ Delay _ Count is reset.

And step 1009, controlling the display screen to display the image.

When Temp _ Extend _ Pulse reaches ADFR _ Max _ Extend _ Pulse, the DDIC controls the display screen to redisplay the image; when Temp _ Delay _ Count is greater than or equal to ADFR _ Delay _ Count _ Threshold, the DDIC controls to display a new image frame.

In some embodiments, the method provided by the embodiments of the present application is applied to a mobile terminal, that is, the image display method is performed by a DDIC of an OLED display screen in the mobile terminal. Because the mobile terminal is usually powered by a battery, and the electric quantity of the battery is limited (the battery is sensitive to power consumption), after the method provided by the embodiment of the application is applied to the mobile terminal, the display quality of the mobile terminal is improved, and the power consumption of the mobile terminal can be reduced. The mobile terminal may include a smart phone, a tablet computer, a wearable device (such as a smart watch), a portable personal computer, and the like, and the specific type of the mobile terminal is not limited in the embodiments of the present application.

Of course, the method provided in the embodiment of the present application may also be used for other non-battery-powered terminals, such as televisions, displays, personal computers, and the like, which is not limited in the embodiment of the present application.

The embodiment of the application further provides a DDIC, which is applied to a display screen and is used for:

receiving nth frame image data sent by an application processor AP, wherein n is a positive integer;

Optionally, the DDIC is configured to:

responding to the receiving of the nth frame of image data in the time length of a first row forward delay interval (VFP) corresponding to a first refreshing frequency, and acquiring a count value of a counter, wherein the count value of the counter is used for representing the continuous times of the AP for sending display in advance;

in response to the count value of the counter being smaller than a count threshold, determining that the historical display sending rate of the AP meets the display delay condition, and performing the display delay operation on the nth frame image data based on the first VFP duration;

and updating the count value of the counter.

Optionally, the DDIC is configured to:

determining a delay time length of the display delay operation based on the first VFP time length and a receiving position of the nth frame image data;

and performing the display delay operation on the nth frame of image data based on the delay time length.

Optionally, the DDIC is configured to:

and controlling the display screen to display the nth frame image based on the nth frame image data in response to the waiting time length after the scanning of the (n-1) th frame is completed reaching the first VFP time length.

Optionally, the DDIC is further configured to:

in response to the counting value of the counter being greater than or equal to the counting threshold value, determining that the historical display sending rate of the AP does not meet the display delay condition, and controlling the display screen to display the nth frame image based on the nth frame image data;

and updating the count value of the counter.

Optionally, the DDIC is further configured to:

and resetting the count value of the counter in response to that the nth frame of image data is not received in the first VFP time length and the nth frame of image data is received in a second VFP time length corresponding to a second refreshing frequency, wherein the second refreshing frequency is less than the first refreshing frequency, and the second VFP time length is greater than the first VFP time length.

Optionally, the DDIC is further configured to:

resetting a count value of the counter in response to the nth frame of image data not being received within the first VFP duration and the nth frame of image data not being received within the second VFP duration;

and controlling the display screen to repeatedly display the n-1 frame image based on the n-1 frame image data.

Optionally, the first VFP duration and the second VFP duration are both integer multiples of the emission EM period.

Optionally, the first refresh frequency is matched with a reference frame rate in a foreground application running process.

Optionally, the DDIC is further configured to:

receiving a control instruction sent by the AP, wherein the control instruction comprises the reference frame rate of the foreground application;

determining the first refresh frequency based on the reference frame rate;

setting the first VFP duration based on the first refresh frequency.

Optionally, the DDIC is applied to an organic light emitting diode OLED display screen.

The detailed process of implementing the image display method by the DDIC may refer to the above embodiments of the method, and this embodiment is not described herein again.

In addition, the embodiment of the application also provides a display screen module, which comprises a display screen and a DDIC, wherein the DDIC is used for driving the display screen, and the DDIC is used for realizing the image display method provided by the above method embodiments.

Referring to fig. 11, a block diagram of a terminal 1100 according to an exemplary embodiment of the present application is shown. The terminal 1100 may be a smart phone, a tablet computer, a notebook computer, etc. Terminal 1100 in the present application may include one or more of the following components: processor 1110, memory 1120, display screen module 1130.

The processor 1110 may include one or more processing cores, and the processor 1110 may be an AP as described in the above embodiments. The processor 1110 interfaces with various interfaces and circuitry throughout the various portions of the terminal 1100, and performs various functions of the terminal 1100 and processes data by executing or executing instructions, programs, code sets, or instruction sets stored in the memory 1120, and invoking data stored in the memory 1120. Alternatively, the processor 1110 may be implemented in hardware using at least one of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), and Programmable Logic Array (PLA). The processor 1110 may integrate one or more of a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), a Neural-Network Processing Unit (NPU), a modem, and the like. Wherein, the CPU mainly processes an operating system, a user interface, an application program and the like; the GPU is responsible for rendering and drawing the content that the touch display screen module 1130 needs to display; the NPU is used for realizing an Artificial Intelligence (AI) function; the modem is used to handle wireless communications. It is to be understood that the modem may not be integrated into the processor 1110, but may be implemented by a single chip.

The Memory 1120 may include a Random Access Memory (RAM) or a Read-Only Memory (ROM). Optionally, the memory 1120 includes a non-transitory computer-readable medium. The memory 1120 may be used to store instructions, programs, code, sets of codes, or sets of instructions. The memory 1120 may include a stored program area and a stored data area, wherein the stored program area may store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playing function, an image playing function, etc.), instructions for implementing various method embodiments of the present application, and the like; the storage data area may store data (such as audio data, a phonebook) created according to the use of the terminal 1100, and the like.

The display screen module 1130 is a display component for displaying images, and is generally disposed on the front panel of the terminal 1100. Display screen module 1130 may be designed as a full-face screen, curved screen, contoured screen, double-face screen, or folding screen. The display screen module 1130 may also be designed to be a combination of a full-screen and a curved-surface screen, and a combination of a special-shaped screen and a curved-surface screen, which is not limited in this embodiment.

In the embodiment of the present application, the display screen module 1130 includes a DDIC 1131 and a display screen 1132 (panel). The display screen 1132 may be an OLED display screen, which may be a Low Temperature Polysilicon (LTPS) AMOLED display screen or a Low Temperature Polysilicon Oxide (LTPO) AMOLED display screen.

The DDIC 1131 is used to drive the display screen 1132 for image display, so as to implement the image display method provided by the above embodiments. In addition, the DDIC 1131 is connected to the processor 1110 through an MIPI interface, and is configured to receive image data and instructions sent by the processor 1110.

In one possible implementation, the display screen module 1130 further has a touch function, and a user can perform a touch operation on the display screen module 1130 by using any suitable object such as a finger, a touch pen, and the like through the touch function.

In addition, those skilled in the art will appreciate that the configuration of terminal 1100 illustrated in the above-described figures does not constitute a limitation of terminal 1100, and that terminals may include more or less components than those illustrated, or some components may be combined, or a different arrangement of components. For example, the terminal 1100 further includes a microphone, a speaker, a radio frequency circuit, an input unit, a sensor, an audio circuit, a Wireless Fidelity (WiFi) module, a power supply, a bluetooth module, and other components, which are not described herein again.

Those skilled in the art will recognize that, in one or more of the examples described above, the functions described in the embodiments of the present application may be implemented in hardware, software, firmware, or any combination thereof. When implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer.

The above description is only exemplary of the present application and should not be taken as limiting, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims

1. An image display method, characterized in that, a display driver chip DDIC for a display panel, the method comprises:

2. The method according to claim 1, wherein the performing a display delay operation on the nth frame of image data in response to the historical display rate of the AP satisfying a display delay condition comprises:

and updating the count value of the counter.

3. The method of claim 2, wherein said performing the display delay operation on the nth frame of image data based on the first VFP duration comprises:

4. The method of claim 2, wherein the controlling the display screen to display the nth frame image based on the nth frame image data in response to completing the display delay operation comprises:

5. The method of claim 2, wherein after obtaining the count value of the counter, the method further comprises:

and updating the count value of the counter.

6. The method of claim 2, further comprising:

7. The method of claim 6, further comprising:

8. The method of claim 6, wherein the first VFP duration and the second VFP duration are both integer multiples of a luminous EM period.

9. The method of claim 2, wherein the first refresh frequency matches a reference frame rate during foreground application execution.

10. The method of claim 9, further comprising:

determining the first refresh frequency based on the reference frame rate;

setting the first VFP duration based on the first refresh frequency.

11. The method of any of claims 1 to 10, wherein the DDIC is applied to an Organic Light Emitting Diode (OLED) display.

12. A display driving chip DDIC is characterized in that the DDIC chip is applied to a display screen and is used for:

13. A DDIC as in claim 12, wherein the DDIC is to:

and updating the count value of the counter.

14. A DDIC as in claim 13, wherein the DDIC is configured to:

15. A DDIC as in claim 13, wherein the DDIC is configured to:

16. A DDIC as in claim 13, further configured to:

and updating the count value of the counter.

17. A DDIC as in claim 13, further configured to:

18. A DDIC as in claim 17, further configured to:

19. A DDIC as in claim 17, wherein the first VFP duration and the second VFP duration are each an integer multiple of a lighting EM period.

20. A DDIC as in claim 13, wherein the first refresh frequency matches a reference frame rate during foreground application execution.

21. A DDIC as in claim 20, further configured to:

determining the first refresh frequency based on the reference frame rate;

setting the first VFP duration based on the first refresh frequency.

22. A DDIC as in any of claims 12 to 21, applied to an organic light emitting diode, OLED, display.

23. A display screen module, characterized in that the display screen module comprises a display screen and a display driver chip DDIC, the DDIC is used for driving the display screen, and the DDIC is used for implementing the image display method according to any one of claims 1 to 11.

24. A terminal, characterized in that the terminal comprises an application processor AP, a display screen and a display driver chip DDIC, the AP and the DDIC are connected through a mobile industry processor interface MIPI, and the DDIC is used for implementing the image display method according to any one of claims 1 to 11.