CN113781943B - Display substrate, display panel, display device and voltage adjustment method - Google Patents
Display substrate, display panel, display device and voltage adjustment method Download PDFInfo
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- CN113781943B CN113781943B CN202110904484.2A CN202110904484A CN113781943B CN 113781943 B CN113781943 B CN 113781943B CN 202110904484 A CN202110904484 A CN 202110904484A CN 113781943 B CN113781943 B CN 113781943B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2074—Display of intermediate tones using sub-pixels
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
Abstract
The application discloses a display substrate, a display panel, a display device and a voltage adjusting method. The display substrate includes: the pixel display area comprises a plurality of sub-pixel units which are arranged in an array; pixel circuits are distributed in the sub-pixel units; a voltage signal line for providing a negative power supply signal to the pixel circuit, the voltage signal line including a first voltage signal line and a second voltage signal line, a first voltage of the first voltage signal line being greater than a second voltage of the second voltage signal line; the voltage adjusting circuit is arranged corresponding to the sub-pixel units, the control end of the voltage adjusting circuit is connected with the brightness signal, the first input end of the voltage adjusting circuit is connected with the first voltage signal line, the second input end of the voltage adjusting circuit is connected with the second voltage signal line, and the output end of the voltage adjusting circuit is connected with the pixel circuit. The application can solve the problem of how to reduce the overall power consumption of the pixel display area of the display panel.
Description
Technical Field
The application belongs to the technical field of display, and particularly relates to a display substrate, a display panel, a display device and a voltage adjusting method.
Background
Currently, display panels have penetrated into various aspects of people's daily life, for example, the display panels are used as display interaction modules of various devices for users to view and/or touch. However, since the display process needs to emit light by means of the light emitting device or the backlight module for a long time, the power consumption of the display panel occupies a large proportion of the total power consumption of the whole device, and thus how to reduce the overall power consumption of the display panel, particularly the pixel display area, is a problem to be solved by display device manufacturers.
Disclosure of Invention
The embodiment of the application provides a display substrate, a display panel, a display device and a voltage adjustment method, which can solve the problem of how to reduce the overall power consumption of a pixel display area of the display panel.
In a first aspect, there is provided a display substrate including:
the pixel display area comprises a plurality of sub-pixel units which are arranged in an array; pixel circuits are distributed in the sub-pixel units;
a voltage signal line for providing a negative power supply signal to the pixel circuit, the voltage signal line including a first voltage signal line and a second voltage signal line, a first voltage of the first voltage signal line being greater than a second voltage of the second voltage signal line;
the voltage adjusting circuit is correspondingly arranged with the sub-pixel units, the control end of the voltage adjusting circuit is connected with the brightness signal of the corresponding sub-pixel unit, the first input end of the voltage adjusting circuit is connected with the first voltage signal line, the second input end of the voltage adjusting circuit is connected with the second voltage signal line, and the output end of the voltage adjusting circuit is connected with the pixel circuit.
In a second aspect, a display panel is provided, including the display substrate of the first aspect.
In a third aspect, a display device is provided, including the display panel of the second aspect.
In a fourth aspect, a voltage adjustment method is provided, including:
the voltage adjusting circuit determines that the brightness value of the corresponding sub-pixel unit accords with a low brightness standard or a conventional brightness standard;
when the brightness value accords with the conventional brightness standard, the voltage regulating circuit conducts the connection between the pixel circuit of the corresponding sub-pixel unit and the first voltage signal line;
when the brightness value accords with the low brightness standard, the voltage adjusting circuit conducts the connection between the pixel circuit of the corresponding sub-pixel unit and the second voltage signal line; the first voltage signal line and the second voltage signal line are used for providing negative power supply signals for the pixel circuit, and the first voltage of the first voltage signal line is larger than the second voltage of the second voltage signal line.
Compared with the prior art, in the display substrate, the display panel, the display device and the voltage adjusting method provided by the embodiment of the application, the display substrate comprises the voltage signal line, the sub-pixel units and the voltage adjusting circuit, and the pixel circuits are distributed in the sub-pixel units. The voltage signal line comprises a first voltage signal line and a second voltage signal line, and the first voltage of the first voltage signal line is larger than the second voltage of the second voltage signal line, so that in the display process of the sub-pixel units, the voltage adjusting circuit can dynamically select different voltage signal lines according to the received brightness signals of the corresponding sub-pixel units, and further provide negative power signals for the pixel circuits. Compared with the prior art, the power consumption of the pixel display area of the display panel is reduced when the display requirement of the pixel unit is met, so that the problem of how to reduce the overall power consumption of the pixel display area of the display panel is solved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments of the present application will be briefly described below, and it is obvious that the drawings described below are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort to a person of ordinary skill in the art.
Fig. 1 is a schematic diagram of a prior art pixel circuit.
FIG. 2 is a table of power supply saturation operating voltages when the pixel circuit of FIG. 1 is applied to a display panel.
Fig. 3 is a schematic structural diagram of a display substrate according to an embodiment of the application.
Fig. 4 is a schematic diagram of a structure of a single sub-pixel unit and a voltage adjusting circuit in the display substrate in fig. 3.
Fig. 5 is a schematic diagram of a voltage adjusting circuit in a display substrate according to another embodiment of the application.
Fig. 6 is a schematic diagram of a voltage adjusting circuit in a display substrate according to another embodiment of the application.
Fig. 7 is a schematic diagram of a voltage adjusting circuit in a display substrate according to another embodiment of the application.
Fig. 8 is a schematic diagram of a voltage adjusting circuit in a display substrate according to another embodiment of the application.
Fig. 9 is a schematic diagram of a power supply structure of a sub-pixel unit in a display substrate according to still another embodiment of the present application.
Fig. 10 is a schematic view illustrating the positions of pixel display areas when a display substrate according to still another embodiment of the present application is applied to a wearable device.
Fig. 11 is a flowchart illustrating a voltage adjustment method according to an embodiment of the application.
Fig. 12 is a flowchart of a voltage adjustment method according to another embodiment of the application.
In the accompanying drawings:
the thin film transistor M (including M1 to M6), the capacitor Cst, the data signal input terminal Vdata, the scan signal input terminal S (including S1 to S2), the reset signal input terminal Vref, the first power supply signal line PVDD, the voltage signal line PVEE, the pixel display region 10, the sub-pixel unit P, the pixel circuit 12, the first voltage signal line PVEE1, the second voltage signal line PVEE2, the voltage adjustment circuit 20, the switch control circuit 21, the switch circuit 22, the first switch element T1, the second switch element T2, the third switch element T3, the comparator 23, the inverter PI, the first pixel display region 13, the second pixel display region 14, the pixel circuit 12, the control module 30, the driving module 40, the power management module 50, and the battery 60.
Detailed Description
The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
It should be noted that the directions or positional relationships indicated by the terms "upper", "lower", "left", "right", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of description, and do not indicate or imply that the apparatus or element to be referred to must have a specific direction, be configured and operated in a specific direction, and thus should not be construed as limiting the patent. The terms "first," "second," and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features. The meaning of "a plurality of" is two or more, unless specifically defined otherwise. Furthermore, the terms "horizontal," "vertical," "overhang," and the like do not denote a requirement that the component be absolutely horizontal or overhang, but rather may be slightly inclined. As "horizontal" merely means that its direction is more horizontal than "vertical", and does not mean that the structure must be perfectly horizontal, but may be slightly inclined.
It should also be noted that unless explicitly stated or limited otherwise, the terms "disposed," "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present application will be understood in specific cases by those of ordinary skill in the art.
In order to explain the technical scheme of the application, the following is detailed with reference to the specific drawings and embodiments.
Fig. 1 is a schematic diagram of a prior art pixel circuit. As shown in fig. 1, the pixel circuit of the related art includes thin film transistors M1, M2, M3, M4, M5 and M6, a capacitor Cst, a reset signal input terminal Vref, a data signal input terminal Vdata, and an organic light emitting diode. The sources of the thin film transistors M5 and M6 are electrically connected to the reset signal input terminal Vref, the source of the thin film transistor M2 is electrically connected to the data signal input terminal Vdata, the gates of the thin film transistors M2, M4 and M6 are electrically connected to the scan signal input terminal S2, the gate of the thin film transistor M5 is electrically connected to the scan signal input terminal S1, and the drain of the thin film transistor M5 is electrically connected to the first terminal of the capacitor Cst and the gate of the thin film transistor M3. The second end of the capacitor Cst is electrically connected to the first power signal line PVDD and a source electrode of the thin film transistor M1, a drain electrode of the thin film transistor M1 is electrically connected to a source electrode of the thin film transistor M3, and a drain electrode of the thin film transistor M3 is electrically connected to the voltage signal line PVEE through an organic light emitting diode.
The first power signal line PVDD is used for providing positive power signals to the pixel circuits, and the voltage signal line PVEE is used for providing negative power signals to the pixel circuits, and the positive power signals and the negative power signals enable the organic light emitting diodes to emit light. The sub-pixels of the whole display panel pixel area currently use a first power signal line PVDD and a voltage signal line PVEE with fixed voltage.
Referring to fig. 1 and 2 together, fig. 2 shows the saturated operation voltages of the first power signal line PVDD and the voltage signal line PVEE when the pixel circuit of fig. 1 is applied to a display panel in different modes of the display panel. Based on the illustration in fig. 2, it can be seen that the first power supply signal line PVDD and the voltage signal line PVEE differ in display luminance and saturation operation voltage depending on the sub-pixel, and in general, the display luminance of the sub-pixel is low and the saturation operation voltage is low.
According to the pixel circuit structure shown in fig. 1, since the entire pixel display area supplies power to the organic light emitting diode with a fixed voltage, this requires a power supply voltage to satisfy the saturation operation voltage of the maximum brightness of the current mode, which is generally the brightness of the white screen at 255 gray scales. However, in practical use, the display screen will not reach the maximum brightness, so the power consumption of the pixel area is larger as a whole in the prior art.
In order to solve the above-mentioned problems, please refer to fig. 3 and 4 together, wherein fig. 3 is a schematic diagram illustrating a structure of an alternative embodiment of the display substrate of the present application, and fig. 4 is a schematic diagram illustrating a voltage adjusting circuit 20 corresponding to the single sub-pixel unit P in fig. 3. The display substrate according to fig. 3 and 4 includes:
the pixel display area 10, the pixel display area 10 includes a plurality of sub-pixel units P, and the plurality of sub-pixel units P are arranged in an array; the sub-pixel unit P is internally distributed with pixel circuits 12.
The voltage signal line PVEE is configured to provide a negative power signal to the pixel circuit 12, and the voltage signal line PVEE includes a first voltage signal line PVEE1 and a second voltage signal line PVEE2, wherein a first voltage of the first voltage signal line PVEE1 is greater than a second voltage of the second voltage signal line PVEE 2.
The voltage adjusting circuit 20 is disposed corresponding to the sub-pixel unit P, the control end of the voltage adjusting circuit 20 is connected to the luminance signal of the corresponding sub-pixel unit P, the first input end of the voltage adjusting circuit 20 is connected to the first voltage signal line PVEE1, the second input end of the voltage adjusting circuit 20 is connected to the second voltage signal line PVEE2, and the output end of the voltage adjusting circuit 20 is connected to the pixel circuit 12.
The pixel circuit 12 in the sub-pixel unit P of the embodiment of the application is connected to two voltage signal lines PVEE through the voltage adjusting circuit 20, wherein the two voltage signal lines PVEE are a first voltage signal line PVEE1 and a second voltage signal line PVEE2, respectively, and the first voltage of the first voltage signal line PVEE1 is greater than the second voltage of the second voltage signal line PVEE 2.
It should be noted that, the first voltage and the second voltage may be adjusted according to different display panels and different display modes, and for the same voltage signal line PVEE, the voltage value of the highlight mode (HBM) is greater than the voltage value of the Normal mode (Normal), and the voltage value of the Normal mode is greater than the voltage value of the Idle mode (Idle). The first voltage range of the first voltage signal line PVEE1 is-3.2 to-3.5V, and the second voltage range of the second voltage signal line PVEE2 is-2.8 to-3.1V.
The voltage adjusting circuit 20 is connected to the first voltage signal line PVEE1 and the second voltage signal line PVEE2 through the first input terminal and the second input terminal, and is also connected to the luminance signal of the corresponding sub-pixel unit through the control terminal, so that different voltage signal lines PVEE can be dynamically selected according to the received luminance signal, and a negative power signal can be provided to the pixel circuit 12.
Specifically, the voltage adjusting circuit 20 may control the pixel circuit 12 to access the first voltage provided by the first voltage signal line PVEE1 or the second voltage provided by the second voltage signal line PVEE2 according to the received brightness signal of the sub-pixel unit P. The voltage adjusting circuit 20 may be configured to turn on the connection between the pixel circuit 12 of the corresponding sub-pixel unit P and the first voltage signal line PVEE1 when the brightness signal of the corresponding sub-pixel unit P meets the conventional brightness standard, so that the pixel circuit 12 uses the first power source with the first voltage provided by the first voltage signal line PVEE1 as the negative power source.
When the brightness signal of the corresponding sub-pixel unit P meets the low brightness standard, the connection between the pixel circuit 12 of the corresponding sub-pixel unit P and the second voltage signal line PVEE2 is turned on, so that the pixel circuit 12 uses the second power source with the second voltage provided by the second voltage signal line PVEE2 as the negative power source.
The display substrate provided by the embodiment of the application comprises a voltage signal line PVEE, a sub-pixel unit P and a voltage adjusting circuit 20, wherein the sub-pixel unit P is internally distributed with a pixel circuit 12. Since the voltage signal line PVEE includes the first voltage signal line PVEE1 and the second voltage signal line PVEE2, the first voltage of the first voltage signal line PVEE1 is greater than the second voltage of the second voltage signal line PVEE2, and therefore the voltage adjusting circuit 20 can dynamically select different voltage signal lines PVEE according to the received brightness signal of the corresponding sub-pixel unit P in the display process of the sub-pixel unit P, and provide the negative power signal to the pixel circuit 12. Compared with the prior art, the power consumption of the display panel pixel display area 10 at low brightness is reduced while the display requirement of the pixel unit is met, so that the problem of how to reduce the overall power consumption of the display panel pixel display area 10 is solved.
Referring to fig. 3 to 5 together, fig. 5 is a schematic diagram showing a structure of a voltage adjusting circuit 20 according to another alternative embodiment of the substrate according to the present application. The voltage adjustment circuit 20 includes a switch control circuit 21 and a switch circuit 22. An output terminal of the switch control circuit 21 is connected to a control terminal of the switch circuit 22, and an input terminal of the switch control circuit 21 is connected to a luminance signal. A first input terminal of the switching circuit 22 is connected to the first voltage signal line PVEE1, a second input terminal of the switching circuit 22 is connected to the second voltage signal line PVEE2, and an output terminal of the switching circuit 22 is connected to the pixel circuit 12.
In an alternative example, the switch control circuit 21 may include a comparator 22. The positive input terminal of the comparator 22 is connected to the data signal input terminal Vdata of the pixel circuit 12, the negative input terminal of the comparator 22 is connected to the reset signal input terminal Vref of the pixel circuit 12, and the output terminal of the comparator 22 is connected to the control terminal of the switch circuit 22.
The data signal input terminal Vdata is a port of the pixel circuit 12 for accessing a data voltage signal, which can represent the light emitting brightness of the sub-pixel unit, and the reset signal input terminal Vref is a port for accessing and transmitting a node voltage reset signal.
Note that, the sub-pixel units P of the pixel display area 10 include a red sub-pixel unit, a green sub-pixel unit, and a blue sub-pixel unit, and the different sub-pixel units P have different light emitting effects and/or voltages due to different material characteristics. Therefore, when the node reset voltage signal input from the reset signal input terminal Vref is set, it can be set according to the material characteristics of different sub-pixel units P.
In a specific setting, the node voltage reset signal of the blue sub-pixel unit is smaller than the node voltage reset signals of the green sub-pixel unit and the red sub-pixel unit. For example, the node reset voltage signal vref_r=3.5v of the red sub-pixel unit, the node reset voltage signal vref_g=3.5v of the green sub-pixel unit, and the node reset voltage signal vref_b=3v of the blue sub-pixel unit may be mentioned.
By correspondingly setting the node reset voltage signals for the pixel units with different material characteristics, different voltage selection modes can be set for the sub-pixel units with different colors, and compared with the node reset voltage signals consistent with the prior art, the power consumption is saved.
In an alternative example, the switching circuit 22 includes: an inverter PI, a first switching element T1 and a second switching element T2. The input end of the inverter PI is the control end of the switch circuit 22; the control terminal of the first switching element T1 is connected to the output terminal of the inverter PI, the input terminal of the first switching element T1 is connected to the second voltage signal line PVEE2, and the output terminal of the first switching element T1 is connected to the first power supply terminal of the pixel circuit 12. The control terminal of the second switching element T2 is connected to the input terminal of the inverter PI, the input terminal of the second switching element T2 is connected to the first voltage signal line PVEE1, and the output terminal of the second switching element T2 is connected to the first power supply terminal of the pixel circuit 12.
The first power supply terminal is a port for accessing a negative power supply signal in the pixel circuit 12, and is connected to the cathode of the organic light emitting diode. The first switching element T1 and the second switching element T2 are P-type thin film transistors, wherein the gate of the P-type thin film transistor is the control terminal of the switching element.
When the voltage at the positive input terminal of the comparator 22 is greater than the voltage at the negative input terminal, the comparator 22 outputs a high level, the second switching element T2 is turned off, the inverter PI outputs a low level, the first switching element T1 is turned on, and the second voltage signal line PVEE2 outputs a second voltage to the first power supply terminal of the pixel circuit 12.
When the voltage at the positive input terminal of the comparator 22 is smaller than the voltage at the negative input terminal, the comparator 22 outputs a low level, the second switching element T2 is turned on, the inverter PI outputs a high level, the first switching element T1 is turned off, and the first voltage signal line PVEE1 outputs a first voltage to the first power supply terminal of the pixel circuit 12.
It is understood that an N-type thin film transistor may be used as the switching element, so long as the switching element is adaptively adjusted according to the high-level on characteristic of the N-type thin film transistor.
For example, referring to fig. 6, in another alternative example, the switching circuit 22 includes an N-type thin film transistor T1 and a P-type thin film transistor T2. The gate of the thin film transistor T1 is connected to the output terminal of the comparator 22, the source of the thin film transistor T1 is connected to the second voltage signal line PVEE2, and the drain of the thin film transistor T1 is connected to the first power supply terminal of the pixel circuit 12. The gate of the thin film transistor T2 is connected to the output terminal of the comparator 22, the source of the thin film transistor T2 is connected to the first voltage signal line PVEE1, and the drain of the thin film transistor T2 is connected to the first power supply terminal of the pixel circuit 12.
Referring to fig. 7, in yet another alternative example, the switching circuit 22 includes N-type thin film transistors T1, T2 and an inverter PI, wherein a gate of the thin film transistor T1 is connected to an output terminal of the comparator 22, a source of the thin film transistor T1 is connected to the second voltage signal line PVEE2, and a drain of the thin film transistor T1 is connected to the first power terminal of the pixel circuit 12. The gate of the thin film transistor T2 is connected to the output terminal of the inverter PI, the source of the thin film transistor T2 is connected to the first voltage signal line PVEE1, and the drain of the thin film transistor T2 is connected to the first power supply terminal of the pixel circuit 12. The input of the inverter PI is connected to the output of the comparator 22.
The embodiment of the application realizes the dynamic selection of the first voltage signal line PVEE1 and the second voltage signal line PVEE2 according to the brightness of the sub-pixel unit P by arranging the switch circuit 22 and the switch control circuit 21, and reduces the power consumption of the pixel display area 10 of the display panel while meeting the display requirement of the pixel unit, thereby solving the problem of reducing the overall power consumption of the pixel display area 10 of the display panel.
In addition, in order to visually explain the technical effect of providing the voltage adjusting circuit 20 to realize the dynamic selection of the voltage signal line PVEE, the following is exemplified with reference to fig. 1 to 7 in conjunction with a specific example of a display screen.
Assuming that the display screen of the display panel is in the normal mode, 50% of the screen is displayed in the pixel display area 10 as the luminance of the white screen at 255 gray scales, and 50% as the luminance of the white screen at 127 gray scales. The first power signal line PVDD supplies a voltage of 3.3V, and the thin film transistor M3 outputs a current IPVEE of 12.16mA.
If the prior art is used, the supply voltage line PVEE voltage is fixed at-3.3V, then the power p= [3.3- (-3.3) ]is12.16=80.26 mW. If the technical solution of the embodiment of the present application is adopted, after the data signal and the reset voltage signal of the sub-pixel in the pixel display area 10 are determined, the first power end of the sub-pixel unit P corresponding to 127 gray scales is connected to the second voltage signal line PVEE2, for example, the second voltage is set to 3V, so that the power p= [3.3- (-3.3) ] + [ 10.3- (-3) ] + [ 2.16 ] = 79.61mW, and the power consumption of the pixel display area 10 of the display panel is reduced by 0.8% compared with the prior art.
Referring to fig. 3 and 8, fig. 8 is a schematic diagram of a voltage adjusting circuit 20 corresponding to a single sub-pixel unit P in a display substrate according to another embodiment of the application. In this embodiment, the display substrate further includes:
the input terminal of the third switching element T3 is connected to the data signal input terminal Vdata of the pixel circuit 12, and the output terminal of the third switching element T3 is connected to the positive input terminal of the comparator 22. The third switching element T3 may be a thin film transistor.
The control module 30 is connected to the control terminal of the third switching element T3. The control module 30 is configured to control the third switching element T3 to be turned on when receiving a first mode switching instruction, where the first mode switching instruction is an instruction for controlling the sub-pixel unit P to switch to the low power consumption display mode.
The control module 30 is further configured to control the third switching element T3 to be turned off when receiving a second mode switching instruction, where the second mode switching instruction is an instruction for controlling the sub-pixel unit P to switch to the normal display mode.
It should be noted that the control module may be a control chip. The low power consumption display mode is opposite to the normal display mode, and in the low power consumption display mode, the third switching element T3 is turned on, and the comparator 22 provides the pixel circuit 12 with the negative power signal by dynamically selecting the two voltage signal lines PVEE according to the magnitudes of the data voltage signal and the reset voltage signal.
In the normal display mode, the third switching element T3 is turned off, and the comparator 22 outputs a low level, which is similar to the fixed negative power signal in fig. 1, to supply power to the organic light emitting diode of the pixel circuit 12. According to the technical scheme of the embodiment, flexible adjustment of different power consumption display modes is realized, so that the panel has multiple display modes.
Referring to fig. 3, fig. 4 and fig. 9, fig. 9 is a schematic diagram showing a power supply structure of a single sub-pixel unit P in a display substrate according to still another embodiment of the application. In this embodiment, the display substrate further includes:
the driving module 40, the driving module 40 is connected to the second voltage signal line PVEE2, and the driving module 40 is configured to provide the second voltage to the second voltage signal line PVEE 2.
The power management module 50 is connected to the first voltage signal line PVEE1 and the driving module 40, and is configured to provide a first voltage to the first voltage signal line PVEE 1.
It will be appreciated that since the first voltage signal line PVEE1 supplies power to the relatively high brightness sub-pixel unit P, the current is large, and thus the power management module 50 may be used for power supply. The power management module 50 may be a power management chip (PowerIC).
The second voltage signal line PVEE2 supplies power to the relatively low-luminance sub-pixel unit P with a small current, and thus may be supplied with power using the driving module 40, and the driving module 40 may be a Driver IC. In addition, the power management module 50 is connected to the battery 60, and the battery supplies power, and the power management module 50 is also connected to the driving module 40 to supply power to the driving module 40. By the connection design of the driving module 40 and the power management module 50 with the different voltage signal lines PVEE, different voltages can be provided to the pixel circuit 12, thereby helping to realize dynamic voltage selection.
It should be noted that, the driving module 40 may also provide the sub-pixel unit P with a constant voltage signal, a reset voltage signal, and a data signal, where the constant voltage signal may be at a high level and/or a low level.
Referring to fig. 3, 4 and 10, in still another embodiment of the present application, the pixel display area 10 may be further divided into a first pixel display area 11 and a second pixel display area 12; the voltage adjusting circuit 20 may be disposed only in the first pixel display area 11, and the voltage adjusting circuit 20 is disposed corresponding to the sub-pixel unit P in the first pixel display area 11.
The first pixel display area 11 may be an area with low display screen brightness in the display pixel area. For example, the second pixel display area 12 may be a central area, and the first pixel display area 11 is a peripheral area disposed around the central area.
For example, the display panel may be applied to a wearable device, a center region of a pixel display region is generally required to perform content display, and a fixed negative power signal line may be provided. The surrounding area surrounding the central area has less display content information, the display picture is usually a background color or a non-display picture set by a user, and the first voltage signal line PVEE1 and the second voltage signal line PVEE2 can be arranged for the sub-pixel unit P of the surrounding area in a matching way and can be dynamically selected according to the brightness of the sub-pixels.
According to the embodiment of the application, the dynamic voltage scheme is set by selecting part of the pixel display areas 10, so that the utilization rate of the display pixel areas is reasonably considered.
The display substrate according to the embodiment of the present application is described in detail above with reference to fig. 1 to 10. On the basis, the embodiment of the application also provides a display panel, a display device and a voltage adjusting method, wherein the display device comprises the display panel, and the display device can be at least one of wearable equipment, a camera, a mobile phone, a tablet personal computer, a display screen, a television and a vehicle-mounted display terminal. The display panel comprises the display substrate provided by the embodiment, so that the display device and the display panel have all the beneficial effects of the display substrate.
Referring to fig. 11, the voltage adjustment method can be applied to the display substrate, and includes the following steps:
step S111, the voltage adjusting circuit determines that the brightness value of the corresponding sub-pixel unit meets the low brightness standard or the conventional brightness standard;
step S112, when the brightness value accords with the conventional brightness standard, the voltage regulating circuit conducts the connection between the pixel circuit of the corresponding sub-pixel unit and the first voltage signal line;
step S113, when the brightness value accords with the low brightness standard, the voltage adjusting circuit conducts the connection between the pixel circuit of the corresponding sub-pixel unit and the second voltage signal line; the first voltage signal line and the second voltage signal line are used for providing negative power supply signals for the pixel circuit, and the first voltage of the first voltage signal line is larger than the second voltage of the second voltage signal line.
Compared with the prior art, in the voltage adjustment method provided by the embodiment of the application, the first voltage of the first voltage signal line is larger than the second voltage of the second voltage signal line, and in the display process of the sub-pixel units, the voltage adjustment circuit can dynamically select different voltage signal lines according to the received brightness signals of the corresponding sub-pixel units, so that negative power signals are provided for the pixel circuits. Compared with the prior art, the power consumption of the pixel display area of the display panel is reduced when the display requirement of the pixel unit is met, so that the problem of how to reduce the overall power consumption of the pixel display area of the display panel is solved.
On the basis, the mode switching can be performed by setting a low-energy display mode and a normal display mode, and referring to fig. 12, the method can further comprise:
in step S114, the controller determines the type of the mode switching instruction when receiving the mode switching instruction.
In step S115, when the type is the first mode switching instruction, the first mode switching instruction is an instruction for controlling the sub-pixel unit to switch to the low power consumption display mode, and the controller executes the trigger instruction to execute step S111.
In step S116, when the type is the second mode switching instruction, the controller triggers the voltage adjustment circuit to conduct the connection between the pixel circuit of the corresponding sub-pixel unit and the first voltage signal line, and the second mode switching instruction is an instruction for controlling the sub-pixel unit to switch to the normal display mode.
The mode switching between the low-energy-consumption display mode and the conventional display mode is controlled by the controller, so that flexible adjustment of different power consumption display modes is realized, and the panel has multiple display modes.
In addition, the term "and/or" herein is merely an association relationship describing an association object, and means that three relationships may exist, for example, a and/or B may mean: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.
It should be understood that in embodiments of the present application, "B corresponding to a" means that B is associated with a, from which B may be determined. It should also be understood that determining B from a does not mean determining B from a alone, but may also determine B from a and/or other information.
The present application is not limited to the above embodiments, and various equivalent modifications and substitutions can be easily made by those skilled in the art within the technical scope of the present application, and these modifications and substitutions are intended to be included in the scope of the present application. Therefore, the protection scope of the application is subject to the protection scope of the claims.
Claims (14)
1. A display substrate, comprising:
the pixel display area comprises a plurality of sub-pixel units which are arranged in an array; pixel circuits are distributed in the sub-pixel units;
a voltage signal line for providing a negative power supply signal to the pixel circuit, the voltage signal line including a first voltage signal line and a second voltage signal line, a first voltage of the first voltage signal line being greater than a second voltage of the second voltage signal line;
the input end of the third switching element is connected with the brightness signal of the sub-pixel unit, and the output end of the third switching element is connected with the control end of the voltage regulating circuit;
the control module is connected with the control end of the third switching element and is used for controlling the third switching element to be conducted when a first mode switching instruction is received, wherein the first mode switching instruction is an instruction for controlling the sub-pixel unit to be switched to a low-energy consumption display mode;
the voltage adjusting circuit is arranged corresponding to the sub-pixel unit, a first input end of the voltage adjusting circuit is connected with the first voltage signal line, a second input end of the voltage adjusting circuit is connected with the second voltage signal line, and an output end of the voltage adjusting circuit is connected with the pixel circuit.
2. The display substrate according to claim 1, wherein the voltage adjustment circuit comprises a switch control circuit and a switch circuit;
the output end of the switch control circuit is connected with the control end of the switch circuit, and the input end of the switch control circuit is connected with the output end of the third switch element;
the first input end of the switching circuit is connected with the first voltage signal line, the second input end of the switching circuit is connected with the second voltage signal line, and the output end of the switching circuit is connected with the pixel circuit.
3. The display substrate according to claim 2, wherein the pixel circuit includes a data signal input terminal for switching in a data voltage signal, a reset signal input terminal for switching in a node voltage reset signal, and a first power supply terminal for switching in the negative power supply signal;
the switch control circuit comprises a comparator; the positive input end of the comparator is connected with the data signal input end of the pixel circuit through the third switching element, the negative input end of the comparator is connected with the reset signal input end of the pixel circuit, and the output end of the comparator is connected with the control end of the switching circuit.
4. A display substrate according to claim 3, wherein the switching circuit comprises:
the input end of the inverter is the control end of the switching circuit;
a first switching element, a control terminal of which is connected to an output terminal of the inverter, an input terminal of which is connected to the second voltage signal line, and an output terminal of which is connected to the first power supply terminal of the pixel circuit;
and the control end of the second switching element is connected with the input end of the inverter, the input end of the second switching element is connected with the first voltage signal line, and the output end of the second switching element is connected with the first power supply end of the pixel circuit.
5. The display substrate according to claim 4, wherein the first switching element and the second switching element are P-type thin film transistors.
6. A display substrate according to claim 3, wherein an input terminal of the third switching element is connected to a data signal input terminal of the pixel circuit, and an output terminal of the third switching element is connected to a positive input terminal of the comparator;
the control module is further configured to control the third switching element to be turned off when a second mode switching instruction is received, where the second mode switching instruction is an instruction for controlling the sub-pixel unit to switch to a normal display mode.
7. The display substrate of claim 3, wherein the sub-pixel cells comprise a red sub-pixel cell, a green sub-pixel cell, and a blue sub-pixel cell, the node voltage reset signal of the blue sub-pixel cell being less than the node voltage reset signals of the green sub-pixel cell and the red sub-pixel cell.
8. The display substrate according to any one of claims 1 to 7, wherein the display substrate further comprises:
the driving module is connected with the second voltage signal line and is used for providing the second voltage for the second voltage signal line;
and the power management module is connected with the first voltage signal line and the driving module and is used for providing the first voltage for the first voltage signal line.
9. The display substrate according to any one of claims 1 to 7, wherein the pixel display area is divided into a first pixel display area and a second pixel display area;
the voltage adjusting circuit is arranged in the first pixel display area and corresponds to the sub-pixel units in the first pixel display area.
10. The display substrate of claim 9, wherein the second pixel display area is a center area and the first pixel display area is a peripheral area disposed around the center area.
11. A display panel, characterized in that the display panel comprises a display substrate according to any one of claims 1-10.
12. A display device comprising the display panel of claim 11.
13. A method of voltage regulation, the method comprising:
when a controller receives a mode switching instruction, determining the type of the mode switching instruction;
when the type is a first mode switching instruction, the controller triggers the voltage adjusting circuit to determine that the brightness value of the corresponding sub-pixel unit accords with a low brightness standard or a conventional brightness standard, and the first mode switching instruction is an instruction for controlling the sub-pixel unit to switch to a low-energy consumption display mode;
when the brightness value meets the conventional brightness standard, the voltage regulating circuit conducts connection between the pixel circuit corresponding to the sub-pixel unit and the first voltage signal line;
when the brightness value meets the low brightness standard, the voltage regulating circuit conducts the connection between the pixel circuit corresponding to the sub-pixel unit and the second voltage signal line; the first voltage signal line and the second voltage signal line are used for providing negative power supply signals for the pixel circuit, and the first voltage of the first voltage signal line is larger than the second voltage of the second voltage signal line.
14. The voltage regulation method of claim 13, wherein the method further comprises: when the type is a second mode switching instruction, the controller triggers the voltage adjusting circuit to conduct connection between the pixel circuit corresponding to the sub-pixel unit and the first voltage signal line, and the second mode switching instruction is an instruction for controlling the sub-pixel unit to switch to a normal display mode.
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| CN114446223A (en) * | 2022-02-15 | 2022-05-06 | 上海天马微电子有限公司 | Display panel, driving method thereof and display device |
| CN115035874B (en) * | 2022-07-21 | 2023-08-25 | 硅谷数模(苏州)半导体股份有限公司 | Method for adjusting output electric signal of power management chip and screen driving board |
| CN115995202A (en) | 2023-01-30 | 2023-04-21 | 武汉天马微电子有限公司 | Driving module, voltage generation method thereof and display device |
| CN117238245A (en) * | 2023-11-07 | 2023-12-15 | 惠科股份有限公司 | Display panel and display device |
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