CN113778925A - Method for reading and writing off-board RAM data through CPCI bus and off-board data reading and writing module - Google Patents

Method for reading and writing off-board RAM data through CPCI bus and off-board data reading and writing module Download PDF

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Publication number
CN113778925A
CN113778925A CN202111144165.2A CN202111144165A CN113778925A CN 113778925 A CN113778925 A CN 113778925A CN 202111144165 A CN202111144165 A CN 202111144165A CN 113778925 A CN113778925 A CN 113778925A
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cpci
ram
address
data
module
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崔晓颖
田兴科
赵立臻
王英胜
王莹
刘淑云
杨硕
林桔秋
郭黎霞
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China North Vehicle Research Institute
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China North Vehicle Research Institute
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus

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  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bus Control (AREA)

Abstract

The invention belongs to the technical field of CPCI bus data processing, and particularly relates to a method for reading and writing off-board RAM data through a CPCI bus and an off-board data reading and writing module. The method is implemented by an off-board data read-write module, and the off-board data read-write module comprises the following steps: the CPCI slave device configuration module, the CPCI slave device initialization module, the RAM first address acquisition module, the RAM reading module and the RAM writing module; the board card 1 and the board card 2 in the embedded device are connected through a CPCI bus. The MPU on the board card 1 is a CPCI master device, and the CPCI bridge on the board card 2 is a CPCI slave device; the method is used for realizing the reading and writing of the RAM data on the board card 2 by the board card 1; the invention is developed mainly aiming at the requirement of reading and writing the RAM data outside the board of the embedded system based on the CPCI bus, and meets the requirements of the system on data processing and system control by reading and writing a large amount of data in the RAM.

Description

Method for reading and writing off-board RAM data through CPCI bus and off-board data reading and writing module
Technical Field
The invention belongs to the technical field of CPCI bus data processing, and particularly relates to a method for reading and writing off-board RAM data through a CPCI bus and an off-board data reading and writing module.
Background
With the continuous improvement of the digitization level, important data such as the real-time state, the historical data and the factory parameters of the system are recorded and stored. The data is collected by one board card in the embedded device and stored in the RAM on the board card, and meanwhile, the data needs to be provided for other board cards in the embedded device for system control and display.
Data exchange between the board cards in the embedded device is completed through an internal bus, and the CPCI bus is one of the widely used internal buses. The CPCI bus is formed by modifying the PCI bus, improves the reliability and the load capacity by improving the connector, supports hot plug and inherits the PCI bus technology.
The data transmission mode of the CPCI bus inherits the data transmission mode of the PCI bus. The data transmission operation mode of the CPCI bus is a master-slave mode, the CPCI bus is initiated by a CPCI master device, and the CPCI slave device responds as a target. CPCI equipment and a CPCI bridge can be connected to the CPCI bus in an attachable mode, only 1 main equipment is allowed, and the other main equipment is slave equipment. Bridging of the CPCI bridge is required when some chips without CPCI interface are to be accessed as a CPCI device.
Therefore, if the RAM chip on one board card in the embedded device is to be accessed by another board card in the embedded device and the two board cards are connected through the CPCI bus, the RAM chip needs to be connected with the CPCI bus by using the CPCI bridge chip first, and then the RAM chip can be accessed by the device on the CPCI bus.
Because of this, each large device provider actively develops a chip or a bridge chip based on CPCI for use, and how to realize reading and writing of off-board RAM data through a CPCI bus is a hot research topic in the technical field.
Disclosure of Invention
Technical problem to be solved
The technical problem to be solved by the invention is as follows: under the condition that a board card 1 and a board card 2 in the embedded equipment are connected through a CPCI bus, how to read and write RAM data on the board card 2 by the board card 1.
(II) technical scheme
In order to solve the above technical problem, the present invention provides a method for reading and writing off data of an off-board RAM through a CPCI bus, the method is implemented by an off-board data reading and writing module, and the off-board data reading and writing module includes: the CPCI slave device configuration module, the CPCI slave device initialization module, the RAM first address acquisition module, the RAM reading module and the RAM writing module;
the MPU on the board card 1 is a CPCI master device, and the CPCI bridge on the board card 2 is a CPCI slave device; the board card 1 is connected with the board card 2 through a CPCI bus; the method is used for realizing the reading and writing of the RAM data on the board card 2 by the board card 1;
the method comprises the following steps:
step 1: the CPCI slave device configuration module configures the CPCI bridge on the board card 2 into CPCI slave devices on a CPCI bus;
step 2: the CPCI slave equipment initialization module initializes CPCI slave equipment according to the sender ID and the equipment ID;
and step 3: the RAM first address obtaining module obtains the RAM space first address of the CPCI slave equipment according to the bus number, the equipment number and the function number;
and 4, step 4: the RAM reading module obtains appointed RAM address unit data of the CPCI slave equipment;
and 5: the write RAM module writes data into a designated RAM address location of the CPCI slave device.
In the method, the RAM is connected to the CPCI bridge, the CPCI bridge is configured to be a slave device on a CPCI bus, and a master device on the CPCI bus performs operations of reading and writing RAM data through the CPCI bridge.
In the step 1, in the process of configuring the CPCI bridge as the CPCI slave device, the Vender ID, the device ID, the subsystem ID and the class number are parameters for configuring the CPCI slave device, and the parameters are written into a configuration chip of the CPCI bridge chip and stored in a device which can be saved after power failure; and connecting the configuration chip with the PCI bridge, and completing the configuration of the PCI bridge through the configuration chip.
In the step 2, in the process of initializing the CPCI slave device, the board card 1 and the board card 2 are two board cards in the embedded device, and communicate through a CPCI bus of the bottom plate; the MPU on the board card 1 runs on an embedded operating system VxWorks, and the equipment is CPCI main equipment on a CPCI bus; the MPU uses the Vender ID and the device ID in step 1 as parameters for searching the CPCI bus device, thereby obtaining the bus number, the device number, and the function number of the CPCI slave device, and completing initialization of the CPCI slave device.
In the step 3, in the process of obtaining the RAM space first address of the CPCI slave device, the RAM and the CPCI slave device, that is, the CPCI bridge are both located on the board card 2, and the RAM is connected to the board card 2, so that the RAM becomes a local memory of the CPCI bus interface; and (3) taking the bus number, the device number and the function number of the CPCI bus slave device obtained in the step (2) as parameters to obtain the first address of the RAM.
In the step 4, in the process of obtaining the data of the specified RAM address unit of the CPCI slave device, that is, reading the RAM, each RAM unit has an absolute address, the absolute address is obtained by adding the offset address to the head address obtained in the step 3, each absolute address corresponds to one RAM unit, and the data of the RAM unit is read through the absolute address.
In the step 5, in the process of writing data into the designated RAM address unit of the CPCI slave device, that is, into the RAM, each RAM unit has an absolute address, the absolute address is obtained by adding the offset address to the head address obtained in the step 3, each absolute address corresponds to one RAM unit, and data is written into the RAM unit through the absolute address.
In addition, the present invention also provides an off-board data read-write module, which is used for implementing the method for reading and writing off-board RAM data through the CPCI bus, and the off-board data read-write module includes: the CPCI slave device configuration module, the CPCI slave device initialization module, the RAM first address acquisition module, the RAM reading module and the RAM writing module;
the CPCI slave device configuration module is used for configuring a CPCI bridge on the board card 2 into CPCI slave devices on a CPCI bus;
the CPCI slave device initialization module is used for initializing CPCI slave devices according to the sender ID and the device ID;
the RAM first address obtaining module is used for obtaining the RAM space first address of the CPCI slave equipment according to the bus number, the equipment number and the function number;
the RAM reading module is used for obtaining the appointed RAM address unit data of the CPCI slave equipment;
the write RAM module is used for writing data into a designated RAM address unit of the CPCI slave device.
In the process that the CPCI slave device configuration module configures the CPCI bridge as the CPCI slave device, the Vender ID, the device ID, the subsystem ID and the class number are parameters for configuring the CPCI slave device, the parameters are written into a configuration chip of the CPCI bridge chip, and the configuration is stored in a device which can be saved after power failure; connecting a configuration chip with the PCI bridge, and completing the configuration of the PCI bridge through the configuration chip;
in the process that the CPCI slave equipment initialization module initializes the CPCI slave equipment, the board card 1 and the board card 2 are two board cards in the embedded equipment and communicate through a CPCI bus of the bottom plate; the MPU on the board card 1 runs on an embedded operating system VxWorks, and the equipment is CPCI main equipment on a CPCI bus; the MPU uses the Vender ID and the device ID in step 1 as parameters for searching the CPCI bus device, thereby obtaining the bus number, the device number, and the function number of the CPCI slave device, and completing initialization of the CPCI slave device.
In the process that the RAM initial address obtaining module obtains the RAM space initial address of the CPCI slave device, the RAM and the CPCI slave device, namely a CPCI bridge, are both positioned on the board card 2 and connected, so that the RAM becomes a local memory of a CPCI bus interface; and (3) taking the bus number, the device number and the function number of the CPCI bus slave device obtained in the step (2) as parameters to obtain the first address of the RAM.
The RAM reading module obtains appointed RAM address unit data of the CPCI slave equipment, namely each RAM unit has an absolute address in the RAM reading process, the absolute address is obtained by adding an offset address to a first address obtained by the RAM first address obtaining module, each absolute address corresponds to one RAM unit, and the RAM unit data are read through the absolute addresses;
and in the process of writing data into a designated RAM address unit of the CPCI slave device, namely, the RAM, each RAM unit has an absolute address which is obtained by adding an offset address to the first address obtained by the RAM first address obtaining module, each absolute address corresponds to one RAM unit, and the data is written into the RAM unit through the absolute address.
(III) advantageous effects
Compared with the prior art, the invention provides a method for reading and writing the data of the off-board RAM through the CPCI bus and an off-board data reading and writing module, which are developed mainly aiming at the requirement of reading and writing the data of the off-board RAM of the embedded system based on the CPCI bus, and the requirements of the system on data processing and system control are met by reading and writing a large amount of data in the RAM.
Drawings
Fig. 1 is a hardware configuration diagram of the present invention.
Fig. 2 is a flowchart illustrating the operation of the board 1 according to the present invention.
Detailed Description
In order to make the objects, contents, and advantages of the present invention clearer, the following detailed description of the embodiments of the present invention will be made in conjunction with the accompanying drawings and examples.
In order to solve the above technical problem, the present invention provides a method for reading and writing off data of an off-board RAM through a CPCI bus, the method is implemented by an off-board data reading and writing module, and the off-board data reading and writing module includes: the CPCI slave device configuration module, the CPCI slave device initialization module, the RAM first address acquisition module, the RAM reading module and the RAM writing module;
as shown in fig. 1, the MPU on the board 1 is a CPCI master device, and the CPCI bridge on the board 2 is a CPCI slave device; the board card 1 is connected with the board card 2 through a CPCI bus; the method is used for realizing the reading and writing of the RAM data on the board card 2 by the board card 1;
the method comprises the following steps:
step 1: the CPCI slave device configuration module configures the CPCI bridge on the board card 2 into CPCI slave devices on a CPCI bus;
step 2: the CPCI slave equipment initialization module initializes CPCI slave equipment according to the sender ID and the equipment ID;
and step 3: the RAM first address obtaining module obtains the RAM space first address of the CPCI slave equipment according to the bus number, the equipment number and the function number;
and 4, step 4: the RAM reading module obtains appointed RAM address unit data of the CPCI slave equipment;
and 5: the write RAM module writes data into a designated RAM address location of the CPCI slave device.
In the method, the RAM is connected to the CPCI bridge, the CPCI bridge is configured to be a slave device on a CPCI bus, and a master device on the CPCI bus performs operations of reading and writing RAM data through the CPCI bridge.
In the step 1, in the process of configuring the CPCI bridge as the CPCI slave device, the Vender ID, the device ID, the subsystem ID and the class number are parameters for configuring the CPCI slave device, and the parameters are written into a configuration chip of the CPCI bridge chip and stored in a device which can be saved after power failure; and connecting the configuration chip with the PCI bridge, and completing the configuration of the PCI bridge through the configuration chip.
In the step 2, in the process of initializing the CPCI slave device, the board card 1 and the board card 2 are two board cards in the embedded device, and communicate through a CPCI bus of the bottom plate; the MPU on the board card 1 runs on an embedded operating system VxWorks, and the equipment is CPCI main equipment on a CPCI bus; the MPU uses the Vender ID and the device ID in step 1 as parameters for searching the CPCI bus device, thereby obtaining the bus number, the device number, and the function number of the CPCI slave device, and completing initialization of the CPCI slave device.
In the step 3, in the process of obtaining the RAM space first address of the CPCI slave device, the RAM and the CPCI slave device, that is, the CPCI bridge are both located on the board card 2, and the RAM is connected to the board card 2, so that the RAM becomes a local memory of the CPCI bus interface; and (3) taking the bus number, the device number and the function number of the CPCI bus slave device obtained in the step (2) as parameters to obtain the first address of the RAM.
In the step 4, in the process of obtaining the data of the specified RAM address unit of the CPCI slave device, that is, reading the RAM, each RAM unit has an absolute address, the absolute address is obtained by adding the offset address to the head address obtained in the step 3, each absolute address corresponds to one RAM unit, and the data of the RAM unit is read through the absolute address.
In the step 5, in the process of writing data into the designated RAM address unit of the CPCI slave device, that is, into the RAM, each RAM unit has an absolute address, the absolute address is obtained by adding the offset address to the head address obtained in the step 3, each absolute address corresponds to one RAM unit, and data is written into the RAM unit through the absolute address.
In addition, the present invention also provides an off-board data read-write module, which is used for implementing the method for reading and writing off-board RAM data through the CPCI bus, and the off-board data read-write module includes: the CPCI slave device configuration module, the CPCI slave device initialization module, the RAM first address acquisition module, the RAM reading module and the RAM writing module;
the CPCI slave device configuration module is used for configuring a CPCI bridge on the board card 2 into CPCI slave devices on a CPCI bus;
the CPCI slave device initialization module is used for initializing CPCI slave devices according to the sender ID and the device ID;
the RAM first address obtaining module is used for obtaining the RAM space first address of the CPCI slave equipment according to the bus number, the equipment number and the function number;
the RAM reading module is used for obtaining the appointed RAM address unit data of the CPCI slave equipment;
the write RAM module is used for writing data into a designated RAM address unit of the CPCI slave device.
In the process that the CPCI slave device configuration module configures the CPCI bridge as the CPCI slave device, the Vender ID, the device ID, the subsystem ID and the class number are parameters for configuring the CPCI slave device, the parameters are written into a configuration chip of the CPCI bridge chip, and the configuration is stored in a device which can be saved after power failure; connecting a configuration chip with the PCI bridge, and completing the configuration of the PCI bridge through the configuration chip;
in the process that the CPCI slave equipment initialization module initializes the CPCI slave equipment, the board card 1 and the board card 2 are two board cards in the embedded equipment and communicate through a CPCI bus of the bottom plate; the MPU on the board card 1 runs on an embedded operating system VxWorks, and the equipment is CPCI main equipment on a CPCI bus; the MPU uses the Vender ID and the device ID in step 1 as parameters for searching the CPCI bus device, thereby obtaining the bus number, the device number, and the function number of the CPCI slave device, and completing initialization of the CPCI slave device.
In the process that the RAM initial address obtaining module obtains the RAM space initial address of the CPCI slave device, the RAM and the CPCI slave device, namely a CPCI bridge, are both positioned on the board card 2 and connected, so that the RAM becomes a local memory of a CPCI bus interface; and (3) taking the bus number, the device number and the function number of the CPCI bus slave device obtained in the step (2) as parameters to obtain the first address of the RAM.
The RAM reading module obtains appointed RAM address unit data of the CPCI slave equipment, namely each RAM unit has an absolute address in the RAM reading process, the absolute address is obtained by adding an offset address to a first address obtained by the RAM first address obtaining module, each absolute address corresponds to one RAM unit, and the RAM unit data are read through the absolute addresses;
and in the process of writing data into a designated RAM address unit of the CPCI slave device, namely, the RAM, each RAM unit has an absolute address which is obtained by adding an offset address to the first address obtained by the RAM first address obtaining module, each absolute address corresponds to one RAM unit, and the data is written into the RAM unit through the absolute address.
Example 1
The embodiment comprises the following steps:
step 1: configuring the CPCI slave device: the vendor ID, the equipment ID, the subsystem ID, the class code number and the like are parameters for configuring the CPCI slave equipment, the parameters are written into a configuration chip of the CPCI bridge chip, and the configuration is stored in a device which can be saved after power failure. And connecting the configuration chip with the PCI bridge, and completing the configuration of the PCI bridge through the configuration chip.
Step 2: the CPCI master device initializes the CPCI slave device: the board card 1 and the board card 2 are two board cards in an embedded device and communicate through a CPCI bus of a bottom board. The MPU on the board card 1 runs on an embedded operating system VxWorks, and the equipment is main equipment on a CPCI bus. The MPU uses the Vender ID and the device ID in step 1 as parameters for searching for the CPCI bus device, thereby obtaining the bus number, the device number, and the function number of the slave device, and completing initialization of the CPCI slave device.
And step 3: obtaining a RAM first address: the RAM and the CPCI slave device (i.e., the CPCI bridge) are both located on the board card 2, and the RAM becomes a local memory of the CPCI bus interface when the RAM and the CPCI slave device are connected. And (3) taking the bus number, the device number and the function number of the CPCI bus slave device obtained in the step (2) as parameters to obtain the first address of the RAM.
And 4, step 4: reading the RAM: each RAM cell has an absolute address obtained by adding the offset address to the first address obtained in step 3. Each absolute address corresponds to one RAM unit, and the data of the RAM units are read through the absolute addresses.
And 5: writing to a RAM: each RAM cell has an absolute address obtained by adding the offset address to the first address obtained in step 3. Each absolute address corresponds to one RAM unit, and data is written into the RAM units through the absolute addresses.
The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.

Claims (10)

1. A method for reading and writing off-board RAM data through a CPCI bus is characterized in that the method is implemented through an off-board data reading and writing module, and the off-board data reading and writing module comprises: the CPCI slave device configuration module, the CPCI slave device initialization module, the RAM first address acquisition module, the RAM reading module and the RAM writing module;
the MPU on the board card 1 is a CPCI master device, and the CPCI bridge on the board card 2 is a CPCI slave device; the board card 1 is connected with the board card 2 through a CPCI bus; the method is used for realizing the reading and writing of the RAM data on the board card 2 by the board card 1;
the method comprises the following steps:
step 1: the CPCI slave device configuration module configures the CPCI bridge on the board card 2 into CPCI slave devices on a CPCI bus;
step 2: the CPCI slave equipment initialization module initializes CPCI slave equipment according to the sender ID and the equipment ID;
and step 3: the RAM first address obtaining module obtains the RAM space first address of the CPCI slave equipment according to the bus number, the equipment number and the function number;
and 4, step 4: the RAM reading module obtains appointed RAM address unit data of the CPCI slave equipment;
and 5: the write RAM module writes data into a designated RAM address location of the CPCI slave device.
2. The method according to claim 1, wherein the RAM is connected to a CPCI bridge, the CPCI bridge is configured as a slave device on the CPCI bus, and a master device on the CPCI bus performs an operation of reading and writing RAM data through the CPCI bridge.
3. The method for reading and writing off the off-board RAM data through the CPCI bus as claimed in claim 1, wherein in the step 1, in the process of configuring the CPCI bridge as the CPCI slave device, the Vender ID, the device ID, the subsystem ID and the class code number are parameters for configuring the CPCI slave device, and these parameters are written into the configuration chip of the CPCI bridge chip, and the configuration is stored in the device which can be saved after power-off; and connecting the configuration chip with the PCI bridge, and completing the configuration of the PCI bridge through the configuration chip.
4. The method for reading and writing the off-board RAM data through the CPCI bus as claimed in claim 3, wherein in the step 2, in the process of initializing the CPCI slave device, the board 1 and the board 2 are two boards in an embedded device, and communicate through the CPCI bus of the backplane; the MPU on the board card 1 runs on an embedded operating system VxWorks, and the equipment is CPCI main equipment on a CPCI bus; the MPU uses the Vender ID and the device ID in step 1 as parameters for searching the CPCI bus device, thereby obtaining the bus number, the device number, and the function number of the CPCI slave device, and completing initialization of the CPCI slave device.
5. The method for reading and writing off the off-board RAM data through the CPCI bus according to claim 4, wherein in the step 3, in the process of obtaining the RAM space head address of the CPCI slave device, the RAM and the CPCI slave device, that is, the CPCI bridge, are both located on the board card 2, and are connected, so that the RAM becomes the local memory of the CPCI bus interface; and (3) taking the bus number, the device number and the function number of the CPCI bus slave device obtained in the step (2) as parameters to obtain the first address of the RAM.
6. The method of claim 5, wherein in the step 4, in the process of obtaining the data of the designated RAM address unit of the CPCI slave device, namely reading the RAM, each RAM unit has an absolute address obtained by adding the offset address to the head address obtained in the step 3, each absolute address corresponds to one RAM unit, and the data of the RAM unit is read by the absolute address.
7. The method for reading and writing off-board RAM data through a CPCI bus as claimed in claim 6, wherein in the step 5, during writing data into designated RAM address units of the CPCI slave device, i.e. into RAM, each RAM unit has an absolute address obtained by adding an offset address to the head address obtained in the step 3, each absolute address corresponds to a RAM unit, and data is written into the RAM unit by the absolute address.
8. An off-board data read-write module for implementing the method for reading and writing off-board RAM data through a CPCI bus according to any one of claims 1 to 7, wherein the off-board data read-write module comprises: the CPCI slave device configuration module, the CPCI slave device initialization module, the RAM first address acquisition module, the RAM reading module and the RAM writing module;
the CPCI slave device configuration module is used for configuring a CPCI bridge on the board card 2 into CPCI slave devices on a CPCI bus;
the CPCI slave device initialization module is used for initializing CPCI slave devices according to the sender ID and the device ID;
the RAM first address obtaining module is used for obtaining the RAM space first address of the CPCI slave equipment according to the bus number, the equipment number and the function number;
the RAM reading module is used for obtaining the appointed RAM address unit data of the CPCI slave equipment;
the write RAM module is used for writing data into a designated RAM address unit of the CPCI slave device.
9. The method for reading and writing off data of an off-board RAM through a CPCI bus according to claim 8, wherein in the process that the CPCI slave device configuration module configures the CPCI bridge as the CPCI slave device, the Vender ID, the device ID, the subsystem ID, and the class number are parameters for configuring the CPCI slave device, and these parameters are written into the configuration chip of the CPCI bridge chip, and the configuration is stored in a device that can be saved when power is off; connecting a configuration chip with the PCI bridge, and completing the configuration of the PCI bridge through the configuration chip;
in the process that the CPCI slave equipment initialization module initializes the CPCI slave equipment, the board card 1 and the board card 2 are two board cards in the embedded equipment and communicate through a CPCI bus of the bottom plate; the MPU on the board card 1 runs on an embedded operating system VxWorks, and the equipment is CPCI main equipment on a CPCI bus; the MPU uses the Vender ID and the device ID in step 1 as parameters for searching the CPCI bus device, thereby obtaining the bus number, the device number, and the function number of the CPCI slave device, and completing initialization of the CPCI slave device.
In the process that the RAM initial address obtaining module obtains the RAM space initial address of the CPCI slave device, the RAM and the CPCI slave device, namely a CPCI bridge, are both positioned on the board card 2 and connected, so that the RAM becomes a local memory of a CPCI bus interface; and (3) taking the bus number, the device number and the function number of the CPCI bus slave device obtained in the step (2) as parameters to obtain the first address of the RAM.
10. The method for reading and writing off-board RAM data through a CPCI bus as claimed in claim 9, wherein said RAM reading module obtains the data of the designated RAM address unit of the CPCI slave device, i.e. during the RAM reading process, each RAM unit has an absolute address obtained by adding an offset address to the head address obtained by said RAM head address obtaining module, each absolute address corresponds to a RAM unit, and the RAM unit data is read through the absolute address;
and in the process of writing data into a designated RAM address unit of the CPCI slave device, namely, the RAM, each RAM unit has an absolute address which is obtained by adding an offset address to the first address obtained by the RAM first address obtaining module, each absolute address corresponds to one RAM unit, and the data is written into the RAM unit through the absolute address.
CN202111144165.2A 2021-09-28 2021-09-28 Method for reading and writing off-board RAM data through CPCI bus and off-board data reading and writing module Pending CN113778925A (en)

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