CN113763969A

CN113763969A - Signal processing system and remote device

Info

Publication number: CN113763969A
Application number: CN202111014783.5A
Authority: CN
Inventors: 卢勇; 李振业
Original assignee: Huizhou Shiwei New Technology Co Ltd
Current assignee: Huizhou Shiwei New Technology Co Ltd
Priority date: 2021-08-31
Filing date: 2021-08-31
Publication date: 2021-12-07
Anticipated expiration: 2041-08-31
Also published as: CN113763969B

Abstract

The application relates to a signal processing system and a remote device. The system comprises a near-end device and a far-end device; the near-end equipment acquires the conversion control request, performs signal conversion processing on the eARC signal according to the conversion control request to obtain a plurality of paths of IIS signals to be decoded, and performs decoding processing on the plurality of paths of IIS signals to be decoded to obtain a plurality of paths of IIS signals to be decoded; the near-end equipment compresses the multi-path decoded IIS signals and outputs multi-path compressed IIS signals; the remote equipment acquires the multi-path compressed IIS signals, decompresses the multi-path compressed IIS signals to obtain multi-path decoded IIS signals, and transmits at least two paths of decoded IIS signals in the multi-path decoded IIS signals to corresponding first load equipment. The multi-channel IIS signals compressed by packaging are decompressed, and the decompressed multi-channel IIS signals are played, so that multi-channel audio control is achieved, long-distance low-distortion audio signal transmission is achieved, and the playing quality of the audio signals is improved.

Description

Signal processing system and remote device

Technical Field

The present application relates to the field of signal processing technologies, and in particular, to a signal processing system and a remote device.

Background

With the development of science and technology, electronic products such as televisions and flat panels are widely used. Electronic products such as televisions, flat panels, etc. may emit sound signals through sound emitting devices such as speakers, horns, etc. With the increasing demand of people for high tone quality and high sound effect of sound signals, electronic products with high sound effect and high tone quality are the development trend in the future.

In the related art, electronic products having speakers or speakers can implement mono audio, and a main board chip such as a television can support mono audio control. However, the quality of the sound signal emitted by the electronic product with monophonic audio is not good.

Disclosure of Invention

In view of the foregoing, it is desirable to provide a signal processing system and a remote device capable of implementing multi-channel audio control of an electronic device.

A signal processing system comprising:

a proximal device configured to:

performing signal conversion processing on the eARC signal to obtain a plurality of paths of IIS signals to be decoded;

decoding the multiple paths of IIS signals to be decoded to obtain multiple paths of decoded IIS signals;

compressing the multi-path decoded IIS signal and outputting a plurality of paths of compressed IIS signals;

a far-end device communicatively coupled to the near-end device, the far-end device configured to:

decompressing the multi-path compressed IIS signal to obtain a multi-path decoded IIS signal;

at least two of the plurality of decoded IIS signals are transmitted to a first load device.

Optionally, the near-end device includes an IIS conversion chip, a main control chip, an IIS decoding chip, and a signal compression chip; the remote device comprises a signal decompression chip;

the IIS conversion chip is respectively connected with the main control chip and the IIS decoding chip, and the IIS decoding chip is respectively connected with the main control chip and the signal compression chip; the signal decompression chip is respectively connected with the signal compression chip and the main control chip;

the main control chip is configured to acquire a conversion control request transmitted by the IIS conversion chip and output an eARC signal to the IIS conversion chip according to the conversion control request;

the IIS conversion chip is configured to transmit a conversion control request to the main control chip, is also configured to acquire an eARC signal, performs conversion processing on the eARC signal and outputs a plurality of paths of IIS signals to be decoded;

the IIS decoding chip is configured to acquire a plurality of paths of IIS signals to be decoded, decode the plurality of paths of IIS signals to be decoded and output a plurality of paths of decoded IIS signals;

the signal compression chip is configured to acquire a plurality of paths of decoded IIS signals, compress the plurality of paths of decoded IIS signals and output a plurality of paths of compressed IIS signals;

the signal decompression chip is configured to acquire the multiple paths of compressed IIS signals, decompress the multiple paths of compressed IIS signals and output at least two paths of decoded IIS signals in the multiple paths of decoded IIS signals to the first load device.

Optionally, the near-end device further includes a signal switch; the input end and the control end of the signal change-over switch are respectively connected with the main control chip, the first output end of the signal change-over switch is connected with the IIS conversion chip, and the second output end of the signal change-over switch is connected with the external eARC equipment;

the main control chip is also configured to transmit a preset switching instruction to the signal switching switch;

the signal change-over switch is configured to obtain a preset change-over instruction, and on-off control is carried out on the first output end and the second output end according to the preset change-over instruction.

Optionally, the multi-path decoded IIS signal is divided into a first type decoded IIS signal and a second type decoded IIS signal;

the IIS decoding chip is used for transmitting the first type of decoding IIS signals to the signal compression chip; the IIS decoding chip is further used for transmitting the second type of decoded IIS signals to the second load device so that the second load device can execute the second type of decoded IIS signals.

Optionally, the IIS decoding chip includes an IIC interface, an IIS input interface, a first IIS output interface, and a second IIS output interface; the IIC interface is connected with the main control chip, the IIS input interface is connected with the IIS conversion chip, the first IIS output interface is connected with the signal compression chip, and the second IIS output interface is connected with the second load device;

the IIS decoding chip is used for acquiring a decoding control signal transmitted by the main control chip through the IIC interface and acquiring a plurality of paths of IIS signals to be decoded transmitted by the IIS conversion chip through the IIS input interface;

the IIS decoding chip is also used for decoding the multi-path IIS signals to be decoded according to the decoding control signals to obtain multi-path decoded IIS signals, transmitting the first type of decoded IIS signals to the signal compression chip through the first IIS output interface and transmitting the second type of decoded IIS signals to the second load equipment through the second IIS output interface.

Optionally, the frequency value of the multi-path compressed IIS signal is greater than the frequency value of the multi-path decoded IIS signal.

Optionally, the main control chip is an SOC chip.

Optionally, the first load device and the second load device are respectively a speaker assembly.

A remote device configured to:

acquiring a multi-path compressed IIS signal of a near-end device in communication connection with a far-end device;

Optionally, the remote device includes a signal decompression chip;

the signal decompression chip is configured to acquire the plurality of paths of compressed IIS signals, decompress the plurality of paths of compressed IIS signals, and output at least two paths of decoded IIS signals in the plurality of paths of decoded IIS signals to the first load device.

One of the above technical solutions has the following advantages and beneficial effects:

in the signal processing system, the near-end device and the far-end device can be in communication connection, the near-end device can acquire the conversion control request, and perform signal conversion processing on the eARC signal according to the conversion control request to obtain multiple paths of IIS signals to be decoded, so that the eARC signal is converted into the IIS signal; the near-end equipment decodes the multiple paths of IIS signals to be decoded to obtain multiple paths of decoded IIS signals, and decoding of the IIS signals is achieved; the near-end equipment can also compress the multi-channel decoding IIS signals and output the multi-channel compression IIS signals, the far-end equipment can obtain the multi-channel compression IIS signals and decompress the multi-channel compression IIS signals to obtain the multi-channel decoding IIS signals, at least two paths of decoding IIS signals of the multi-channel decoding IIS signals are transmitted to corresponding first load equipment, the corresponding decoding IIS signals are executed through the first load equipment, the multi-channel packed and compressed IIS signals are decompressed, the decompressed multi-channel IIS signals are played, multi-channel audio control is achieved, and the playing quality of sound signals is improved. In addition, the multi-path IIS signals are packaged and compressed into high-frequency signals through the near-end equipment, so that the signals can be conveniently transmitted to the far-end equipment in a long-distance and low-distortion mode; the remote equipment decompresses the multi-channel compressed IIS signals, so that the distortion rate of the sound signals in the long-distance transmission process is reduced, and the playing quality of the sound signals is further improved.

Drawings

Fig. 1 is a schematic diagram of a first structure of a signal processing system in an embodiment of the present application.

Fig. 2 is a schematic diagram of a second structure of a signal processing system in an embodiment of the present application.

Fig. 3 is a schematic diagram of a third structure of a signal processing system in an embodiment of the present application.

Fig. 4 is a schematic diagram of a fourth structure of the signal processing system in the embodiment of the present application.

Detailed Description

To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present application are shown in the drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

It will be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element and be integral therewith, or intervening elements may also be present. The terms "one end," "the other end," and the like are used herein for illustrative purposes only.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

In order to solve the problem of poor quality of sound signals emitted by electronic products with single-channel audio in conventional electronic devices, in one embodiment, as shown in fig. 1, a signal processing system is provided, which includes a near-end device 100 and a far-end device 200, wherein the near-end device 100 is configured to: performing signal conversion processing on the eARC signal to obtain a plurality of paths of IIS signals to be decoded; decoding the multiple paths of IIS signals to be decoded to obtain multiple paths of decoded IIS signals; and compressing the multi-path decoded IIS signal and outputting a multi-path compressed IIS signal. A far-end device 200 communicatively coupled to the near-end device 100, the far-end device 200 configured to: decompressing the multi-path compressed IIS signal to obtain a multi-path decoded IIS signal; at least two of the plurality of decoded IIS signals are transmitted to a first load device.

The signal processing system can be applied to electronic equipment capable of playing audio, and the electronic equipment can be but is not limited to a television, a tablet and a computer; the electronic device may also be an audio device having speakers, for example the audio device may be a multi-channel audio device. Illustratively, the near-end device 100 may be integrated in an electronic device, the far-end device 200 and the first load device 300 may be integrated in the same audio device, and the first load device 300 may be a multi-channel speaker assembly. The conversion control request refers to a conversion request instruction for a signal protocol, where the conversion control request may be actively obtained by the near-end device 100, for example, when the near-end device 100 receives a transmission instruction, the conversion control request may be generated; the switching control request may be passively obtained by the near-end device 100, for example, a user may operate the near-end device 100 and transmit the switching control request to the near-end device 100, and the near-end device 100 receives the switching control request. An enarc (Enhanced audio return Channel) signal refers to an audio signal transmitted based on an Enhanced audio return Channel. An IIS (Integrated interface Sound) signal refers to an audio signal transmitted based on the IIS bus interface standard. The multiple IIS signals to be decoded refer to signals with several IIS signals not decoded, for example, the multiple IIS signals to be decoded may include 4 IIS signals to be decoded. The multi-decoded IIS signal refers to the IIIS signal having several decodes, e.g., the multi-decoded IIS signal may include 4 decoded IIS signals. The multi-compressed IIS signal refers to a multi-packet compressed IIS signal, for example, the multi-compressed IIS signal may include 3 compressed IIS signals.

For example, the near-end device 100 may obtain a conversion control request based on a user operation, and perform an arc protocol to IIS protocol conversion process on the received arc signal according to the obtained conversion control request, thereby obtaining multiple paths of IIS signals to be decoded, and implementing conversion of the signals of the arc protocol into the signals of the IIS protocol. The near-end device 100 decodes the multiple channels of decoded IIS signals to obtain multiple channels of decoded IIS signals, and the near-end device 100 may compress the multiple channels of decoded IIS signals, output multiple channels of compressed IIS signals, and transmit the multiple channels of compressed IIS signals to the far-end device 200. In addition, the near-end device 100 may also transmit at least 1 IIS signal of the multiple decoded IIS signals to the eARC device, and directly execute the IIS signal through the eARC device; the near-end device 100 may further compress at least 1 IIS signal of the multiple decoded IIS signals, and transmit the compressed IIS signal to the far-end device 200, thereby implementing audio control on the multiple IIS signals, i.e., implementing multi-channel audio control. The far-end device 200 may establish a connection relationship with the near-end device 100 in advance, and then the far-end device 200 may obtain the multiple paths of compressed IIS signals, decompress the multiple paths of compressed IIS signals to obtain multiple paths of decoded IIS signals, transmit at least two paths of decoded IIS signals in the multiple paths of decoded IIS signals to the corresponding first load device 300, and then the first load device 300 executes the corresponding decoded IIS signals, thereby implementing low-distortion playing of the corresponding audio signals.

In the signal processing system, the multi-channel audio is controlled by performing processing such as conversion, decoding, packing and compression on the eARC signal, and the problem that the multi-channel audio (such as 7.1.2 channels) cannot be supported by a main board chip of the existing equipment is solved; in addition, the decoded IIS signals are compressed, integrated and packaged and then transmitted, so that long-distance low-distortion audio transmission is realized, the problem of long-distance audio transmission distortion is solved, and the playing quality of the audio signals is improved.

To further explain the circuit processing manner of performing conversion, decoding, and packet compression using the etarc signal, so as to control the multi-channel audio, reduce the distortion of the long-distance transmission audio, and improve the playing quality of the audio signal, for example, as shown in fig. 2, the near-end device 100 includes an IIS conversion chip 110, a main control chip 120, an IIS decoding chip 130, and a signal compression chip 140; the remote device 200 includes a signal decompression chip 210.

The IIS conversion chip 110 is respectively connected with the main control chip 120 and the IIS decoding chip 130, and the IIS decoding chip 130 is respectively connected with the main control chip 120 and the signal compression chip 140; the signal decompression chip 210 is respectively connected with the signal compression chip 140 and the main control chip 120; the main control chip 120 is configured to obtain a conversion control request transmitted by the IIS conversion chip 110, and output an earrc signal to the IIS conversion chip 110 according to the conversion control request; the IIS conversion chip 110 is configured to transmit a conversion control request to the main control chip 120, and is further configured to acquire an eabr signal, perform conversion processing on the eabr signal, and output multiple paths of IIS signals to be decoded; the IIS decoding chip 130 is configured to acquire multiple paths of IIS signals to be decoded, decode the multiple paths of IIS signals to be decoded, and output multiple paths of decoded IIS signals; the signal compression chip 140 is configured to obtain the multiple channels of decoded IIS signals, compress the multiple channels of decoded IIS signals, and output multiple channels of compressed IIS signals; the signal decompression chip 210 is configured to obtain the multiple paths of compressed IIS signals, decompress the multiple paths of compressed IIS signals, and output the multiple paths of decoded IIS signals to a load device.

The IIS conversion chip 110 converts the eARC signal into a plurality of IIS signals to be decoded. The IIS conversion chip 110 may include a MUX (multiplexer) device including a multi-output terminal, for example, the multi-output terminal may include a serial bit time terminal (i.e., IIS _ BCK terminal), a left and right channel selection terminal (i.e., IIS _ LRCK terminal), and a 4-way serial DATA output terminal (i.e., 4-way IIS _ DATA terminal). The multi-path output end of the MUX device is connected to the IIS decoding chip 130, and the IIS conversion chip 110 can transmit the output 4 IIS signals to be decoded to the IIS decoding chip 130. The IIS conversion chip 110 further includes a first PLL (Phase Locked Loop) device, and the first PLL device may be externally connected to a reference frequency of 24 MHz. Illustratively, the IIS conversion chip 110 may be an EP9511 type IIS conversion chip 110.

The IIS decoding chip 130 may be configured to decode the obtained multiple IIS signals to be decoded, and output multiple decoded IIS signals. For example, the IIS decoding chip 130 may decode the received 4 IIS signals to be decoded to obtain 4 decoded IIS signals. Illustratively, the IIS decoding chip 130 may be an IIS conversion chip 110 of MT8158S type. The signal compressing chip 140 is used for performing a packet compression process on the multiple decoded IIS signals to obtain multiple compressed IIS signals. For example, the signal compression chip 140 packs and compresses the IIS signal into a high-frequency Irealone signal, and transmits the Irealone signal to the signal decompression chip 210 of the remote device 200, thereby reducing the distortion degree when the Irealone signal is transmitted over a long distance. The signal decompressing chip 210 may be configured to decompress the multiple channels of compressed IIS signals to obtain multiple channels of decoded IIS signals, and further may transmit at least two channels of decoded IIS signals in the multiple channels of decoded IIS signals to the first load device 300, and execute the multiple channels of decoded IIS signals through the first load device 300, thereby implementing low-distortion and high-quality audio playing. Illustratively, the main control Chip 120 is an SOC (System on Chip) Chip.

For example, the IIS conversion chip 110 based on the near-end device 100 is respectively connected to the main control chip 120 of the near-end device 100 and the IIS decoding chip 130 of the near-end device 100, and the IIS decoding chip 130 of the near-end device 100 is respectively connected to the main control chip 120 of the near-end device 100 and the signal compression chip 140 of the near-end device 100; the signal decompression chip 210 of the far-end device 200 is respectively connected to the signal compression chip 140 of the near-end device 100 and the main control chip 120 of the near-end device 100; the IIS conversion chip 110 may transmit a conversion control request to the main control chip 120, and the main control chip 120 may further obtain the conversion control request and output an etarc signal to the IIS conversion chip 110 according to the conversion control request; the IIS conversion chip 110 acquires the etarc signal, performs conversion processing on the etarc signal, outputs multiple paths of IIS signals to be decoded, and converts the etarc signal into an IIS signal; the IIS decoding chip 130 acquires a plurality of paths of IIS signals to be decoded, decodes the plurality of paths of IIS signals to be decoded, outputs a plurality of paths of decoded IIS signals and realizes decoding of the IIS signals; the signal compression chip 140 acquires the multiple channels of decoded IIS signals, compresses the multiple channels of decoded IIS signals, outputs the multiple channels of compressed IIS signals, and packs and compresses the multiple channels of IIS signals into high-frequency signals so as to transmit the signals to the remote device 200 in a long-distance and low-distortion manner; the signal decompressing chip 210 obtains the multiple channels of compressed IIS signals, decompresses the multiple channels of compressed IIS signals, outputs the multiple channels of decoded IIS signals to the first load device 300, and executes the corresponding decoded IIS signals through the first load device 300 to decompress the packed and compressed multiple channels of IIS signals and play the decompressed multiple channels of IIS signals, thereby realizing the multi-channel audio control and the long-distance low-distortion audio signal transmission and improving the playing quality of the audio signals.

To improve the diversity processing of the arc signal, the near-end device 100 further includes a signal switch 150, as shown in fig. 3; the input end and the control end of the signal switch 150 are respectively connected to the main control chip 120, the first output end of the signal switch 150 is connected to the IIS conversion chip 110, and the second output end of the signal switch 150 is connected to the external enarc device 400. The main control chip 120 is further configured to transmit a preset switching instruction to the signal switch 150; the signal switch 150 is configured to obtain a preset switching instruction, and perform on-off control on the first output terminal and the second output terminal according to the preset switching instruction.

The external enarc device 400 may be a device capable of receiving and processing an enarc signal, for example, the external enarc device 400 may receive the enarc signal through the HDMI interface. The signal switch 150 includes an input terminal, a control terminal, a first output terminal, and a second output terminal. The input terminal of the signal switch 150 may be connected to the arc port of the main control chip 120, and the arc port may be used to output an arc + signal or an arc-signal to the signal switch 150. The control end of the signal switch 150 is connected to the etarc _ SW port of the main control chip 120, and the etarc _ SW port may be configured according to system software to implement switching control on the signal switch 150, for example, when both the corresponding enable end and the input end of the main control chip 120 are at a low level, the signal switch 150 transmits an S1 signal to the signal switch 150, and then the signal switch 150 switches on the second output end according to the S1 signal, so that the signal switch 150 transmits the obtained etarc signal (i.e., the etarc + signal or the etarc-signal) to the external etarc device 400; if the corresponding enable terminal of the main control chip 120 is at a low level and the input terminal is at a high level, the signal switch 150 transmits an S2 signal to the signal switch 150, and the signal switch 150 switches on the first output terminal according to the S2 signal, so that the signal switch 150 transmits the acquired etarc signal (i.e., the etarc + signal or the etarc-signal) to the IIS conversion chip 110. Illustratively, the signal switch 150 may be a TS3V330 model signal switch 150.

To improve the diversity processing of the decoded IIS signals, illustratively, as shown in fig. 4, the multi-path decoded IIS signals are divided into first-type decoded IIS signals and second-type decoded IIS signals. The IIS decoding chip 130 is used for transmitting the first type of decoded IIS signals to the signal compression chip 140; the IIS decoding chip 130 is further configured to transmit the second type-decoded IIS signal to the second load device 500, so that the second load device 500 performs the second type-decoded IIS signal.

Wherein the second load device 500 may be a mono or multi-channel speaker assembly. The first type of decoded IIS signal may include at least one IIS decoded signal and the second type of decoded IIS signal may include at least one IIS decoded signal. For example, the 4-way decoded IIS signals may be divided into a first type of decoded IIS signals including 3-way IIS signals and a second type of decoded IIS signals including 1-way IIS signals.

The IIS decoding chip 130 decodes the multiple IIS signals to be decoded, transmits the decoded first decoded IIS signals (such as IIS _ D0 signals, IIS _ D1 signals, and IIS _ D2 signals) to the signal compression chip 140, compresses the first decoded IIS signals by the signal compression chip 140, transmits the compressed IIS signals (such as Irealone0 signals) to the remote device 200, decompresses the IIS signals (such as Irealone0 signals) by the signal decompression chip 210 of the remote device 200, and plays the decompressed multiple IIS signals (such as IIS _ D0 signals, IIS _ D1 signals, and IIS _ D2 signals), thereby implementing multi-channel audio control, long-distance low-distortion audio signal transmission, and improving the playing quality of the audio signals. In addition, the IIS decoding chip 130 may also directly transmit the decoded second type decoded IIS signal (e.g., IIS _ D3 signal) to the second load device 500, and perform the corresponding decoded IIS signal (e.g., IIS _ D3 signal) through the second load device 500, thereby implementing multi-channel audio diversity control.

Illustratively, the IIS decoding chip 130 includes an IIC interface, an IIS input interface, a first IIS output interface, and a second IIS output interface; the IIC interface is connected to the main control chip 120, the IIS input interface is connected to the IIS conversion chip 110, the first IIS output interface is connected to the signal compression chip 140, and the second IIS output interface is connected to the second load device 500. The IIS decoding chip 130 is configured to obtain the decoding control signal transmitted by the main control chip 120 through the IIC interface, and obtain multiple paths of IIS signals to be decoded transmitted by the IIS conversion chip 110 through the IIS input interface; the IIS decoding chip 130 is further configured to decode the multiple IIS signals to be decoded according to the decoding control signal to obtain multiple decoded IIS signals, transmit the first type of decoded IIS signals to the signal compression chip 140 through the first IIS output interface, and transmit the second type of decoded IIS signals to the second load device 500 through the second IIS output interface.

The IIC interface of the IIS decoding chip 130 may include an SCL signal line (i.e., a clock line) and an SDA signal line (i.e., a data line), among others. The IIC interface of the IIS decoding chip 130 is connected to the main control chip 120, so as to establish a communication connection between the main control chip 120 and the IIS decoding chip 130, and enable the main control chip 120 to transmit the decoding control signal to the IIC interface of the IIS decoding chip 130. The IIS input interface of the IIS decoding chip 130 may be an IIS interface, and the IIS input interface may include a BCK signal line (i.e., a serial bit time signal line), an LRCK signal line (i.e., left and right channel selection signal lines), and a 4-way DATA signal line (i.e., a serial DATA signal line). The IIS input interface of the IIS decoding chip 130 IS connected to the IIS conversion chip 110, and the IIS input interface of the IS decoding chip can acquire multiple paths of IIS signals to be decoded transmitted by the IIS conversion chip 110, so that the IIS decoding chip 130 decodes the multiple paths of IIS signals to be decoded according to the decoding control signal to obtain multiple paths of decoded IIS signals.

The first IIS output interface of the IIS decoding chip 130 may include a BCK signal line (i.e., a serial bit time signal line), an LRCK signal line (i.e., left and right channel selection signal lines), and a 3-way DATA signal line (i.e., a serial DATA signal line, D0, D1, D2 signal lines). The signal compression chip 140 is connected through the first IIS output interface of the IIS decoding chip 130, and then 3 decoded IIS signals are transmitted to the signal compression chip 140 through the first IIS output interface of the IIS decoding chip 130.

The second IIS output interface of the IIS decoding chip 130 may include a BCK signal line (i.e., a serial bit time signal line), an LRCK signal line (i.e., left and right channel selection signal lines), and a 1-way DATA signal line (i.e., a serial DATA signal line, D3 signal line). The second load device 500 is connected through the second IIS output interface of the IIS decoding chip 130, and then 1 channel of decoded IIS signals is transmitted to the second load device 500 through the second IIS output interface of the IIS decoding chip 130, and the corresponding decoded IIS signals are played through the second load device 500. Wherein the second load device 500 may include a first power amplifying module (AMP1) and a left and right surrounding speaker module.

Illustratively, the IIS decoding chip 130 further includes a phase-locked loop module externally connected to a reference frequency of 26 MHz. The IIS decoding chip 130 further includes a DDR (double data rate synchronous dynamic random access memory) Interface, a Flash (a memory device) Interface, and an SPI Interface (Serial Peripheral Interface). The IIS decoding chip 130 is connected to the SPI interface of the main control chip 120 through the SPI interface, the SPI interface of the main control chip 120 is used as a master device, the SPI interface of the IIS decoding chip 130 decodes a slave device, and the main control chip 120 can control or upgrade the IIS decoding chip 130 through the SPI interface. The IIS decoding chip 130 can be externally connected with a DDR memory device through a DDR interface, the IIS decoding chip 130 can be externally connected with a Flash memory device through a Flash interface, and then the DDR memory device and the Flash memory device can be used for storing an execution program and processed data.

To further improve the fidelity of the IIS signal over long distances, the frequency value of the multi-path compressed IIS signal is illustratively greater than the frequency value of the multi-path decoded IIS signal. That is, the signal compression chip 140 packs and compresses the multiple channels of decoded IIS signals into high-frequency multiple channels of compressed IIS signals (i.e., high-frequency Irealone0 signals), and transmits the high-frequency multiple channels of compressed IIS signals to the signal decompression signal of the remote device 200, thereby realizing long-distance low-distortion audio signal transmission and improving the playing quality of the audio signals.

Illustratively, the signal compression chip 140 may include an SPI interface, an Irealone0 interface, an IIC interface, and a GPIO interface (General-purpose input/output interface). The signal decompression chip 210 may include an SPI interface, an Irealone0 interface, an IIC interface, a GPIO interface, and an IIS interface. The SPI interface of the signal compression chip 140 is used to connect a Flash memory device. The Irealone0 interface of the signal compression chip 140 is used to connect to the Irealone0 interface of the signal decompression chip 210, and the Irealone0 interface of the signal compression chip 140 can transmit the multiple compressed IIS signals to the signal decompression chip 210. The IIC interface (including the SDA signal line and the ACL signal line) of the signal compression chip 140 is used to connect the IIC interface of the signal decompression chip 210, and further an IIC bus connection relationship is established between the signal compression chip 140 and the signal decompression chip 210; the GPIO interface (including the HPD signal line) of the signal compression chip 140 is used to connect with the GPIO interface of the signal decompression chip 210. The IIC interface of the signal decompression chip 210 is further used to connect the main control chip 120, and an IIC bus connection relationship is established between the main control chip 120 and the signal decompression chip 210. The IIS interface (including the BCK signal line, the LRCK signal line, and the 4 DATA signal lines (i.e., the D0, D1, D2, D3 signal lines)) of the signal decompression chip 210 is used to connect to the first load device 300, and then the first load device 300 executes the corresponding decoded IIS signal, so as to realize the low-distortion playing of the corresponding audio signal, thereby improving the playing quality of the audio signal.

For example, as shown in fig. 4, the first load device 300 may include a second power amplifying module (AMP2), a third power amplifying module (AMP3), a fourth power amplifying module (AMP4), a fifth power amplifying module (AMP5), a sixth power amplifying module (AMP 6); the first load device 300 further includes a center speaker module connected to the second power amplification module, a first left-right sound channel speaker module connected to the third power amplification module, a second left-right sound channel speaker module connected to the fourth power amplification module, a first left-right upper surround speaker module connected to the fifth power amplification module, and a second left-right upper surround speaker module connected to the sixth power amplification module.

To illustrate the processing of the multi-path compressed IIS signal to reduce the distortion rate of the audio signal after long distance transmission, there is provided, for example, a remote device configured to:

acquiring a multi-path compressed IIS signal of a near-end device in communication connection with a far-end device; decompressing the multi-path compressed IIS signal to obtain a multi-path decoded IIS signal; at least two of the plurality of decoded IIS signals are transmitted to a first load device.

The far-end device can establish a communication connection relationship with the near-end device in advance, and then the far-end device can obtain the multi-path compressed IIS signals, decompress the multi-path compressed IIS signals to obtain the multi-path decoded IIS signals, transmit at least two paths of decoded IIS signals in the multi-path decoded IIS signals to corresponding first load devices, and then the first load devices 300 execute the corresponding decoded IIS signals to realize low-distortion playing of the corresponding audio signals.

Illustratively, the remote device includes a signal decompression chip; the signal decompression chip is configured to acquire the plurality of paths of compressed IIS signals, decompress the plurality of paths of compressed IIS signals, and output at least two paths of decoded IIS signals in the plurality of paths of decoded IIS signals to the first load device.

The signal decompression chip can be used for decompressing the multi-path compressed IIS signals to obtain multi-path decoded IIS signals, and further can transmit at least two paths of decoded IIS signals in the multi-path decoded IIS signals to the first load device, and the multi-path decoded IIS signals are executed through the first load device, so that low-distortion and high-quality audio playing is achieved.

In the far-end equipment, the multi-path compressed IIS signals obtained by compressing, integrating and packaging the decoded IIS signals through the near-end equipment are obtained, the multi-path compressed IIS signals are decompressed to obtain the multi-path decoded IIS signals, and then at least two paths of decoded IIS signals in the multi-path decoded IIS signals can be transmitted to the first load equipment, so that long-distance low-distortion audio transmission is realized, the problem of long-distance audio transmission distortion is solved, and the playing quality of the audio signals is improved.

The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.

The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the claims. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims

1. A signal processing system, comprising:

a proximal device configured to:

a far-end device communicatively coupled with the near-end device, the far-end device configured to:

decompressing the multi-path compressed IIS signal to obtain the multi-path decoded IIS signal;

and transmitting at least two paths of the multi-path decoded IIS signals to a first load device.

2. The signal processing system of claim 1, wherein the near-end device comprises an IIS conversion chip, a main control chip, an IIS decoding chip and a signal compression chip; the remote device comprises a signal decompression chip;

the IIS conversion chip is configured to transmit the conversion control request to the main control chip, and is further configured to acquire the eARC signal, perform conversion processing on the eARC signal, and output the multiple paths of IIS signals to be decoded;

the IIS decoding chip is configured to acquire the multiple paths of IIS signals to be decoded, decode the multiple paths of IIS signals to be decoded and output the multiple paths of IIS signals to be decoded;

the signal compression chip is configured to acquire the multi-path decoded IIS signals, compress the multi-path decoded IIS signals and output the multi-path compressed IIS signals;

the signal decompression chip is configured to acquire the multiple paths of compressed IIS signals, decompress the multiple paths of compressed IIS signals, and output at least two paths of decoded IIS signals in the multiple paths of decoded IIS signals to the first load device.

3. The signal processing system of claim 2, wherein the near-end device further comprises a signal switch; the input end and the control end of the signal change-over switch are respectively connected with the main control chip, the first output end of the signal change-over switch is connected with the IIS conversion chip, and the second output end of the signal change-over switch is connected with external eARC equipment;

the signal switch is configured to obtain the preset switching instruction, and perform on-off control on the first output end and the second output end according to the preset switching instruction.

4. The signal processing system of claim 3 wherein the plurality of decoded IIS signals are divided into first type decoded IIS signals and second type decoded IIS signals;

the IIS decoding chip is used for transmitting the first type of decoding IIS signals to the signal compression chip; the IIS decoding chip is further used for transmitting the second type of decoded IIS signals to a second load device, so that the second load device executes the second type of decoded IIS signals.

5. The signal processing system of claim 4, wherein the IIS decoding chip comprises an IIC interface, an IIS input interface, a first IIS output interface, and a second IIS output interface; the IIC interface is connected with the main control chip, the IIS input interface is connected with the IIS conversion chip, the first IIS output interface is connected with the signal compression chip, and the second IIS output interface is connected with the second load device;

the IIS decoding chip is used for acquiring the decoding control signal transmitted by the main control chip through the IIC interface and acquiring the multi-channel IIS signal to be decoded transmitted by the IIS conversion chip through the IIS input interface;

the IIS decoding chip is further used for decoding the multiple paths of IIS signals to be decoded according to the decoding control signal to obtain the multiple paths of decoded IIS signals, transmitting the first type of decoded IIS signals to the signal compression chip through the first IIS output interface, and transmitting the second type of decoded IIS signals to the second load equipment through the second IIS output interface.

6. The signal processing system of claim 5 wherein the frequency value of the multi-path compressed IIS signal is greater than the frequency value of the multi-path decoded IIS signal.

7. The signal processing system according to any one of claims 1 to 6, wherein the main control chip is an SOC chip.

8. The signal processing system of claim 7, wherein the first load device and the second load device are each a speaker assembly.

9. A remote device, configured to:

acquiring a multi-path compressed IIS signal of a near-end device in communication connection with the far-end device;

10. The remote device of claim 9, wherein the remote device comprises a signal decompression chip;