CN113760614B - Test control device and test system of PCIE expansion card - Google Patents

Test control device and test system of PCIE expansion card Download PDF

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Publication number
CN113760614B
CN113760614B CN202110873216.9A CN202110873216A CN113760614B CN 113760614 B CN113760614 B CN 113760614B CN 202110873216 A CN202110873216 A CN 202110873216A CN 113760614 B CN113760614 B CN 113760614B
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expansion card
pins
pcie expansion
pcie
control module
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CN113760614A (en
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赵胜
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Zhengzhou Yunhai Information Technology Co Ltd
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Zhengzhou Yunhai Information Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/221Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2273Test methods
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026PCI express

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

The application discloses a test control device and a test system of a PCIE expansion card.A control command generation module firstly generates a control command, the control command comprises a transmission rate to be tested and configuration to be tested of the transmission rate to be tested, a first logic control module generates pulse signals with corresponding quantity based on the control command and a corresponding relation between preset transmission rate configuration and pulse quantity, and the pulse signals are sent to RX pins of the PCIE expansion card corresponding to the output pins one by one through output pins of the first logic control module so that the TX pins of the PCIE expansion card corresponding to the RX pins one by one output corresponding PCIE signals. Through the device, the automatic switching of the PCIE transmission rate and configuration of the PCIE expansion card is realized, the working efficiency and the accuracy are improved, and the consistency test of PCIE signals output by the TX pins of the PCIE expansion card is facilitated.

Description

Test control device and test system of PCIE expansion card
Technical Field
The application relates to the field of computer expansion cards, in particular to a test control device and a test system of a PCIE expansion card.
Background
With the development of computer technology, when the capacity of a hard disk configured on a computer cannot meet the requirement, the computer is usually matched with a PCIE (Peripheral Component Interconnect Express, high-speed serial computer expansion bus standard) expansion card, so that the storage capacity is expanded. At present, the transmission rate of PCIE is updated from 1.0 to 5.0, and in order to ensure the transmission quality of signals, a consistency test needs to be performed on a PCIE signal corresponding to a TX (transmit) pin output of a PCIE expansion card. At present, a CBB (Compliance Base Board, compatibility base board) test fixture is used to switch the transmission rate and configuration of PCIE for a PCIE expansion card, and in the prior art, a pulse signal needs to be manually generated by a button or a key to complete switching of multiple configurations of PCIE 1.0-4.0. For example, when testing configuration 7 of PCIE4.0, 21 pulse signals are generated by manually pressing a button or key 21 times, which has problems of large workload and high switching error rate.
Disclosure of Invention
The application aims to provide a test control device and a test system for a PCIE expansion card, which realize automatic switching of PCIE transmission rate and configuration of the PCIE expansion card, improve working efficiency and accuracy and facilitate consistency test of PCIE signals output by TX pins of the PCIE expansion card.
In order to solve the above technical problems, the present application provides a test control device for a PCIE expansion card, including:
the control command generation module is used for generating a control command, wherein the control command comprises a transmission rate to be tested and a configuration to be tested of the transmission rate to be tested;
the first logic control module is used for generating pulse signals with corresponding quantity based on the control command and the corresponding relation between the preset transmission rate configuration and the pulse quantity, and sending the pulse signals to RX pins of the PCIE expansion card corresponding to the output pins one by one through the output pins of the first logic control module so that the corresponding PCIE signals are output by the TX pins of the PCIE expansion card corresponding to the RX pins one by one.
Preferably, the PCIE expansion card includes N RX pins, where N is an integer not less than 2; the N output pins of the first logic control module are connected with the N RX pins of the PCIE expansion card in a one-to-one correspondence manner;
sending the pulse signal to the RX pins of the PCIE expansion card corresponding to the output pins one to one through the output pins of the first logic control module, including:
and sequentially sending the pulse signals to N RX pins of the PCIE expansion card corresponding to the output pins one by one according to a preset sequence through the N output pins of the first logic control module.
Preferably, the control command generating module is specifically configured to periodically send the control command; the control commands of adjacent two cycles are different.
Preferably, the control command further includes a TX pin to be tested of the PCIE expansion card;
sending the pulse signal to the RX pins of the PCIE expansion card corresponding to the output pins one to one through the output pins of the first logic control module, including:
and sending the pulse signals to RX pins of the PCIE expansion card, which are in one-to-one correspondence with the TX pins to be tested, through the output pins of the first logic control module, which are in one-to-one correspondence with the TX pins to be tested.
Preferably, the control command generating module includes:
the trigger module is used for generating a trigger signal;
and the BMC is used for generating a control command based on the trigger signal.
Preferably, the method further comprises:
the power module is used for supplying power to the PCIE expansion card;
the first logic control module is further configured to send a first level to the PCIE expansion card when the first logic control module powers on itself; when an in-place signal generated after the PCIE expansion card is powered on is detected, a second level is sent to the PCIE expansion card so as to control the PCIE expansion card to enter a working state; the first level and the second level are opposite.
Preferably, the method further comprises:
the second logic control module is used for determining the standard quantity of the pulse signals based on the control command and the corresponding relation between the preset transmission rate configuration and the pulse quantity; collecting the actual number of the pulse signals output by the output pins of the first logic control module, which are in one-to-one correspondence with the collecting pins of the first logic control module, judging whether the actual number of the pulse signals is consistent with the standard number of the pulse signals, and if so, judging that the actual number of the pulse signals output by the output pins of the first logic control module is correct; and if the pulse signals are inconsistent, judging that the actual number of the pulse signals output by the output pins of the first logic control module is wrong.
Preferably, the second logic control module is further configured to send a reset signal to the PCIE expansion card when determining that the actual number of the pulse signals output by the output pins of the first logic control module is wrong.
Preferably, the method further comprises:
the input end of the prompting module is connected with the output end of the second logic control module and is used for prompting a judging result of whether the actual number of the pulse signals is consistent with the standard number of the pulse signals.
In order to solve the technical problem, the application also provides a test system of the PCIE expansion card, including the test control device of the PCIE expansion card, further including:
and the test control device is connected with the test module and is used for outputting corresponding PCIE signals based on the TX pins of the PCIE expansion card to perform consistency test.
The application discloses a test control device and a test system of a PCIE expansion card.A control command generation module firstly generates a control command, the control command comprises a transmission rate to be tested and configuration to be tested of the transmission rate to be tested, a first logic control module generates pulse signals with corresponding quantity based on the control command and a corresponding relation between preset transmission rate configuration and pulse quantity, and the pulse signals are sent to RX pins of the PCIE expansion card corresponding to the output pins one by one through output pins of the first logic control module so that the TX pins of the PCIE expansion card corresponding to the RX pins one by one output corresponding PCIE signals. Through the device, the control command generating module, the first logic control module and the PCIE expansion card are interconnected, so that the automatic switching of the PCIE transmission rate and configuration of the PCIE expansion card is realized, the working efficiency and the accuracy are improved, and the consistency test of PCIE signals output by the TX pins of the PCIE expansion card is facilitated.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required in the prior art and the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a test control device of a PCIE expansion card according to the present application;
fig. 2 is a schematic structural diagram of another test control device for PCIE expansion cards according to the present application;
fig. 3 is a working flow chart of a test control device of a PCIE expansion card provided by the application;
fig. 4 is a schematic structural diagram of a test system of a PCIE expansion card according to the present application.
Detailed Description
The application has the core of providing a test control device and a test system for PCIE expansion cards, realizing automatic switching of PCIE transmission rate and configuration of the PCIE expansion cards, improving working efficiency and accuracy, and facilitating consistency test of PCIE signals output by TX pins of the PCIE expansion cards.
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a test control device for a PCIE expansion card according to the present application.
The application provides a test control device of PCIE expansion card, comprising:
the control command generation module 1 is used for generating a control command, wherein the control command comprises a transmission rate to be tested and a configuration to be tested of the transmission rate to be tested;
the first logic control module 2 is configured to generate a corresponding number of pulse signals based on the control command and a corresponding relation between the preset transmission rate configuration and the pulse number, and send the pulse signals to the RX pins of the PCIE expansion card corresponding to the output pins one by one through the output pins of the first logic control module 2, so that the TX pins of the PCIE expansion card corresponding to the RX pins one by one output corresponding PCIE signals.
Considering that when switching the transmission rate and configuration of the PCIE expansion card, the manner of manually pressing a button or a key to generate a pulse signal has a large workload and a high switching error rate, in order to solve the technical problem, the application provides a test control device for the PCIE expansion card, which comprises a control command generating module 1 and a first logic control module 2.
Specifically, the first logic control module 2 stores a correspondence between a transmission rate configuration and the number of pulses in advance, and when the transmission rate and/or the configuration are different, the number of pulses generated by the first logic control module 2 is also different. When receiving the pulse signals, the RX pins of the PCIE expansion card output corresponding PCIE signals through the TX pins corresponding to the RX pins based on the number of the pulse signals. Based on this, when the test control device of the PCIE expansion card works, the control command generating module 1 first generates a control command, where the control command includes a transmission rate to be tested and a configuration to be tested of the transmission rate to be tested. The first logic control module 2 generates a corresponding number of pulse signals based on the control command and the corresponding relation between the preset transmission rate configuration and the pulse number, and sends the pulse signals to the RX (Receive) pins of the PCIE expansion card corresponding to the output pins one by one through the output pins of the first logic control module 2, so that the TX pins of the PCIE expansion card corresponding to the RX pins one by one output corresponding PCIE signals.
The transmission rate to be tested can be 1 to 5.0 PCIE, 1 is configured to be tested of PCIE1.0, 2 is configured to be tested of PCIE2.0, 11 is configured to be tested of PCIE3.0 and PCIE4.0, and the configuration to be tested can be any configuration under the transmission rate to be tested.
For example, the control command generated by the control command generating module 1 includes a configuration 7 of PCIE4.0, where the transmission rate to be tested is PCIE4.0, and the configuration to be tested of the transmission rate to be tested is PCIE4.0, and the first logic control module 2 generates 21 pulse signals based on the control command and a corresponding relation between preset transmission rate configurations and pulse numbers, and sends the 21 pulse signals to RX pins of the PCIE expansion card corresponding to the output pins one by one through output pins of the first logic control module 2, so that the TX pins of the PCIE expansion card corresponding to the RX pins one by one output corresponding PCIE signals.
In addition, the CBB jig is provided with a slot, and the PCIE expansion card may be disposed on the slot, which has the advantages of simple and convenient insertion and removal, easy replacement, and the like, and the present application is not limited in particular herein.
PCIE expansion cards may be, but are not limited to, FC (Fibre Channel) cards, compression cards, NVME (Non-Volatile Memory Express, nonvolatile memory host controller interface specification) cards, SAS (Serial Attached SCSI ) cards.
The first logic control module 2 may be, but is not limited to, a CPLD (Complex Programmable Logic Device ).
In summary, according to the test control device for the PCIE expansion card, the control command generating module 1, the first logic control module 2 and the PCIE expansion card are interconnected, so that automatic switching of transmission rate and configuration of PCIE of the PCIE expansion card is realized, and working efficiency and accuracy are improved.
Based on the above embodiments:
as a preferred embodiment, the PCIE expansion card includes N RX pins, where N is an integer not less than 2; the N output pins of the first logic control module 2 are correspondingly connected with the N RX pins of the PCIE expansion card one by one;
sending a pulse signal to RX pins of the PCIE expansion card corresponding to the output pins one by one through the output pins of the first logic control module 2, wherein the method comprises the following steps:
pulse signals are sequentially sent to N RX pins of the PCIE expansion card corresponding to the output pins one by one through N output pins of the first logic control module 2 according to a preset sequence.
The PCIE expansion card comprises N RX pins, wherein N is an integer not smaller than 2, and N output pins of the first logic control module 2 are in one-to-one correspondence connection with N RX pins of the PCIE expansion card; in order to realize the transmission of pulse signals to all the RX pins of the PCIE expansion card, in this embodiment, the first logic control module 2 sequentially sends pulse signals to the N RX pins of the PCIE expansion card corresponding to the output pins one to one according to a preset sequence through the N output pins. The predetermined sequence may be from the 1 st output pin to the nth output pin, or may be from the nth output pin to the 1 st output pin, and the present application is not limited thereto. For example, the first logic control module 2 sends a pulse signal to the 1 st RX pin of the PCIE expansion card corresponding to the 1 st output pin, then the 2 nd output pin of the first logic control module 2 sends a pulse signal to the 2 nd RX pin of the PCIE expansion card corresponding to the 2 nd output pin, … …, and finally the nth output pin of the first logic control module 2 sends a pulse signal to the nth RX pin of the PCIE expansion card corresponding to the nth output pin, so that full channel transmission of the pulse signal to the RX pin of the PCIE expansion card is realized, so as to perform full channel consistency test on the PCIE signal sent by the TX pin of the PCIE.
For example, the PCIE expansion card includes 16 RX pins, and the 16 output pins of the first logic control module 2 are connected to the 16 RX pins of the PCIE expansion card in a one-to-one correspondence manner. When the test control device of the PCIE expansion card works, after the first logic control module 2 receives the control command of the PCIE4.0 configuration 7 sent by the control command generating module 1, the 1 st output pin of the first logic control module 2 sends 21 pulse signals to the 1 st RX pin of the PCIE expansion card corresponding to the 1 st output pin, then the 2 nd output pin of the first logic control module 2 sends 21 pulse signals to the 2 nd RX pin of the PCIE expansion card corresponding to the 2 nd output pin, … …, and finally the 16 th output pin of the first logic control module 2 sends 21 pulse signals to the 16 th RX pin of the PCIE expansion card corresponding to the 16 th output pin.
As a preferred embodiment, the control command generating module 1 is specifically configured to periodically send a control command; the control commands of adjacent two cycles are different.
In order to meet the PCIE signal testing requirements for the transmission rates of the PCIE and the configuration of the transmission rates of the PCIE, in this embodiment, the control command generating module 1 periodically sends control commands, the transmission rates to be tested in the control commands of two adjacent periods and the configuration to be tested of the transmission rates to be tested are not identical, and the first logic control module 2 implements pulse signal transmission corresponding to the control commands based on the periodic control commands, so as to perform consistency test on the PCIE signals of the transmission rates of the PCIE and the configuration of the transmission rates of the PCIE.
For example, the control command generating module 1 first generates a control command of PCIE4.0 configuration 7, the first logic control module 2 realizes transmission of 21 pulse signals based on the control command, and then the control command generating module 1 generates a control command of PCIE4.0 configuration 8, and the first logic control module 2 realizes transmission of 22 pulse signals based on the control command.
As a preferred embodiment, the control command further includes a TX pin to be tested of the PCIE expansion card;
sending a pulse signal to RX pins of the PCIE expansion card corresponding to the output pins one by one through the output pins of the first logic control module 2, wherein the method comprises the following steps:
and sending pulse signals to RX pins of the PCIE expansion card which are in one-to-one correspondence with the TX pins to be tested through the output pins of the first logic control module 2 which are in one-to-one correspondence with the TX pins to be tested.
Referring to fig. 2, fig. 2 is a schematic structural diagram of another PCIE expansion card test control device according to the present application.
In order to realize single-channel test on the TX pins to be tested of the PCIE expansion card, in this embodiment, the control command sent by the control command generating module 1 further includes the TX pins to be tested of the PCIE expansion card, and the first logic control module 2 sends a pulse signal to the RX pins of the PCIE expansion card corresponding to the TX pins to be tested one by one through the output pins of the first logic control module 2 corresponding to the TX pins to be tested one by one, so that single-channel transmission pulse signals are realized, so that consistency test is performed on PCIE signals transmitted by the TX pins to be tested.
For example, the TX pin to be tested of the PCIE expansion card is a TX0 pin, and the first logic control module 2 sends a pulse signal to the RX0 pin of the PCIE expansion card corresponding to the TX0 pin to be tested through a gpio lane0 output pin corresponding to the TX0 pin to be tested.
As a preferred embodiment, the control command generation module 1 includes:
a trigger module 11 for generating a trigger signal;
the BMC12 is configured to generate a control command based on the trigger signal.
In this embodiment, the control command generating module 1 includes a triggering module 11 and a BMC12 (Baseboard Management Controller, which is a baseboard management controller), the triggering module 11 generates a control command first, and the BMC12 generates a control command after receiving a triggering signal, so that the overall structure is simple and the automation degree is high.
In addition, the trigger module 11 may include a computer for generating a trigger signal upon receiving a user instruction, and a conversion module for converting the trigger signal from a USB (Universal Serial-General Bus) signal to a UART (Universal Asynchronous Receiver/Transmitter, universal asynchronous receiver Transmitter) signal. Specifically, the conversion module may be an RS232 serial port connection circuit, where the computer is connected to an input end of the RS232 serial port connection circuit through a USB serial port, and an output end of the RS232 serial port connection circuit is connected to an input end of the BMC12 through a UART serial port. When the computer receives a user instruction, a trigger signal is generated, the RS232 serial port connection circuit converts the trigger signal from a USB signal to an RS232 signal, then converts the RS232 signal to a UART signal and sends the UART signal to the BMC12, the BMC12 generates a control command based on the trigger signal and sends the control command to the first logic control module 2 through the IIC serial port.
BMC12 may be, but is not limited to, AST2500.
Referring to fig. 3, fig. 3 is a flowchart of a test control device for a PCIE expansion card according to the present application.
As a preferred embodiment, further comprising:
the power module is used for supplying power to the PCIE expansion card;
the first logic control module 2 is further configured to send a first level to the PCIE expansion card when the first logic control module powers on itself; when a bit signal generated after the PCIE expansion card is powered on is detected, a second level is sent to the PCIE expansion card so as to control the PCIE expansion card to enter a working state; the first level and the second level are opposite.
In order to automatically control the PCIE expansion card to enter a working state, in this embodiment, the test control device of the PCIE expansion card further includes a power module, which may supply power to the PCIE expansion card. In the working process of the device, the first logic control module 2 sends the first level to the PCIE expansion card when the first logic control module 2 is powered on, and at this time, the PCIE expansion card does not work even if the first level is sent to the PCIE expansion card because the first logic control module 2 does not detect the in-place signal of the PCIE expansion card yet. When the first logic control module 2 detects an in-place signal generated after the PCIE expansion card is powered on, a second level is sent to the PCIE expansion card, and the PCIE expansion card is controlled to enter a working state at the moment, and the first level is opposite to the second level, so that the working state of the PCIE expansion card is automatically controlled.
The first level may be a low level, perst=0; the second level may be a high level, perst=1; the default PCIE expansion card enters PCIE1.0_tx signal output during normal operation, and the present application is not limited in this regard.
As a preferred embodiment, further comprising:
the second logic control module 3 is used for determining the standard number of the pulse signals based on the control command and the corresponding relation between the preset transmission rate configuration and the pulse number; acquiring the actual number of the pulse signals output by the output pins of the first logic control module 2, which are in one-to-one correspondence with the acquisition pins of the first logic control module, judging whether the actual number of the pulse signals is consistent with the standard number of the pulse signals, and if so, judging that the actual number of the pulse signals output by the output pins of the first logic control module 2 is correct; if the pulse signals are inconsistent, the actual number of the pulse signals output by the output pins of the first logic control module 2 is judged to be wrong.
In order to monitor whether the number of the pulse signals output by the first logic control module 2 to the PCIE expansion card is wrong, in this embodiment, the test control device of the PCIE expansion card further includes a second logic control module 3, capable of determining a standard number X of pulse signals based on a control command and a corresponding relation between a preset transmission rate configuration and the number of pulses, then collecting an actual number Y of the pulse signals output by the output pins of the first logic control module 2 corresponding to the collection pins thereof one by one through the collection pins of the second logic control module, and judging whether the actual number Y is consistent with the number of the standard number X, if y=x, then judging that the actual number of the pulse signals output by the output pins of the first logic control module 2 is correct; if Y is not equal to X, judging that the actual number of the pulse signals output by the output pins of the first logic control module 2 is wrong, and by adding the second logic control module 3, comparing and verifying the pulse signals generated by the first logic control module 2, the accuracy of the pulse signals is improved, so that whether the configuration of the PCIE transmission rate and the PCIE transmission rate of switching meets the requirement of PCIE-TX consistency test can be easily and conveniently verified.
In addition, the second logic control module 3 may be, but not limited to, a CPLD, and the control command generated by the BMC12 sends the control command to the second logic control module 3 through the IIC serial port, which is not particularly limited herein.
As a preferred embodiment, the second logic control module 3 is further configured to send a reset signal to the PCIE expansion card when determining that the actual number of pulse signals output by the output pins of the first logic control module 2 is wrong.
Under the condition of ensuring the accuracy of pulse signal transmission, in order to further improve the working efficiency, in this embodiment, when the second logic control module 3 determines that the actual number of the pulse signals output by the output pins of the first logic control module 2 is wrong, a reset signal is sent to the PCIE expansion card, so that the configuration switching work of the PCIE transmission rate and the PCIE transmission rate is automatically restarted, and the efficiency of device operation is improved.
In addition, the reset signal may be low level, perst=0, and the present application is not particularly limited herein.
As a preferred embodiment, further comprising:
the prompting module 4, the input end of the prompting module 4 is connected with the output end of the second logic control module 3, and is used for prompting a judging result of whether the actual number of the pulse signals is consistent with the standard number of the pulse signals.
Considering the requirement that the research and development test needs to detect the operating state of the device in real time, in the embodiment, the prompt module 4 is arranged to prompt the judging result of whether the actual number of the pulse signals is consistent with the standard number of the pulse signals, so that the real-time prompt of the accuracy of the pulse signal output is realized, the research and development test personnel can conveniently and accurately grasp the information of the pulse signals, and the accuracy of PCIE_TX consistency test is improved.
In addition, the prompting module 4 may be an LED display screen, and when it is determined that the actual number of pulse signals output by the output pins of the first logic control module 2 is correct, the LED display screen displays the output pulse number N0N1, the PCIE transmission rate PX0X1 to be tested, and the configuration PX2X3 to be tested of the transmission rate to be tested; when it is determined that the actual number of pulse signals outputted from the output pins of the first logic control module 2 is wrong, the LED display screen displays an error code, and the present application is not particularly limited herein.
For example, when it is determined that the actual number of pulse signals corresponding to PCIE4.0 configuration 7 output by the output pins of the first logic control module 2 is correct, the LED display screen displays 21P40P07; when the actual number of pulse signals corresponding to PCIE4.0 configuration 7 output by the output pins of the first logic control module 2 is determined to be wrong, the LED display screen displays EEEEEEEE.
The prompting module 4 includes a sound prompting module and/or a display prompting module, where the sound prompting module may be, but not limited to, a buzzer, and prompts the determination result in a sound prompting manner.
Referring to fig. 4, fig. 4 is a schematic structural diagram of a test system of a PCIE expansion card according to the present application.
The application also provides a test system of the PCIE expansion card, which comprises the test control device of the PCIE expansion card, and further comprises:
the test control device connected with the PCIE expansion card is connected with the test module 5 and is used for outputting corresponding PCIE signals based on the TX pins of the PCIE expansion card to perform consistency test.
In addition, the test module 5 may be, but not limited to, a high-speed oscilloscope, and perform a consistency test on a PCIE signal corresponding to the TX pin output of the PCIE expansion card.
The test system of the PCIE expansion card further includes a clock module configured to output a clock signal to the PCIE expansion card, so that the PCIE expansion card works based on the clock signal, where the clock signal may be a 100M clock signal.
For more details of the working principle and the working manner of the PCIE expansion card test system, reference may be made to the description related to the foregoing embodiments, which are not repeated here.
It should be noted that in this specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (7)

1. The test control device of PCIE expansion card is characterized by comprising:
the control command generation module is used for generating a control command, wherein the control command comprises a transmission rate to be tested and a configuration to be tested of the transmission rate to be tested;
the first logic control module is used for generating pulse signals with corresponding quantity based on the control command and the corresponding relation between the preset transmission rate configuration and the pulse quantity, and sending the pulse signals to RX pins of the PCIE expansion card which are in one-to-one correspondence with the output pins through the output pins of the first logic control module so as to output corresponding PCIE signals from the TX pins of the PCIE expansion card which are in one-to-one correspondence with the RX pins;
the PCIE expansion card comprises N RX pins, wherein N is an integer not smaller than 2; the N output pins of the first logic control module are connected with the N RX pins of the PCIE expansion card in a one-to-one correspondence manner;
sending the pulse signal to the RX pins of the PCIE expansion card corresponding to the output pins one to one through the output pins of the first logic control module, including:
sequentially sending the pulse signals to N RX pins of the PCIE expansion card corresponding to the output pins one by one through N output pins of the first logic control module according to a preset sequence;
correspondingly, the control command generating module comprises:
the trigger module is used for generating a trigger signal;
the BMC is used for generating a control command based on the trigger signal;
correspondingly, the test control device further comprises:
the power module is used for supplying power to the PCIE expansion card;
the first logic control module is further configured to send a first level to the PCIE expansion card when the first logic control module powers on itself; when an in-place signal generated after the PCIE expansion card is powered on is detected, a second level is sent to the PCIE expansion card so as to control the PCIE expansion card to enter a working state; the first level and the second level are opposite.
2. The test control device of the PCIE expansion card of claim 1, wherein the control command generation module is specifically configured to periodically send the control command; the control commands of adjacent two cycles are different.
3. The test control device of the PCIE expansion card of claim 1, wherein the control command further comprises a TX pin to be tested of the PCIE expansion card;
sending the pulse signal to the RX pins of the PCIE expansion card corresponding to the output pins one to one through the output pins of the first logic control module, including:
and sending the pulse signals to RX pins of the PCIE expansion card, which are in one-to-one correspondence with the TX pins to be tested, through the output pins of the first logic control module, which are in one-to-one correspondence with the TX pins to be tested.
4. The PCIE expansion card test control device of any one of claims 1 to 3, further comprising:
the second logic control module is used for determining the standard quantity of the pulse signals based on the control command and the corresponding relation between the preset transmission rate configuration and the pulse quantity; collecting the actual number of the pulse signals output by the output pins of the first logic control module, which are in one-to-one correspondence with the collecting pins of the first logic control module, judging whether the actual number of the pulse signals is consistent with the standard number of the pulse signals, and if so, judging that the actual number of the pulse signals output by the output pins of the first logic control module is correct; and if the pulse signals are inconsistent, judging that the actual number of the pulse signals output by the output pins of the first logic control module is wrong.
5. The test control device of the PCIE expansion card of claim 4, wherein the second logic control module is further configured to send a reset signal to the PCIE expansion card when determining that an actual number of the pulse signals output by the output pins of the first logic control module is wrong.
6. The PCIE expansion card test control device of claim 4, further comprising:
the input end of the prompting module is connected with the output end of the second logic control module and is used for prompting a judging result of whether the actual number of the pulse signals is consistent with the standard number of the pulse signals.
7. The PCIE expansion card testing system according to any one of claims 1 to 6, further comprising a PCIE expansion card testing control device:
and the test control device is connected with the test module and is used for outputting corresponding PCIE signals based on the TX pins of the PCIE expansion card to perform consistency test.
CN202110873216.9A 2021-07-30 2021-07-30 Test control device and test system of PCIE expansion card Active CN113760614B (en)

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Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6020757A (en) * 1998-03-24 2000-02-01 Xilinx, Inc. Slew rate selection circuit for a programmable device
CN1987839A (en) * 2005-12-20 2007-06-27 英业达股份有限公司 Automatic configurating system for PCI-E bus
US7327199B1 (en) * 2004-09-23 2008-02-05 Cypress Semiconductor Corp. Phase-locked loop (PLL) device and method for entering a test mode without a dedicated test pin
CN101413973A (en) * 2008-11-26 2009-04-22 电子科技大学 System and method for testing characteristic impedance of circuit board
CN101778007A (en) * 2009-01-12 2010-07-14 哈尔滨威帝电子股份有限公司 System and method for automatically testing I/O pin of CAN bus control module
CN102835064A (en) * 2010-02-04 2012-12-19 阿尔特拉公司 Clock and data recovery circuitry with auto-speed negotiation and other possible features
CN106153997A (en) * 2016-08-29 2016-11-23 株洲中车时代电气股份有限公司 A kind of pulse outputting unit for the test of rail vehicle charger
CN206177383U (en) * 2016-11-04 2017-05-17 安徽江淮汽车集团股份有限公司 Instantaneous oil consumption test system and car
CN109324281A (en) * 2018-11-08 2019-02-12 珠海格力电器股份有限公司 IC chip test system and method
US10234505B1 (en) * 2017-02-27 2019-03-19 Xilinx, Inc. Clock generation for integrated circuit testing
CN111309659A (en) * 2020-01-21 2020-06-19 北京工业大学 Pluggable module-based LoRa multichannel communication extension method
CN112272816A (en) * 2018-05-09 2021-01-26 美光科技公司 Prefetch signaling in a memory system or subsystem

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10971199B2 (en) * 2019-06-20 2021-04-06 Sandisk Technologies Llc Microcontroller for non-volatile memory with combinational logic

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6020757A (en) * 1998-03-24 2000-02-01 Xilinx, Inc. Slew rate selection circuit for a programmable device
US7327199B1 (en) * 2004-09-23 2008-02-05 Cypress Semiconductor Corp. Phase-locked loop (PLL) device and method for entering a test mode without a dedicated test pin
CN1987839A (en) * 2005-12-20 2007-06-27 英业达股份有限公司 Automatic configurating system for PCI-E bus
CN101413973A (en) * 2008-11-26 2009-04-22 电子科技大学 System and method for testing characteristic impedance of circuit board
CN101778007A (en) * 2009-01-12 2010-07-14 哈尔滨威帝电子股份有限公司 System and method for automatically testing I/O pin of CAN bus control module
CN102835064A (en) * 2010-02-04 2012-12-19 阿尔特拉公司 Clock and data recovery circuitry with auto-speed negotiation and other possible features
CN106153997A (en) * 2016-08-29 2016-11-23 株洲中车时代电气股份有限公司 A kind of pulse outputting unit for the test of rail vehicle charger
CN206177383U (en) * 2016-11-04 2017-05-17 安徽江淮汽车集团股份有限公司 Instantaneous oil consumption test system and car
US10234505B1 (en) * 2017-02-27 2019-03-19 Xilinx, Inc. Clock generation for integrated circuit testing
CN112272816A (en) * 2018-05-09 2021-01-26 美光科技公司 Prefetch signaling in a memory system or subsystem
CN109324281A (en) * 2018-11-08 2019-02-12 珠海格力电器股份有限公司 IC chip test system and method
CN111309659A (en) * 2020-01-21 2020-06-19 北京工业大学 Pluggable module-based LoRa multichannel communication extension method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
基于USB接口的外系统等效器的设计;张雪莲;崔永俊;沈三民;叶勇;武晋波;;火力与指挥控制(第07期);全文 *

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