CN113760335A - Server device and method for preventing firmware from being unable to be updated again - Google Patents
Server device and method for preventing firmware from being unable to be updated again Download PDFInfo
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- CN113760335A CN113760335A CN202010490320.5A CN202010490320A CN113760335A CN 113760335 A CN113760335 A CN 113760335A CN 202010490320 A CN202010490320 A CN 202010490320A CN 113760335 A CN113760335 A CN 113760335A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
- G06F8/654—Updates using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/445—Program loading or initiating
- G06F9/44521—Dynamic linking or loading; Link editing at or after load time, e.g. Java class loading
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0016—Inter-integrated circuit (I2C)
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The present invention provides a server device and a method for preventing firmware from being unable to be updated again. The method comprises the steps that a first firmware program is loaded by a firmware loading unit of the programmable logic device, the server device is enabled to operate in a working mode, the I2C interface writing function of the programmable logic device is enabled to be locked, a control unit executes a clearing action of the firmware loading unit when a firmware updating instruction is received in the working mode, the programmable logic device is switched to a setting mode, and the I2C interface writing function is still enabled in the setting mode of the programmable logic device; the control unit verifies the second firmware program to be updated when receiving the firmware update instruction, and when the second firmware program fails to be verified, the server device outputs an alarm message in the setting mode to indicate that the second firmware program does not load the firmware loading unit.
Description
Technical Field
The present disclosure relates to a server apparatus, and more particularly, to a server apparatus having programmable logic devices.
Background
Generally, a programmable logic device is disposed in a server apparatus to control a power-on process, control of a signal, or transfer of a parameter during a boot process of the server apparatus, and therefore, a firmware program in the programmable logic device often needs to be updated, and generally, the programmable logic device has a Joint Test Action Group (JTAG) Interface and a Serial Peripheral Interface (SPI) Interface, and the programmable logic device can update the firmware program through the JTAG Interface, the I2C Interface, or the SPI Interface.
When the programmable logic device is connected to other units of the server device through the JTAG interface and the SPI interface, at least six pins are required to meet the specifications of the JTAG interface and the SPI interface, and the lengths of bus routing of the JTAG interface and the SPI interface are limited. Considering layout (layout) space and connector cost in the server device, the JTAG interface and SPI interface are difficult to meet the current requirements of price and light weight of the server device, so the main bus interface for updating the firmware program of the programmable logic device is the I2C interface.
However, the I2C interface is turned off by default, and the server device needs to additionally enable the I2C interface to enable the programmable logic device to update its firmware. When the firmware has an error or an error occurs during the update process of the firmware, if the power source of the server device is restarted at this time, which causes the I2C interface unit to be turned off after the server device is restarted or powered on, the maintainer of the server device cannot update the firmware of the programmable logic device again through the I2C interface, which further causes the server device to be unable to be successfully powered on, if the firmware program of the programmable logic device is to be updated again through the JTAG interface, the chassis or chassis cover of the server device must be opened, and the firmware program of the programmable logic device can be updated from the external device directly connected to the pin of the JTAG interface, which causes inconvenience to the maintainer of the server device.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide a server apparatus and a method for preventing firmware from being unable to be updated again, which can prevent firmware from being unable to be updated again.
To solve the above technical problem, the server apparatus of the present invention includes a programmable logic device and a baseboard management controller. The programmable logic device comprises a firmware loading unit, an I2C interface unit, a non-volatile memory unit and a control unit. The firmware loading unit is used for loading a first firmware program, so that the programmable logic device is switched from a set mode to an operating mode, and an I2C interface writing function of the programmable logic device is locked to be enabled, wherein the first firmware program comprises program code for locking the I2C interface writing function. The I2C interface unit is coupled to the BMC, and the I2C interface unit is configured to receive a second firmware program from the BMC according to the enabled I2C interface writing function in the working mode. The non-volatile memory unit is coupled to the I2C interface unit, and is configured to receive the second firmware program through the I2C interface unit and store the second firmware program. The control unit is coupled to the baseboard management controller, the firmware loading unit and the non-volatile memory unit, the control unit is used for executing a clearing action of the firmware loading unit when receiving a firmware updating instruction from the baseboard management controller in the working mode, so that the programmable logic device is switched from the working mode to the setting mode, the I2C interface writing function is still locked and started in the setting mode but not switched to be closed, the control unit verifies the second firmware program when receiving the firmware updating instruction, and when the second firmware program does not pass the verification, the server device outputs an alarm message in the setting mode to indicate that the second firmware program does not load the firmware loading unit.
To solve the above technical problem, a method for preventing firmware from being updated again according to the present invention includes loading a first firmware program by a firmware loading unit of a programmable logic device, switching the programmable logic device from a set mode to an operating mode with an I2C interface write function locked to be enabled, sending a second firmware program by a baseboard management controller of a server apparatus when the programmable logic device is in the operating mode, receiving and storing the second firmware program by an I2C interface unit of the programmable logic device according to the enabled I2C interface write function in the operating mode, determining whether a firmware update command is received from the baseboard management controller by a control unit of the programmable logic device in the operating mode, executing a clearing action by the firmware loading unit when the firmware update command is received by the control unit, the programmable logic device is switched from the working mode to the setting mode, the I2C interface writing function is still locked on and is not switched to be closed in the setting mode, the control unit verifies the second firmware program when receiving the firmware updating instruction, and when the second firmware program is not verified, the server device outputs an alarm message in the setting mode to indicate that the second firmware program does not load the firmware loading unit.
Compared with the prior art, the programmable logic device does not have the problem that the writing function of the I2C interface is closed due to the fact that the programmable logic device operates in the set mode due to firmware program errors, so that the debugged firmware program cannot be updated to the non-volatile memory unit through the I2C interface unit, and the control unit can send out error messages to avoid that the I2C interface unit is closed after the server device is restarted or powered on due to the fact that a user restarts the power supply of the server device. The designer or debugger of the programmable logic device does not need to open the chassis cover to update the firmware program through the JTAG interface when the firmware program is faulty, and the designer or debugger can still repair the firmware program through the I2C interface unit, thereby greatly improving the flexibility and convenience of debugging the firmware program of the programmable logic device. Moreover, the I2C interface unit only needs two pins, and the length of the bus routing of the I2C interface unit is longer, and the I2C interface unit can better meet the current requirements for the stability and lightness of the server than the JTAG interface and the SPI interface.
[ description of the drawings ]
FIG. 1 is a block diagram illustrating an embodiment of a server apparatus according to the present invention.
FIG. 2 is a flowchart illustrating an embodiment of a method for preventing firmware from being updated again according to the present invention.
[ detailed description ] embodiments
Referring to fig. 1, fig. 1 is a block diagram illustrating an embodiment of a server device according to the invention. The server apparatus 1 includes a Programmable Logic Device (PLD) 11 and a board management controller 13. The baseboard management controller 13 is coupled to the programmable logic device 11. The programmable logic device 11 includes an inter-integrated circuit (I2C) interface unit 111, a nonvolatile memory unit 113, a firmware loading unit 114, and a control unit 115. The nonvolatile memory unit 113 is coupled between the I2C interface unit 111 and the firmware loading unit 114, the control unit 115 is coupled between the nonvolatile memory unit 113 and the I2C interface unit 111, and the I2C interface unit 111 is coupled between the bmc 13 and the nonvolatile memory unit 113.
In one embodiment, the Programmable Logic Device 11 can be a Complex Programmable Logic Device (CPLD), the firmware loading unit 114 can be a Memory Device implementing hardware special functions (hardware features) of the Programmable Logic Device 11, the hardware special functions include I2C interface writing function of the corresponding I2C interface unit 111, and the firmware loading unit 114 can be a Random Access Memory (RAM). The nonvolatile memory unit 113 may be a flash memory (flash memory).
The non-volatile memory unit 113 stores the firmware program to be executed by the programmable logic device 11, and the firmware loading unit 114 stores the firmware program currently executed by the programmable logic device 11. When the programmable logic device 11 is in the boot-up, reset or firmware update procedure, the programmable logic device 11 operates in the set mode, the firmware loading unit 114 does not load any firmware program, the control unit 115 controls the firmware program to load the firmware loading unit 114 from the non-volatile memory unit 113, so that the programmable logic device 11 switches from the set mode to the working mode, and the programmable logic device 11 operates in the working mode according to the firmware program code loaded by the firmware loading unit 114. Thus, when the non-volatile memory unit 113 stores the firmware program to be updated, the control unit 115 can control the firmware program to be updated to load the firmware loading unit 114, so that the programmable logic device 11 operates according to the updated firmware program to complete the update procedure of the firmware program.
The nonvolatile memory unit 113 may store the firmware program from the I2C interface unit 111, the programmable logic device 11 has an I2C interface writing function corresponding to the I2C interface unit 111, when the programmable logic device 11 is in the operating mode, the firmware program loaded by the firmware loading unit 114 includes firmware program code enabling the I2C interface writing function, so that the nonvolatile memory unit 113 receives the firmware program to be updated from the I2C interface unit 111 according to the enabled I2C interface writing function in the operating mode; furthermore, when the programmable logic device 11 is in the working mode, the firmware program loaded by the firmware loading unit 114 includes a locking function for locking the I2C interface writing function as enabled, after the firmware program to be updated is written into the non-volatile memory unit 113, the programmable logic device 11 enters the firmware updating program, the programmable logic device 11 switches from the working mode to the setting mode, the locking function forces the I2C interface writing function not to be closed but to be continuously locked and enabled, when the firmware update fails, the non-volatile memory unit 113 can re-receive the firmware program to be updated or receive other firmware programs from the I2C interface unit 111 according to the I2C interface writing function as enabled in the setting mode.
In operation, referring to fig. 1 and fig. 2 together, fig. 2 is a flowchart of an embodiment of a method for preventing the firmware from being updated again according to the present disclosure, taking the programmable logic device 11 in the set mode after the server apparatus 1 is powered on as an example, the firmware loading unit 114 loads the first firmware program that is not updated (step S01) to switch the programmable logic device 11 from the set mode to the working mode (step S02), and the first firmware program includes the locking function that locks the I2C interface writing function to be enabled, so that the I2C interface writing function is locked to be enabled after the first firmware program loads the firmware loading unit 114 (step S03), and then, when the programmable logic device 11 is in the working mode, the substrate management controller 13 can send the second firmware program to be updated to the I2C interface unit 111 (step S04), according to the locked to the enabled I2C interface writing function, the I2C interface unit 111 transfers the second firmware program, and the nonvolatile memory unit 113 receives the second firmware program from the I2C interface unit 111 and stores the second firmware program (step S05).
After the second firmware program is stored in the nonvolatile memory unit 113, the bmc 13 may send a firmware update command to update the first firmware program to the second firmware program, the control unit 115 determines whether the firmware update command is received in the operating mode of the programmable logic device 11 (step S06), when the control unit 115 receives the firmware update command (yes), the control unit 115 performs a clearing operation of the firmware loading unit 114 (step S07), so that the programmable logic device 11 is switched to the setting mode (step S08), and the I2C interface writing function is still locked to be enabled in the setting mode (step S10), that is, the I2C interface writing function is not switched from being enabled to being disabled because the programmable logic device 11 is switched from the operating mode to the setting mode.
Furthermore, after receiving the firmware update command, the control unit 115 verifies the second firmware program stored in the non-volatile memory unit 113 to determine whether an error occurs in the second firmware program (step S11). When the second firmware program is faulty, indicating that the firmware update process cannot be completed, the control unit 115 generates a loading failure signal in the setting mode of the programmable logic device 11 (step S12), so that the server apparatus 1 outputs an alarm message including an audio signal and/or a video signal, indicating that the second firmware program is not loaded on the firmware loading unit 114, that is, the programmable logic device 11 is still in the setting mode, to alarm the user of the server apparatus 1 to prohibit removing the power of the server apparatus 1, that is, the server apparatus 1 immediately notifies the user to prohibit the system-level reboot, and the user cannot reboot the server apparatus 1 by removing the plug from the socket and reinserting the plug back into the socket, so as to avoid the shutdown of the lock function of the server apparatus 1 due to the removal/re-powering on of the lock function, which would cause the I2C interface unit 111 to be in a default shutdown state, and cannot reboot the server apparatus 1 through the I2C interface unit 111 New and faulty second firmware processes.
Accordingly, in the setting mode of the programmable logic device 11, although the program code of the second firmware program is faulty, the enabled I2C interface unit 111 can receive the firmware program again, and the designer or debugger of the server apparatus 1 can burn the debugged program code into the non-volatile memory unit 113 via the I2C interface unit 111 in the setting mode to repair the fault of the second firmware program; alternatively, the failure of firmware update is due to a transmission error in the process of loading the firmware loading unit 114 by the second firmware program from the non-volatile memory unit 113, and the designer or debugger of the server apparatus 1 can set the second firmware program to be re-recorded from the I2C interface unit 111 to the non-volatile memory unit 113 in the setting mode, and control the second firmware program re-recorded to the non-volatile memory unit 113 to load the firmware loading unit 114. In other words, the programmable logic device 11 does not shut down the I2C interface write function due to operating in the set mode, so that the firmware program cannot be rewritten to the nonvolatile memory unit 113 through the I2C interface unit 111 when the update fails, and the designer or debugger of the server apparatus 1 does not need to open the housing of the server apparatus 1 to rewrite the firmware program to the nonvolatile memory unit 113 through the JTAG interface unit 112 or the SPI interface unit 116 connected to the nonvolatile memory unit 113. (in FIG. 1, the JTAG interface unit 112 and the SPI interface unit 116 are connected to the nonvolatile memory unit 113 by six pins, for illustration only).
In one embodiment, the control unit 115 is implemented by a Finite State Machine (FSM) of a hardware circuit, for example, the control unit 115 may be an Application-specific integrated circuit (ASIC), the control unit 115 performs the clearing, verifying and signal outputting actions in steps S07, S11 and S12 according to a hardware behavior predefined by a hardware description language (for example, Verilog code), that is, the control unit 115 does not execute the firmware code, and the control unit 115 can also perform the clearing, verifying and signal outputting actions when the firmware loading unit 114 does not load any firmware.
In one embodiment, the user of the server apparatus 1 can control the bmc 13 at the near end through the management interface (console) of the bmc 13, so that the bmc 13 sends the second firmware program in step S04. Moreover, after the second firmware program is stored in the non-volatile memory unit 113, the user may control the bmc 13 to issue a firmware update command, so that the control unit 115 determines in step S06 that the firmware update command is received. In other embodiments, the user of the server 1 can also operate a remote device to connect to the network interface of the bmc 13, and control the bmc 13 to send the second firmware program and the firmware update command in a remote manner. In other embodiments, the server apparatus 1 may also automatically detect the firmware version, that is, the bmc 13 may automatically determine that the version of the second firmware program is newer, and automatically send the second firmware program to the programmable logic device 11 and automatically issue the firmware update command.
In one embodiment, as shown in fig. 1, the programmable logic device 11 further includes a General-purpose input/output pin (GPIO) 117 coupled between the bmc 13 and the control unit 115. In step S12, the control unit 115 sends a loading failure signal to the bmc 13 via the GPIO pin 117 after generating the loading failure signal, the bmc 13 generates the warning message according to the loading failure signal, and the sound or image output unit of the server 1 outputs the warning message to indicate that the second firmware program is not loaded on the firmware loading unit 114, and the programmable logic device 11 is in the setting mode to warn the user of the server 1 that the power of the server 1 cannot be removed, so as to avoid the problem that the server 1 cannot debug or update the wrong second firmware program due to the invalidation of the locking function caused by the restart.
Further, after the control unit 115 sends the load failure signal to the bmc 13, the bmc 13 may resend the same firmware program to the I2C interface unit 111 according to the load failure signal, or the bmc 13 may also send other firmware programs after debugging to the I2C interface unit 111 after receiving the load failure signal (hereinafter, the firmware program sent by the bmc 13 after receiving the load failure signal is referred to as a third firmware program), the nonvolatile memory unit 113 receives the third firmware program sent by the bmc 13 from the I2C interface unit 111 according to the I2C interface write function being enabled in the setting mode of the programmable logic device 11, the bmc 13 then sends another firmware update command to the control unit 115, so that the control unit 115 generates the yes judgment result in step S06 and executes the subsequent step S11, if the control unit 115 determines in step S11 that the second firmware program retransmitted by the bmc 13 or the other debugged firmware program has not generated an error (no), the control unit 115 controls the retransmitted second firmware program or the other debugged firmware program to load the firmware loading unit 114 from the nonvolatile memory unit 113 (step S13), so that the programmable logic device 11 is switched from the set mode to the operating mode, and the control unit 115 can generate a loading success signal, which is sent to the bmc 13 via the GPIO pin 117, so that the bmc 13 knows that the updated firmware program has been loaded into the firmware loading unit 114. Thus, after the firmware loading unit 114 loads the second firmware program to be retransmitted or the other firmware program after debugging, the programmable logic device 11 operates according to the second firmware program to be retransmitted or the other firmware program after debugging.
In one embodiment, the load fail signal and the load success signal may have different logic levels, for example, the load success signal may have a high level, the load fail signal may have a low level, and the bmc 13 may determine the signal level from the GPIO pin 117 as a high level or a low level to determine the load fail signal or the load success signal. Accordingly, the bmc 13 knows that the programmable logic device 11 is in the set mode or the working mode, that is, the bmc 13 can determine whether the firmware program has loaded the firmware loading unit 114 after issuing the firmware update command.
In summary, according to an embodiment of the method for preventing the firmware from being updated again, the programmable logic device does not operate in the set mode due to the firmware program error to shut down the I2C interface write function, which results in the problem that the debugged firmware program cannot be updated in the non-volatile memory unit through the I2C interface unit, and the control unit can issue an error message to prevent the I2C interface unit from being shut down after the server device is restarted or powered on due to the user restarting the power of the server device. The designer or debugger of the programmable logic device does not need to open the chassis cover to update the firmware program through the JTAG interface when the firmware program is faulty, and the designer or debugger can still repair the firmware program through the I2C interface unit, thereby greatly improving the flexibility and convenience of debugging the firmware program of the programmable logic device. Moreover, the I2C interface unit only needs two pins, and the length of the bus routing of the I2C interface unit is longer, and the I2C interface unit can better meet the current requirements for the stability and lightness of the server than the JTAG interface and the SPI interface.
Although the present disclosure has been described with reference to particular embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the disclosure, and the scope of the disclosure is to be determined by the appended claims.
Claims (10)
1. A server apparatus, comprising:
a baseboard management controller; and
a programmable logic device, comprising:
a firmware loading unit for loading a first firmware program, which causes the programmable logic device to switch from a set mode to an operating mode and locks an I2C interface write function of the programmable logic device to be enabled, the first firmware program comprising program code for locking the I2C interface write function;
an I2C interface unit coupled to the BMC to receive a second firmware program from the BMC according to the I2C interface write function being enabled in the working mode;
a non-volatile memory unit coupled to the I2C interface unit for receiving the second firmware program via the I2C interface unit and storing the second firmware program; and
a control unit, coupled to the bmc, the firmware loading unit and the non-volatile memory unit, for executing a clear operation of the firmware loading unit when a firmware update command is received from the bmc in the working mode, so that the programmable logic device is switched from the working mode to the setting mode, and the I2C interface write function is still locked on and not switched to off in the setting mode, and the control unit verifies the second firmware program when receiving the firmware update command, and when the second firmware program is not verified, the server device outputs an alert message in the setting mode to indicate that the second firmware program does not load the firmware loading unit.
2. The server apparatus according to claim 1, wherein the control unit is implemented as an ASIC, the control unit performing the cleaning action and verifying the second firmware program according to hardware behavior predefined in a hardware description language.
3. The server apparatus of claim 1, wherein the programmable logic device further comprises a general purpose input/output pin coupled between the control unit and the bmc, the second firmware program does not load the firmware loading unit when the second firmware program fails and fails to verify, the control unit generates a loading failure signal in the set mode, the loading failure signal is output to the bmc via the general purpose input/output pin, and the bmc generates the warning message according to the loading failure signal.
4. The server apparatus as claimed in claim 3, wherein the BMC further sends a third firmware program to the I2C interface unit according to the load failure signal, and the NVM unit receives the third firmware program via the I2C interface unit according to the I2C interface write function being enabled in the set mode.
5. The server apparatus according to claim 1, wherein the warning message comprises an audio message or a text message that prohibits power removal of the server apparatus.
6. A method for preventing a firmware from being updated again, the method being applied to a programmable logic device of a server apparatus, the programmable logic device having an I2C interface writing function corresponding to a firmware writing method, the method comprising:
loading a first firmware program by a firmware loading unit of the programmable logic device, so that the programmable logic device is switched from a set mode to an operating mode and the I2C interface writing function is locked to be started;
a baseboard management controller of the server device sends a second firmware program when the programmable logic device is in the working mode;
a non-volatile memory unit of the programmable logic device receiving and storing the second firmware program via an I2C interface unit of the programmable logic device according to the enabled I2C interface write function in the operating mode;
a control unit of the programmable logic device determines whether a firmware update command is received from the baseboard management controller in the working mode;
the control unit executes a clearing action of the firmware loading unit when receiving the firmware updating instruction, so that the programmable logic device is switched from the working mode to the setting mode;
the I2C interface write function remains locked on and not toggled off in the set mode;
the control unit verifies the second firmware program when receiving the firmware updating instruction; and
when the second firmware program is not verified, the server device outputs an alarm message in the setting mode to indicate that the second firmware program does not load the firmware loading unit.
7. The method as claimed in claim 6, wherein the control unit is implemented as an ASIC, and the control unit performs the cleaning and verifies the second firmware program according to hardware behavior predefined by a hardware description language.
8. The method of claim 6, further comprising:
when the second firmware program is not verified, the second firmware program does not load the firmware loading unit, and the control unit generates a loading failure signal in the setting mode;
the control unit sends the loading failure signal to the baseboard management controller through the general purpose input/output pin of the programmable logic device; and
the baseboard management controller generates the warning message according to the loading failure signal.
9. The method of claim 6, wherein the warning message comprises an audio message or a text message that prohibits removing power from the server device.
10. The method of claim 8, further comprising:
the baseboard management controller sends a third firmware program to the I2C interface unit according to the loading failure signal; and
the nonvolatile memory unit receives and stores the third firmware program through the I2C interface unit according to the I2C interface write function being enabled in the set mode.
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| TWI576696B (en) * | 2015-12-11 | 2017-04-01 | 英業達股份有限公司 | System is applied to control indicator lights for non-volatile memory express solid state disk |
| TW201723825A (en) * | 2015-12-17 | 2017-07-01 | 英業達股份有限公司 | Server system for reading firmware version through inter-integrated circuit |
| CN108804117A (en) * | 2017-05-02 | 2018-11-13 | 广达电脑股份有限公司 | The method and system of hard disk is updated by Management Controller |
| TW201905720A (en) * | 2017-06-16 | 2019-02-01 | 英業達股份有限公司 | Computing device and operation method |
| CN109189435A (en) * | 2018-09-21 | 2019-01-11 | 英业达科技有限公司 | The firmware update of Complex Programmable Logic Devices |
| CN109491946A (en) * | 2018-11-12 | 2019-03-19 | 郑州云海信息技术有限公司 | A kind of chip and method for I2C bus extension |
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