CN113746316A - Method and micro-control unit for optimizing total current harmonic distortion of an alternating current power supply - Google Patents

Method and micro-control unit for optimizing total current harmonic distortion of an alternating current power supply Download PDF

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CN113746316A
CN113746316A CN202010482314.5A CN202010482314A CN113746316A CN 113746316 A CN113746316 A CN 113746316A CN 202010482314 A CN202010482314 A CN 202010482314A CN 113746316 A CN113746316 A CN 113746316A
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current
reference current
harmonic distortion
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pfc
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CN113746316B (en
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潘鸿标
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Murata Manufacturing Co Ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from ac input or output
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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Abstract

Embodiments of the present disclosure disclose a method for optimizing total current harmonic distortion of an alternating current power source in a Micro Control Unit (MCU) and an MCU for optimizing total current harmonic distortion of an alternating current power source. The method comprises the following steps: determining a Power Factor Correction (PFC) device cycle compensation reference current for the AC power source from an input current provided by the AC power source; measuring total current harmonic distortion of the ac power source with the application of the period-compensated reference current; determining an optimal offset reference current of the PFC device for the alternating current power supply according to total current harmonic distortion by utilizing a pre-fitted optimal offset reference current variation curve along with the total current harmonic distortion, wherein the optimal offset reference current is the offset reference current when the total current harmonic distortion is minimum; and optimizing the total current harmonic distortion of the alternating current power supply according to the optimal offset reference current and the period compensation reference current.

Description

Method and micro-control unit for optimizing total current harmonic distortion of an alternating current power supply
Technical Field
The present disclosure relates to the field of electronic devices, and more particularly, to a method and a Micro Control Unit (MCU) for optimizing total current harmonic distortion of an Alternating Current (AC) power supply.
Background
Generally, in a digitally controlled Power Factor Correction (PFC) circuit, the input current I of the PFC circuit is controlled based on a current loopinShould follow the reference current I generated byref：
IrefWhere a x B x C equation 1
Wherein A is the loop output voltage of the PFC circuit, B is
Figure BDA0002515466150000011
And C is the instantaneous input voltage V supplied by the AC sourceAc。
If the PFC is operated with a large load using AC power, IrefAnd IinShould be close to a sinusoidal curve. However, if the PFC is operated with a smaller load, then despite IrefStill a sine wave, but IinThe sine wave shape cannot be maintained, mainly due to insufficient ac current detection resolution for current loop control, tolerances of electronic components, and sensing signal interference. These limitations not only result in poor current waveforms (odd harmonic distortion), but also in differences in amplitude between the positive and negative half cycles of the input current (even harmonic distortion). That is, when the load is small, the total current harmonic distortion (ithld) of the ac current waveform of the PFC circuit is large.
In the prior art, the iTHD can be significantly improved by inserting a constant offset reference current. To minimize iTHD, the optimal offset reference current needs to be determined, but varies from PFC device to PFC device. This would certainly increase the amount of computation if the optimum offset reference current were determined once for each PFC device. Thus, there is a need for a method and a micro control unit for quickly optimizing the total current harmonic distortion of an ac power source.
Disclosure of Invention
In view of the above, the present disclosure presents a method and a micro control unit for optimizing total current harmonic distortion of an ac power source.
According to a first aspect of the present disclosure, there is provided a method in an MCU for optimizing total current harmonic distortion of an ac power source, comprising:
determining a period compensation reference current of a PFC device for the AC power supply according to an input current provided by the AC power supply;
measuring total current harmonic distortion of the ac power source with the application of the period-compensated reference current;
determining an optimal offset reference current of the PFC device for the alternating current power supply according to total current harmonic distortion by utilizing a pre-fitted optimal offset reference current variation curve along with the total current harmonic distortion, wherein the optimal offset reference current is the offset reference current when the total current harmonic distortion is minimum; and
and optimizing the total current harmonic distortion of the alternating current power supply according to the optimal offset reference current and the period compensation reference current.
In one embodiment, optimizing total current harmonic distortion of the ac power source based on the optimal offset reference current and the period compensation reference current comprises:
determining a basic reference current of the alternating current power supply according to an instantaneous input voltage of the alternating current power supply and a loop output voltage of the PFC device;
determining a new reference current I 'for a positive half-cycle of the input current according to'ref is positive：
Figure BDA0002515466150000021
And
determining a new reference current I 'for a negative half-cycle of the input current according to'Negative ref：
Figure BDA0002515466150000022
Wherein, IrefIs the basic reference current that is to be measured,
Figure BDA0002515466150000023
is the optimum offset reference current, and Icyc_compIs the period compensated reference current.
In one embodiment, the pre-fitted curve of the best-offset reference current versus total current harmonic distortion is obtained by:
determining a period compensation reference current for a plurality of PFC devices;
determining a curve F (x) of the total current harmonic distortion of the plurality of PFC devices with the offset reference current x under the condition of applying the period compensation reference current; and
determining, for each of the plurality of PFC devices, an optimal offset reference current corresponding to a minimum total current harmonic distortion from the variation curve F (x)
Figure BDA0002515466150000031
And a specific offset reference current
Figure BDA0002515466150000032
Corresponding total current harmonic distortion
Figure BDA0002515466150000033
And according to the optimal offset reference current corresponding to the plurality of PFC devices
Figure BDA0002515466150000034
And total current harmonic distortion
Figure BDA0002515466150000035
Fitting a curve f (y) of the variation of the optimal offset reference current with the total current harmonic distortion y.
In one embodiment, the specific offset reference current
Figure BDA0002515466150000036
Is selected such that a difference between total current harmonic distortion of the plurality of PFC devices is greater than a predetermined threshold.
In one embodiment, determining the cycle compensated reference current of the PFC device for the ac power source from the input current provided by the ac power source comprises:
applying the specific offset reference current
Figure BDA0002515466150000037
Measuring an input current provided by the ac power source; and
determining a period compensation reference current of the PFC device for the AC power source according to the input current.
In one embodiment, determining a cycle compensated reference current of the PFC device for the ac power source from the input current comprises:
determining the period-compensated reference current I according tocyc_comp：
Figure BDA0002515466150000038
Wherein the content of the first and second substances,
Figure BDA0002515466150000039
is the maximum value of the input current for the positive half cycle of the input current,
Figure BDA00025154661500000310
is the minimum value of the input current for a negative half cycle of the input current, and S1Is the ratio of the conversion from the scale of the MCU to the scale of the actual measured current.
In one embodiment, determining an optimal offset reference current for a power factor correction PFC device for the ac power supply using a pre-fitted optimal offset reference current versus total current harmonic distortion curve comprises:
measuring the specific offset reference current
Figure BDA00025154661500000311
Total current harmonic distortion when applied to the PFC device, and determining an optimum offset reference current for a power factor correction PFC device for the AC power supply from the pre-fitted variation curve and the measured total current harmonic distortion.
In one embodiment, determining the base reference current of the ac power source from the instantaneous input voltage of the ac power source and the loop output voltage of the PFC device comprises:
determining the base reference current according to:
Iref＝A x B x C，
wherein A is the loop output voltage of the PFC device, B is
Figure BDA0002515466150000041
And C is the instantaneous input voltage VAc。
According to a second aspect of the present disclosure, there is provided an MCU for optimizing total current harmonic distortion of an alternating current power supply, comprising:
a first determination module configured to determine a cycle compensation reference current of a PFC device for the AC power supply according to an input current provided by the AC power supply;
a measurement module configured to measure a total current harmonic distortion of the AC power source with the period-compensated reference current applied;
a second determination module configured to determine an optimal offset reference current for the PFC device for the AC power supply from a total current harmonic distortion using a pre-fitted optimal offset reference current versus total current harmonic distortion curve, wherein the optimal offset reference current is the offset reference current at which total current harmonic distortion is minimal; and
an optimization module configured to optimize total current harmonic distortion of the AC power source based on the optimal offset reference current and the period compensation reference current.
In one embodiment, the optimization module is further configured to:
determining a basic reference current of the alternating current power supply according to an instantaneous input voltage of the alternating current power supply and a loop output voltage of the PFC device;
determining a new reference current I 'for a positive half-cycle of the input current according to'ref is positive：
Figure BDA0002515466150000042
And
is determined according toNew reference current I 'for negative half cycles of the input current'Negative ref：
Figure BDA0002515466150000043
Wherein, IrefIs the basic reference current that is to be measured,
Figure BDA0002515466150000044
is the optimum offset reference current, and Icyc_compIs the period compensated reference current.
In one embodiment, the pre-fitted curve of the best-offset reference current versus total current harmonic distortion is obtained by:
determining a period compensation reference current for a plurality of PFC devices;
determining a curve F (x) of the total current harmonic distortion of the plurality of PFC devices with the offset reference current x under the condition of applying the period compensation reference current; and
determining, for each of the plurality of PFC devices, an optimal offset reference current corresponding to a minimum total current harmonic distortion from the variation curve F (x)
Figure BDA0002515466150000051
And a specific offset reference current
Figure BDA0002515466150000052
Corresponding total current harmonic distortion
Figure BDA0002515466150000053
And according to the optimal offset reference current corresponding to the plurality of PFC devices
Figure BDA0002515466150000054
And total current harmonic distortion
Figure BDA0002515466150000055
Fitting a curve f (y) of the variation of the optimal offset reference current with the total current harmonic distortion y.
In one embodiment, the specific offset reference current
Figure BDA0002515466150000056
Is selected such that a difference between total current harmonic distortion of the plurality of PFC devices is greater than a predetermined threshold.
In one embodiment, the first determination module is further configured to:
applying the specific offset reference current
Figure BDA0002515466150000057
Measuring an input current provided by the ac power source; and
determining a period compensation reference current of the PFC device for the AC power source according to the input current.
In one embodiment, the first determination module is further configured to:
determining the period-compensated reference current I according tocyc_comp：
Figure BDA0002515466150000058
Wherein the content of the first and second substances,
Figure BDA0002515466150000059
is the maximum value of the input current for the positive half cycle of the input current,
Figure BDA00025154661500000510
is the minimum value of the input current for a negative half cycle of the input current, and S1Is the ratio of the conversion from the scale of the MCU to the scale of the actual measured current.
In one embodiment, the second determination module is further configured to:
measure when will beThe specific offset reference current
Figure BDA00025154661500000511
Total current harmonic distortion when applied to the PFC device, and determining an optimum offset reference current for a power factor correction PFC device for the AC power supply from the pre-fitted variation curve and the measured total current harmonic distortion.
In one embodiment, the optimization module is further configured to:
determining the base reference current according to:
Iref＝A x B x C，
wherein A is the loop output voltage of the PFC device, B is
Figure BDA0002515466150000061
And C is the instantaneous input voltage VAc。
Drawings
Fig. 1 shows a schematic diagram of a power factor correction arrangement according to the prior art;
FIG. 2 illustrates a flow diagram of a method 200 for optimizing total current harmonic distortion of an AC power source in accordance with an embodiment of the present disclosure;
fig. 3 shows a graph of ith versus offset reference current for six PFC devices, according to an embodiment of the present disclosure;
fig. 4 shows a plot of fitted best offset reference current versus total current harmonic distortion with six PFC devices according to an embodiment of the present disclosure;
FIG. 5 shows a block diagram of an MCU 500 for optimizing total current harmonic distortion of an AC power source in accordance with an embodiment of the present disclosure;
FIG. 6 shows a schematic of AC voltage and input current waveforms before applying an optimization method in accordance with an embodiment of the present disclosure;
fig. 7 shows a schematic diagram of AC voltage and input current waveforms after performing positive half/negative half-cycle current compensation (i.e., applying a cycle-compensated reference current), in accordance with an embodiment of the present disclosure; and
fig. 8 shows a schematic of AC voltage and input current waveforms after applying an optimization method according to an embodiment of the disclosure.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is illustrative only and is not intended to limit the scope of the present disclosure. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present disclosure.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. The words "a", "an" and "the" and the like as used herein are also intended to include the meanings of "a plurality" and "the" unless the context clearly dictates otherwise. Furthermore, the terms "comprises," "comprising," or the like, as used herein, specify the presence of stated features, steps, operations, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, or components.
All terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art unless otherwise defined. It is noted that the terms used herein should be interpreted as having a meaning that is consistent with the context of this specification and should not be interpreted in an idealized or overly formal sense.
Fig. 1 shows a schematic diagram of a power factor correction arrangement according to the prior art. In fig. 1, 101 is an alternating current power supply that supplies power to a PFC device, 102 is an EMI filter for suppressing conductive noise (including common mode and differential mode), 103 is the PFC device that changes the waveform of current supplied to a load to improve a power factor, and 104 is a load corresponding to the output of the PFC device, wherein a rectifier circuit is provided inside the PFC device 103. I isinIs the current flowing into the PFC device 103. As mentioned above, the input current I of the PFC device 103inShould follow the reference current I generated by equation 1ref. However, due to insufficient AC current detection resolution for current loop control, tolerances of electronic components, and sensing signal interference, when the current loop control is switched off, the current loop control may be switched off due to the sensing signal interferenceWhen the load is small, the total current harmonic distortion (iTHD) of the ac current waveform of the PFC circuit is large, and therefore IinIt cannot maintain its sine wave shape. To address this problem, the present disclosure proposes to provide an efficient optimization method by analyzing several PFC devices, thereby providing an optimal offset reference current to be able to provide the lowest ith for all PFC devices. To find the optimum offset reference current for the PFC device to achieve the lowest iTHD, the optimization method includes a data collection procedure and a calibration procedure. The purpose of data collection is to find a curve fit function that can generate the optimal offset reference current from the thd values measured at different offset reference currents. Using this function will then simplify the optimization process for other PFC devices.
The optimization process according to the present disclosure will be described below with reference to fig. 2. Fig. 2 shows a flow diagram of a method 200 for optimizing total current harmonic distortion of an ac power source, according to an embodiment of the present disclosure. The method 200 may be performed in an MCU.
In step S210, a period compensation reference current of the PFC device (e.g., the PFC device 103 of fig. 1) with respect to the ac power source (e.g., the ac power source 101 of fig. 1) may be determined according to an input current (i.e., a current flowing into the PFC device) provided by the ac power source (e.g., the ac power source 101 of fig. 1). Step S210 may include: at the application of a specific offset reference current
Figure BDA0002515466150000081
Measuring an input current provided by the ac power source; and determining a period compensation reference current of the PFC device for the alternating current power supply according to the input current. Specific offset reference current
Figure BDA0002515466150000082
May for example be selected such that the difference between the total current harmonic distortion of a plurality of training PFC devices is greater than a predetermined threshold.
Determining the cycle compensation reference current of the PFC device for the ac power source from the input current may include: determining the period-compensated reference current I according to equation 2cyc_comp：
Figure BDA0002515466150000083
Wherein the content of the first and second substances,
Figure BDA0002515466150000084
is the maximum value of the input current for the positive half cycle of the input current,
Figure BDA0002515466150000085
is the minimum value of the input current for a negative half cycle of the input current, and S1Is the ratio of the conversion from the scale of the MCU to the scale of the actual measured current.
In step S220, the total current harmonic distortion of the ac power source is measured with the period compensation reference current applied (e.g., measured using a power meter).
In step S230, an optimal offset reference current of the PFC device for the ac power supply is determined according to the total current harmonic distortion using a pre-fitted optimal offset reference current versus total current harmonic distortion curve, wherein the optimal offset reference current is the offset reference current at which the total current harmonic distortion is the minimum.
The pre-fitted curve of the variation of the best offset reference current with the total current harmonic distortion used in step S230 may be obtained by: determining periodic compensation reference currents of a plurality of training PFC devices; respectively determining the variation curves F (x) of the total current harmonic distortion of a plurality of training PFC equipment along with the offset reference current x under the condition of applying the period compensation reference current; and determining, for each of a plurality of training PFC devices, an optimal offset reference current corresponding to a minimum total current harmonic distortion from the variation curve f (x)
Figure BDA0002515466150000086
And a specific offset reference current
Figure BDA0002515466150000087
Corresponding total current harmonic distortion
Figure BDA0002515466150000088
And according to an optimal offset reference current corresponding to a plurality of training PFC devices
Figure BDA0002515466150000089
And total current harmonic distortion
Figure BDA00025154661500000810
A curve f (y) of the variation of the best offset reference current with the total current harmonic distortion y is fitted.
Fig. 3 shows a graph f (x) of iTHD with respect to an offset reference current x with six training PFC devices according to an embodiment of the present disclosure. The horizontal axis is the offset reference current and the vertical axis is the ith measured by the precision power meter. It can be seen that the curve corresponding to each of the six training PFC devices has a minimum value, e.g., a minimum value is indicated for device F, 302, and the offset reference current corresponding to this minimum value is the optimal offset reference current. In addition, as can also be seen from fig. 3, when the offset reference current is 100, a relatively large ith is distinguished for each PFC device, that is, when the offset reference current is 100, the difference between the ith of the respective PFC devices is large, for example, larger than a predetermined threshold value, and thus 100 may be selected as a specific offset reference current
Figure BDA0002515466150000091
Table 1 shows the optimal offset reference current corresponding to the minimum total current harmonic distortion and the total current harmonic distortion when the offset reference current takes a certain offset reference current 100 for six training PFC devices, and fig. 4 shows the variation curve f (y) of the optimal offset reference current with the total current harmonic distortion y fitted according to the parameters in table 1.
TABLE 1
iTHD (%) (specific offset reference current ═ 1o0) Optimum offset reference current (mA) PFC device
12.7 290 B
13 300 E
17.7 400 F
22.3 500 C
24.5 550 D
26.5 600 A
For simplicity, the variation curve F (y) is fitted as low-dimensional as possible, for example, in fig. 4, the variation curve is linear, i.e., the optimum offset reference current F (y) is 22.64 × y — 22.64 × F (100).
Step S230 may include: measuring when a specific offset is applied to the reference current
Figure BDA0002515466150000093
A total current harmonic distortion when applied to the PFC device, and determining an optimum offset reference current for the PFC device for the ac power supply from the pre-fitted variation curve and the measured total current harmonic distortion.
In step S240, the total current harmonic distortion of the ac power supply is optimized according to the optimal offset reference current and the period compensation reference current.
Step S240 may include: according to instantaneous input voltage V of AC power supplyAcAnd the loop output voltage of the PFC, for example according to equation 1, to determine the basic reference current of the ac power supply;
determining a new reference current I 'for the positive half cycle of the input current according to equation 3'ref is positive：
Figure BDA0002515466150000092
And
determining a new reference current I 'for the negative half-cycle of the input current according to equation 4'Negative ref：
Figure BDA0002515466150000101
Wherein, IrefIs a basic reference current that is used to,
Figure BDA0002515466150000102
is an optimum offset reference current, and Icyc_compIs a period compensated reference current. It should be noted that it is preferable that,
Figure BDA0002515466150000103
and
Figure BDA0002515466150000104
is fixed for each PFC device.
In fitting the best offset reference current versus total current harmonic distortion curve, each training PFC device may be configured to minimize the current input to the training PFC device, in which case the generated ith is the worst, thereby achieving optimization of the worst ith for that device. For example, iTHD is measured with training PFC devices with an input range of 180Vrms to 277Vrms (operating frequency of 50/60Hz) and with 10% to 100% of full load. From measurements, it can be determined that the resulting ith is worst when 277rms, 60Hz, and 10% of full load are taken, so that the optimization method according to embodiments of the present disclosure is performed with the ith worst. It should also be noted that the PFC device (e.g., PFC device 103 of fig. 1) may also be configured in the manner described above prior to performing method 200.
Fig. 5 shows a block diagram of an MCU 500 for optimizing total current harmonic distortion of an ac power source in accordance with an embodiment of the present disclosure. MCU 500 may include a first determination module 510, a measurement module 520, a second determination module 530, and an optimization module 540.
The first determination module 510 may be configured to determine a cycle compensation reference current of the PFC device for the ac power source from an input current provided by the ac power source. The measurement module 520 may be configured to measure the total current harmonic distortion of the ac power source with the application of the period-compensated reference current. The first determination module 510 may be further configured to: at the application of a specific offset reference current
Figure BDA0002515466150000105
Measuring an input current provided by an ac power source; and determining a cycle compensation reference current for the ac power supply for the PFC device from the input current, for example according to equation 2. Specific offset reference current
Figure BDA0002515466150000106
May for example be selected such that the difference between the total current harmonic distortion of a plurality of training PFC devices is greater than a predetermined threshold.
The second determining module 530 may be configured to determine the harmonic distortion of the total current from the reference current using a pre-fit best-offset reference current versus total currentCurrent harmonic distortion to determine an optimal offset reference current for the PFC device for the ac power source, wherein the optimal offset reference current is the offset reference current at which the total current harmonic distortion is the smallest. The pre-fitted curve of the variation of the best-offset reference current with the total current harmonic distortion may be obtained by: determining periodic compensation reference currents of a plurality of training PFC devices; respectively determining the variation curves F (x) of the total current harmonic distortion of a plurality of training PFC equipment along with the offset reference current x under the condition of applying the period compensation reference current; and determining, for each of a plurality of training PFC devices, an optimal offset reference current corresponding to a minimum total current harmonic distortion from the variation curve f (x)
Figure BDA0002515466150000111
And a specific offset reference current
Figure BDA0002515466150000112
Corresponding total current harmonic distortion
Figure BDA0002515466150000113
And according to an optimal offset reference current corresponding to a plurality of training PFC devices
Figure BDA0002515466150000114
And total current harmonic distortion
Figure BDA0002515466150000115
A curve f (y) of the variation of the best offset reference current with the total current harmonic distortion y is fitted.
The second determining module 530 may be further configured to: measuring when a specific offset is applied to the reference current
Figure BDA0002515466150000116
A total current harmonic distortion when applied to the PFC device, and determining an optimum offset reference current for the PFC device for the ac power supply from the pre-fitted variation curve and the measured total current harmonic distortion.
The optimization module 540 may be configured as a rootThe total current harmonic distortion of the AC power source is optimized based on the optimal offset reference current and the period compensation reference current. The optimization module 540 may be further configured to: determining a base reference current of the ac power supply from an instantaneous input voltage of the ac power supply and a loop output voltage of the PFC, for example, according to equation 1; determining a new reference current I 'for the positive half cycle of the input current according to equation 3'ref is positiveAnd determining a new reference current I 'for the negative half cycle of the input current according to equation 4'Negative ref。
The effects of the method for optimizing total current harmonic distortion of an ac power supply according to an embodiment of the present disclosure will be explained below with reference to fig. 6 to 8. Fig. 6 shows a schematic of AC voltage and input current waveforms before applying an optimization method according to an embodiment of the disclosure. When the PFC device is operating at very low loads, whether in continuous conduction mode or discontinuous conduction mode, the shape of the input current more closely resembles a triangular wave rather than a smooth sinusoidal wave, as shown, for example, in fig. 6. As can be seen from fig. 6, certain types of PFC designs also cause unbalanced input currents, especially for small load operation. 601 and 602 indicate the magnitude of the input current for the maximum value of the positive half cycle and for the minimum value of the negative half cycle of the input current, respectively, and 603 indicates the thd measurement, which is close to 30%. The difference between 601 and 602 will result in severe even harmonic distortion rather than odd harmonic distortion. To make the magnitudes of the positive and negative currents the base reference current may be corrected by the period compensation reference current calculated by equation 2 (i.e., for the positive half-cycles the corrected reference current is the difference between the base reference current and the period compensation reference current, and for the negative half-cycles the corrected reference current is the sum of the base reference current and the period compensation reference current) to make I in fig. 6 the sameinAdjusted to I in FIG. 7inIn fig. 7, the amplitude 701 is 702, and 703 indicates that the iTHD measurement value is reduced to 20%. It can be seen that thd is optimized somewhat in the case where only a period-compensated reference current is applied. FIG. 8 illustrates AC voltage and input current waveforms after applying an optimization method according to an embodiment of the disclosureSchematic representation. As can be seen from fig. 8, the ith measurement indicated at 803 further drops to 10%.
With the method according to the embodiment of the present disclosure, the ith is optimized by introducing the period compensation reference current, and the variation curve of the pre-fitted optimal offset reference current with the harmonic distortion of the total current is obtained by analyzing a small number of PFC devices, and then the optimal offset reference current for any PFC device can be calculated using the variation curve, thereby achieving the purpose of further optimizing the ith while reducing the amount of calculation.
Some block diagrams and/or flow diagrams are shown in the figures. It will be understood that some blocks of the block diagrams and/or flowchart illustrations, or combinations thereof, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the instructions, which execute via the processor, create means for implementing the functions/acts specified in the block diagrams and/or flowchart block or blocks.
Accordingly, the techniques of this disclosure may be implemented in hardware and/or software (including firmware, microcode, etc.). In addition, the techniques of this disclosure may take the form of a computer program product on a computer-readable medium having instructions stored thereon for use by or in connection with an instruction execution system (e.g., one or more processors). In the context of this disclosure, a computer-readable medium may be any medium that can contain, store, communicate, propagate, or transport the instructions. For example, the computer readable medium can include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, device, or propagation medium. Specific examples of the computer readable medium include: magnetic storage devices, such as magnetic tape or Hard Disk Drives (HDDs); optical storage devices, such as compact disks (CD-ROMs); a memory, such as a Random Access Memory (RAM) or a flash memory; and/or wired/wireless communication links.
The foregoing detailed description has set forth numerous embodiments of a method and MCU for optimizing total current harmonic distortion of an ac power source using schematics, flowcharts, and/or examples. Where such diagrams, flowcharts, and/or examples contain one or more functions and/or operations, it will be understood by those within the art that each function and/or operation within such diagrams, flowcharts, or examples can be implemented, individually and/or collectively, by a wide range of structures, hardware, software, firmware, or virtually any combination thereof. In one embodiment, portions of the subject matter described in embodiments of the present disclosure may be implemented by Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs), Digital Signal Processors (DSPs), or other integrated formats. However, those skilled in the art will recognize that some aspects of the embodiments disclosed herein, in whole or in part, can be equivalently implemented in integrated circuits, as one or more computer programs running on one or more computers (e.g., as one or more programs running on one or more computer systems), as one or more programs running on one or more processors (e.g., as one or more programs running on one or more microprocessors), as firmware, or as virtually any combination thereof, and that designing the circuitry and/or writing the code for the software and or firmware would be well within the skill of one of skill in the art in light of this disclosure. In addition, those skilled in the art will appreciate that the mechanisms of the subject matter described herein are capable of being distributed as a program product in a variety of forms, and that an illustrative embodiment of the subject matter described herein applies regardless of the particular type of signal bearing media used to actually carry out the distribution. Examples of signal bearing media include, but are not limited to: recordable type media such as floppy disks, hard disk drives, Compact Disks (CDs), Digital Versatile Disks (DVDs), digital tape, computer memory, etc.; and a transmission type medium such as a digital and/or an analog communication medium (e.g., a fiber optic cable, a waveguide, a wired communications link, a wireless communication link, etc.).

Claims (16)

1. A method in a micro control unit, MCU, for optimizing total current harmonic distortion of an ac power source, comprising:
determining a power factor correction, PFC, device cycle compensation reference current for the AC power source from an input current provided by the AC power source;
measuring total current harmonic distortion of the ac power source with the application of the period-compensated reference current;
determining an optimal offset reference current of the PFC device for the alternating current power supply according to total current harmonic distortion by utilizing a pre-fitted optimal offset reference current variation curve along with the total current harmonic distortion, wherein the optimal offset reference current is the offset reference current when the total current harmonic distortion is minimum; and
and optimizing the total current harmonic distortion of the alternating current power supply according to the optimal offset reference current and the period compensation reference current.
2. The method of claim 1, wherein optimizing total current harmonic distortion of the ac power source from the optimal offset reference current and the period compensation reference current comprises:
determining a basic reference current of the alternating current power supply according to an instantaneous input voltage of the alternating current power supply and a loop output voltage of the PFC device;
determining a new reference current I 'for a positive half-cycle of the input current according to'ref is positive：
Figure FDA0002515466140000011
And
determining a new reference current I 'for a negative half-cycle of the input current according to'Negative ref：
Figure FDA0002515466140000012
Wherein, IrefIs the basic reference current that is to be measured,
Figure FDA0002515466140000013
is the optimum offset reference current, and Icyc_compIs the period compensated reference current.
3. The method of claim 1, wherein the pre-fitted best offset reference current versus total current harmonic distortion curve is obtained by:
determining a period compensation reference current for a plurality of PFC devices;
determining a curve F (x) of the total current harmonic distortion of the plurality of PFC devices with the offset reference current x under the condition of applying the period compensation reference current; and
determining, for each of the plurality of PFC devices, an optimal offset reference current corresponding to a minimum total current harmonic distortion from the variation curve F (x)
Figure FDA0002515466140000021
And a specific offset reference current
Figure FDA0002515466140000022
Corresponding total current harmonic distortion
Figure FDA0002515466140000023
And according to the optimal offset reference current corresponding to the plurality of PFC devices
Figure FDA0002515466140000024
And total current harmonic distortion
Figure FDA0002515466140000025
Fitting a curve f (y) of the variation of the optimal offset reference current with the total current harmonic distortion y.
4. The method of claim 3, wherein the particular offset reference current
Figure FDA0002515466140000026
Is selected such that a difference between total current harmonic distortion of the plurality of PFC devices is greater than a predetermined threshold.
5. The method of claim 3, wherein determining the cycle compensated reference current of the PFC device for the AC power source from the input current provided by the AC power source comprises:
applying the specific offset reference current
Figure FDA0002515466140000027
Measuring an input current provided by the ac power source; and
determining a period compensation reference current of the PFC device for the AC power source according to the input current.
6. The method of claim 5, wherein determining the cycle compensated reference current for the AC power source by the PFC device based on the input current comprises:
determining the period-compensated reference current I according tocyc_comp：
Figure FDA0002515466140000028
Wherein the content of the first and second substances,
Figure FDA0002515466140000029
is the maximum value of the input current for the positive half cycle of the input current,
Figure FDA00025154661400000210
is the minimum value of the input current for a negative half cycle of the input current, and S1Is the ratio of the conversion from the scale of the MCU to the scale of the actual measured current.
7. The method of claim 3, wherein determining the optimal offset reference current for the Power Factor Correction (PFC) device for the AC power supply using a pre-fit optimal offset reference current versus total current harmonic distortion curve comprises:
measuring the specific offset reference current
Figure FDA00025154661400000211
Total current harmonic distortion when applied to the PFC device, and determining an optimum offset reference current for a power factor correction PFC device for the AC power supply from the pre-fitted variation curve and the measured total current harmonic distortion.
8. The method of claim 2, wherein determining the base reference current of the ac power source from the instantaneous input voltage of the ac power source and the loop output voltage of the PFC device comprises:
determining the base reference current according to:
Iref＝A x B x C，
wherein A is the loop output voltage of the PFC device, B is
Figure FDA0002515466140000031
And C is the instantaneous input voltage VAC。
9. A MCU for optimizing total current harmonic distortion of an ac power source, comprising:
a first determination module configured to determine a power factor correction, PFC, device cycle compensation reference current for the AC power source from an input current provided by the AC power source;
a measurement module configured to measure a total current harmonic distortion of the AC power source with the period-compensated reference current applied;
a second determination module configured to determine an optimal offset reference current for the PFC device for the AC power supply from a total current harmonic distortion using a pre-fitted optimal offset reference current versus total current harmonic distortion curve, wherein the optimal offset reference current is the offset reference current at which total current harmonic distortion is minimal; and
an optimization module configured to optimize total current harmonic distortion of the AC power source based on the optimal offset reference current and the period compensation reference current.
10. The MCU of claim 9, wherein the optimization module is further configured to:
determining a basic reference current of the alternating current power supply according to an instantaneous input voltage of the alternating current power supply and a loop output voltage of the PFC device;
determining a new reference current I 'for a positive half-cycle of the input current according to'ref is positive：
Figure FDA0002515466140000032
And
determining a new reference current I 'for a negative half-cycle of the input current according to'Negative ref：
Figure FDA0002515466140000041
Wherein, IrefIs the basic reference current that is to be measured,
Figure FDA0002515466140000042
is the optimum offset reference current, and Icyc_compIs the period compensated reference current.
11. The MCU of claim 9, wherein the pre-fitted best offset reference current versus total current harmonic distortion curve is obtained by:
determining a period compensation reference current for a plurality of PFC devices;
determining a curve F (x) of the total current harmonic distortion of the plurality of PFC devices with the offset reference current x under the condition of applying the period compensation reference current; and
determining, for each of the plurality of PFC devices, an optimal offset reference current corresponding to a minimum total current harmonic distortion from the variation curve F (x)
Figure FDA0002515466140000043
And a specific offset reference current
Figure FDA0002515466140000044
Corresponding total current harmonic distortion
Figure FDA0002515466140000045
And according to the optimal offset reference current corresponding to the plurality of PFC devices
Figure FDA0002515466140000046
And total current harmonic distortion
Figure FDA0002515466140000047
Fitting a curve f (y) of the variation of the optimal offset reference current with the total current harmonic distortion y.
12. The MCU of claim 11, wherein the specific offset reference current
Figure FDA0002515466140000048
Is selected such that a difference between total current harmonic distortion of the plurality of PFC devices is greater than a predetermined threshold.
13. The MCU of claim 11, wherein the first determination module is further configured to:
applying the specific offset reference current
Figure FDA0002515466140000049
Measuring an input current provided by the ac power source; and
determining a period compensation reference current of the PFC device for the AC power source according to the input current.
14. The MCU of claim 13, wherein the first determination module is further configured to:
determining the period-compensated reference current I according tocyc_comp：
Figure FDA00025154661400000410
Wherein the content of the first and second substances,
Figure FDA00025154661400000411
is the maximum value of the input current for the positive half cycle of the input current,
Figure FDA0002515466140000051
is the minimum value of the input current for a negative half cycle of the input current, and S1Is the ratio of the conversion from the scale of the MCU to the scale of the actual measured current.
15. The MCU of claim 11, wherein the second determination module is further configured to:
measuring the specific offset reference current
Figure FDA0002515466140000052
Total current harmonic distortion when applied to the PFC device, and determining an optimum offset reference current for a power factor correction PFC device for the AC power supply from the pre-fitted variation curve and the measured total current harmonic distortion。
16. The MCU of claim 10, wherein the optimization module is further configured to:
determining the base reference current according to:
Iref＝A x B x C，
wherein A is the loop output voltage of the PFC device, B is
Figure FDA0002515466140000053
And C is the instantaneous input voltage VAC。
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