CN113742092A

CN113742092A - Concurrency algorithm

Info

Publication number: CN113742092A
Application number: CN202111051737.2A
Authority: CN
Inventors: 李永进; 张骄阳
Original assignee: Individual
Current assignee: Individual
Priority date: 2021-09-09
Filing date: 2021-09-09
Publication date: 2021-12-03

Abstract

With the advent of the computer parallel era, lock-based concurrency control has tended to cause valuable CPU time to be wasted waiting. In order to solve this problem, the present invention proposes a lock-free concurrent algorithm, in which one program is divided into a plurality of code blocks in units of threads, and the code blocks are respectively handed to each CPU or an independent execution module (hereinafter, referred to as a CPU core) to be executed. The code blocks with the same mutual exclusion relation are sequentially executed, so that idle waiting of a CPU is avoided, and the execution sequence and priority can be set. With the present algorithm support, the computer system will not even need a hardware lock and its associated instructions.

Description

Concurrency algorithm

Technical Field

The technology belongs to the fields of computer software, hardware algorithm and compiling optimization.

Background

With the development of computer technology, computer hardware and software nowadays enter a parallel era, which makes the current software and hardware concurrent technology meet unprecedented challenges. In high concurrency situations where consistent synchronization of data becomes difficult, lock-based concurrency control is very likely to cause valuable CPU time to be wasted on wait. In order to solve the problem, the invention provides an algorithm which can be used from a bottom layer technology to an upper layer application, so that the waiting time of a system approaches to 0, the complexity of concurrent programming and hardware is simplified, the performance of a computer system is improved, and the design difficulty of the system is reduced.

Disclosure of Invention

The invention relates to a concurrency algorithm, which mainly comprises the following contents: one program is divided into a plurality of code blocks for each thread, and each code block is handed to each CPU or an independent execution module (hereinafter, referred to as a CPU core) to be executed. In the set of code blocks with the same mutual exclusion relationship, only one code block can be executed at the same time. The code block is executed before another code block of the same mutual exclusion relationship is executed. Thus, CPU idle waiting is avoided, and the execution order and priority can be set. With the present algorithm support, the computer system will not even need a hardware lock and its associated instructions.

Modern multi-core computer programs generally use mechanisms such as locks and critical sections to ensure the access security of a certain block of code among threads. However, this mechanism is preemptive, and has problems such as idle waiting of the CPU core. Therefore, the present invention proposes a new structure to logically guarantee that only one code block can be executed at a time in a set of mutually exclusive code blocks. Such code blocks are referred to as mutex blocks. The code blocks with the same mutual exclusion relationship are collected and called mutual exclusion group. This mechanism relies on the execution order of the programs rather than the hardware and software lock mechanism. The detailed process is as follows:

the program starts multiple threads (single-threaded programs are not under consideration) while running (see fig. 1), and each thread respectively dispatches code to the CPU core for execution (see fig. 2). For example, as shown in FIG. 1, there are m threads in the program, and each thread has n Code blocks, from Code _ blockm1 to Code _ blockmn, respectively. These code blocks are scheduled to k CPU cores, with the scheduling result assumed to be fig. 2, without including any mutual exclusion requirements. However, if there is a mutex group between threads (see fig. 3, Code _ mutex13 indicates mutex group 1, and the mutex block number is 3), only one mutex block is executed when any mutex block in the mutex group is executed, and other mutex blocks to be executed can only wait. After the execution of the mutex block is completed, another mutex block in the mutex group is executed again until the execution of the mutex block that needs to be executed in the complete mutex group is completed (see fig. 4, the execution of other code blocks may not be as regular as in the figure, and is only used for illustration). No locks are used during the entire execution, nor are any CPU idles generated.

On this basis, a priority rule may also be specified for a particular thread, causing the thread to execute according to the rule.

Claims

1. A concurrent execution algorithm, characterized by:

s1, a plurality of units executing concurrently exist;

s2, existence of the mutual exclusion block defined in [0004 ];

s3, executing the mutual exclusion block according to the rule described in [0004 ].

2. A software concurrency algorithm according to claim 1, wherein:

s1, a plurality of concurrent execution units are contained in the software;

s2, including the mutual exclusion block defined in [0004] in the software;

s3, the software executes the mutual exclusion block according to the rule described in [0004 ].

3. The compilation optimization algorithm of claim 1, wherein:

s1, the compiled code comprises a plurality of concurrent execution units;

s2, the compiled code contains the mutual exclusion block defined in [0004 ];

s3, the compiled code executes the mutex block according to the rule described in [0004 ].

4. The hardware concurrency algorithm of claim 1, wherein:

s1, a plurality of units executing concurrently exist;

s2, existence of the mutual exclusion block defined in [0004 ];

5. The method of claim 1, wherein:

priority rules are specified on the basis of claim 1 or claim 2 or claim 3 or claim 4.