CN113728631B

CN113728631B - Intra sub-block segmentation and multiple transform selection

Info

Publication number: CN113728631B
Application number: CN202080031501.XA
Authority: CN
Inventors: 张莉; 张凯; 刘鸿彬; 王悦
Original assignee: Beijing ByteDance Network Technology Co Ltd; ByteDance Inc
Current assignee: Beijing ByteDance Network Technology Co Ltd; ByteDance Inc
Priority date: 2019-04-27
Filing date: 2020-04-27
Publication date: 2024-04-02
Anticipated expiration: 2040-04-27
Also published as: CN113728631A; WO2020221213A1

Abstract

Intra sub-block segmentation and multiple transform selection are described. In one example aspect, a video processing method includes enabling an intra sub-block partitioning (ISP) mode for a block of video for conversion between the block and a bit stream representation of the block, wherein the block is partitioned into a plurality of sub-partitions based on the ISP mode; enabling a second mode different from the ISP mode of the block; and performing conversion based on the ISP mode and the second mode.

Description

Intra sub-block segmentation and multiple transform selection

Cross Reference to Related Applications

The present application is presented in accordance with applicable patent laws and/or regulations of the Paris convention for the purpose of timely claiming priority and benefit from International patent application No. PCT/CN2019/084699 filed on day 27 of 4 of 2019. The entire disclosure of international patent application No. pct/CN2019/084699 is incorporated by reference as part of the disclosure of the present application.

Technical Field

This patent document relates to video encoding and decoding techniques, apparatuses and systems.

Background

Despite advances in video compression, digital video still occupies the maximum bandwidth used on the internet and other digital communication networks. As the number of connected user devices capable of receiving and displaying video increases, the bandwidth requirements for digital video usage are expected to continue to increase.

Disclosure of Invention

This document describes various embodiments and techniques in which secondary transforms are used during decoding or encoding of video or images.

In one example aspect, a method of video processing is disclosed. The method includes dividing a block of video data into sub-blocks using a division mode, performing prediction of a current sub-block of the sub-blocks using at least one line of reference video data that is not adjacent to the current sub-block, and generating a residual signal of the current sub-block based on the prediction.

In yet another example aspect, another method of video processing is disclosed. The method includes dividing a block of video data into sub-blocks using a division mode, performing prediction of the sub-blocks by calculating a matrix vector product based on a reference signal of each sub-block, and generating a residual signal of the sub-block based on the prediction.

In yet another example aspect, another method of video processing is disclosed. The method includes receiving a block of video data segmented into sub-blocks using a segmentation mode, performing prediction of a current sub-block of the sub-blocks using at least one line of reference video data that is not adjacent to the current sub-frame, and reconstructing the current sub-block using the prediction.

In yet another example aspect, another method of video processing is disclosed. The method includes receiving a block of video data segmented into sub-blocks using a segmentation mode, performing prediction of the sub-blocks by calculating a matrix vector product based on a reference signal of each sub-block, and reconstructing the sub-blocks using the prediction.

In yet another example aspect, another method of video processing is disclosed. The method includes performing prediction on a block of video data partitioned into sub-blocks using a partition mode, and transforming a residual signal of the sub-block based on the prediction. The largest transform block dimension or the smallest transform block dimension is indicated in a level of a sequence, picture, slice, group of slices, slice or brick in a bitstream representing a block of video data.

In yet another example aspect, another method of video processing is disclosed. The method includes receiving a bitstream representing a block of video data segmented into sub-blocks using a segmentation mode, performing an inverse transform on a residual signal of the sub-block, and reconstructing the sub-block using an output from the inverse transform. The maximum transform block dimension or the minimum transform block dimension is indicated in a sequence, picture, slice, group of slices, tile or block level in the bitstream.

In yet another example aspect, another method of video processing is disclosed. The method includes receiving or transmitting a bitstream representing a block of video data for performing video processing. The video data block is divided into sub-blocks using a division mode, and residual signals of the sub-blocks are quantized in a bitstream, and the sub-blocks share the same quantization information.

In yet another example aspect, another method of video processing is disclosed. The method includes performing prediction on a block of video data partitioned into sub-blocks using a partition mode. The reference samples in the first sub-block are modified before being used to perform the prediction of the second sub-block. The method further includes encoding or reconstructing a block of video data based on the prediction.

In yet another example aspect, another method of video processing is disclosed. The method includes performing prediction on a block of video data partitioned into sub-blocks using a partition mode, and encoding or reconstructing the block of video data based on the prediction. The sub-blocks are partitioned in a plurality of partition directions.

In yet another example aspect, another method of video processing is disclosed. The method includes performing prediction of a block of video data to generate a residual signal, performing an explicit transformation of the residual signal using one of two transforms, and encoding an output from the implicit transformation.

In yet another example aspect, another method of video processing is disclosed. The method includes receiving a block of video data divided into one or more sub-blocks, performing an explicit transformation of the block of video data using one of two inverse transforms; and reconstructing the block of video data based on the implicit transform.

In yet another example aspect, another method of video processing is disclosed. The method includes enabling an intra sub-block partitioning (ISP) mode for a block of video for conversion between the block and a bit stream representation of the block, wherein the block is partitioned into a plurality of sub-partitions based on the ISP mode; enabling a second mode different from the ISP mode of the block; and performing conversion based on the ISP mode and the second mode.

In yet another example aspect, another method of video processing is disclosed. The method includes enabling an intra sub-block partitioning (ISP) mode of a block of video for conversion between the block and a bit stream representation of the block, wherein the block is partitioned into a plurality of sub-partitions based on the ISP mode, and reference samples located in a first sub-partition to predict a second sub-partition in the block are further modified prior to use as a prediction; and performing conversion based on the ISP mode.

In yet another example aspect, another method of video processing is disclosed. The method includes enabling an intra sub-block partitioning (ISP) mode of a block of video for conversion between the block and a bit stream representation of the block, wherein a hybrid partitioning direction is enabled in the ISP mode and the block is partitioned into a plurality of sub-partitions in horizontal and vertical directions; and performing conversion based on the ISP mode.

In yet another example aspect, another method of video processing is disclosed. The method includes determining a Multiple Transform Selection (MTS) scheme associated with a block of video for a transition between the block and a bitstream representation of the block, wherein the MTS scheme is modified to allow for a partial transform and a corresponding inverse transform; and performing a conversion based on the determined MTS scheme.

In yet another example aspect, a video encoder is disclosed. The video encoder includes a processor configured to perform one or more of the methods described above.

In yet another example aspect, a video decoder is disclosed. The video decoder includes a processor configured to perform one or more of the methods described above.

In yet another example aspect, a computer-readable medium is disclosed. The medium includes code stored on the medium for performing one or more of the methods described above.

These and other aspects are described in this document.

Drawings

Fig. 1 shows an example of a block diagram of an encoder.

Fig. 2 shows an example of 67 intra prediction modes.

Fig. 3A-3B show examples of reference samples for wide-angle intra prediction.

Fig. 4 is an example illustration of a discontinuity issue in the case of a direction exceeding 45 degrees.

Fig. 5A-5D show example illustrations of samples used by the PDPC applied to diagonal and adjacent-diagonal intra-frame modes.

Fig. 6 depicts an example of four reference rows.

Fig. 7 is an example of the division of 4×8 and 8×4 blocks.

Fig. 8 is an example of division of all blocks except 4×8, 8×4, and 4×4.

Fig. 9 is an example of Affine Linear Weighted Intra Prediction (ALWIP) for a 4x4 block.

FIG. 10 is an example of ALWIP for an 8x8 block.

FIG. 11 is an example of ALWIP for an 8x4 block.

FIG. 12 is an example of ALWIP for a 16x16 block.

Fig. 13 shows an example of the secondary transformation in JEM.

Fig. 14 shows an example of the proposed reduced quadratic transformation (RST).

Fig. 15 is a diagram of sub-block transform modes SBT-V and SBT-H.

FIG. 16 is a block diagram of an example hardware platform for performing the techniques described in this document.

Fig. 17 shows an example of missed partitions.

Fig. 18 is a flow diagram of a video processing method in accordance with one or more examples of the present technology.

Fig. 19 is a flow diagram of a video processing method in accordance with one or more examples of the present technology.

Fig. 20 is a flow diagram of a video processing method in accordance with one or more examples of the present technology.

Fig. 21 is a flow diagram of a video processing method in accordance with one or more examples of the present technology.

Fig. 22 is a flow diagram of a video processing method in accordance with one or more examples of the present technology.

Fig. 23 is a flow diagram of a video processing method in accordance with one or more examples of the present technology.

Fig. 24 is a flow diagram of a video processing method in accordance with one or more examples of the present technology.

Detailed Description

Section headings are used in this document to facilitate ease of understanding and the embodiments disclosed in the section are not limited to only this section. Furthermore, although certain embodiments are described with reference to a multi-function video codec or other specific video codec, the disclosed techniques are applicable to other video codec techniques as well. Furthermore, although some embodiments describe video encoding steps in detail, it will be appreciated that decoding of the corresponding steps of de-encoding will be performed by a decoder. Furthermore, the term video processing encompasses video encoding or compression, video decoding or decompression, and video transcoding, wherein video pixels are represented from one compression format to another or at different compression bit rates.

1. Summary of the invention

This patent document relates to video codec technology. In particular, it relates to the relevant transformations in video codec. It can be applied to existing video coding standards, such as HEVC, or standards to be completed (multi-function video coding). It may also be applicable to future video codec standards or video codecs.

2. Preliminary discussion

Video codec standards have been developed primarily by developing well-known ITU-T and ISO/IEC standards. The ITU-T makes H.261 and H.263, the ISO/IEC makes MPEG-1 and MPEG-4Visual, and the two organizations together make the H.262/MPEG-2 video and H.264/MPEG-4 Advanced Video Codec (AVC) and H.265/HEVC standards. Starting from h.262, the video codec standard is based on a hybrid video codec structure, where temporal prediction and transform coding are utilized. To explore future video codec technologies beyond HEVC, VCEG and MPEG have jointly established a joint video exploration team (jfet) in 2015. Thereafter, jfet takes in many new approaches and introduces them into reference software named "joint exploration model" (JEM). In month 4 2018, a joint video expert team (jfet) between VCEG (Q6/16) and ISO/IEC JTC1 SC29/WG11 (MPEG) holds to address the VVC standard, which reduces the bit rate by 50% compared to HEVC.

2.1 codec flow for typical video codec

Fig. 1 shows an example of an encoder block diagram of a VVC, which contains three loop filter blocks: deblocking Filter (DF), sample Adaptive Offset (SAO) and ALF. Unlike DF using a predefined filter, SAO and ALF exploit the original samples of the current picture to reduce the mean square error between the original samples and reconstructed samples by adding an offset and applying a Finite Impulse Response (FIR) filter, respectively, wherein the codec's side information signals the offset and filter coefficients. ALF is located at the final processing stage of each picture and can be considered as a tool that attempts to capture and repair artifacts created by the previous stage.

2.2 intra mode coding with 67 intra prediction modes

The number of directional intra modes extends from 33 used in HEVC to 65 in order to capture any edge direction presented in natural video. The additional orientation mode is indicated in fig. 6 by the red dashed arrow, the planar and DC modes remain unchanged. These denser directional intra prediction modes are applicable to all block sizes as well as luma and chroma intra predictions.

As shown in fig. 2, the conventional angular intra prediction direction is defined from 45 degrees to 135 degrees in the clockwise direction. In VTM2, several conventional angular intra prediction modes are adaptively replaced with wide-angle intra prediction modes for non-square blocks. The alternate mode is signaled using the original method and remapped to the index of the wide angle mode after parsing. The total number of intra prediction modes is unchanged, i.e., 67, and the intra mode codec is unchanged.

In HEVC, each intra-coding block has a square shape, and the length of each side thereof is a power of 2. Thus, the DC mode is used to generate the intra predictor without division. In VVV2, the blocks may have a rectangular shape, which typically requires division operations to be used for each block. To avoid division of the DC prediction, only the longer side is used to calculate the average of non-square blocks.

2.3 Wide-angle intra prediction of non-square blocks

The normal angular intra prediction direction is defined from 45 degrees to-135 degrees in the clockwise direction. In VTM2, several conventional angular intra prediction modes are adaptively replaced with wide-angle intra prediction modes for non-square blocks. The alternate mode is signaled using the original method and remapped to the index of the wide angle mode after parsing. The total number of intra prediction modes of a certain block is unchanged, i.e. 67, and the intra mode codec is unchanged.

To support these prediction directions, a top reference of length 2w+1 and a left reference of length 2h+1 are defined as shown in fig. 3A-3B.

The number of modes of the alternate modes in the wide-angle direction mode depends on the aspect ratio of the block. Alternative intra prediction modes are shown in table 1.

TABLE 1 intra prediction modes replaced by Wide-angle modes

Conditions (conditions)	Alternative intra prediction modes
		W/H＝＝2	Modes 2,3,4,5,6,7
W/H>2	Modes 2,3,4,5,6,7,8,9,10,11
		W/H＝＝1	Without any means for
H/W＝＝1/2	Mode 61,62,63,64,65,66
		H/W<1/2	Mode 57,58,59,60,61,62,63,64,65,66

As shown in fig. 4, in the case of wide-angle intra prediction, two vertically adjacent prediction samples may use two non-adjacent reference samples. Thus, a low-pass reference sample filter and side smoothing are applied to wide-angle prediction to reduce the increased gap Δp _α Is a negative effect of (2).

2.4 position-dependent intra prediction combining

In VTM2, the results of intra prediction of the planar mode are further modified by a position dependent intra prediction combining (PDPC) method. The PDPC is an intra prediction method that involves unfiltered boundary reference samples and a combination of HEVC intra prediction and filtered boundary reference samples. The PDPC is adapted for the following intra mode without signaling: plane, DC, horizontal, vertical, lower left corner mode and eight adjacent corner modes thereof, and upper right corner mode and eight adjacent corner modes thereof.

The prediction samples pred (x, y) are predicted using a linear combination of intra prediction modes (DC, plane, angle) and reference samples according to the following equation:

wherein R is _x,-1 ，R _-1,y Representing reference points located on top and left of the current point (x, y), respectively, and R _-1,-1 Representing the reference sample point located in the upper left corner of the current block.

If the PDPC is applied to DC, planar, horizontal and vertical intra modes, no additional boundary filters are required, which are required in the case of HEVC DC mode boundary filters or horizontal/vertical mode edge filters.

Fig. 5A-5D illustrate reference samples (R _x,-1 ，R _-1,y And R is _-1,-1 ) Is defined in (a). The prediction samples pred (x ', y') are located at (x ', y') within the prediction block. Reference point R _x,-1 The coordinate x of (2) is given by: x=x '+y' +1, and reference point R _-1,y The coordinates y of (c) are similarly given by: y=x '+y' +1.

Fig. 5A to 5D provide definitions of the samples used by the PDPC applied to the diagonal and adjacent angular intra modes.

The PDPC weights depend on the prediction mode and are shown in table 2.

Table 2-example of PDPC weights according to prediction mode

Prediction mode	wT	wL	wTL
				Diagonal upper right	16>>((y’<<1)>>shift)	16>>((x’<<1)>>shift)	0
Lower left diagonal corner	16>>((y’<<1)>>shift)	16>>((x’<<1)>>shift)	0
				Adjacent diagonal upper right	32>>((y’<<1)>>shift)	0	0
Lower left of adjacent diagonal angles	0	32>>((x’<<1)>>shift)	0

2.5. Multiple reference rows

Multiple Reference Line (MRL) intra prediction uses more reference lines for intra prediction. In fig. 6, an example of 4 reference rows is depicted, where the samples of segments a and F are not obtained from reconstructing neighboring samples, but are filled with the closest samples from segments B and E, respectively. HEVC intra picture prediction uses the nearest reference line (i.e., reference line 0). In the MRL, 2 additional rows (reference row 1 and reference row 3) are used.

The index (mrl _idx) of the selected reference line is signaled and used to generate the intra predictor. For reference row indexes greater than 0, only additional reference row modes in the MPM list are included and only the MPM index is signaled without the remaining modes. The reference row index is signaled before the intra prediction mode, and the plane and DC modes are excluded from the intra prediction mode if the non-zero reference row index is signaled.

The MRL is disabled for the first row block inside the CTU to prevent the use of extended reference samples outside the current CTU row. Likewise, the PDPC is disabled when additional rows are used.

2.6 intra sub-block partitioning (ISP)

An ISP is proposed that divides a luminance intra prediction block vertically or horizontally into 2 or 4 sub-partitions according to a block size dimension, as shown in the table. Fig. 7 and 8 show two examples of possibilities. Fig. 7 shows an example of the division of 4×8 and 8×4 blocks. Fig. 8 shows an example of division of all blocks except 4×8, 8×4, and 4×4. All sub-partitions satisfy the condition of at least 16 samples. For block sizes, if 4×n or n×4 (N > 8) is allowed, there may be 1×n or n×1 sub-partitions.

Table 3: number of sub-partitions depending on block size

For each of these sub-partitions, a residual signal is generated by entropy decoding the coefficients sent by the encoder, then inverse quantizing and inverse transforming them. Then, intra prediction is performed on the sub-partition, and finally, a corresponding reconstructed sample point is obtained by adding the residual signal to the prediction signal. Thus, the reconstructed value of each sub-partition will be available to generate a prediction of the next partition, which will repeat the process, and so on. All sub-partitions share the same intra mode.

Table 4 shows example transform types based on intra prediction mode(s).

Table 4: specifications of trTypeHor and trTypeVer depending on predModeintra

2.6.1 example grammar and semantics

Table 5 shows an example codec unit syntax.

Table 5: coding and decoding unit grammar

Table 6 shows an example transform unit syntax. Some example variables include:

intra_sub_modes_flag [ x0] [ y0] equal to 1 indicates that the current intra coding unit is partitioned into numintra sub-partitions of rectangular transform blocks [ x0] [ y0 ]. An intra_sub_modes_flag [ x0] [ y0] equal to 0 indicates that the current intra coding unit is not partitioned into rectangular transform block sub-partitions.

When intra_sub_modes_flag [ x0] [ y0] does not exist, it is inferred to be equal to 0.

intra_sub_split_flag [ x0] [ y0] specifies whether the intra sub-partition type is horizontal or vertical. When there is no intra_sub_split_flag [ x0] [ y0], it is inferred as follows:

if cbHeight is greater than MaxTbSizeY, then it is inferred that intra_sub_split_flag [ x0] [ y0] is equal to 0.

Otherwise (cbWidth greater than MaxTbSizeY), it is inferred that intra_sub_split_flag [ x0] [ y0] is equal to 1.

The variable intrasubpartitionsplit type specifies the partition type for the current luma codec block as shown in table 7 9. The intrasubpartitionsplit type is derived as follows:

If intra_sub_modes_flag [ x0] [ y0] is equal to 0, intra_sub_partitionsplit type is set equal to 0.

Otherwise, the intra-sub-partitionsplit type is set equal to 1+intra-sub-partitionsplit_flag [ x0] [ y0].

Table 6 conversion unit grammar

Table 7 shows example name associations with InstroParticSplitType

Table 7 associates with the name of the IntraPartification SplitType

IntraSubPartitionsSplitType	Name of IntraParticSplitType
		0	ISP_NO_SPLIT
1	ISP_HOR_SPLIT
		2	ISP_VER_SPLIT

The variable numintra sub-partitions specifies the number of transform block sub-partitions into which the intra luma codec block is partitioned. NumIntraPartification is derived as follows:

if InfraParationSplitType is equal to ISP_NO_SPLIT, numInfraParitions is set equal to 1.

Otherwise, numintrasub is set equal to 2 if one of the following conditions is satisfied: cbWidth equals 4 and cbHeight equals 8, cbWidth equals 8 and cbHeight equals 4.

Otherwise, numintrasub is set equal to 4.

2.7 affine Linear weighted intra prediction (ALWIP, also known as matrix-based intra prediction)

Affine linear weighted intra prediction (ALWIP, also known as matrix-based intra prediction (MIP)) is proposed.

2.7.1 generating a downscaled prediction Signal by matrix vector multiplication

First downsampling adjacent reference samples by averaging to generate a reduced reference signal bdry _red . Then, a reduced prediction signal pred is calculated by calculating a matrix vector product and adding an offset _red 。

pred _red ＝A·bdry _red +b。

Here, A is a matrix having W _red ·H _red A row, if w=h=4, has 4 columns, in all other cases 8 columns. b is the dimension W _red ·H _red Is a vector of (a).

2.7.2. Graphical representation of the entire ALWIP process

The overall process of averaging, matrix vector multiplication and linear interpolation is shown for different shapes in fig. 9-12. Note that the remaining shapes are treated as one of the cases shown.

Given a 4 x 4 block, as shown in fig. 9, ALWIP averages two along each axis of the boundary. The four input samples obtained enter matrix vector multiplication. The matrix is taken from set s_0. This resulted in 16 final predicted samples after the offset was added. Linear interpolation is not necessary for generating the prediction signal. Thus, a total of (4·16)/(4·4) =4 multiplications are performed per sample.

Given an 8 x 8 block, as shown in fig. 10, ALWIP averages four along each axis of the boundary. The eight input samples obtained enter matrix vector multiplication. The matrix is taken from set s_1. This produces 16 samples at odd positions of the prediction block. Thus, a total of (8·16)/(8·8) =2 multiplications are performed per sample. After adding the offset, these samples are interpolated vertically by using the reduced top boundary. Horizontal interpolation is then performed by using the original left boundary.

Given an 8 x 4 block, as shown in fig. 11, ALWIP takes four averages along the horizontal axis of the boundary and four raw boundary values on the left boundary. The eight input samples obtained enter matrix vector multiplication. The matrix is taken from set s_1. This produces 16 samples at odd levels and at each vertical position of the prediction block. Thus, a total of (8·16)/(8·4) =4 multiplications are performed per sample. After adding the offset, these samples are interpolated horizontally by using the original left boundary. The transpose case is handled accordingly.

Given a 16 x 16 block, as shown in fig. 12, ALWIP averages four along each axis of the boundary. The eight input samples obtained enter matrix vector multiplication. The matrix is taken from set s_2. This produces 64 samples at odd positions of the prediction block. Thus, a total of (8·64)/(16·16) =2 multiplications are performed per sample. After adding the offset, these samples were interpolated vertically by using the eight averages of the top boundary. Horizontal interpolation is then performed by using the original left boundary. In this case, the interpolation process does not add any multiplications. Thus, in general, two multiplications are required for each sample to calculate the ALWIP prediction.

For larger shapes, the process is essentially the same and it is easy to verify that the number of multiplications per sample is less than four.

For W x 8 blocks with W >8 only horizontal interpolation is required, since the samples are given at odd levels and at each vertical position.

Finally, let a_kbe be the matrix for W > 8W x 4 blocks, which is generated by truncating each row corresponding to an odd term along the horizontal axis of the downsampled block. Therefore, the output size is 32, and again, only horizontal interpolation needs to be performed.

The transpose case is handled accordingly.

2.7.1 grammar and semantic examples

Table 8 shows an example codec unit syntax

TABLE 8 coding unit syntax

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2.8 Multiple Transformation Sets (MTS) in VVC

2.8.1 explicit Multiple Transformation Set (MTS)

In VTM4, large block size transforms up to 64 x 64 in size are enabled, which are mainly useful for higher resolution video, such as 1080p and 4K sequences. For transform blocks of size (width or height, or both) equal to 64, the high frequency transform coefficients are zeroed out so that only the low frequency coefficients remain. For example, for an mxn transform block, where M is the block width and N is the block height, only the left 32 columns of transform coefficients are reserved when M equals 64. Similarly, when N equals 64, only the top 32 rows of transform coefficients are retained. When the transition skip mode is used for large blocks, the entire block will be used without zeroing out any value.

In addition to the DCT-II already employed in HEVC, residual coding is also performed on inter and intra codec blocks using a Multiple Transform Selection (MTS) scheme. Which uses a number of selected transforms from DCT8/DST 7. The newly introduced transformation matrices are DST-VII and DCT-VIII. The following table shows the basis functions of the selected DST/DCT.

In order to maintain orthogonality of the transform matrix, the transform matrix is quantized more precisely than in HEVC. In order to keep the intermediate values of the transform coefficients within a 16-bit range, all coefficients should have 10 bits after horizontal and vertical transforms.

To control the MTS scheme, separate enable flags are specified at the SPS level for intra and inter frames, respectively. When MTS is enabled at the SPS, a CU level flag is signaled to indicate whether MTS is applied. Here, MTS is applied only to brightness. The MTS CU level flag is signaled when the following conditions are met.

-both width and height are less than or equal to 32

-CBF flag equals one

If the MTS CU flag is equal to zero, DCT2 is applied in both directions. However, if the MTS CU flag is equal to one, the other two flags are additionally signaled to indicate the type of transform in the horizontal and vertical directions, respectively. The transformation and signaling mapping tables are shown in tables 3-10. When referring to the transform matrix accuracy, an 8-bit primary transform kernel is used. Thus, all transform kernels used in HEVC remain unchanged, including 4-point DCT-2 and DST-7, 8-point, 16-point and 32-point DCT-2. Moreover, other transform kernels, including 64-point DCT-2, 4-point DCT-8, 8-point, 16-point, 32-point DST-7 and DCT-8, all use 8-bit primary transform kernels.

To reduce the complexity of large-sized DST-7 and DCT-8, the high frequency transform coefficients of DST-7 and DCT-8, which are equal to 32 in size (width or height, or both width and height), are zeroed out. Only coefficients in the 16x16 low frequency region are retained.

As in HEVC, the residual of a block may be encoded with a transform skip mode. To avoid redundancy of syntax coding, the transform skip flag is not signaled when the CU level mts_cu_flag is not equal to 0. The block size limit for transform skip is the same as MTS in JEM4, indicating that transform skip applies to CUs when both block width and height are equal to or less than 32.

2.8.1.1 example grammar and semantics

MTS indexes may be signaled in the bit stream and this design is called explicit MTS. In addition, alternative methods of directly deriving the matrix from the transform block size, i.e., implicit MTS, are supported.

For explicit MTS, it supports all codec modes. Whereas for implicit MTS only intra mode is supported. Table 9 shows an example picture parameter set syntax.

Table 9 picture parameter set RBSP syntax.

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Table 10 shows an example transform unit syntax.

Table 10 transform unit grammar

Some of the example variables include:

transform_skip_flag [ x0] [ y0] specifies whether a transform is applied to a luma transform block. The array index x0, y0 specifies the position (x 0, y 0) of the top-left luminance sample of the transform block under consideration relative to the top-left luminance sample of the picture. transform_skip_flag [ x0] [ y0] is equal to 1, indicating that no transform is applied to the luma transform block. the transform_skip_flag [ x0] [ y0] equal to 0 indicates that the decision whether to apply a transform to a luma transform block depends on other syntax elements. When there is no transform_skip_flag [ x0] [ y0], it is inferred to be equal to 0.

tu_mts_idx [ x0] [ y0] specifies which transform kernels are applied to the residual samples along the horizontal and vertical directions of the associated luma transform block. The array index x0, y0 specifies the position (x 0, y 0) of the top-left luminance sample of the transform block under consideration relative to the top-left luminance sample of the picture.

When tu_mts_idx [ x0] [ y0] is not present, it is inferred to be equal to 0.

In the CABAC decoding process, one context is used to decode transform_skip_flag, and a truncated unary code is used to binarize tu_mts_idx. Each bin (binary bit) of tu_mts_idx is context-coded, and for the first bin, a quadtree depth (i.e., cqtDepth) is used to select one context; for the remaining bins, one context is used.

Table 11 shows an example allocation of ctxInc to syntax elements.

Table 11 assigns ctxInc to syntax element with context codec bin

2.8.2 implicit Multiple Transform Sets (MTS)

It should be noted that ISP enabled, SBT and MTS but with implicit signaling are all considered implicit MTS.

The implicitmttsenabled is used to define whether implicit MTS is enabled. The variable implicitmttsenabled is derived as follows:

if sps_mts_enabled_flag is equal to 1 and one of the following conditions is true, then implicmttsenabled is set equal to 1:

-InstrosubpartitionSplitType is not equal to ISP_NO_SPLIT

-cu_sbt_flag is equal to 1 and Max (nTbW, nTbH) is less than or equal to 32

Both the sps_explicit_mts_intra_enabled_flag and the sps_explicit_mts_inter_enabled_flag are equal to 0 and CuPredMode [ xtBY ] [ yTBY ] is equal to MODE_INTRA

Otherwise, implicitmttsenabled is set equal to 0.

The variable trTypeHor specifying the horizontal transform core and the variable trTypeVer specifying the vertical transform core are derived as follows:

if cIdx is greater than 0, trTypeHor and trTypeVer are set equal to 0.

Otherwise, if implicitmttsenabled equals 1, the following applies:

if IntraParticonSplitType is not equal to ISP_NO_SPLIT, then trTypeHor and trTypeVer are specified in Table 8 15 according to IntraPredMode.

Otherwise, if the cu_sbt_flag is equal to 1, trTypeHor and trTypeVer are specified in Table 8 14 according to the cu_sbt_horizontal_flag and the cu_sbt_pos_flag.

Otherwise (sps_explicit_mts_intra_enabled_flag and sps_explicit_mts_inter_enabled_flag equal to 0), trTypeHor and trTypeVer are derived as follows:

trTypeHor＝(nTbW>＝4&&nTbW<＝16&&nTbW<＝nTbH)？1:0(8 1030)

trTypeVer＝(nTbH>＝4&&nTbH<＝16&&nTbH<＝nTbW)？1:0(8 1031)

otherwise, trTypeHor and trTypeVer are specified in Table 12 based on tu_mts_idx [ xTbY ] [ yTbY ].

TABLE 12 specifications for trTypeHor and trTypeVer depending on tu_mts_idx [ x ] [ y ]

tu_mts_idx[x0][y0]	0	1	2	3	4
						trTypeHor	0	1	2	1	2
trTypeVer	0	1	1	2	2

Table 13 shows example specifications of trTypeHor and trTypeVer depending on the cu_sbt_horizontal_flag and the cu_sbt_pos_flag.

TABLE 13 specifications of trTypeHor and trTypeVer depending on the cu_sbt_horizontal_flag and the cu_sbt_pos_flag

cu_sbt_horizontal_flag	cu_sbt_pos_flag	trTypeHor	trTypeVer
				0	0	2	1
0	1	1	1
				1	0	1	2
1	1	1	1

2.9 reduced quadratic transform (RST)

2.9.1JEM inseparable quadratic transformation (NSST)

In JEM, a secondary transform is applied between the primary transform and quantization (at the encoder) and between dequantization and inverse primary transform (at the decoder side). As shown in fig. 10, performing a 4x4 (or 8x 8) quadratic transform depends on the block size. For example, a 4x4 quadratic transform is applied for small blocks (i.e., min (width, height) < 8), and an 8x8 quadratic transform is applied per 8x8 block for larger blocks (i.e., min (width, height) > 4).

Fig. 13 shows an example of the secondary transformation in JEM.

The application of the inseparable transformations is described below using inputs as examples. To apply the inseparable transform, a 4X4 input block X

First expressed as a vector

The inseparable transformation is calculated asWherein->The transform coefficient vector is indicated, and T is a 16x16 transform matrix. The 16x1 coefficient vector is then used (horizontal, vertical or diagonal) to vector +.>Reorganization is 4x4 blocks. The index smaller coefficients will be placed in the 4x4 coefficient block with a smaller scan index. There are a total of 35 transform sets and 3 inseparable transform matrices (kernels) are used per transform set. The mapping from intra prediction modes to transform sets is predefined. For each transform set, the secondary transform index signaled explicitly further specifies selected indivisible secondary transform candidates. Each intra CU signals an index in the bitstream after transforming the coefficients.

2.9.2 reduced quadratic transform (RST)

RST is introduced and 4 transform set (instead of 35) mappings are introduced. For 8x8 and 4x4 blocks, 16x64 (which may be further reduced to 16x 48) and 16x16 matrices are employed, respectively. For convenience, the 16x64 (possibly further reduced to 16x 48) transform is denoted RST8x8 and the 16x16 transform is denoted RST4x4. Fig. 11 shows an example of RST.

2.10 sub-block transforms

For inter-predicted CUs with cu_cbf equal to 1, cu_sbt_flag may be signaled to indicate whether to decode the entire residual block or a sub-portion of the residual block. In the former case, the inter MTS information is further parsed to determine the transform type of the CU. In the latter case, a part of the residual block is encoded by the inferred adaptive transform, while another part of the residual block is zeroed. SBT is not applied to the combined inter-intra mode.

In the sub-block transform, a position-dependent transform is applied to luminance transform blocks in SBT-V and SBT-H (chroma TB always uses DCT-2). The two positions of SBT-H and SBT-V are associated with different nuclear transformations. More specifically, the horizontal and vertical transforms for each SBT position are specified in fig. 15. For example, the horizontal and vertical transforms for SBT-V position 0 are DCT-8 and DST-7, respectively. When one side of the residual TU is greater than 32, the corresponding transform is set to DCT-2. Thus, the sub-block transforms collectively specify the TU brick, cbf, and horizontal and vertical transforms of the residual block, which can be considered as a syntax shortcut for the case where the main residual of the block is on one side of the block.

2.10.1 example grammar and semantics

Table 14 shows an example codec unit syntax.

TABLE 14 coding unit syntax

/>

Table 15 shows an example residual codec syntax.

Table 15 residual codec syntax.

/>

3. Example of problems solved by the embodiments

Current designs have the following problems:

1. ISP cannot be enabled when multiple reference rows (MRLs) are enabled.

2. Transform Skipping (TS) cannot be enabled when using an ISP. However, enabling ISP and TS simultaneously may achieve similar functionality as BDPCM without adding additional modules for processing BDPCM.

3. Each sub-partition signals Delta QP, which results in multiple signaling to the ISP codec block.

4. The ISP mode (e.g., intra_sub-options_mode_flag) is signaled to be enabled when the width or height of one block is not greater than MaxTbSizeY, and the partition direction (i.e., partition type, horizontal/vertical direction) is signaled when neither the width nor the height is greater than MaxTbSizeY. If one of them is greater than MaxTbSizeY, the following applies:

a. if the height is greater than MaxTbSizeY, then a horizontal division is used (i.e., intra_sub-alternatives_split_flag [ x0] [ y0] is inferred to be equal to 0).

b. Otherwise (width greater than MaxTbSizeY), vertical partitioning will be used (i.e., intra_sub-options_split_flag [ x0] [ y0] is inferred to be equal to 1).

Such a design is based on the following assumptions: only the width or height may be twice as large as MaxTbSizeY, which limits flexibility. When the maximum transform size is set to, for example, 32x32 and the CU size is, for example, 128x128, it will be divided into 4 128x32 sub-partitions according to the rules. However, when the maximum transform size is 32×32, one 128×32 sub-partition is not allowed to be encoded and decoded in VVC. How this is handled is unknown.

Both isp and sub-block transforms are considered implicit MTS because no signaling of the transform matrix is required. The sub-block transforms can support block sizes up to 64x64 when MaxSbtSize. However, the setting of the implicit MTS only checks whether Max (width, height) is less than or equal to 32. In addition, when cu_sbt_flag is equal to 1, the implicit MTS is automatically set to 1, so that the transform size does not need to be checked.

TS is part of MTS. However, signaling of the TS and the maximum TS size is signaled in PPS. The MTS enable/disable flag is signaled in the SPS.

7. Redundancy checks of block sizes are determined in current VVC designs for signaling transform_skip_flag and tu_mts_idx.

4. Example embodiments and techniques

The following list of embodiments should be regarded as examples to explain the general concept. These examples should not be construed in a narrow sense. Furthermore, the embodiments may be combined in any manner.

In the following description, one block size is denoted by w×h, where W is a block width and H is a block height. The maximum transform block size is denoted by MaxTbW, maxTbH, where MaxTbW and MaxTbH are the width and height of the maximum transform block, respectively. The size of the minimum transform block is denoted by mintbw×mintbh, where MinTbW and MinTbH are the width and height of the minimum transform block, respectively. It should be noted that MRL may represent those techniques that use non-adjacent reference lines in the current picture to predict the current block, while ALWIP may represent those techniques that use matrix-based intra prediction methods. They are not limited to those mentioned in the prior art.

Regarding ISP:

1. it is suggested that intra sub-block partitioning (ISP) mode and multi-reference line (MRL) mode may be enabled simultaneously (e.g., reference lines may not be the closest one) to codec a block.

a. In one example, all sub-partitions use the same reference row index for intra prediction.

b. Alternatively, only the first K (e.g., k=1) sub-partition follows the reference row index (e.g., signaled in the bitstream). The remaining sub-partitions still use the closest reference line for intra prediction.

c. In one example, whether or not to apply an MRL to the remaining sub-partitions (e.g., sub-partitions other than the first sub-partition) may depend on the partitioning direction in the ISP or/and the intra prediction mode or/and the dimension of the block.

i. For example, if a block is partitioned in the horizontal direction in an ISP, MRL may be applied to the remaining sub-partitions only if the lower left or/and upper neighboring reference (reconstruction) samples of the block are used in intra prediction of the first sub-partition. For example, in fig. 2 the prediction mode is less than or equal to 50.

For example, if a block is partitioned in the ISP in the horizontal direction, the MRL may not be applied to the remaining sub-partitions when the upper right neighboring reference (reconstruction) sample of the block is used in intra prediction of the first sub-partition. For example, in fig. 2 the prediction mode is greater than 50.

For example, if a block is partitioned in the vertical direction in an ISP, the MRL may be applied to the remaining sub-partitions only if the top left or/and top right neighboring reference (reconstruction) samples of the block are used in the intra prediction of the first sub-partition. For example, in fig. 2 the prediction mode is greater than or equal to 18.

For example, if a block is partitioned in the vertical direction in an ISP, then the MRL may not be applied to the remaining sub-partitions when the lower left adjacent reference (reconstruction) sample of the block is used in intra prediction of the first sub-partition. For example, in fig. 2 the prediction mode is less than 18.

2. An indication of ISP mode information (e.g., on/off, partition direction) may be signaled before the MRL related information is signaled.

a. In one example, signaling of MRL related information, such as reference row index, may be skipped when ISP mode is enabled for one block.

i. Alternatively, in addition, the reference row index is considered to be 0.

3. One block may enable both ALWIP and ISP.

a. Alternatively, in addition, the matrix selection of one sub-partition may depend on the intra-mode and/or the dimensions of the sub-partition.

b. Alternatively, in addition, an indication of ALWIP mode (e.g., intra_lwip_flag and associated intra mode) and an indication of ISP mode (e.g., intra_sub_modes_flag and intra_sub_split_flag)

4. One block may enable both Transform Skipping (TS) and ISP.

a. Alternatively, in addition, even when the ISP mode is enabled (e.g., the intrasubpartitionsplit type is not equal to isp_no_split), an indication to enable/disable the transition skip mode may be further signaled.

b. Alternatively, in addition, whether an indication to signal that the transition skip mode is enabled/disabled may depend on whether the video content is screen content.

i. In one example, it may depend on the flags signaled in the picture/stripe/slice group/slice/brick level.

in one example, if the video content is screen content, an indication to enable/disable the transform skip mode may be signaled. Alternatively, if the video content is camera content, the indication to enable/disable the transform skip mode may be skipped and the TS mode disabled for the ISP codec block.

5. It is suggested that only one quantization parameter and/or one quantization step and/or one scaling matrix may be allowed for the ISP codec block. That is, all sub-partitions share the same quantization information.

a. In one example, one quantization parameter may be represented by cu_qp_delta_abs and cu_qp_delta_sign_flag.

b. In one example, quantization parameter information may be signaled for an ISP codec block only when at least one coefficient not equal to zero is present in at least one sub-partition.

c. In one example, instead of signaling for each sub-partition, quantization parameters and/or a quantization step size and/or a scaling matrix may be signaled once for the entire ISP codec block.

i. In one example, the information is signaled with the mth sub-partition only if there is at least one coefficient in the mth sub-partition that is not equal to zero.

in one example, information may be signaled with the first sub-partition in the encoding/decoding order.

in one example, information may be signaled with the last sub-partition in the encoding/decoding order.

in one example, information may be signaled along with the mth sub-partition in the encoding/decoding order, where m is not greater than the total number of allowed sub-partitions.

6. It is suggested that reference samples located in the first sub-partition to predict a second sub-partition in the ISP codec block may be further modified (e.g., may be filtered) before being used as a prediction.

a. In one example, whether a reference sample is modified (e.g., filtered) before being used as a prediction may depend on the width and/or height of the block.

b. In one example, whether a reference sample is modified (e.g., filtered) before being used as a prediction may depend on the intra prediction mode.

The indication of maxtbw and/or MaxTbH may be signaled in the sequence/picture/slice group/slice/brick level.

a. In one example, they may be signaled in SPS/VPS/PPS/picture header/slice group header, etc.

Maxtbw and/or MaxTbH may be set to different numbers in different profiles/levels of the video codec standard.

MinTbW and/or MinTbH may be signaled in the sequence/picture/slice group/slice/brick level.

9. A hybrid partitioning direction may be enabled for ISP codec blocks, where the blocks may be partitioned for horizontal and vertical directions.

a. In one example, the binary value of the partition direction (e.g., intra_sub-partitions_flag) for the ISP mode codec may be replaced by an index of the partition direction.

b. In one example, the set of allowed partitioning directions may depend on the block dimension.

i. Alternatively, an indication of the set of allowed partition directions may be signaled.

c. In one example, the set of allowed partition directions may depend on the intra prediction mode.

d. In one example, when both W/MaxTbW and H/MaxTbH are greater than M (e.g., m=1), a hybrid partitioning direction may be enabled, where both horizontal and vertical partitioning may be performed.

i. An example of the mixed division direction is shown in fig. 12.

Alternatively, the hybrid partitioning direction may be enabled when W/MaxTbW or H/MaxTbH is greater than M (e.g., m=1).

in one example, when a hybrid ISP is applied, the blocks may be first divided horizontally and then vertically.

1) Alternatively, the blocks may be divided vertically and then divided horizontally when the hybrid ISP is applied. Fig. 17 shows an example of a hybrid division (also referred to as quadtree division).

10. Whether and/or how an ISP is applied on a block may depend on the relationship between the block dimensions W x H and/or the maximum and/or minimum transformed block dimensions.

a. In one example, if W/MinTbW and H/MinTbH are both equal to 1, then ISP is disabled.

b. In one example, how the blocks are partitioned may depend on the minimum transform block size.

i. In one example, if W/MinTbW is equal to K (K > 1) and H/MinTbH is equal to 1, ISP may be enabled and vertical partitioning applied.

in one example, if W/MinTbW is equal to 1 and H/MinTbH is equal to K (K > 1), ISP may be enabled and horizontal partitioning applied. Alternatively, in addition, the prediction direction need not be signaled.

Alternatively, in addition, no signaling of the prediction direction is required.

Alternatively, the block may be divided into K sub-partitions.

c. In one example, ISP mode is disabled when W/MaxTbW is greater than 1 or H/MaxTbH is greater than 1.

i. Alternatively, ISP mode is disabled when W/(MaxTbW) MaxTbH) is greater than a threshold (e.g., 4).

Alternatively, ISP mode is disabled when both W/MaxTbW and H/MaxTbH are greater than 1.

Alternatively, ISP mode is disabled when W/MaxTbW or H/MaxTbH is greater than a threshold (e.g., 2 or 4).

Alternatively, ISP mode is disabled when both W/MaxTbW and H/MaxTbH are greater than a threshold (e.g., 2 or 4).

d. In one example, ISP mode may be enabled when both W/MaxTbW and H/MaxTbH are greater than (or not less than) a first threshold and not greater than (or less than) a second threshold.

i. Alternatively, the ISP mode may be enabled when W/MaxTbW and H/MaxTbH are both greater than a first threshold and less than a second threshold.

in one example, the first and second thresholds are 1 and 4, respectively.

Alternatively, in addition, signaling of the partitioning direction (e.g., intra_sub_split_flag) may be skipped, and the blocks may be partitioned according to certain rules.

1) In one example, a quadtree partitioning may be applied first, followed by a horizontal binary tree partitioning, and then a vertical binary tree partitioning.

2) In one example, partitioning of a partition tree may be terminated once the width reaches MaxTbW or the height reaches MaxTbH.

a. Alternatively, once the width reaches MaxTbW and the height reaches MaxTbH, the partitioning of one partition tree may be terminated.

b. Alternatively, once the width reaches MaxTbW/M and the height reaches MaxTbH/N, the partitioning of one partition tree may be terminated, where M and N are two positive integers.

e. When the ISP mode is disabled, signaling of related information such as intra_sub-options_mode_flag is skipped.

11. In one example, more than 4 sub-partitions and/or more than one partitioning direction may be enabled (e.g., horizontally and vertically partitioned).

i. Alternatively, the above method may be initiated under certain conditions.

in one example, when W/MaxTbW >4 and/or H/MaxTbH > 4.

Regarding MTS:

12. it is proposed to retain only two transforms (and corresponding inverse transforms) for explicit MTS designs. For example, the two transforms may be DCT-II and DST-VII (and corresponding inverse transforms).

a. In one example, there are only two choices in terms of transform selection. Alternatively, furthermore, the TS mode may be the third option, if applicable.

i. In one example, DCT-II is one choice for horizontal and vertical transforms; and the other is DST-VII.

One bit may be encoded to indicate whether which of the two transforms is used.

b. Alternatively, there are four choices in terms of transform selection. Alternatively, further, if applicable, the TS mode may be the fourth choice.

i. The selection comprises the following steps: DCT-II/DST-VII for horizontal and vertical transformations; the combined use of DCT-II and DST-VII, each for horizontal or vertical transformation.

in one example, the four choices may be encoded using fixed length encoding.

Alternatively, the four choices may be encoded with truncated unary codes.

1) Some examples of bin strings for four choices are tabulated below:

13. the signaling of the set of transformations allowed by the suggestion and/or the transformation index in the explicit MTS may depend on the block dimension.

a. In one example, DCT-II and DST-VII may be enabled for blocks having widths and/or heights that are not greater than (or less than) a threshold.

b. In one example, DCT-II, DST-VII, and DCT-VIII may be allowed for blocks having widths and/or heights greater than (or not less than) a threshold.

c. Alternatively, in addition, the transform skip mode may be enabled.

d. In one example, the set of allowed transforms may depend on the codec mode.

i. In one example, two transform bases (TS and DST-VII) may be allowed for the IBC codec block.

in one example, two transform bases (DCT-II and DST-VII) may be allowed, or three transform bases (TS, DCT-II and DST-VII) may be allowed for blocks other than IBC codecs.

e. How the transformation index is signaled may be changed according to the allowed transformation set.

14. An indication of the maximum allowed transition size (non-TS mode) used in the MTS may be signaled.

a. In one example, they may be signaled in a sequence/picture/slice group/slice/brick level or other type of video unit level.

i. In one example, they may be signaled in SPS/VPS/PPS/picture header/slice group header, etc.

b. In one example, they may not be signaled, but rather derived from the allowed maximum TS size.

c. In one example, the indication of the maximum allowable transform size (non-TS mode) may control the maximum TS size and the maximum size used in other transform matrices.

i. Alternatively, in addition, signal maximum sizes for the non-TS mode and the TS mode alone are not required.

d. In one example, the indication of the maximum allowed transition size may control both implicit and explicit MTS transition sizes.

i. Alternatively, in addition, whether or not an implicit MTS is applied may depend on the signal size.

15. It is suggested to align the maximum allowable transform size (non-TS mode) used in the MTS with the maximum allowable block size used in the TS mode.

a. In one example, the maximum allowed transform size used in the MTS (non-TS mode) and the maximum allowed block size used in the TS mode may be the same number.

16. The derivation of the proposed implicit MTS enable flag is independent of block dimensions.

a. Alternatively, in addition, verification of the block size in the derivation of the implicit MTS enable flag is skipped.

17. The shared conditional checking of block sizes before the MTS information (e.g., transform_skip_flag and tu_mts_idx) is signaled may be eliminated.

a. In one example, MTS information may be further signaled if all of the following sharing conditions are true. Otherwise, no signaling of MTS information is required.

-tu_cbf_luma[x0][y0]

-treeType！＝DUAL_TREE_CHROMA

-！cu_sbt_flag

b. Alternatively, in addition, when the shared condition check of other rules (e.g., described above) returns true, a condition check of the block dimension compared to the allowable maximum TS size may be applied before signaling the transform_skip_flag; and a conditional check of the block dimension compared to the allowed maximum allowed MTS size (e.g., fixed at 32x 32) is applied before signaling tu_mts_idx.

18. The shared conditional checks (e.g., transform_skip_flag and tu_mts_idx) signaling the block dimension before the MTS information remain unchanged, while the conditional checks signaling the block dimension before the transform matrix index (non-TS mode) can be removed.

4.1 example setting of implicit MTS flag

Some proposed changes to the VVC working draft version 5jfet_n 1001_v2 are described in this example. The underlined portion represents an increase in the working draft, while the strikethrough portion represents a suggested deletion.

Typically, the inputs to the transform process for scaling the transform coefficients are:

specifying a luminance position (xTbY, yTbY) of a left upsampled point of the current luminance transformation block relative to a left upsampled point of the current picture,

a variable nTbW specifying the width of the current transform block,

a variable nTbH specifying the height of the current transform block,

a variable cIdx specifying the color component of the current block,

-an array d [ x ] [ y ] of (nTbW) x (nTbH) with scaling transform coefficients of x=0..ntbw-1, y=0..ntbh-1.

The output of this process is the (nTbW) x (nTbH) array r [ x ] [ y ] of residual samples, where x=0..ntbw-1, y=0..ntbh-1.

The variable implicitmttsenabled is derived as follows:

-if sps_mts_enabled_flag is equal to 1 and one of the following conditions is met, then implicmttsenabled is set equal to 1:

-InstrosubpartitionSplitType is not equal to ISP_NO_SPLIT

-cu_sbt_flag is equal to 1 and Max (nTbW, nTbH) is less than or equal toMaxSBTSize That is, instead of the fixed number 32, max (nTbW, nTbH) is compared to MaxSBTSize.

Otherwise, implicitmttsenabled is set equal to 0.

if cIdx is greater than 0, then trTypeHor and trTypeVer are set equal to 0.

Otherwise, if implicitmttsenabled is equal to 1, the following applies:

-if the intrasubpartitionsplit type is not equal to isp_no_split, then trTypeHor and trTypeVer are specified according to intraPredMode.

Otherwise, if the cu_sbt_flag is equal to 1, trTypeHor and trTypeVer are specified according to the cu_sbt_horizontal_flag and the cu_sbt_pos_flag.

-otherwise (sps_explicit_mts_intra_enabled_flag and sps_explicit_mts_inter_enabled_flag are equal to 0 andCuPredMode[xTbY][yTbY]equal to MODE_INTRA) trTypeHor and trTypeVer are derived as follows:

trTypeHor＝(nTbW>＝4&&nTbW<＝16&&nTbW<＝nTbH)？1:0(8 1030)

trTypeVer＝(nTbH>＝4&&nTbH<＝16&&nTbH<＝nTbW)？1:0(8 1031)

otherwise, trTypeHor and trTypeVer are specified in Table 8 13 based on tu_mts_idx [ xTbY ] [ yTbY ].

Alternatively, the condition check 'cu_sbt_flag equal to 1 and Max (nTbW, nTbH) less than or equal to 32' may be replaced by 'cu_sbt_flag equal to 1' when determining implicitmttsenabled.

4.2 example setting of explicit MTS flag

Some proposed changes to the VVC working draft version 5jfet_n 1001_v2 are described in this example. The underlined portion represents an increase in the working draft, while the strikethrough portion represents a suggested deletion. This section provides an example of redundancy check removal during the MTS signaling process.

Alternatively, the following may apply:

fig. 16 is a block diagram of a video processing apparatus 1600. Apparatus 1600 may be used to implement one or more methods described herein. The apparatus 1600 may be embodied in a smart phone, tablet, computer, internet of things (IoT) receiver, or the like. The apparatus 1600 may include one or more processors 1602, one or more memories 1604, and video processing hardware 1606. The processor(s) 1602 may be configured to implement one or more of the methods described in this document. The memory(s) 1604 may be used to store data and code for implementing the methods and techniques described herein. Video processing hardware 1606 may be used to implement some of the techniques described in this document in hardware circuitry.

Fig. 18 is a flow diagram of a video processing method 1800 in accordance with one or more examples of the present technology. The method 1800 includes, at operation 1802, dividing a block of video data into sub-blocks using a division mode. The method 1800 includes, at operation 1804, performing prediction of one sub-block using at least one line of reference video data that is not adjacent to a current sub-block. The method 1800 further includes generating a residual signal for the sub-block based on the prediction at operation 1806.

Fig. 19 is a flow diagram of a video processing method 1900 in accordance with one or more examples of the present technology. Method 1900 includes, at operation 1902, partitioning a block of video data into sub-blocks using a partitioning mode. Method 1900 includes, at operation 1904, performing prediction of the sub-block by computing a matrix vector product based on the reference signal of each sub-block. The method 1900 further includes generating a residual signal for the sub-block based on the prediction, at operation 1906.

Fig. 20 is a flow diagram of a video processing method 2000 in accordance with one or more examples of the present technology. The method 2000 includes, at operation 2002, performing prediction of a block of video data to generate a residual signal. The method 2000 includes, at operation 2004, performing an explicit transformation of the residual signal using one of two transforms. The method 2000 includes, at operation 2006, encoding an output from the implicit transformation.

Additional embodiments and techniques are described in the examples below.

1. A video processing method, comprising: dividing the block of video data into sub-blocks using a division mode; performing prediction of a current sub-block of the sub-blocks using at least one line of reference video data that is not adjacent to the current sub-block; and generating a residual signal of the current sub-block based on the prediction.

2. The method of example 1, wherein all sub-blocks are predicted using the same reference line index of reference video data.

3. The method of example 1, wherein a first sub-block of the sub-blocks uses a first row index of reference data and the remaining sub-blocks use a second row index of reference video data, the second row index corresponding to a row of reference video data closest to the sub-block.

4. The method of example 1, wherein a first sub-block of the sub-blocks uses a first row index of reference data and the remaining sub-blocks use a second row index of reference video data, the second row index being determined based on a partition direction of the sub-blocks, a prediction mode, or a dimension of the block.

Other embodiments of examples 1-4 are described in items 1 and 2 of section 4.

5. A video processing method, comprising: dividing the block of video data into sub-blocks using a division mode; performing prediction of the sub-blocks by calculating a matrix vector product based on the reference signal of each sub-block; and generating a residual signal of the sub-block based on the prediction.

6. The method of example 5, wherein the matrix vector of the sub-block is selected based on intra-mode or dimensions of the sub-block.

Other embodiments of examples 5-6 are described in clause 3-4 of section 4.

7. A video processing method, comprising: receiving a block of video data segmented into sub-blocks using a segmentation mode; performing prediction of a current sub-block of the sub-blocks using at least one line of reference video data that is not adjacent to the current sub-frame; and reconstructing the current sub-block using the prediction.

8. The method of example 7, wherein all sub-blocks are predicted using the same reference line index of reference video data.

9. The method of example 7, wherein a first sub-block of the sub-blocks uses a first row index of reference data and the remaining sub-blocks use a second row index of reference video data, the second row index corresponding to a row of reference video data closest to the sub-block.

10. The method of example 7, wherein a first sub-block of the sub-blocks uses a first row index of reference data and the remaining sub-blocks use a second row index of reference video data, the second row index being determined based on a partition direction of the sub-blocks, a prediction mode, or a dimension of the block.

Other embodiments of examples 7-10 are described in clauses 1 and 2 of section 4.

11. A video processing method, comprising: receiving a block of video data segmented into sub-blocks using a segmentation mode; performing prediction of the sub-blocks by calculating a matrix vector product based on the reference signal of each sub-block; and reconstructing a sub-block using the prediction.

12. The method of example 11, wherein the matrix vector of the sub-block is selected based on an intra mode or a dimension of the sub-block.

Other embodiments of examples 1-4 are described in items 3-4 of section 4.

13. A video processing method, comprising: performing prediction on a block of video data divided into sub-blocks using a division mode; and a residual signal based on the prediction transform sub-block, wherein a maximum transform block dimension or a minimum transform block dimension is indicated in a level of a sequence, picture, slice, group of slices, slice, or brick in a bitstream representing the block of video data.

14. A video processing method, comprising: receiving a bit stream representing a block of video data partitioned into sub-blocks using a partition mode; performing an inverse transform on the residual signal of the sub-block, wherein a maximum transform block dimension or a minimum transform block dimension is indicated in a level of a sequence, picture, slice, group of slices, slice, or brick in the bitstream; and reconstructing the sub-block using the output from the inverse transform.

15. The method of example 13 or 14, wherein the largest transform block dimension or the smallest transform block dimension is set to different values in different profiles, levels, or ranks.

Other embodiments of examples 13-15 are described in items 7-8 of section 4.

16. A video processing method, comprising: a bitstream representing a block of video data for performing video processing is received or transmitted, wherein the block of video data is divided into sub-blocks using a division mode, and a residual signal of the sub-blocks is quantized in the bitstream, and wherein the sub-blocks share the same quantization information.

17. The method of example 16, wherein the quantization information includes quantization parameters, quantization steps, or scaling matrices.

18. The method of example 16, wherein the quantization information of all sub-blocks in the block of video data is encoded and decoded once in the bitstream.

Other embodiments of examples 16-18 are described in item 5 of section 4.

19. A video processing method, comprising: performing prediction on a block of video data partitioned into sub-blocks using a partition mode, wherein reference samples in a first sub-block are modified before being used to perform prediction of a second sub-block; and encoding or reconstructing a block of video data based on the prediction.

Other embodiments of example 19 are described in item 6 of section 4.

20. A video processing method, comprising: performing prediction on a block of video data segmented into sub-blocks using a segmentation mode, wherein the sub-blocks are segmented in a plurality of segmentation directions; and encoding or reconstructing a block of video data based on the prediction.

21. The method of example 20, the plurality of segmentation directions being determined by dimensions of the block.

Other embodiments of examples 20-21 are described in item 9 of section 4.

22. The method of any of examples 1-21, wherein the sub-blocks are partitioned based on a minimum transform block dimension or a maximum transform block dimension.

Other embodiments of example 22 are described in items 10 and 11 of section 4.

23. A video processing method, comprising: performing prediction of the block of video data to generate a residual signal; performing an explicit transformation of the residual signal using one of two transforms; and encoding the output from the implicit transformation.

24. The method of example 23, comprising: the transform options are encoded and decoded in a bitstream representing the block of video data based on the variants of the two transforms.

Other embodiments of examples 23-24 are described in items 12-13 of section 4.

25. The method of example 22 or 23, comprising: information about the explicit transformation is signaled without checking the dimensions of the video data blocks.

Other embodiments of example 25 are described in items 16-18 of section 4.

26. A video processing method, comprising: receiving a block of video data divided into one or more sub-blocks; performing an explicit transformation of the block of video data using one of two inverse transforms; and reconstructing the block of video data based on the implicit transform.

27. The method of any of examples 23 to 26, wherein the explicit transformation is performed in one or more transformation directions including a horizontal direction and a vertical direction.

28. The method of example 27, wherein different transform directions use different transforms.

29. The method of example 27, wherein the different transform directions use the same transform.

Other embodiments of examples 27-29 are described in items 12-13 of section 4.

30. The method of any of examples 23 to 29, wherein the maximum allowed transform size is encoded in a level of a sequence, picture, slice, tile, or fragment in a bitstream representing a block of video data.

31. The method of any one of examples 23 to 30, comprising: the maximum allowed transform size is derived based on the allowed maximum transform skip size.

Other embodiments of example 30 are described in items 14-15 of section 4.

32. A video processing apparatus comprising a processor configured to perform one or more of examples 1-31.

33. A computer readable medium having code stored thereon, which when executed by a processor causes the processor to perform the method of any one or more of examples 1 to 31.

Fig. 21 is a flow diagram of a video processing method 2100 in accordance with one or more examples of the present technology. Method 2100 includes, at 2102, enabling an intra-sub-block partitioning (ISP) mode of a block of video for conversion between the block and a bit stream representation of the block, wherein the block is partitioned into a plurality of sub-partitions based on the ISP mode; at 2104, a second mode is enabled that is different from the ISP mode of the block; and at 2106, performing conversion based on the ISP mode and the second mode.

In some examples, the second mode is a multi-reference line (MRL) mode.

In some examples, in MRL mode, a reference line that is not the closest reference line among the plurality of reference lines may be used for intra prediction of the block.

In some examples, all sub-partitions of a block use the same reference row index for intra prediction of the block.

In some examples, only the first K sub-partitions of all sub-partitions of the block are intra-predicted using the same reference line index, and the remaining sub-partitions are intra-predicted using the closest reference line, K being an integer.

In some examples, k=1.

In some examples, the reference row index is signaled in the bitstream.

In some examples, whether the MRL mode is applied to the remaining sub-partitions depends on the partition direction or/and intra prediction mode or/and block size in ISP mode.

In some examples, if a block is partitioned in the horizontal direction in ISP mode, MRL mode is applied to the remaining sub-partitions only when the lower left or/and upper neighboring reference samples of the block are used in intra prediction of the first sub-partition.

In some examples, if a block is partitioned in the horizontal direction in ISP mode, when the upper right neighboring reference sample of the block is used in intra prediction of the first sub-partition, MRL mode is not applied to the remaining sub-partitions.

In some examples, if a block is partitioned in the vertical direction in ISP mode, MRL mode is applied to the remaining sub-partitions only when the upper left or/and upper right neighboring reference samples of the block are used in intra prediction of the first sub-partition.

In some examples, if a block is partitioned in the vertical direction in ISP mode, when the lower left neighboring reference sample of the block is used in intra prediction of the first sub-partition, MRL mode is not applied to the remaining sub-partitions.

In some examples, the indication of ISP mode information is signaled prior to signaling of MRL mode related information.

In some examples, the ISP mode information includes at least one of an on/off flag and a division direction, and the MRL mode related information includes a reference row index.

In some examples, signaling of MRL related information is skipped when ISP mode is enabled for the block.

In some examples, when ISP mode is enabled for a block, the reference row index is considered to be 0.

In some examples, the second mode is a matrix-based intra-prediction (MIP) mode.

In some examples, the matrix selection of one sub-partition depends on the intra mode and/or the size of the sub-partition.

In some examples, an indication of MIP mode and an indication of ISP mode are signaled for the block.

In some examples, the second mode is a Transform Skip (TS) mode.

In some examples, even if ISP mode is enabled, an indication to signal that TS mode is enabled/disabled is further signaled.

In some examples, the indication of whether to signal the enablement/disablement of the TS mode depends on whether the video content of the video is screen content.

In some examples, the indication of whether to signal that TS mode is enabled/disabled depends on a flag signaled in at least one of a picture, a slice, a group of slices, a slice, and a brick level.

In some examples, if the video content is screen content, an indication to enable/disable the transition skip mode is signaled.

In some examples, if the video content is camera content, the indication to enable/disable the transform skip mode is skipped and the TS mode is disabled for the block.

In some examples, all sub-partitions share the same quantization information, including at least one of quantization parameters, quantization step size, and scaling matrix.

In some examples, the quantization parameters are represented by cu_qp_delta_abs and cu_qp_delta_sign_flag.

In some examples, quantization information is signaled for a block only when at least one coefficient that is not equal to zero is present in at least one sub-partition.

In some examples, instead of signaling quantization information for each sub-partition, quantization information is signaled once for the entire block.

In some examples, quantization information is signaled with the mth sub-partition only if there is at least one coefficient in the mth sub-partition that is not equal to zero, where m is an integer.

In some examples, quantization information is signaled with the first sub-partition in encoding or decoding order.

In some examples, quantization information is signaled with the last sub-partition in encoding or decoding order.

In some examples, quantization information is signaled along with the m-th sub-partition in encoding or decoding order, where m is an integer no greater than the total number of allowed sub-partitions.

Fig. 22 is a flow diagram of a video processing method 2200 in accordance with one or more examples of the present technique. Method 2200 includes, at 2202, enabling an intra sub-block partitioning (ISP) mode of a block of video for a transition between the block and a bitstream representation of the block, wherein the block is partitioned into a plurality of sub-partitions based on the ISP mode, and reference samples located in a first sub-partition to predict a second sub-partition in the block are further modified prior to use as a prediction; at 2204, conversion is performed based on the ISP mode.

In some examples, the reference samples are filtered before being used as predictions.

In some examples, whether a reference sample is modified before being used as a prediction depends on the width and/or height of the block.

In some examples, whether a reference sample is modified before being used as a reference depends on the intra prediction mode of the block.

In some examples, the block size of a block is represented by w×h, where W is the block width and H is the block height, the maximum transform block size of a block is represented by maxtbw×maxtbh, where MaxTbW and MaxTbH are the maximum transform block width and maximum transform block height, respectively, and the minimum transform block size of a block is represented by mintbw×mintbh, where MinTbW and MinTbH are the minimum transform block width and minimum transform block height, respectively.

In some examples, the indication of MaxTbW and/or MaxTbH is signaled in at least one of a sequence, picture, stripe, slice group, slice, and brick level.

In some examples, the indication of MaxTbW and/or MaxTbH is signaled in at least one of a Video Parameter Set (VPS), a Sequence Parameter Set (SPS) and a Picture Parameter Set (PPS), a picture header, a slice header and a slice group header.

In some examples, maxTbW and/or MaxTbH are set to different numbers in different profile levels or levels of the video codec standard.

In some examples, an indication of MinTbW and/or MinTbH is signaled in at least one of a sequence, picture, stripe, slice group, slice, and brick level.

In some examples, the indication of MinTbW and/or MinTbH is signaled in at least one of a Video Parameter Set (VPS), a Sequence Parameter Set (SPS) and a Picture Parameter Set (PPS), a picture header, a slice header and a slice group header.

In some examples, minTbW and/or MinTbH are set to different numbers in different profile levels or levels of the video codec standard.

Fig. 23 is a flow diagram of a video processing method 2300 in accordance with one or more examples of the present technology. Method 2200 includes, at 2302, enabling an intra sub-block partitioning (ISP) mode of a block of video for a transition between the block and a bit stream representation of the block, wherein a hybrid partitioning direction is enabled in the ISP mode and the block is partitioned into a plurality of sub-partitions in horizontal and vertical directions; at 2304, conversion is performed based on ISP mode.

In some examples, the binary value of the partitioning direction for the ISP mode codec is replaced by an index of the partitioning direction.

In some examples, the set of allowed partitioning directions depends on the block size.

In some examples, an indication of the set of allowed partitioning directions is signaled.

In some examples, the set of allowed partition directions depends on intra prediction modes of the block.

In some examples, the hybrid partitioning direction is enabled when both W/MaxTbW and H/MaxTbH are greater than M, which is an integer.

In some examples, the hybrid partitioning direction is enabled when W/MaxTbW or H/MaxTbH is greater than M, which is an integer.

In some examples, m=1.

In some examples, the blocks are partitioned by using quadtree partitioning.

In some examples, when applying the hybrid partitioning direction, the blocks are first partitioned horizontally and then partitioned vertically.

In some examples, when applying the hybrid partitioning direction, the blocks are first partitioned vertically and then partitioned horizontally.

In some examples, whether and/or how the ISP mode is applied on the block depends on the relationship between the block size of the block w×h and/or the maximum transform block size MaxTbW x MaxTbH and/or the minimum transform block size MinTbW x MinTbH.

In some examples, if W/MinTbW and H/MinTbH are both equal to 1, ISP mode is disabled for the block.

In some examples, how the blocks are partitioned depends on the minimum transform block size of the blocks.

In some examples, if W/MinTbW is equal to K and H/MinTbH is equal to 1, ISP mode is enabled for the block and vertical partitioning is applied to the block, K being an integer greater than 1.

In some examples, if W/MinTbW is equal to 1 and H/MinTbH is equal to K, ISP mode is enabled for the block and horizontal partitioning is applied to the block, K being an integer greater than 1.

In some examples, the prediction direction need not be signaled.

In some examples, a block is divided into K sub-partitions.

In some examples, ISP mode is disabled for a block when W/MaxTbW is greater than 1 or H/MaxTbH is greater than 1.

In some examples, ISP mode is disabled for a block when W/(MaxTbW) MaxTbH is greater than a threshold, where the threshold is 4.

In some examples, ISP mode is disabled for a block when W/MaxTbW and H/MaxTbH are both greater than 1.

In some examples, ISP mode is disabled for a block when W/MaxTbW or H/MaxTbH is greater than a threshold, where the threshold is 2 or 4.

In some examples, ISP mode is disabled for a block when W/MaxTbW and H/MaxTbH are both greater than or equal to a threshold, where the threshold is 2 or 4.

In some examples, ISP mode is disabled for a block when W/MaxTbW and H/MaxTbH are both greater than or equal to a first threshold and less than or equal to a second threshold.

In some examples, ISP mode is disabled for a block when W/MaxTbW and H/MaxTbH are both greater than a first threshold and less than a second threshold.

In some examples, the first threshold is 1 and the second threshold is 4.

In some examples, signaling of the partitioning direction is skipped and the blocks are partitioned according to certain rules.

In some examples, the quadtree partitioning is applied to the block first, then the horizontal binary tree partitioning is applied, then the vertical binary tree partitioning is applied.

In some examples, partitioning of a partition tree is terminated once the width reaches MaxTbW or the height reaches MaxTbH.

In some examples, partitioning of one partition tree is terminated once the width reaches MaxTbW and the height reaches MaxTbH.

In some examples, partitioning of a partition tree is terminated once the width reaches MaxTbW/M and the height reaches MaxTbH/N, where M and N are two positive integers.

In some examples, signaling including intra_sub-options_mode_flag related information is skipped when ISP mode is disabled for a block.

In some examples, when W/MaxTbW >4 and/or H/MaxTbH >4, more than 4 sub-partitions and/or more than one partition direction are enabled.

Fig. 24 is a flow diagram of a video processing method 2400 in accordance with one or more examples of the present technology. Method 2400 includes, at 2402, determining a Multiple Transform Selection (MTS) scheme associated with a block of video for a transition between the block and a bitstream representation of the block, wherein the MTS scheme is modified to allow for a partial transform and a corresponding inverse transform; at 2404, conversion is performed based on the determined MTS scheme.

In some examples, the MTS scheme is an explicit MTS in which the transition index of the MTS is signaled in the bit stream of the block.

In some examples, the MTS scheme is modified to allow only two transforms, where the two transforms are DCT-II and DST-VII.

In some examples, the MTS scheme includes two modes in terms of transform selection.

In some examples, when a TS mode is applicable, the MTS scheme includes a third mode of a Transition Skip (TS) mode in addition to the two modes of transition selection.

In some examples, the first mode of the two modes is DCT-II for horizontal and vertical transforms of the block, and the second mode of the two modes is DST-VII for horizontal and vertical transforms of the block.

In some examples, one bit is encoded to indicate which of two modes is used.

In some examples, the MTS scheme includes four modes in terms of transform selection.

In some examples, when a TS mode is applicable, the MTS scheme includes a fifth mode of a Transition Skip (TS) mode in addition to the two modes of transition selection.

In some examples, a first mode of the four modes is DCT-II for horizontal and vertical transforms of the block, a second mode of the four modes is DST-VII for horizontal and vertical transforms of the block, a third mode of the four modes is DCT-II for horizontal transforms of the block and DST-VII for vertical transforms of the block, and a fourth mode of the four modes is DST-VII for horizontal transforms of the block and DCT-II for vertical transforms of the block.

In some examples, four modes are encoded with fixed length codecs.

In some examples, four modes are encoded with truncated unary codes.

In some examples, the signaling of the transform indexes in the allowed transform set and/or explicit MTS depends on the block size.

In some examples, DCT-II and DST-VII are allowed for blocks having widths and/or heights less than or equal to a threshold.

In some examples, DCT-II, DST-VII, and DCT-VIII are allowed for blocks having widths and/or heights greater than or equal to a threshold.

In some examples, a Transform Skip (TS) mode is allowed.

In some examples, the set of allowed transforms depends on the codec mode of the block.

In some examples, for Intra Block Copy (IBC) mode encoded and decoded blocks, a transform set comprising two transform bases of TS mode and DST-VII is allowed.

In some examples, a block that is not an IBC mode codec allows a set of two transform bases including DCT-II and DST-VII, or allows a set of three transform bases including TS mode, DCT-II and DST-VII.

In some examples, how the transformation index is signaled to change according to the allowed set of transformations.

In some examples, an indication of a maximum allowed transition size used in a non-TS mode of the MTS scheme is signaled.

In some examples, the indication is signaled in at least one of a sequence, picture, slice, group of slices, tile level, or other type of video unit level.

In some examples, signaling indications are signaled in a Video Parameter Set (VPS), a Sequence Parameter Set (SPS) and a Picture Parameter Set (PPS), a picture header, a slice header and a slice group header.

In some examples, the indication is derived from the allowed maximum TS size.

In some examples, the maximum size used to control the maximum TS size and used in other transform matrices is indicated.

In some examples, the maximum sizes of the non-TS and TS modes need not be signaled separately.

In some examples, the indication of the maximum allowed transition size is used to control the implicit MTS transition size and the explicit MTS transition size.

In some examples, whether or not to apply implicit MTS depends on the maximum allowed transition size of the signaling.

In some examples, the maximum allowed transition size used in the non-TS mode of the MTS scheme is aligned with the maximum allowed transition size used in the TS mode.

In some examples, the maximum allowed transition size used in the non-TS mode of the MTS scheme is the same as the maximum allowed transition size used in the TS mode.

In some examples, the MTS scheme is an implicit MTS in which the transform matrix of the MTS is directly derived from the transform block size of the block.

In some examples, the derivation of the implicit MTS enable flag that indicates whether to enable the implicit MTS is independent of the block size of the block.

In some examples, checking of block sizes in the derivation of the implicit MTS enable flag is skipped.

In some examples, the shared conditional check of the block size before signaling MTS information, including transform_skip_flag and tu_mts_idx, is removed.

In some examples, the MTS information is further signaled if all of the following sharing conditions are true:

-tu_cbf_luma[x0][y0]

-treeType！＝DUAL_TREE_CHROMA

-！cu_sbt_flag，

otherwise, the MTS information is not signaled.

In some examples, when the sharing condition check of certain rules returns true, a condition check of block size compared to the allowable maximum TS size is applied before signaling the transform_skip_flag; and a conditional check of block size compared to the allowed maximum allowed MTS size is applied before the tu_mts_idx is signaled.

In some examples, the shared conditional check of block size before signaling MTS information remains unchanged, while the conditional check of block size before signaling transform matrix indexes used in non-TS mode of MTS is removed.

In some examples, converting generates blocks of video from the bitstream representation.

In some examples, the conversion generates a bitstream representation from blocks of video.

It will be appreciated that the disclosed techniques may be embodied in video encoders or decoders to improve compression efficiency using techniques including using reduced-dimension quadratic transforms.

The disclosed and other solutions, examples, embodiments, modules and functional operations described in this document may be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this document and their structural equivalents, or in combinations of one or more of them. The disclosed and other embodiments may be implemented as one or more computer program products, i.e., one or more modules of computer program instructions encoded on a computer-readable medium, to perform or control the operation of data processing apparatus. The computer readable medium can be a machine-readable storage device, a machine-readable storage substrate, a storage device, a composition of matter effecting a machine-readable propagated signal, or a combination of one or more of them. The term "data processing apparatus" encompasses all apparatus, devices, and machines for processing data, including by way of example a programmable processor, a computer, or multiple processors or computers. In addition to hardware, an apparatus may include code that creates an execution environment for the computer program, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them. A propagated signal is an artificially generated signal, e.g., a machine-generated electrical, optical, or electromagnetic signal, that is generated to encode information for transmission to suitable receiver apparatus.

A computer program (also known as a program, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. The computer program does not necessarily correspond to a file in a file system. A program may be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub-programs, or portions of code). A computer program can be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a communication network.

The processes and logic flows described in this document can be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processing and logic flows may also be performed by, and apparatus may also be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application-specific integrated circuit).

Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer. Generally, a processor will receive instructions and data from a read-only memory or a random access memory or both. The essential elements of a computer are a processor for executing instructions and one or more memory devices for storing instructions and data. Typically, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto-optical disks, or optical disks. However, a computer does not necessarily have such a device. Computer readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices; magnetic disks, such as internal hard disks or removable disks; magneto-optical disk; CD ROM and DVD-ROM discs. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.

Although this patent document contains many specifics, these should not be construed as limitations on the scope of any subject matter or of the claims, but rather as descriptions of features of particular embodiments directed to particular technologies. Some features described in this patent document in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claim combination can in some cases be excised from the combination, and the claim combination may be directed to a subcombination or variation of a subcombination.

Similarly, although operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. Furthermore, the separation of various system components in the embodiments described herein should not be understood as requiring such separation in all embodiments.

Only a few implementations and examples are described, and other implementations, enhancements, and variations may be made based on what is described and shown in this patent document.

Claims

1. A method for processing video, comprising:

enabling intra-sub-block partitioning of a block of video ISP mode for conversion between the block and a bit stream of the block, wherein the block is partitioned into a plurality of sub-partitions based on the ISP mode;

enabling a second mode different from the ISP mode of the block; and

the conversion is performed based on the ISP mode and the second mode,

wherein the second mode is a multi-reference line MRL mode,

wherein only the first K sub-partitions of all sub-partitions of the block are intra-predicted using the same reference line index and the remaining sub-partitions are intra-predicted using the closest reference line, K being an integer.

2. The method of claim 1, wherein, in the MRL mode, a reference line that is not the closest reference line of a plurality of reference lines is available for intra prediction of the block.

3. The method of claim 1 or 2, wherein all sub-partitions of the block use the same reference row index for intra prediction of the block.

4. The method of claim 1, wherein K = 1.

5. A method according to claim 3, wherein the reference row index is signaled in a bit stream.

6. The method of claim 1, wherein whether the MRL mode is applied to the remaining sub-partitions depends on a partition direction or/and an intra prediction mode in ISP mode or/and a size of the block.

7. The method of claim 6, wherein if the block is partitioned in a horizontal direction in the ISP mode, the MRL mode is applied to the remaining sub-partitions only when a lower left or/and upper neighboring reference sample of the block is used in intra prediction of the first sub-partition.

8. The method of claim 6, wherein if the block is partitioned in a horizontal direction in ISP mode, MRL mode is not applied to the remaining sub-partitions when an upper right neighboring reference sample of the block is used in intra prediction of the first sub-partition.

9. The method of claim 6, wherein if the block is partitioned in a vertical direction in the ISP mode, the MRL mode is applied to the remaining sub-partitions only when an upper left or/and upper right neighboring reference sample of the block is used in intra prediction of the first sub-partition.

10. The method of claim 6, wherein if the block is partitioned in a vertical direction in ISP mode, MRL mode is not applied to the remaining sub-partitions when a lower left neighboring reference sample of the block is used in intra prediction of the first sub-partition.

11. A method according to claim 1 or 2, wherein the indication of ISP mode information is signaled prior to the signaling of MRL mode related information.

12. The method of claim 11, wherein the ISP mode information includes at least one of an on/off flag and a division direction, and the MRL mode related information includes a reference row index.

13. The method of claim 12, wherein signaling of the MRL related information is skipped when ISP mode is enabled for a block.

14. The method of claim 12, wherein the reference row index is considered to be 0 when ISP mode is enabled for a block.

15. The method of claim 1 or 2, wherein all sub-partitions share the same quantization information, including at least one of quantization parameters, quantization step size, and scaling matrix.

16. The method of claim 15, wherein the quantization parameters are represented by cu_qp_delta_abs and cu_qp_delta_sign_flag.

17. The method of claim 15, wherein the quantization information is signaled for the block only if at least one coefficient that is not equal to zero is present in at least one sub-partition.

18. The method of claim 15, wherein the quantization information is signaled once for an entire block instead of signaling the quantization information for each sub-partition.

19. The method of claim 18, wherein the quantization information is signaled with an mth sub-partition only if at least one coefficient not equal to zero is present in the mth sub-partition, where m is an integer.

20. The method of claim 18, wherein the quantization information is signaled with the first sub-partition in an encoding or decoding order.

21. The method of claim 18, wherein the quantization information is signaled with a last sub-partition in an encoding or decoding order.

22. The method of claim 18, wherein the quantization information is signaled together with an mth sub-partition in an encoding or decoding order, where m is an integer not greater than a total number of allowed sub-partitions.

23. The method of claim 1, wherein reference samples located in a first sub-partition to predict a second sub-partition in the block are further modified before being used as predictions.

24. The method of claim 23, wherein the reference samples are filtered prior to use as a prediction.

25. The method of claim 23 or 24, wherein whether the reference sample is modified before being used as a prediction depends on the width and/or height of the block.

26. The method of claim 23 or 24, wherein whether the reference sample is modified before being used as a reference depends on an intra prediction mode of the block.

27. The method of claim 23, wherein the block size of the block is represented by W x H, where W is the block width and H is the block height,

the maximum transform block size of the block is represented by MaxTbW x MaxTbH, where MaxTbW and MaxTbH are the maximum transform block width and maximum transform block height, respectively, and

the minimum transform block size of the block is denoted by mintbw×mintbh, where MinTbW and MinTbH are minimum transform block width and minimum transform block height, respectively.

28. The method of claim 27, wherein the indication of MaxTbW and/or MaxTbH is signaled in at least one of a sequence, picture, slice, group of slices, slice, and brick level.

29. The method of claim 28, wherein the indication of MaxTbW and/or MaxTbH is signaled in at least one of a Video Parameter Set (VPS), a Sequence Parameter Set (SPS), and a Picture Parameter Set (PPS), a picture header, a slice header, and a slice group header.

30. The method of claim 27, wherein MaxTbW and/or MaxTbH are set to different numbers in different profiles, levels or levels of video codec standards.

31. The method of claim 27, wherein the indication of MinTbW and/or MinTbH is signaled in at least one of a sequence, picture, slice, group of slices, slice, and brick level.

32. The method of claim 31, wherein the indication of MinTbW and/or MinTbH is signaled in at least one of a Video Parameter Set (VPS), a Sequence Parameter Set (SPS), and a Picture Parameter Set (PPS), a picture header, a slice header, and a slice group header.

33. A method according to claim 31 or 32, wherein MinTbW and/or MinTbH are set to different numbers in different profiles, levels or levels of the video codec standard.

34. The method of claim 1, wherein a hybrid partitioning direction is enabled in the ISP mode and the block is partitioned into a plurality of sub-partitions in horizontal and vertical directions.

35. The method of claim 34, wherein the binary value of the partition direction for the ISP mode codec is replaced by an index of the partition direction.

36. The method of claim 34, wherein the set of allowed partitioning directions depends on a block size.

37. The method of claim 34, wherein an indication of a set of allowed partitioning directions is signaled.

38. The method of claim 34, wherein the set of allowed partition directions depends on an intra prediction mode of the block.

39. The method of claim 34, wherein the hybrid partitioning direction is enabled when both W/MaxTbW and H/MaxTbH are greater than M, M being an integer.

40. The method of claim 34, wherein the hybrid partitioning direction is enabled when W/MaxTbW or H/MaxTbH is greater than M, M being an integer.

41. The method of claim 39 or 40, wherein M = 1.

42. The method of claim 39 or 40, wherein the blocks are partitioned by using quadtree partitioning.

43. The method of claim 39 or 40, wherein when the hybrid partitioning direction is applied, the blocks are first partitioned horizontally and then partitioned vertically.

44. The method of claim 39 or 40, wherein when the hybrid partitioning direction is applied, the blocks are first partitioned vertically and then partitioned horizontally.

45. The method according to claim 28, wherein whether and/or how ISP modes are applied on the blocks depends on the relation between block sizes of blocks W x H and/or maximum transform block sizes MaxTbW x MaxTbH and/or minimum transform block sizes MinTbW x MinTbH.

46. The method of claim 45, wherein if W/MinTbW and H/MinTbH are both equal to 1, ISP mode is disabled for the block.

47. The method of claim 45, wherein how the blocks are partitioned depends on a minimum transform block size of the blocks.

48. The method of claim 47, wherein if W/MinTbW is equal to K and H/MinTbH is equal to 1, ISP mode is enabled for the block and vertical partitioning is applied to the block, K being an integer greater than 1.

49. The method of claim 47, wherein if W/MinTbW is equal to 1 and H/MinTbH is equal to K, ISP mode is enabled for the block and horizontal partitioning is applied to the block, K being an integer greater than 1.

50. The method of claim 48 or 49, wherein the prediction direction is not required to be signaled.

51. The method of claim 48 or 49, wherein the block is divided into K sub-partitions.

52. The method of claim 45, wherein ISP mode is disabled for the block when W/MaxTbW is greater than 1 or H/MaxTbH is greater than 1.

53. The method of claim 45, wherein ISP mode is disabled for the block when W/(MaxTbW) MaxTbH) is greater than a threshold, wherein the threshold is 4.

54. The method of claim 45, wherein ISP mode is disabled for the block when W/MaxTbW and H/MaxTbH are both greater than 1.

55. The method of claim 45, wherein ISP mode is disabled for the block when W/MaxTbW or H/MaxTbH is greater than a threshold, wherein the threshold is 2 or 4.

56. The method of claim 45, wherein ISP mode is disabled for the block when W/MaxTbW and H/MaxTbH are both greater than or equal to a threshold, wherein the threshold is 2 or 4.

57. The method of claim 45, wherein ISP mode is disabled for the block when W/MaxTbW and H/MaxTbH are both greater than or equal to a first threshold and less than or equal to a second threshold.

58. The method of claim 45, wherein ISP mode is disabled for the block when W/MaxTbW and H/MaxTbH are both greater than a first threshold and less than a second threshold.

59. The method of claim 57 or 58, wherein the first threshold is 1 and the second threshold is 4.

60. A method according to claim 57 or 58, wherein signalling of the partitioning direction is skipped and the blocks are partitioned according to certain rules.

61. The method of claim 60, wherein a quadtree partitioning is applied to the block first, then a horizontal binary tree partitioning is applied, and then a vertical binary tree partitioning is applied.

62. The method of claim 60, wherein partitioning of a partition tree is terminated once either the width reaches MaxTbW or the height reaches MaxTbH.

63. The method of claim 60, wherein partitioning of a partition tree is terminated once the width reaches MaxTbW and the height reaches MaxTbH.

64. The method of claim 60, wherein partitioning of a partition tree is terminated once the width reaches MaxTbW/M and the height reaches MaxTbH/N, where M and N are two positive integers.

65. The method of claim 45, wherein when the ISP mode is disabled for the block, signaling including information related to intra_sub-options_mode_flag is skipped.

66. The method of claim 28, wherein more than 4 sub-partitions and/or more than one partitioning directions are enabled when W/MaxTbW >4 and/or H/MaxTbH > 4.

67. The method of claim 1, further comprising:

determining, for a second transition between the block of the video and a bit stream of the block, a multiple transition selection, MTS, scheme associated with the block, wherein the MTS scheme is modified to allow for partial transformation and corresponding inverse transformation; and

the second conversion is performed based on the determined MTS scheme.

68. The method of claim 67, wherein the MTS scheme is an explicit MTS in which a transition index of the MTS is signaled in a bit stream of the block.

69. The method of claim 67 or 68 wherein the MTS scheme is modified to allow only two transforms, wherein the two transforms are DCT-II and DST-VII.

70. The method of claim 67 or 68 wherein the MTS scheme includes two modes in terms of shift selection.

71. The method of claim 70 wherein the MTS scheme includes a third mode of a Transition Skip (TS) mode in addition to the transition selection of the two modes when the TS mode is applicable.

72. The method of claim 71, wherein a first mode of the two modes is DCT-II for horizontal and vertical transforms of the block and a second mode of the two modes is DST-VII for horizontal and vertical transforms of the block.

73. The method of claim 72, wherein one bit is encoded to indicate which of the two modes is used.

74. The method of claim 67 or 68 wherein the MTS scheme includes four modes in terms of shift selection.

75. The method of claim 74 wherein when a TS mode is applicable, the MTS scheme further includes a fifth mode of a Transition Skip (TS) mode in addition to the two modes of transition selection.

76. The method of claim 75, wherein a first mode of the four modes is DCT-II for horizontal and vertical transforms of the block, a second mode of the four modes is DST-VII for horizontal and vertical transforms of the block, a third mode of the four modes is DCT-II for horizontal transforms of the block and DST-VII for vertical transforms of the block, and a fourth mode of the four modes is DST-VII for horizontal transforms of the block and DCT-II for vertical transforms of the block.

77. The method of claim 76, wherein the four modes are encoded with fixed length codecs.

78. The method of claim 76, wherein the four modes are encoded with truncated unary codes.

79. The method of claim 67 or 68, wherein the signaling of transform indexes in the allowed transform set and/or explicit MTS depends on block size.

80. The method of claim 79, wherein DCT-II and DST-VII are allowed for blocks having widths and/or heights less than or equal to a threshold.

81. The method of claim 79, wherein DCT-II, DST-VII, and DCT-VIII are allowed for blocks having widths and/or heights greater than or equal to a threshold.

82. The method of claim 79, wherein a Transform Skip (TS) mode is allowed.

83. The method of claim 79, wherein the set of allowed transforms depends on a codec mode of the block.

84. The method of claim 83, wherein the two transform-based transform sets including TS mode and DST-VII are allowed for Intra Block Copy (IBC) mode encoded and decoded blocks.

85. The method of claim 83, wherein the non-IBC mode codec blocks allow for a set of two transform bases including DCT-II and DST-VII, or allow for a set of three transform bases including TS mode, DCT-II and DST-VII.

86. The method of claim 79, wherein how the transformation index is signaled changes according to an allowed set of transformations.

87. The method of claim 67 or 68, wherein an indication of a maximum allowed transition size used in a non-TS mode of the MTS scheme is signaled.

88. The method of claim 87, wherein the indication is signaled in at least one of a sequence, picture, slice, group of slices, tile, brick level, or other type of video unit level.

89. The method of claim 88, wherein the indication is signaled in a Video Parameter Set (VPS), a Sequence Parameter Set (SPS), and a Picture Parameter Set (PPS), a picture header, a slice header, and a slice group header.

90. The method of claim 87, wherein the indication is derived from an allowed maximum TS size.

91. The method of claim 87, wherein the indication is used to control a maximum TS size and a maximum size used in other transform matrices.

92. The method of claim 91, wherein maximum sizes of non-TS and TS modes need not be signaled separately.

93. The method of claim 87 wherein the indication of the maximum allowed transition size is used to control an implicit MTS transition size and an explicit MTS transition size.

94. The method of claim 93, wherein whether to apply implicit MTS depends on a maximum allowed transition size of signaling.

95. The method of claim 67 or 68 wherein a maximum allowed transition size used in a non-TS mode of the MTS scheme is aligned with a maximum allowed transition size used in a TS mode.

96. The method of claim 95 wherein a maximum allowed transition size used in a non-TS mode of the MTS scheme is the same as a maximum allowed transition size used in a TS mode.

97. The method of claim 67 wherein the MTS scheme is an implicit MTS in which a transform matrix of the MTS is directly derived from a transform block size of the block.

98. The method of claim 97, wherein the derivation of an implicit MTS enable flag indicating whether implicit MTS is enabled is independent of a block size of the block.

99. The method of claim 98, wherein checking of block sizes in the derivation of the implicit MTS enable flag is skipped.

100. The method of claim 67 or 68 wherein a shared conditional check of block size prior to signaling MTS information including transform_skip_flag and tu_mts_idx is removed.

101. The method of claim 100, wherein the MTS information is further signaled if all of the following sharing conditions are true:

-tu_cbf_luma[x0][y0]

-treeType！＝DUAL_TREE_CHROMA

-！cu_sbt_flag，

otherwise, the MTS information is not signaled.

102. The method of claim 100, wherein when a sharing condition check of some rules returns true, a condition check of a block size compared to an allowable maximum TS size is applied before signaling a transform_skip_flag; and a conditional check of block size compared to the allowed maximum allowed MTS size is applied before the tu_mts_idx is signaled.

103. The method of claim 100 wherein the shared conditional check of block size before signaling MTS information remains unchanged, and the conditional check of block size before signaling transform matrix indexes used in non-TS mode of MTS is removed.

104. The method of any of claims 1, 23, 34, 67, wherein the converting generates blocks of video from a bitstream.

105. The method of any of claims 1, 23, 34, 67, wherein the converting generates a bitstream from blocks of video.

106. A device in a video system comprising a processor and a non-transitory memory having instructions thereon, wherein the instructions, when executed by the processor, cause the processor to implement the method of any one of claims 1-105.

107. A non-transitory computer readable medium having stored thereon a computer program which, when executed by a processor, implements the method of any one of claims 1 to 105.