CN113721925A - Computer readable storage medium, and compiling method and device of memory pointer - Google Patents
Computer readable storage medium, and compiling method and device of memory pointer Download PDFInfo
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Abstract
The invention relates to a compiling method and a compiling device for a storage medium and a memory pointer, wherein the compiling method comprises the following steps: analyzing the content in the compiling unit for determining a pointer operand and a physical address space pointed by a pointer form parameter; updating codes in a compiling unit for each first pointer operand and first pointer form parameter capable of determining a physical address space, wherein the codes are used for enabling the first pointer operand and the first pointer form parameter to carry physical address space information; for each of the second pointer operand and the second pointer form parameter that is not capable of determining the physical address space, an instruction calling an encoding function and/or an instruction calling a decoding function is inserted for causing the compiling unit to determine the physical address space to which the second pointer operand and the second pointer form parameter point when executed. According to the compiling method, when the chip architecture does not have hardware supporting the generic pointer and the software uses the generic pointer, the software can still run normally.
Description
Technical Field
The present invention relates to source code compiling, and more particularly, to a computer readable storage medium, a compiling method and apparatus for memory pointers, which are used to support generic pointers that imply address space information.
Background
The memory in a computer system is usually divided into different address spaces, such as a global space (global space), a shared space (shared space), a private space (private space), and so on, to meet the requirements of different types of applications for accessing data. Current programming models allow pointers to any physical address space to be converted into generic pointers, while allowing generic pointers to be mapped to any physical address space. In hardware operation, it is necessary to decide which specific physical address space the generic pointer points to. To support this generic pointer function, some chips may be provided with dedicated hardware for executing the memory access instructions of the generic pointer. The hardware is able to dynamically resolve address space information as memory access instructions are executed. For example, the chip architecture may fixedly divide the address space, and different address spaces use non-overlapping address ranges, so that the chip can access the specified memory address space according to the difference of the address ranges when executing the memory access instruction. However, dedicated hardware may increase the hardware overhead of the chip. Under the condition that the chip area and the power consumption are strictly limited, when the hardware supporting the generic pointer is not arranged in the chip architecture and the generic pointer is used in software, the program cannot run normally. Therefore, the present invention provides a computer readable storage medium, a compiling method and a compiling device for memory pointers, which are used for supporting generic pointers that imply address space information.
Disclosure of Invention
In view of the above, how to support the generic pointer with implicit address space information is an important issue for computer systems.
The invention relates to a compiling method of a memory pointer, which comprises the following steps: analyzing the content in the compiling unit, and determining a pointer operand and a physical address space pointed by a pointer form parameter in the compiling unit; updating codes in a compiling unit for each first pointer operand and first pointer form parameter capable of determining a physical address space, wherein the codes are used for enabling the first pointer operand and the first pointer form parameter to carry physical address space information; for each second pointer operand and second pointer form parameter that cannot determine the physical address space, inserting an instruction for calling an encoding function, or inserting an instruction for calling a decoding function, or inserting instructions for calling the encoding function and the decoding function, for causing the compiling unit to determine the physical address space to which the second pointer operand and the second pointer form parameter point when executed.
The present invention also relates to a computer-readable storage medium for storing program code that can be executed by a processor, and when the program code is executed by the processor, implementing the memory pointer compiling method as described above.
The invention also relates to a compiling device of the memory pointer, comprising: a storage device; and a processor. The storage device is used for storing the source code of the compiling unit. The processor analyzes the contents in the compiling unit and is used for determining a pointer operand and a physical address space pointed by a pointer form parameter in the compiling unit; updating codes in a compiling unit for each first pointer operand and first pointer form parameter capable of determining a physical address space, wherein the codes are used for enabling the first pointer operand and the first pointer form parameter to carry physical address space information; for each second pointer operand and second pointer form parameter that cannot determine the physical address space, inserting an instruction for calling an encoding function, or inserting an instruction for calling a decoding function, or inserting instructions for calling the encoding function and the decoding function, for causing the compiling unit to determine the physical address space to which the second pointer operand and the second pointer form parameter point when executed.
One of the advantages of the foregoing embodiments is that, by the compiling method described above, when there is no hardware supporting a generic pointer in a chip architecture and a generic pointer is used in software, the software can still run normally.
Other advantages of the present invention will be explained in more detail in conjunction with the following description and the accompanying drawings.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application.
Fig. 1 is a block diagram of a compiling apparatus for implementing a memory pointer according to an embodiment of the invention.
FIG. 2 is a flowchart illustrating a method for compiling a memory pointer according to an embodiment of the present invention.
FIG. 3 is a flow chart of a method for address space processing of pointer operands in a function body according to an embodiment of the present invention.
FIG. 4 is a flowchart of a method for address space processing of pointer-form parameters of functions according to an embodiment of the present invention.
FIG. 5 is a diagram illustrating encoding of a physical address according to an embodiment of the invention.
FIG. 6 is a flowchart of a method for selecting a program according to an embodiment of the invention.
FIG. 7 is a flowchart of a method for address space post-processing of pointer operands in a function body, according to an embodiment of the invention.
Wherein the symbols in the drawings are briefly described as follows:
10: compiling the computer; 110: a processor; 130: a memory; 140: an input device; 160: a display device; 170: a storage device; 190: a bus architecture; s210 to S250: the method comprises the following steps of; s310 to S340: the method comprises the following steps of; s410 to S466: the method comprises the following steps of; 500: a post-tagged physical address; 510: a physical address; 530: physical address space information; s610 to S660: the method comprises the following steps of; s710 to S730: the method comprises the following steps.
Detailed Description
Embodiments of the present invention will be described below with reference to the accompanying drawings. In the drawings, the same reference numerals indicate the same or similar components or process flows.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of further features, integers, steps, operations, elements, components, and/or groups thereof.
The use of words such as "first," "second," "third," etc. in this disclosure is intended to modify a component in a claim and is not intended to imply a priority order, precedence relationship, or order between components or steps in a method.
It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is described as being "directly connected" or "directly coupled" to another element, there are no intervening elements present. Other words used to describe the relationship between components may also be interpreted in a similar manner, e.g., "between" versus "directly between," or "adjacent" versus "directly adjacent," etc.
Refer to fig. 1. Compiler computer 10 may be implemented in an electronic product such as a mainframe, workstation, personal computer, notebook computer (Laptop PC), etc. Compiling computer 10 may include processor 110, memory 130, input device 140, display device 160, and storage device 170, and may be interconnected via bus architecture 190 to communicate data, addresses, control signals, and the like. The processor 110 may be a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), a General-Purpose Graphics Processing Unit (GPGPU), etc., and is used for loading and executing computer code of a compiler (compiler) to perform various operations, such as addition and multiplication calculation of integers and floating points, comparison operation, Boolean (Boolean) operation, bit shift, algebraic functions (e.g., plane interpolation, trigonometric functions, exponential functions, logarithmic functions), etc. During execution, the processor 110 may be a compiler that reads data from the memory 130 and writes data to the memory 130, including variables, data tables, various digital files, and the like. Memory 130 may be implemented as Dynamic Random Access Memory (DRAM). The storage device 170 may be implemented as one or more Hard Disks (Hard Disks, HDs), one or more Solid State Disks (SSDs), and the like, and provides a non-volatile storage space for program codes and user data, such as an Operating System (OS), a driver, a source code (source code) of software (also referred to as a compiling unit), and the like. The input device 140 may include an interface for connecting devices such as a keyboard, mouse, touch screen, etc. for receiving user input. The user may press a hard key on the keyboard to enter a character, operate the mouse to control the mouse on the screen, or make one or more gestures on the touch screen to control the executing application. Gestures may include, but are not limited to, single click, double click, single-finger dragging, multi-finger dragging, and the like. The Display device 160 may include an interface for connecting a Display screen, such as a Thin Film Transistor-Liquid Crystal Display (TFT-LCD panel), an Organic Light-Emitting Diode (OLED panel), etc., for displaying characters, numbers, symbols, dragging tracks, patterns, or pictures for a user to watch.
The operating system can perform fixed or variable length logical division on the physical address space of the memory, so that different physical address spaces correspond to non-overlapping physical memory units in the memory. Referring to fig. 2, a memory pointer compiling method implemented by the processor 110 when loading and executing the program code of the compiler is shown. In general, the method comprises: analyzing the content in the compiling unit, and determining a pointer operand and a physical address space pointed by a pointer form parameter in the compiling unit; updating codes in a compiling unit for each first pointer operand and first pointer form parameter capable of determining a physical address space, wherein the codes are used for enabling the first pointer operand and the first pointer form parameter to carry physical address space information; for each second pointer operand and second pointer form parameter that cannot determine the physical address space, inserting an instruction for calling an encoding function, or inserting an instruction for calling a decoding function, or inserting instructions for calling the encoding function and the decoding function, for causing the compiling unit to determine the physical address space to which the second pointer operand and the second pointer form parameter point when executed. When being executed, the encoding function is used for converting the physical address into a marked physical address carrying physical address and physical address space information; and the decoding function is used for generating new physical addresses pointing to all possible specific physical address spaces in the memory according to the physical addresses in the marked physical addresses and the physical address space information when being executed. And generating corresponding access operation instructions for all the generated new physical addresses according to the access operation condition of the marked physical address. And generating a program for selecting all the generated new physical addresses and access operations to the new physical addresses according to the address space information. By the decoding method, when the program is executed, correct memory access operation can be selected to be executed according to the address space information in the marked physical address.
Step S210: code (also referred to as source code) input to a compilation unit (compilation unit) includes a plurality of functions (functions). Each function may have one or more input form parameters (or input parameters) for receiving values that come in when the function is called (or input actual parameters). Each function may have an output form parameter. Any of the above-described form parameters may be a pointer form parameter (pointer parameter) that points to a specific memory address. Each function has a function body (function body) containing one or more instructions, each instruction being used to instruct a specific operation to be performed on one or more input operands (input operands) and storing the operation result (also referred to as an output operand). The above-described input operand may be a pointer input operand (pointer operation) to a specific memory address, and the above-described output operand may be a pointer output operand (pointer operation) to a specific memory address, and the pointer input operand and the pointer output operand may be collectively referred to as a pointer operand.
Step S220: the address space processing flow of the pointer operand in the function body is executed, and is used for determining, for each pointer operand in the function body of each function, a physical address space pointed to by the pointer operand according to a context in the function, for example, a global space (global space), a shared space (shared space), a private space (private space), or other types of spaces.
Step S230: and the address space processing flow for executing the pointer form parameters of the function is used for determining whether the pointer form parameters point to a specific physical address space or not according to the calling condition of the pointer form parameters in the compiling unit aiming at each pointer form parameter of the function. If so, then the address space is marked for the instruction within the function that uses the pointer-form parameter. If the parameter cannot be determined, inserting an instruction for calling a decoding function before the instruction for using the pointer-form parameter in the function, wherein the instruction is used for enabling a compiling unit to be executed to complete the decoding process of the physical address space; and in the compiling unit, before all the calling instructions of the function, an instruction for calling the coding function is inserted, so that the compiling unit completes the coding flow of the physical address space when being executed. The encoding and decoding functions as described above may be implemented in a runtime library (runtime library) for enabling a compilation unit to be dynamically imported when executed. The encoding and decoding processes of the physical address space will be described in detail in the following paragraphs.
Step S240: the address space processing flow of the pointer operands in the function body is executed again. If any function in the compiling unit uses the pointer type parameter, the context of the address space usage of the function may change after the processing of step S230. Therefore, these functions need to perform the address space processing of the pointer operand in the function body once again.
Step S250: the address space post-processing flow of the pointer operand in the function body is executed, and is used for performing final processing on a specific instruction in the function body of each function, such as a load instruction (load instruction), a store instruction (store instruction), a select instruction (sel instruction), a convergence node (phi node) output by each branch in a branch jump instruction, and the like.
For details of the operation of step S220, refer to the address space processing flow of the pointer operand in the function body implemented by the processor 110 when loading and executing the program code of the compiler shown in fig. 3.
Step S310: for each instruction in each function, pointer operands are collected. Including, but not limited to, mathematical arithmetic instructions, logical arithmetic instructions, special function instructions, select instructions, branch jump instructions, function call instructions (call instructions), load instructions, store instructions, and the like.
Step S320: in addition to the select instruction and the branch jump instruction, the physical address space pointed to by each instruction pointer operand is determined. In detail, for each collected pointer operand, the physical address space to which it points is determined from the context of the corresponding instruction in the function. The compiler may establish a mapping table for recording a mapping relationship of a pointer operand of each instruction and its corresponding physical address space, except for the select instruction and the branch jump instruction. For instructions other than the select instruction and the branch jump instruction, if each pointer operand of the physical address space can be determined, the compiler replaces the original pointer operand with a pointer operand tagged with physical address space information (i.e., pointing to the corresponding physical address space).
Step S330: the physical address space to which each output of the select instruction and the branch jump instruction points is determined. In detail, for a select instruction and a branch jump instruction, if their operands are both able to determine the physical address space and both point to the same physical address space, the compiler replaces the original pointer output with a pointer output containing physical address space information (i.e. pointing to the corresponding physical address space). If any of its operands cannot determine the physical address space, or if its operands point to a different physical address space, the compiler marks the physical address space output by the pointer as generic. The compiler may also record in the mapping table the mapping relationship between the pointer outputs of the select instruction and the branch jump instruction and their corresponding physical address spaces. Wherein, the mapping relationship of the corresponding physical address space can represent a generic or specific physical address space.
Step S340: an address space mapping instruction is inserted before each function call instruction that has a pointer operand (i.e., a pointer actual parameter) with certain physical address space information.
With respect to steps S310 to S330, an example is explained below. Assuming that a compiling unit contains a function foo (), the source code is as follows:
the function foo () is a global function that returns no value, with an input form parameter "Cond". The function foo () includes a mathematical arithmetic instruction merge selection instruction "int × p ═ Cond% 2 ═ 0C: B; ", the execution is to divide the variable" Cond "transmitted through the form parameter by 2 to obtain the remainder, and then determine whether the remainder is 0. If so, the value of the variable "B" is stored to the address in memory referred to by the pointer variable "p". Otherwise, the value of the variable "C" is stored to the address in memory referred to by the pointer variable "p".
In step S310, the compiler finds the pointer output ". p" in the mathematical arithmetic instruction merge selection instruction in the function foo (), and the instructions in the function foo () are initially compiled into the code as follows:
％2＝addrspacecast i32 addrsapce(1)*％1to i32*
％4＝addrspacecast i32 addrspace(1)*％3to i32*
％5＝select i1％cmp,i32*％2,i32*％4
％6＝load i32,i32*％5
in step S320, since the collected pointer operands belong to the selection instruction, the compiler has no further processing with respect to the code of the function foo () as represented above. In step S330, for the mathematical arithmetic instruction merge select instruction, the compiler determines that operands "B" and "C" therein both point to the global space "addrspace (1)", and thus, the pointer output "xp" also points to the global space. Then, the compiler changes the code of the function foo () represented above into a code in which the pointer output ". times.p" is converted from a generic pointer into a pointer mapped to the global space "addrspace (1)":
％15＝select i12％cmp,i32 addrspace(1)*％1,i32 addrspace(1)*％3
％16＝load i32,i32 addrspace(1)*％15
in step S340, an example will be described below. Assume that there are two functions, namely, caller1() and caller2(), in the compilation unit, and that both of these functions call the function caller (). The functions, call (), call 1(), and call 2() are initially compiled into code as shown below:
assume that in steps S310 to S320, the compiler parses out that the pointer form argument "ptr" of the function call () points to a first address space (e.g., global space) at the pointer actual argument in the function call 1() and points to a second address space (e.g., shared space) at the pointer actual argument in the function call 1 (). Therefore, in step S340, the compiler inserts an address space mapping instruction "% 11 ═ addrspeccast i8addrspace (1)% 1to i8 ″, before the function call instruction with pointer operand in the function caller1(), making the function caller1() the code as shown below:
further, in step S340, the compiler inserts an address space mapping instruction "% 11 ═ addrspeccast i8 addrspecspace (2)% 1to i8 ″, before the function call instruction having the pointer operand in the function caller2(), making the function caller2() the code as shown below:
these newly inserted address space mapping instructions are used by the address space processing flow of the pointer-form parameter of the function in step S230, so that the compiler determines the physical address space of the pointer actual parameter of the instruction calling the function.
For the details of the operation of step S230, refer to the address space processing flow of pointer type parameters of the function implemented by the processor 110 when loading and executing the program code of the compiler, as shown in fig. 4, for analyzing the pointer type parameters in a function. The flow of the embodiment can be appropriately modified by those skilled in the art to analyze a plurality of functions, and the present invention is not limited thereto. In general, this flow repeatedly executes a loop (steps S410 to S450) for gathering all cases where this pointer-form parameter is called in the compilation unit, and records using two variables "FirstUse" and "OtherUse". Then, it is determined whether the pointer format parameter can determine the physical address space according to the loop investigation result (step S462), and the contents of the compiling unit are changed accordingly (steps S464, S466). The description is as follows:
step S410: the first (or next) instruction in the compilation unit to call this function is searched. The variables "FirstUse" and "OtherUse" are both initially "0", representing no assignment.
Step S420: and judging whether the calling condition of the pointer form parameter of the function is marked. If so, the flow proceeds to the processing of step S432; otherwise, the flow proceeds to the process of step S442. The compiler may check whether the instruction calling this function has been previously inserted with an address space mapping instruction as shown in step S340. If an inserted address space mapping instruction is detected, the call to the pointer-form parameter representing the function is flagged.
Step S432: and judging whether the variable 'FirstUse' is not assigned. If so, the flow proceeds to the processing of step S434; otherwise, the flow proceeds to the process of step S436.
Step S434: and assigning the currently acquired physical address space to a variable 'FirstUse'. That is, the variable "FirstUse" stores the information of the physical address space indicated by the detected address space mapping instruction.
Step S436: and when the value of the variable 'FirstUse' is inconsistent with the currently acquired physical address space, assigning the currently acquired physical address space to the variable 'OtherUse'. That is, when the variable "FirstUse" stores the information of the physical address space not consistent with the physical address space indicated by the detected address space mapping instruction, the variable "OtherUse" stores the information of the physical address space indicated by the detected address space mapping instruction.
Step S442: and judging whether the pointer is a form parameter of the function where the called instruction is located. If so, the flow proceeds to the processing of step S444; otherwise, the flow proceeds to the process of step S446.
Step S444: and tracing the condition that the function where the pointer is located is called until the calling condition of the pointer form parameter is found.
Step S446: the variable "FirstUse" is marked as generic. The compiler may have the variable "FirstUse" store a specific value to represent generic information.
Step S450: and judging whether all the instructions for calling the function are analyzed. If so, the flow proceeds to the processing of step S462; otherwise, the flow proceeds to the process of step S410.
Step S462: it is determined whether the variable "FirstUse" has an assignment and is not marked as generic and the variable "OtherUse" has no assignment. If so, the physical address space representing the pointer type parameter can be confirmed and only points to one physical address space, and the process continues to step S464; otherwise, the physical address space representing the pointer type parameter cannot be confirmed, there are many possibilities for the pointed physical address space, and the flow proceeds to the process of step S466.
Step S464: the instruction within the function that uses the pointer-form parameter is address space labeled. In detail, within a function, for an instruction using the pointer-form parameter, the pointer-form parameter is replaced with a pointer containing information of a specific physical address space.
Step S466: before the instruction using the pointer form parameter in the function, inserting an instruction for calling a decoding function for processing the pointer form parameter; and in the compiling unit, before all the calling instructions of the function, an instruction for calling the coding function is inserted for processing the required actual parameters. As noted herein, all call instructions for this function are present in other functions.
When executed by a compiler, the encoding function inserts instructions into the encoding flow. The encoding flow at least comprises an operation for converting the physical address into a tagged physical address carrying the physical address and physical address space information. For details of the encoding process, refer to fig. 5. In some embodiments, the physical address 510 of the memory may be represented in 48 bits. The encoding process may convert the 48-bit physical address 510 into a 64-bit marked physical address 500, in which bits 61 to 63 store physical address space information 530 for indicating which physical address space the physical address 510 is mapped to. Physical address 510 and physical address space information 530 make up post-tagged physical address 500. Those skilled in the art may use more or less bits to represent the physical addresses of the memory and more or less bits to represent the physical address space information according to the system requirements, and the invention is not limited thereto.
When executed by the compiler, the decode function inserts instructions into the decode process. The decoding process at least comprises the following operations: generating new physical addresses pointing to all possible (i.e. including all used) physical address spaces in the memory according to the tagged physical addresses and the physical address space information: generating an access operation instruction for each of the new physical addresses of all possible physical address spaces according to the access operation condition of the marked physical address; and implementing a selection program for selecting the corresponding access operation instruction to execute to access the new physical address of the corresponding physical address space according to the physical address space information received when the compiling unit is executed. By the decoding process, when the compiling unit is executed, the correct memory access operation can be selected to be executed according to the address space information in the marked physical address. For a detailed selection procedure, refer to the flowchart shown in fig. 6, which is implemented by the processor when the program code of the selection procedure is loaded and executed. The description is as follows:
step S610: the tagged physical address is entered.
Step S622: and acquiring the physical address space information from the marked physical address. For example, with the embodiment of FIG. 5, the encoder may obtain the physical address space information 530 from bits 61 through 63 in the post-mark physical address 500.
Step S624: the physical address is obtained from the tagged physical address. For example, with the embodiment of FIG. 5, the encoder may obtain physical address 510 from bits 0 through 47 of post-tag physical address 500.
Step S632: and judging whether the physical address space information points to the private space. If so, the flow proceeds to the processing of step S634; otherwise, the flow proceeds to the determination of step S642.
Step S634: the physical address is forced to translate (cast) to a new physical address pointing to a private space in memory.
Step 636: a load instruction (load instruction) is generated that carries the new physical address as an operand.
Step S642: and judging whether the physical address space information points to the shared space. If so, the flow proceeds to the processing of step S644; otherwise, the flow proceeds to the process of step S654.
Step S644: the physical address is forced to be translated into a new physical address pointing to a shared space in memory.
Step S646: a load instruction is generated that carries the new physical address as an operand.
Step S654: the physical address is forced to be translated into a new physical address pointing to the global space in memory.
Step S656: a load instruction is generated that carries the new physical address as an operand.
Step S660: a Phi Node (Phi Node) is generated to store the output of the load instruction.
Those skilled in the art can use decoding flow to support more or less memory access instructions (besides the exemplary load instructions of the present invention, memory store instructions, etc.) and support more or less physical address space types (not limited to the global space, shared space, and private space listed in the present invention) according to the system requirements, and the present invention is not limited thereto.
Regarding step S466, following the example set forth in step S340 described above, the function call () is also compiled into code as shown below:
CALLER1() and CALLER2() are also compiled into code as shown below:
for details of the operation of step S250, reference is made to the address space post-processing flow of the pointer operand in the function body, which is implemented by the processor 110 when the program code of the compiler is loaded and executed, as shown in fig. 7. The description is as follows:
step S710: for all load instructions with output pointers, an instruction calling a decode function is inserted after each of the load instructions for processing the output pointers.
Step S720: for all select and conditional branch instructions having an output pointer that cannot determine the physical address space, for each such select or conditional branch instruction, an instruction calling an encoding function for processing operands is inserted before the instruction, and an instruction calling a decoding function for processing the output pointer is inserted after the instruction.
Step S730: for all store instructions having as store contents a pointer operand capable of determining a physical address space, an instruction calling an encoding function is inserted before each of the store instructions for processing the pointer operand.
In step S720, an example will be described below. Assume that a piece of source code becomes code as shown below after initial compilation:
％2＝addrspacecast i32 addrsapce(1)*％1to i32*
％4＝addrspacecast i32 addrspace(3)*％3to i32*
％5＝select i1％cmp,i32*％2,i32*％4
％6＝load i32,i32*％5
for a mathematical arithmetic instruction merge select instruction, the compiler determines that one operand points to the global space "addrspace (1)" and the other operand points to the private space "addrspace (3)", thus inserting an encoded instruction of the operand before the mathematical arithmetic instruction merge select instruction and inserting a decoded instruction of the pointer output after the mathematical arithmetic instruction merge select instruction. The updated code is as follows:
％12＝encode(％1,1)
％14＝encode(％3,3)
％15＝select i1％cmp,i32*％12,i32*％14
％16＝decode(％6,％15)
the above-mentioned determinable physical address space refers to a physical address space to which a pointer operand, an output pointer, or a pointer format parameter can be determined at the time of compilation. The physical address space that cannot be determined as described above means that the physical address space indicated by the pointer operand, the output pointer, or the pointer type parameter cannot be determined at the time of compilation, and must be determined until execution.
By the compiling method of the memory pointer, when the chip architecture does not have hardware supporting the generic pointer and the software uses the generic pointer, the software can still run normally.
All or a portion of the steps of the methods described herein may be implemented by a computer program, e.g., a compiler, an executive, a driver, etc. In addition, other types of programs as shown above may also be implemented. Those skilled in the art can write the method of the embodiments of the present invention as program code, and will not be described again for the sake of brevity. The computer program implemented according to the embodiments of the present invention can be stored in a suitable computer readable storage medium, such as a DVD, a CD-ROM, a usb disk, a hard disk, or can be disposed in a network server accessible via a network (e.g., the internet, or other suitable medium).
Although the components described above are included in fig. 1, it is not excluded that more additional components may be used to achieve better technical results without departing from the spirit of the present invention. Furthermore, although the flowcharts of fig. 2 to 4 and 6 to 7 are executed in a designated order, a person skilled in the art may modify the order between the steps without departing from the spirit of the invention to achieve the same effect, and therefore, the present invention is not limited to using only the order as described above. In addition, a person skilled in the art may also integrate several steps into one step, or perform more steps in sequence or in parallel besides these steps, and the present invention should not be limited thereby.
The above description is only for the preferred embodiment of the present invention, and it is not intended to limit the scope of the present invention, and any person skilled in the art can make further modifications and variations without departing from the spirit and scope of the present invention, therefore, the scope of the present invention should be determined by the claims of the present application.
Claims (15)
1. A method for compiling a memory pointer, executed by a processor when executing a program code of a compiler, comprising:
analyzing the content in a compiling unit, and determining a pointer operand and a physical address space pointed by a pointer form parameter in the compiling unit;
updating codes in the compiling unit for each first pointer operand and first pointer form parameter capable of determining a physical address space, wherein the codes are used for enabling the first pointer operand and the first pointer form parameter to carry physical address space information; and
for each second pointer operand and second pointer form parameter that cannot determine a physical address space, inserting an instruction of an encoding flow, or inserting an instruction of a decoding flow, or inserting instructions of the encoding flow and the decoding flow, for causing the compiling unit to determine a physical address space to which the second pointer operand and the second pointer form parameter point when executed,
wherein the encoding process comprises a first operation for converting a physical address into a tagged physical address carrying the physical address and physical address space information,
the decoding process includes a second operation, a third operation and a fourth operation, the second operation is configured to generate a new physical address pointing to all used physical address spaces in a memory according to the physical address in the post-marked physical address and the physical address space information, the third operation is configured to generate a corresponding access operation instruction for the new physical address of all used physical address spaces according to an access operation of the post-marked physical address, and the fourth operation is configured to implement a selection program, so that when the compiling unit is executed, the corresponding access operation instruction is selected to be executed according to the received physical address space information, so as to access the new physical address of the corresponding physical address space.
2. The method for compiling memory pointers according to claim 1, wherein different physical address spaces correspond to non-overlapping physical memory locations in the memory.
3. The method for compiling memory pointers according to claim 1, comprising:
and replacing each first pointer operand in the compiling unit with a pointer operand marked with physical address space information.
4. The method for compiling memory pointers according to claim 1, comprising:
replacing, in a first function in the compilation unit, the first pointer type parameter with a pointer containing specific physical address space information for an instruction that uses the first pointer type parameter; and
for the second pointer type parameter used in a second function in the compiling unit, inserting an instruction of the decoding flow before an instruction of using the second pointer type parameter in the second function so as to process the second pointer type parameter; and inserting an instruction of the encoding flow before the instruction in the compiling unit for calling the second function, so as to process an actual parameter required by the second function.
5. The method for compiling memory pointers according to claim 1, comprising:
for load instructions of an output pointer in the compiling unit, inserting an instruction of the decoding flow after each load instruction for processing the output pointer.
6. The method for compiling memory pointers according to claim 1, comprising:
for a selection instruction and a conditional branch instruction in the compiling unit, which cannot determine an output pointer of a physical address space, inserting an instruction of the encoding flow before each selection instruction or each conditional branch instruction for processing an operand of each selection instruction or conditional branch instruction; and inserting instructions of the decode flow after each of the select instructions or each of the conditional branch instructions to process the output pointer.
7. The method for compiling memory pointers according to claim 1, comprising:
for the storage instructions in the compiling unit having the first pointer operand as storage content, inserting the instructions of the encoding flow before each storage instruction for processing the first pointer operand.
8. A computer-readable storage medium storing program code executable by a processor, wherein the program code implements a method for compiling a memory pointer according to any one of claims 1to 7 when executed by the processor.
9. An apparatus for compiling memory pointers, comprising:
a storage device for storing a source code of the compiling unit; and
a processor, coupled to the storage device, for analyzing the contents in the compiling unit, and determining a physical address space pointed to by a pointer operand and a pointer form parameter in the compiling unit; updating codes in the compiling unit for each first pointer operand and first pointer form parameter capable of determining a physical address space, wherein the codes are used for enabling the first pointer operand and the first pointer form parameter to carry physical address space information; and for each second pointer operand and second pointer form parameter that cannot determine a physical address space, inserting an instruction of an encoding flow, or inserting an instruction of a decoding flow, or inserting instructions of the encoding flow and the decoding flow, for causing the compiling unit to determine a physical address space to which the second pointer operand and the second pointer form parameter point when executed,
wherein the encoding process comprises a first operation for converting a physical address into a tagged physical address carrying the physical address and physical address space information,
the decoding process includes a second operation, a third operation and a fourth operation, the second operation is configured to generate a new physical address pointing to all used physical address spaces in the memory according to the physical address in the post-marked physical address and the physical address space information, the third operation is configured to generate an access operation instruction for each of the new physical addresses in all used physical address spaces according to an access operation of the post-marked physical address, and the fourth operation is configured to implement a selection procedure, so that when the compiling unit is executed, according to the received physical address space information, the corresponding access operation instruction is selected to be executed to access the new physical address of the corresponding physical address space.
10. The apparatus for memory pointer compilation as recited in claim 9, wherein different physical address spaces correspond to non-overlapping physical locations in the memory.
11. The apparatus for memory pointer compilation as recited in claim 9, wherein the processor replaces each of the first pointer operands in the compilation unit with a pointer operand tagged with physical address space information.
12. The apparatus for compiling memory pointers according to claim 9, wherein the processor replaces, in the first function in the compiling unit, the first pointer type parameter with a pointer containing specific physical address space information for an instruction using the first pointer type parameter; and for the second pointer form parameter used in the function in the compiling unit, inserting an instruction of the decoding flow before an instruction of the function using the second pointer form parameter so as to process the second pointer form parameter, and inserting an instruction of the encoding flow before an instruction of the compiling unit for calling the second function so as to process an actual parameter required by the function.
13. The apparatus for memory pointer compilation as claimed in claim 9, wherein the processor inserts instructions of the decode flow after each load instruction for a load instruction of an output pointer in the compilation unit to process the output pointer.
14. The apparatus for compiling a memory pointer according to claim 9, wherein the processor inserts, for a select instruction and a conditional branch instruction in the compiling unit that cannot determine an output pointer of a physical address space, an instruction of the encoding flow for processing an operand of each of the select instruction or the conditional branch instruction before each of the select instruction or the conditional branch instruction; and inserting instructions of the decode flow after each of the select instructions or each of the conditional branch instructions to process the output pointer.
15. The apparatus for memory pointer compilation as claimed in claim 9, wherein the processor inserts instructions of the encoding flow for processing the first pointer operand prior to each store instruction for a store instruction in the compilation unit having the first pointer operand as a store.
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