CN113706525B - Intelligent printed circuit board patch defect identification method based on image processing - Google Patents
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Abstract
The invention relates to the technical field of circuit board defect identification, in particular to an intelligent printed circuit board patch defect identification method based on image processing, which comprises the following steps: acquiring an image of the surface mount circuit board, and performing gray level processing and smoothing processing; obtaining the edge of the image by adopting a Canny edge detection method; inputting terminal coordinates, and acquiring the outline and coordinate point sequence of the chip component; and calculating the difference value between the coordinate point sequence of the chip component and the qualified coordinate point of the chip component, wherein when the difference value exceeds a defect threshold value, a defect exists, otherwise, the chip is qualified. The invention judges whether the patch has defects or not by a convolutional neural network algorithm, Canny edge detection and coordinate positioning of the terminal and the chip element, determines different defect types by adopting different algorithms, timely reflects the defects and simultaneously outputs the reasons causing the defects, so that a worker can timely adjust processing equipment including a chip mounter, the yield is improved, and defective products are timely removed.
Description
Technical Field
The invention relates to the technical field of circuit board defect identification, in particular to an intelligent printed circuit board patch defect identification method based on image processing.
Background
The chip resistor, i.e. the chip fixed resistor, is one of the metal glass glaze resistors. In the manufacture of the chip resistor, metal powder and glass glaze powder are mixed and printed on a substrate by a screen printing method to manufacture a finished product. Printed circuit board patches have subtle differences in patch position, angle, solder joint shape, etc., but the effect of such subtle differences is not negligible relative to the size of the patch. However, the conventional image recognition method, such as the image comparison method, is too sensitive to the subtle differences, and is easy to cause misjudgment. However, other morphological image recognition algorithms, such as wavelet transform and hough transform, have the disadvantages of large calculation amount, large influence by background interference and the like, and the detection result cannot completely meet the requirements. Therefore, an intelligent printed circuit board patch defect identification method based on image processing is provided.
Disclosure of Invention
Based on the technical problems in the background art, the invention provides an intelligent identification method for the chip defects of the printed circuit board based on image processing, which has the characteristics of accurately and efficiently identifying the chip defects of the circuit board and classifying and identifying the defects, and solves the problem that the existing image comparison method is too sensitive to subtle differences and is easy to cause misjudgment of the chip defects.
The invention provides the following technical scheme: an intelligent printed circuit board patch defect identification method based on image processing comprises the following steps:
s1, acquiring an image containing the terminal and the chip element printed circuit board after the chip is attached;
s2, carrying out gray processing on the acquired image to obtain a gray image;
s3, smoothing the gray level image;
s4, performing edge detection on the smoothed gray-scale image by adopting a Canny edge detection method to obtain the edge of the image;
s5, inputting the default coordinates of the terminals in the known qualified image as reference values, and acquiring the outline and the coordinate point sequence of the sheet element in the image to be detected based on the reference values and the image edges;
s6, comparing the obtained coordinate point sequence of the chip component with the set difference value of the qualified coordinate point of the chip component, wherein when the difference value exceeds a defect threshold value, a defect exists, otherwise, the chip is qualified;
preferably, the image in step S1 is a top view and a side view of a large number of printed circuit boards after being pasted and collected by a camera;
preferably, the default coordinates of the terminals in step S5 are coordinates that are not changed in the image when the camera and the pcb terminals are relatively static, and the coordinates of the chip component of the chip are affected by the quality of the chip;
preferably, the step S5 is based on four corner coordinates of two terminals in the top view of the known qualified image in different view images, namely, a1, a2, A3, a 4; b1, B2, B3, B4; confirming coordinates C1, C2, C3 and C4 of four corners of the chip component in the image, since 8 coordinate points of the terminal are constant, even if part of the coordinate points are shielded by the chip component, the positioning and calculation of the coordinates of the chip component are not influenced;
preferably, in the step S6, when it is detected that only the coordinates C1, C2, C3, and C4 of the four corners of the sheet element in the image are entirely above, below, to the left, or to the right beyond a set threshold, the defect is output as an under-overlap defect;
preferably, in the step S6, when the lateral distance between the top left corner C1 and the top right corner C2 of the sheet element in the image is detected, and the lateral distance between the bottom left corner C3 and the bottom right corner C4 of the sheet element in the image is detected to be small, and the set threshold is exceeded, the output is the element side anti-defect;
preferably, in the step S6, when the longitudinal distance between the top left corner C1 and the bottom left corner C3 of the sheet element in the image is detected, and the longitudinal distance between the top right corner C2 and the bottom right corner C4 of the sheet element in the image is detected to be reduced and exceeds a set threshold, the output is a defect of component lift-off;
preferably, the four corner coordinates of the two terminals in the different view images in the step S5 based on the side view of the known qualified image, namely D1, D2, D3, D4; e1, E2, E3, E4; confirming coordinates F1, F2, F3 and F4 of four corners of the chip component in the image, since 8 coordinate points of the terminal are constant, even if part of the coordinate points are shielded by the chip component, the positioning and calculation of the coordinates of the chip component are not influenced;
preferably, in step S6, when it is detected that the coordinates of C1, C2, C3 and C4 of the sheet-type component in the image are within the threshold value, and the lateral spacing between F1 and F2 of the sheet-type component in the image and the spacing between F3 and F4 of the sheet-type component in the image become large and exceed the set threshold value, the stacking fault is output;
preferably, the identification method is used for identifying the front and back sides of the patch, and specifically comprises the following steps: the method comprises the steps of collecting a large number of images containing the chip type element through a camera, labeling the front and back sides of the chip type element in the images, training a front and back side detection model of a patch by using the obtained images and labeling data, detecting the current image by using the front and back side detection model of the patch, and outputting the current image as the defect of wrong facing direction of the patch if the element is the back side.
The invention provides an intelligent identification method for a printed circuit board patch defect based on image processing, which judges whether the patch has a defect or not by a convolutional neural network algorithm, Canny edge detection and coordinate positioning of a terminal and a sheet element, determines different defect types by adopting different algorithms, timely reflects the defect and simultaneously outputs the reason causing the defect, so that a worker can timely adjust processing equipment including a patch mounter, improve the yield and timely remove defective products.
Drawings
FIG. 1 is a schematic diagram of coordinate labeling of each point after the patch is attached.
FIG. 2 is a schematic diagram of the post-patch pass threshold range of the present invention.
Fig. 3 is a schematic diagram of a patch qualification in the first embodiment of the invention.
Fig. 4 is a schematic diagram illustrating an under-overlap defect in an embodiment of the invention.
Fig. 5 is a schematic diagram of a device side anti-defect in the second embodiment of the invention.
Fig. 6 is a schematic diagram of a device lift-off defect in the third embodiment of the present invention.
Fig. 7 is a schematic diagram of a stacking fault in the fourth embodiment of the invention.
Fig. 8 is a schematic diagram of a patch orientation error defect in the fifth embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The invention provides a technical scheme that: an intelligent printed circuit board patch defect identification method based on image processing comprises the following steps:
s1, acquiring a top view and a side view of the printed circuit board containing the terminal and the chip element after the chip is attached;
s2, carrying out gray processing on the acquired image to obtain a gray image; graying a color image, namely carrying out weighted average according to sampling values of all channels of the image. Taking color images in RGB format as an example, the method generally used for graying mainly includes: the method comprises the following steps: gray = (R + G + B)/3; the method 2 comprises the following steps: gray =0.299R +0.587G + 0.114B;
s3, smoothing the gray level image; the smoothing process, also called blurring process, is a simple and frequently used image processing method, and the smoothing process uses the existing and common gaussian filter. The image Gaussian filtering can be realized by two one-dimensional Gaussian kernels which are weighted twice respectively, or can be realized by one convolution of one two-dimensional Gaussian kernel;
s4, performing edge detection on the smoothed gray-scale image by adopting a Canny edge detection method to obtain the edge of the image; the method for reducing the number of false edges in the Canny algorithm is to use a double threshold method. Two thresholds are selected (the selection method of the thresholds is discussed in the expansion), an edge image is obtained according to the high threshold, so that the image has few false edges, but because the threshold is higher, the generated image edge may not be closed, and another low threshold is adopted in the unsolved problem;
linking edges into a contour in the high-threshold image, searching a point meeting a low threshold in 8 neighborhood points of a breakpoint by the algorithm when an endpoint of the contour is reached, and collecting new edges according to the point until the edge of the whole image is closed;
s5, inputting the default coordinate of the terminal in the known qualified image as a reference value, and acquiring the outline and the coordinate point sequence of the chip component in the image to be detected based on the reference value and the image edge, wherein the default coordinate of the terminal refers to the coordinate of the terminal which is not changed in the image all the time under the condition that the camera and the printed circuit board terminal are relatively static, and the chip component coordinate of the chip is influenced by the quality of the chip;
and S6, comparing the obtained coordinate point sequence of the chip component with the set difference value of the coordinate point of the qualified chip component, and if the difference value exceeds a defect threshold value, determining that the chip is defective, otherwise, determining that the chip is qualified.
The first embodiment is as follows:
as shown in fig. 4. Insufficient overlap defect: one end of the chip component is too far away from one of the two terminals, the contact is too little or no contact is made, the terminal is not overlapped enough, the conduction of the component is directly influenced, and the defect can be caused by the misalignment of the chip mounter.
The identification method comprises the following steps:
firstly, acquiring a top view and a side view of a printed circuit board containing terminals and chip components after chip mounting;
performing gray processing on the acquired image to obtain a gray image, wherein the gray processing adopts any one of a maximum value method, an average value method and a weighted average method; carrying out smoothing treatment on the gray-scale image, wherein the smoothing treatment is also called fuzzy treatment and is a simple image processing method with high use frequency, and the smoothing treatment adopts the existing and common Gaussian filtering;
performing edge detection on the smoothed gray level image by adopting a Canny edge detection method to obtain the edge of the image; inputting a default coordinate of a terminal in a known qualified image as a reference value, and acquiring the outline and a coordinate point sequence of a chip element in an image to be detected based on the reference value and an image edge, wherein the default coordinate of the terminal refers to a coordinate of the terminal which is not changed in the image all the time under the condition that a camera and a printed circuit board terminal are relatively static, and the coordinate of the chip element of the chip is influenced by the quality of the chip;
four corner coordinates of two terminals in different view images in a top view based on known qualified images, namely, A1, A2, A3 and A4; b1, B2, B3, B4; confirming coordinates C1, C2, C3 and C4 of four corners of the chip component in the image, since 8 coordinate points of the terminal are constant, even if part of the coordinate points are shielded by the chip component, the positioning and calculation of the coordinates of the chip component are not influenced;
four corner coordinates of two terminals in different view images based on the side view of the known qualified image, namely D1, D2, D3 and D4; e1, E2, E3, E4; confirming coordinates F1, F2, F3 and F4 of four corners of the chip component in the image, since 8 coordinate points of the terminal are constant, even if part of the coordinate points are shielded by the chip component, the positioning and calculation of the coordinates of the chip component are not influenced;
and comparing the obtained coordinate point sequence of the chip element with the set difference value of the coordinate points of the qualified chip element, and if the difference value does not exceed the defect threshold value, the chip is qualified. As shown in fig. 2 and 3. The dotted line in FIG. 2 is the acceptable threshold range;
when only the coordinates C1, C2, C3, C4 of the four corners of the sheet-type element in the image are detected to be wholly over, under, left, or right beyond a set threshold, the output is an under-overlap defect. At this time, F1, F2, F3 and F4 meet the threshold range, and the defect is verified by detecting the coordinates of F1, F2, F3 and F4, as shown in fig. 4.
Example two.
The identification method comprises the following steps:
as shown in fig. 5. Element side reverse defect: the plane of the chip component is not parallel to the plane of the two terminals, the overlapping contact between the two terminals and the chip component is not sufficient for 100%, which may be due to incomplete wetting of the terminal faces or the metal faces of the chip component;
firstly, acquiring a top view and a side view of a printed circuit board containing terminals and chip components after chip mounting;
performing gray processing on the acquired image to obtain a gray image, wherein the gray processing adopts any one of a maximum value method, an average value method and a weighted average method; carrying out smoothing treatment on the gray-scale image, wherein the smoothing treatment is also called fuzzy treatment and is a simple image processing method with high use frequency, and the smoothing treatment adopts the existing and common Gaussian filtering;
performing edge detection on the smoothed gray level image by adopting a Canny edge detection method to obtain the edge of the image; inputting a default coordinate of a terminal in a known qualified image as a reference value, and acquiring the outline and a coordinate point sequence of a chip element in an image to be detected based on the reference value and an image edge, wherein the default coordinate of the terminal refers to a coordinate of the terminal which is not changed in the image all the time under the condition that a camera and a printed circuit board terminal are relatively static, and the coordinate of the chip element of the chip is influenced by the quality of the chip;
four corner coordinates of two terminals in different view images in a top view based on known qualified images, namely, A1, A2, A3 and A4; b1, B2, B3, B4; confirming coordinates C1, C2, C3 and C4 of four corners of the chip component in the image, since 8 coordinate points of the terminal are constant, even if part of the coordinate points are shielded by the chip component, the positioning and calculation of the coordinates of the chip component are not influenced;
four corner coordinates of two terminals in different view images based on the side view of the known qualified image, namely D1, D2, D3 and D4; e1, E2, E3, E4; confirming coordinates F1, F2, F3 and F4 of four corners of the chip component in the image, since 8 coordinate points of the terminal are constant, even if part of the coordinate points are shielded by the chip component, the positioning and calculation of the coordinates of the chip component are not influenced;
and comparing and calculating the difference value between the obtained coordinate point sequence of the chip element and the qualified coordinate point of the chip element passing through the setting, detecting the transverse distance between the upper left corner C1 and the upper right corner C2 of the chip element in the image, and detecting that the transverse distance between the lower left corner C3 and the lower right corner C4 of the chip element in the image becomes smaller, and outputting as an element side anti-defect when the set threshold value is exceeded. At this time, the lateral spacing between F1 and F2 and the spacing between F3 and F4 become large for verifying the defect, as shown in fig. 5.
Example three:
as shown in fig. 6. The element vertical slice defect: one end of the chip component is connected with the terminal, and the other end of the chip component is not contacted with the other terminal, and is in a tilting state, so that the chip component is not communicated with the terminal, and the defects are caused probably because the terminal surface or the metal surface of the chip component is not completely wet, and the pressure of the chip mounter is unbalanced.
The identification method comprises the following steps:
firstly, acquiring a top view and a side view of a printed circuit board containing terminals and chip components after chip mounting;
performing gray processing on the acquired image to obtain a gray image, wherein the gray processing adopts any one of a maximum value method, an average value method and a weighted average method; carrying out smoothing treatment on the gray-scale image, wherein the smoothing treatment is also called fuzzy treatment and is a simple image processing method with high use frequency, and the smoothing treatment adopts the existing and common Gaussian filtering;
performing edge detection on the smoothed gray level image by adopting a Canny edge detection method to obtain the edge of the image; inputting a default coordinate of a terminal in a known qualified image as a reference value, and acquiring the outline and a coordinate point sequence of a chip element in an image to be detected based on the reference value and an image edge, wherein the default coordinate of the terminal refers to a coordinate of the terminal which is not changed in the image all the time under the condition that a camera and a printed circuit board terminal are relatively static, and the coordinate of the chip element of the chip is influenced by the quality of the chip;
the Canny algorithm usually processes images as gray-scale images, so if a camera acquires color images, graying is performed firstly;
four corner coordinates of two terminals in different view images in a top view based on known qualified images, namely, A1, A2, A3 and A4; b1, B2, B3, B4; confirming coordinates C1, C2, C3 and C4 of four corners of the chip component in the image, since 8 coordinate points of the terminal are constant, even if part of the coordinate points are shielded by the chip component, the positioning and calculation of the coordinates of the chip component are not influenced;
four corner coordinates of two terminals in different view images based on the side view of the known qualified image, namely D1, D2, D3 and D4; e1, E2, E3, E4; confirming coordinates F1, F2, F3 and F4 of four corners of the chip component in the image, since 8 coordinate points of the terminal are constant, even if part of the coordinate points are shielded by the chip component, the positioning and calculation of the coordinates of the chip component are not influenced;
and comparing and calculating the difference value between the obtained coordinate point sequence of the sheet element and the qualified coordinate point of the sheet element passing through the setting, and outputting the sheet element setting defect when the longitudinal distance between the upper left corner C1 and the lower left corner C3 of the sheet element in the image is detected, and the longitudinal distance between the upper right corner C2 and the lower right corner C4 of the sheet element in the image is detected to be reduced and exceeds the setting threshold value. At this time, the transverse distances of F1 and F2 from F3 and F4 become larger and the longitudinal distances become smaller for verifying the defect, as shown in fig. 6.
Example four:
as shown in fig. 7. Stacking defects: the chip component is normally contacted with the terminal, but a plurality of chip components are also superposed on the chip component, so that the chip component is wasted, and the volume and the assembly of the circuit board are influenced. The cause of this defect may be a defect in the feeding of the patch feeder or the circuit board, resulting in repeated feeding or repeated patching.
The identification method comprises the following steps:
firstly, acquiring a top view and a side view of a printed circuit board containing terminals and chip components after chip mounting;
performing gray processing on the acquired image to obtain a gray image, wherein the gray processing adopts any one of a maximum value method, an average value method and a weighted average method;
performing edge detection on the smoothed gray level image by adopting a Canny edge detection method to obtain the edge of the image; inputting a default coordinate of a terminal in a known qualified image as a reference value, and acquiring the outline and a coordinate point sequence of a chip element in an image to be detected based on the reference value and an image edge, wherein the default coordinate of the terminal refers to a coordinate of the terminal which is not changed in the image all the time under the condition that a camera and a printed circuit board terminal are relatively static, and the coordinate of the chip element of the chip is influenced by the quality of the chip;
four corner coordinates of two terminals in different view images in a top view based on known qualified images, namely, A1, A2, A3 and A4; b1, B2, B3, B4; confirming coordinates C1, C2, C3 and C4 of four corners of the chip component in the image, since 8 coordinate points of the terminal are constant, even if part of the coordinate points are shielded by the chip component, the positioning and calculation of the coordinates of the chip component are not influenced;
four corner coordinates of two terminals in different view images based on the side view of the known qualified image, namely D1, D2, D3 and D4; e1, E2, E3, E4; confirming coordinates F1, F2, F3 and F4 of four corners of the chip component in the image, since 8 coordinate points of the terminal are constant, even if part of the coordinate points are shielded by the chip component, the positioning and calculation of the coordinates of the chip component are not influenced;
and comparing the obtained coordinate point sequence of the sheet element with the difference value of the coordinate points of qualified sheet elements passing through the setting, and outputting as a stacking defect when the coordinates of C1, C2, C3 and C4 of the sheet element in the image are detected to be within a threshold value, and the transverse spacing between F1 and F2 of the sheet element in the image and the spacing between F3 and F4 of the sheet element in the image are detected to be larger and exceed the set threshold value. As shown in fig. 7.
Example five:
as shown in fig. 8. Patch orientation error defect: the metal surface of the chip component faces upwards, and the non-metal surface is attached to the two terminals, so that the chip component and the terminals are not electrified, and the operation of the circuit board is influenced. The reason for this defect may be that the sheet member is oriented incorrectly when the mounter is loaded, or the front-back side recognition device is damaged.
The identification method comprises the following steps:
marking the front and back surfaces of the chip element in the image, training a front and back surface detection model of the chip by using the acquired image and marking data, detecting the current image by using the front and back surface detection model of the chip, and outputting the defect of wrong orientation of the chip if the element is the back surface. (as shown in FIG. 8)
The specific steps of building the convolutional neural network are as follows: training data; defining a node to prepare to receive data; defining the nerve layer: a hidden layer and a predicted layer; defining a loss expression; optimizer is chosen to minimize loss.
In the invention, whether the patch has defects is judged by a convolutional neural network algorithm, Canny edge detection and coordinate positioning of the terminal and the chip element, different algorithms are adopted to determine the difference of the defects, the reasons for the defects are also output while the defects are reflected in time, so that working personnel can adjust processing equipment including a chip mounter in time, the yield is improved, and defective products are removed in time.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and the technical solutions and the inventive concepts thereof according to the present invention should be equivalent or changed within the scope of the present invention.
Claims (4)
1. An intelligent printed circuit board patch defect identification method based on image processing is characterized in that: the method comprises the following steps:
s1, acquiring an image containing the terminal and the chip element printed circuit board after the chip is attached;
s2, carrying out gray processing on the acquired image to obtain a gray image;
s3, smoothing the gray level image;
s4, performing edge detection on the smoothed gray-scale image by adopting a Canny edge detection method to obtain the edge of the image;
s5, inputting the default coordinates of the terminals in the known qualified image as reference values, and acquiring the outline and the coordinate point sequence of the sheet element in the image to be detected based on the reference values and the image edges;
four corner coordinates of two terminals in different view images in a top view based on known qualified images, namely, A1, A2, A3 and A4; b1, B2, B3, B4; confirming coordinates C1, C2, C3, C4 of four corners of the sheet type element in the image;
four corner coordinates of two terminals in different view images based on the side view of the known qualified image, namely D1, D2, D3 and D4; e1, E2, E3, E4; confirming coordinates F1, F2, F3, F4 of four corners of the sheet-type element in the image;
s6, comparing the obtained coordinate point sequence of the chip component with the set difference value of the qualified coordinate point of the chip component, wherein when the difference value exceeds a defect threshold value, a defect exists, otherwise, the chip is qualified;
outputting as a defect of insufficient overlap when only the coordinates of the four corners of the sheet-type element in the image, C1, C2, C3, C4, are detected to be wholly above, below, to the left, or to the right, exceeding a set threshold;
detecting the transverse distance between the upper left corner C1 and the upper right corner C2 of the chip component in the image, and detecting that the transverse distance between the lower left corner C3 and the lower right corner C4 of the chip component in the image becomes small, and outputting the chip component as a component side anti-defect when the transverse distance exceeds a set threshold value;
detecting the longitudinal distance between the upper left corner C1 and the lower left corner C3 of the chip component in the image, and detecting that the longitudinal distance between the upper right corner C2 and the lower right corner C4 of the chip component in the image becomes smaller, and outputting the chip-setting defect as the component when the longitudinal distance exceeds a set threshold value;
when the coordinates of C1, C2, C3 and C4 of the sheet-type elements in the image are detected to be within the threshold value, and the transverse spacing between F1 and F2 of the sheet-type elements in the image and the spacing between F3 and F4 of the sheet-type elements in the image become larger and exceed the set threshold value, the stacking fault is output.
2. The intelligent identification method for the patch defects of the printed circuit board based on the image processing as claimed in claim 1, wherein: the image in step S1 is a top view and a side view of a large number of printed circuit boards containing the post-chip printed circuit boards collected by a camera.
3. The intelligent identification method for the patch defects of the printed circuit board based on the image processing as claimed in claim 1, wherein: the default coordinates of the terminals in step S5 are coordinates of the terminals that are not changed in the image when the camera and the pcb terminals are relatively stationary.
4. The intelligent identification method for the patch defects of the printed circuit board based on the image processing as claimed in claim 1, wherein: the identification method is used for identifying the front and the back of the paster, and specifically comprises the following steps: the method comprises the steps of collecting a large number of images containing the chip type element through a camera, labeling the front and back sides of the chip type element in the images, training a front and back side detection model of a patch by using the obtained images and labeling data, detecting the current image by using the front and back side detection model of the patch, and outputting the current image as the defect of wrong facing direction of the patch if the element is the back side.
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