CN113704033A - Hardware testing device and method and electronic device - Google Patents

Hardware testing device and method and electronic device Download PDF

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Publication number
CN113704033A
CN113704033A CN202110974709.1A CN202110974709A CN113704033A CN 113704033 A CN113704033 A CN 113704033A CN 202110974709 A CN202110974709 A CN 202110974709A CN 113704033 A CN113704033 A CN 113704033A
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Prior art keywords
hardware
tested
module
successfully
test information
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丁兆磊
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Shanghai Lvlian Intelligent Technology Co ltd
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Shanghai Lvlian Intelligent Technology Co ltd
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Priority to CN202110974709.1A priority Critical patent/CN113704033A/en
Publication of CN113704033A publication Critical patent/CN113704033A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2247Verification or detection of system hardware configuration
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2273Test methods
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/32Monitoring with visual or acoustical indication of the functioning of the machine
    • G06F11/324Display of status information

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

The invention provides a device and a method for testing hardware and electronic equipment, and relates to the field of testing technology. The application has the functions of automatic continuous testing and reduction of investment of manpower and financial resources.

Description

Hardware testing device and method and electronic device
Technical Field
The present invention relates to the field of test technologies, and in particular, to a device and a method for testing hardware, and an electronic device.
Background
Before the hardware equipment leaves a factory, a series of test works are performed on the hardware equipment, and the test works mainly comprise machine verification test of the hardware equipment, a software test tool for the hardware equipment and the like. The main purpose of the test is to ensure that the hardware equipment can meet the requirements of users before leaving the factory, and to discover the defects of the hardware equipment as much as possible, thereby solving the problems in time and providing good user experience for the users.
At present, in the process of research and development or in the process of mass production of hardware, part of hardware materials (materials of the same model of different manufacturers may be replaced) may need to be replaced due to modification of functions or insufficient supply of materials, and a new performance test is needed to ensure stability. In the past, aiming at the performance test of hardware, personnel are required to manually test, observe and judge, the manpower and the financial resources are consumed, the continuity of the test time cannot be guaranteed, and the final judgment is possibly influenced by subjective factors.
Therefore, an apparatus, a method and an electronic apparatus for hardware testing are provided.
Disclosure of Invention
The present specification provides a method and an apparatus for hardware testing, and an electronic device, which have the functions of automatic continuous testing and reducing investment of manpower and financial resources.
The application provides a device of hardware test, test equipment includes first module, second module, first module includes control, scanning piece, the second module includes the power supply piece, the control with the power supply piece electricity is connected, the power supply piece electricity is connected with the hardware of awaiting measuring, the hardware of awaiting measuring includes the display area, the scanning piece with the display area communication is connected.
The hardware testing method provided by the application adopts the following technical scheme that the method comprises the following steps:
starting the test equipment, and electrifying the first module;
the first module controls the second module to supply power to the hardware to be tested;
judging whether the first module successfully acquires the test information displayed by the hardware to be tested;
and when the first module successfully acquires the test information, judging that the hardware to be tested is successfully started.
Optionally, the determining whether the first module successfully obtains the test information displayed by the hardware to be tested includes:
when the first module does not successfully acquire the test information;
judging whether the hardware to be tested shows the test information;
when the hardware to be tested shows the test information, the first module sends out an alarm prompt;
and when the hardware to be tested does not show the test information, judging that the hardware to be tested is eliminated hardware.
Optionally, when the first module successfully obtains the test information, determining that the hardware to be tested is successfully started includes:
when the hardware to be tested shows test information, the first module successfully obtains and records the information to be tested in a first set time, the information to be tested comprises a hardware ID and starting time, and the hardware to be tested is judged to be successfully started.
Optionally, when the hardware to be tested shows the test information, the first module sends an alarm prompt, including:
when the hardware to be tested shows the test information, the first module fails to successfully acquire the information to be tested within a first set time;
the first module controls the second module to power off the hardware to be tested, and the first module sends out an alarm prompt.
Optionally, the method includes:
and after the first module controls the second module to power off the hardware to be tested for a second set time, the first module controls the second module to supply power to the hardware to be tested.
Optionally, the method includes:
the test information comprises an identification code;
starting the test equipment, and electrifying the first module;
the control part controls the power supply part to supply power to the hardware to be tested;
judging whether the scanning piece successfully acquires the identification code displayed in the display area;
and when the scanning piece successfully acquires the identification code, judging that the hardware to be tested is successfully started.
The device for testing hardware provided by the application adopts the following technical scheme that the device comprises:
the starting module is used for starting the test equipment, and the first module is powered on;
the power supply module is used for controlling the second module to supply power to the hardware to be tested by the first module;
the judging module is used for judging whether the first module successfully obtains the test information displayed by the hardware to be tested;
and the result module is used for judging that the hardware to be tested is successfully started when the first module successfully obtains the test information.
Optionally, the determining module further includes:
an unacquired unit, configured to acquire the test information unsuccessfully when the first module is not used for acquiring the test information;
the first judgment unit is used for judging whether the hardware to be tested shows the test information;
the first result unit is used for sending out an alarm prompt when the hardware to be tested shows the test information;
and the second result unit is used for judging that the hardware to be tested is eliminated hardware when the hardware to be tested does not show the test information.
Optionally, the result module includes:
and the third result unit is used for successfully acquiring and recording the information to be tested in a first set time when the hardware to be tested shows the test information, wherein the information to be tested comprises a hardware ID and a starting time, and the hardware to be tested is judged to be successfully started.
Optionally, the first result unit includes:
when the hardware to be tested shows the test information, the first module fails to successfully acquire the information to be tested within a first set time;
the first module controls the second module to power off the hardware to be tested, and the first module sends out an alarm prompt.
Optionally, the method includes:
and the control module is used for controlling the second module to power off the hardware to be tested for a second set time by the first module, and then controlling the second module to supply power to the hardware to be tested by the first module to carry out the next test.
Optionally, the method includes:
the test information comprises an identification code;
starting the test equipment, and electrifying the first module;
the control part controls the power supply part to supply power to the hardware to be tested;
judging whether the scanning piece successfully acquires the identification code displayed in the display area;
and when the scanning piece successfully acquires the identification code, judging that the hardware to be tested is successfully started.
The present specification also provides an electronic device, wherein the electronic device includes:
a processor; and the number of the first and second groups,
a memory storing computer-executable instructions that, when executed, cause the processor to perform any of the methods described above.
The present specification also provides a computer readable storage medium, wherein the computer readable storage medium stores one or more programs which, when executed by a processor, implement any of the methods described above.
In the invention, the test equipment is started, the equipment with the camera is powered on, the hardware to be tested is connected to the power output equipment, and the installation position of the display screen of the hardware to be tested is required to be over against one side of the camera of the equipment with the camera. The equipment with the camera receives an access signal of the hardware to be tested, and the equipment with the camera controls the power output equipment to supply power to the hardware to be tested. And when the equipment with the camera, which is just opposite to the hardware to be tested, identifies, captures and scans the test information, judging that the hardware to be tested is started successfully. The invention can continuously and uninterruptedly test, improve the test efficiency and ensure the test integrity.
Drawings
Fig. 1 is a schematic diagram of a framework of a hardware device provided in an embodiment of the present specification;
FIG. 2 is a schematic diagram illustrating a method for testing hardware according to an embodiment of the present disclosure;
FIG. 3 is a schematic structural diagram of an apparatus for hardware testing provided in an embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of an electronic device provided in an embodiment of the present disclosure;
fig. 5 is a schematic diagram of a computer-readable medium provided in an embodiment of the present specification.
Detailed Description
The following description is presented to disclose the invention so as to enable any person skilled in the art to practice the invention. The preferred embodiments in the following description are given by way of example only, and other obvious variations will occur to those skilled in the art. The basic principles of the invention, as defined in the following description, may be applied to other embodiments, variations, modifications, equivalents, and other technical solutions without departing from the spirit and scope of the invention.
The present application is described in further detail below with reference to figures 1-5.
Referring to fig. 1, an embodiment of the present specification provides a device for testing hardware, where the testing device includes a first module and a second module, the first module includes a control part and a scanning part, the second module includes a power supply part, the control part is electrically connected to the power supply part, the power supply part is electrically connected to hardware to be tested, the hardware to be tested includes a display area, and the scanning part is in communication connection with the display area.
In an embodiment of the present specification, the first module includes a device with a camera, the second module includes a power output device, the scanning element includes a camera, the control element includes a single chip microcomputer embedded in the device with a camera, the power supply element includes a control power supply, the display area includes a display screen, the display screen is externally connected to the device with a camera, and the device with a camera is electrically connected to the control power supply. And connecting the hardware to be tested into a control power supply, wherein the display screen of the hardware to be tested is opposite to one side of a camera of the equipment with the camera, so that the camera can identify the content displayed by the display screen.
The embodiment of the specification provides a hardware testing method, which comprises the following steps:
starting the test equipment, and electrifying the first module;
the first module controls the second module to supply power to the hardware to be tested;
judging whether the first module successfully acquires the test information displayed by the hardware to be tested;
and when the first module successfully acquires the test information, judging that the hardware to be tested is successfully started.
In the embodiment of the description, the test equipment is started, the equipment with the camera is powered on, and the hardware display screen to be tested is opposite to one side of the camera of the equipment with the camera. The equipment with the camera receives an access signal of the hardware to be tested, and the equipment with the camera controls the power output equipment to supply power to the hardware to be tested. And when the equipment with the camera, which is just opposite to the hardware to be tested, identifies, captures and scans the test information, judging that the hardware to be tested is started successfully.
In the present specification embodiments, exemplary embodiments of the present invention will now be described more fully with reference to the accompanying drawings. The exemplary embodiments, however, may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these exemplary embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the invention to those skilled in the art. The same reference numerals denote the same or similar elements, components, or parts in the drawings, and thus their repetitive description will be omitted.
Features, structures, characteristics or other details described in a particular embodiment do not preclude the fact that the features, structures, characteristics or other details may be combined in a suitable manner in one or more other embodiments in accordance with the technical idea of the invention.
In describing particular embodiments, the present invention has been described with reference to features, structures, characteristics or other details that are within the purview of one skilled in the art to provide a thorough understanding of the embodiments. One skilled in the relevant art will recognize, however, that the invention may be practiced without one or more of the specific features, structures, characteristics, or other details.
The flow charts shown in the drawings are merely illustrative and do not necessarily include all of the contents and operations/steps, nor do they necessarily have to be performed in the order described. For example, some operations/steps may be decomposed, and some operations/steps may be combined or partially combined, so that the actual execution sequence may be changed according to the actual situation.
The block diagrams shown in the figures are functional entities only and do not necessarily correspond to physically separate entities. I.e. these functional entities may be implemented in the form of software, or in one or more hardware modules or integrated circuits, or in different networks and/or processor means and/or microcontroller means.
The term "and/or" and/or "includes all combinations of any one or more of the associated listed items.
Fig. 2 is a schematic diagram of a method for testing hardware according to an embodiment of the present disclosure, where the method may include:
s101: and starting the test equipment, and electrifying the first module.
In the embodiment of the specification, the test equipment is externally connected with a power supply, the test equipment is started, and the equipment with the camera is powered on. And connecting the hardware to be tested into the power output equipment, wherein the hardware to be tested is displayed on the side of the display screen, which is opposite to the camera of the equipment with the camera.
S102: the first module controls the second module to supply power to the hardware to be tested.
In the embodiment of the present specification, a device with a camera receives an access signal of hardware to be tested, the device with the camera controls a power output device to supply power to the hardware to be tested, and meanwhile, the device with the camera can control a current value and a voltage value of the power output device to supply power to the hardware to be tested, so as to meet test requirements at different current values and voltage values. The equipment with the camera is always in a charged state after being started, so that continuous and uninterrupted test is realized, the test efficiency is improved, and the test integrity is ensured.
S103: and judging whether the first module successfully acquires the test information displayed by the hardware to be tested.
S104: and when the first module successfully acquires the test information, judging that the hardware to be tested is successfully started.
In an embodiment of this specification, the determining whether the first module successfully obtains the test information shown by the hardware to be tested includes:
when the first module does not successfully acquire the test information;
judging whether the hardware to be tested shows the test information;
when the hardware to be tested shows the test information, the first module sends out an alarm prompt;
and when the hardware to be tested does not show the test information, judging that the hardware to be tested is eliminated hardware.
In the embodiment of the present specification, it is determined whether the device with the camera, which is directly facing the hardware to be tested, identifies, captures, and scans the test information displayed by the hardware to be tested, and when the device with the camera, which is directly facing the hardware to be tested, successfully obtains the test information, it is determined that the hardware to be tested is successfully started. When the equipment with the camera, which is right opposite to the hardware to be tested, does not successfully acquire the test information, checking whether the hardware to be tested shows the test information or not, and when the hardware to be tested shows the information to be tested, sending an alarm prompt by the equipment with the camera; and when the hardware to be tested does not show the information to be tested, judging that the hardware to be tested has a fault.
In this embodiment of the present specification, the determining that the hardware to be tested is successfully started when the first module successfully obtains the test information includes:
when the hardware to be tested shows test information, the first module successfully obtains and records the information to be tested in a first set time, the information to be tested comprises a hardware ID and starting time, and the hardware to be tested is judged to be successfully started.
In the embodiment of the present specification, when the hardware to be tested shows test information, the test information includes a hardware ID, a boot time, and a current test frequency, the device with the camera successfully identifies, captures, and scans the hardware ID, the boot time, and the current test frequency within a first predetermined time, and records the identification, the capture, the scan of the hardware ID, the boot time, and the current test frequency, so as to determine that the hardware to be tested is successfully started.
The first set time can be set according to the starting time of the test hardware, and the value of the first set time is not less than the starting time of the test hardware. And when the value of the first set time is less than the starting time of the testing hardware, the testing equipment cannot complete the testing work of the hardware to be tested. Because the hardware to be tested is not started, and the first set time of the testing equipment is up, the equipment with the camera cannot acquire the hardware ID, the starting time and the current testing times of the hardware to be tested regardless of whether the hardware to be tested has problems or not.
In an embodiment of this specification, when the hardware to be tested shows the test information, the first module sends an alarm prompt, including:
when the hardware to be tested shows the test information, the first module fails to successfully acquire the information to be tested within a first set time;
the first module controls the second module to power off the hardware to be tested, and the first module sends out an alarm prompt.
In the embodiment of the description, when the equipment with the camera fails to identify, capture and scan the hardware ID, the startup time and the current test times within a first set time, the equipment with the camera receives fault information, the equipment with the camera controls the power output equipment to power off the hardware to be tested, a warning lamp and a loudspeaker are arranged in the equipment with the camera or externally connected with the warning lamp and the loudspeaker, and the equipment with the camera sends out an alarm prompt through the warning lamp and the loudspeaker so that a worker can timely detect the fault.
The reasons for the failure of the equipment with the camera to identify, capture and scan the hardware ID, the startup time and the current test times within the first set time may be: 1. the hardware to be tested has faults; 2. the equipment with the camera has faults; 3. faults exist in the hardware to be tested and the equipment with the camera; 4. the duration of the first set time is too short and the setting is not reasonable. The specific reason needs the user to discriminate according to the actual situation.
In the embodiment of this specification, still include:
and after the first module controls the second module to power off the hardware to be tested for a second set time, the first module controls the second module to supply power to the hardware to be tested.
In the embodiment of the description, after the device with the camera controls the power output device to power off the hardware to be tested for the second set time, the device with the camera controls the power output device to supply power to the hardware to be tested, and a next round of test is performed, so that continuous and uninterrupted test is realized, the test efficiency is improved, and the test integrity is ensured.
The second set time can be the time for automatically transmitting the hardware to be tested, the first hardware to be tested is transmitted to the next procedure within the second set time, and the second hardware to be tested is transmitted to the side opposite to the camera of the equipment with the camera to start the next test.
The second set time can also be the restart time of the hardware to be tested, and in the second set time, the hardware to be tested is shut down and restarted to start the next test.
In the embodiment of the specification, the method comprises the following steps:
the test information comprises an identification code;
starting the test equipment, and electrifying the first module;
the control part controls the power supply part to supply power to the hardware to be tested;
judging whether the scanning piece successfully acquires the identification code displayed in the display area;
and when the scanning piece successfully acquires the identification code, judging that the hardware to be tested is successfully started.
In the embodiment of the specification, the test equipment is externally connected with a power supply, the test equipment is started, and the equipment with the camera is powered on. A tester accesses the hardware to be tested into a control power supply, and the installation position of the hardware to be tested needs to be over against one side of a camera of the equipment with the camera. The equipment with the camera receives an access signal of the hardware to be tested, the equipment with the camera controls the power output equipment to supply power to the hardware to be tested, and meanwhile, the equipment with the camera can control the current value and the voltage value of the power output equipment to supply power to the hardware to be tested so as to meet the test requirements of different current values and voltage values. When the hardware to be tested shows the two-dimensional code, the two-dimensional code is scanned to the equipment with the camera, which is over against the hardware to be tested, and the hardware to be tested is judged to be started successfully.
Fig. 3 is a schematic structural diagram of an apparatus for testing hardware according to an embodiment of the present disclosure, where the apparatus may include:
a starting module 201, configured to start the test equipment, where the first module is powered;
a power supply module 202, configured to control the second module to supply power to the hardware to be tested by the first module;
the judging module 203 is used for judging whether the first module successfully obtains the test information displayed by the hardware to be tested;
the result module 204 is configured to determine that the hardware to be tested is successfully started when the first module successfully obtains the test information.
In an embodiment of this specification, the determining module further includes:
an unacquired unit, configured to acquire the test information unsuccessfully when the first module is not used for acquiring the test information;
the first judgment unit is used for judging whether the hardware to be tested shows the test information;
the first result unit is used for sending out an alarm prompt when the hardware to be tested shows the test information;
and the second result unit is used for judging that the hardware to be tested is eliminated hardware when the hardware to be tested does not show the test information.
In an embodiment of the present specification, the result module includes:
and the third result unit is used for successfully acquiring and recording the information to be tested in a first set time when the hardware to be tested shows the test information, wherein the information to be tested comprises a hardware ID and a starting time, and the hardware to be tested is judged to be successfully started.
In an embodiment of the present specification, the first result unit includes:
when the hardware to be tested shows the test information, the first module fails to successfully acquire the information to be tested within a first set time;
the first module controls the second module to power off the hardware to be tested, and the first module sends out an alarm prompt.
In the embodiment of the specification, the method comprises the following steps:
and the control module is used for controlling the second module to power off the hardware to be tested for a second set time by the first module, and then controlling the second module to supply power to the hardware to be tested by the first module to carry out the next test.
In the embodiment of the specification, the method comprises the following steps:
the test information comprises an identification code;
starting the test equipment, and electrifying the first module;
the control part controls the power supply part to supply power to the hardware to be tested;
judging whether the scanning piece successfully acquires the identification code displayed in the display area;
and when the scanning piece successfully acquires the identification code, judging that the hardware to be tested is successfully started.
The functions of the apparatus in the embodiment of the present invention have been described in the above method embodiments, so that reference may be made to the related descriptions in the foregoing embodiments for details that are not described in the present embodiment, and further details are not described herein.
Based on the same inventive concept, the embodiment of the specification further provides the electronic equipment.
In the following, embodiments of the electronic device of the present invention are described, which may be regarded as specific physical implementations for the above-described embodiments of the method and apparatus of the present invention. Details described in the embodiments of the electronic device of the invention should be considered supplementary to the embodiments of the method or apparatus described above; for details which are not disclosed in embodiments of the electronic device of the invention, reference may be made to the above-described embodiments of the method or the apparatus.
Fig. 4 is a schematic structural diagram of an electronic device provided in an embodiment of the present specification. An electronic device 300 according to this embodiment of the invention is described below with reference to fig. 4. The electronic device 300 shown in fig. 4 is only an example, and should not bring any limitation to the functions and the scope of use of the embodiments of the present invention.
As shown in fig. 4, electronic device 300 is embodied in the form of a general purpose computing device. The components of electronic device 300 may include, but are not limited to: at least one processing unit 310, at least one memory unit 320, a bus 330 connecting the various system components (including the memory unit 320 and the processing unit 310), a display unit 340, and the like.
Wherein the storage unit stores program code executable by the processing unit 310 to cause the processing unit 310 to perform the steps according to various exemplary embodiments of the present invention described in the above-mentioned processing method section of the present specification. For example, the processing unit 310 may perform the steps as shown in fig. 2.
The storage unit 320 may include readable media in the form of volatile storage units, such as a random access memory unit (RAM)3201 and/or a cache storage unit 3202, and may further include a read only memory unit (ROM) 3203.
The storage unit 320 may also include a program/utility 3204 having a set (at least one) of program modules 3205, such program modules 3205 including, but not limited to: an operating system, one or more application programs, other program modules, and program data, each of which, or some combination thereof, may comprise an implementation of a network environment.
Bus 330 may be one or more of several types of bus structures, including a memory unit bus or memory unit controller, a peripheral bus, an accelerated graphics port, a processing unit, or a local bus using any of a variety of bus architectures.
The electronic device 300 may also communicate with one or more external devices 400 (e.g., keyboard, pointing device, bluetooth device, etc.), with one or more devices that enable a user to interact with the electronic device 300, and/or with any devices (e.g., router, modem, etc.) that enable the electronic device 300 to communicate with one or more other computing devices. Such communication may occur via an input/output (I/O) interface 350. Also, the electronic device 300 may communicate with one or more networks (e.g., a Local Area Network (LAN), a Wide Area Network (WAN), and/or a public network, such as the internet) via the network adapter 360. Network adapter 360 may communicate with other modules of electronic device 300 via bus 330. It should be appreciated that although not shown in FIG. 4, other hardware and/or software modules may be used in conjunction with electronic device 300, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems, among others.
Through the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments of the present invention described herein may be implemented by software, or by software in combination with necessary hardware. Therefore, the technical solution according to the embodiment of the present invention can be embodied in the form of a software product, which can be stored in a computer-readable storage medium (which can be a CD-ROM, a usb disk, a removable hard disk, etc.) or on a network, and includes several instructions to make a computing device (which can be a personal computer, a server, or a network device, etc.) execute the above-mentioned method according to the present invention. The computer program, when executed by a data processing apparatus, enables the computer readable medium to implement the above-described method of the invention, namely: such as the method shown in fig. 2.
Fig. 5 is a schematic diagram of a computer-readable medium provided in an embodiment of the present specification.
A computer program implementing the method shown in fig. 1 may be stored on one or more computer readable media. The computer readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable disk, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
The computer readable storage medium may include a propagated data signal with readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A readable storage medium may also be any readable medium that is not a readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a readable storage medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Program code for carrying out operations for aspects of the present invention may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device and partly on a remote computing device, or entirely on the remote computing device or server. In the case of a remote computing device, the remote computing device may be connected to the user computing device through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computing device (e.g., through the internet using an internet service provider).
In summary, the invention may be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. Those skilled in the art will appreciate that some or all of the functionality of some or all of the components in embodiments in accordance with the invention may be implemented in practice using a general purpose data processing device such as a microprocessor or a Digital Signal Processor (DSP). The present invention may also be embodied as apparatus or device programs (e.g., computer programs and computer program products) for performing a portion or all of the methods described herein. Such programs implementing the present invention may be stored on computer-readable media or may be in the form of one or more signals. Such a signal may be downloaded from an internet website or provided on a carrier signal or in any other form.
While the foregoing embodiments have described the objects, aspects and advantages of the present invention in further detail, it should be understood that the present invention is not inherently related to any particular computer, virtual machine or electronic device, and various general-purpose machines may be used to implement the present invention. The invention is not to be considered as limited to the specific embodiments thereof, but is to be understood as being modified in all respects, all changes and equivalents that come within the spirit and scope of the invention.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments.
The above description is only an example of the present application and is not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

Claims (9)

1. The hardware testing equipment is characterized by comprising a first module and a second module, wherein the first module comprises a control part and a scanning part, the second module comprises a power supply part, the control part is electrically connected with the power supply part, the power supply part is electrically connected with hardware to be tested, the hardware to be tested comprises a display area, and the scanning part is in communication connection with the display area.
2. A method of hardware testing, comprising the hardware testing apparatus of claim 1, comprising:
starting the test equipment, and electrifying the first module;
the first module controls the second module to supply power to the hardware to be tested;
judging whether the first module successfully acquires the test information displayed by the hardware to be tested;
and when the first module successfully acquires the test information, judging that the hardware to be tested is successfully started.
3. The method for hardware testing as claimed in claim 2, wherein said determining whether the first module successfully obtains the test information exhibited by the hardware to be tested comprises:
when the first module does not successfully acquire the test information;
judging whether the hardware to be tested shows the test information;
when the hardware to be tested shows the test information, the first module sends out an alarm prompt;
and when the hardware to be tested does not show the test information, judging that the hardware to be tested is eliminated hardware.
4. The method for hardware testing as claimed in claim 2, wherein said determining that said hardware to be tested is successfully started when said first module successfully obtains said test information comprises:
when the hardware to be tested shows test information, the first module successfully obtains and records the information to be tested in a first set time, the information to be tested comprises a hardware ID and starting time, and the hardware to be tested is judged to be successfully started.
5. The method for hardware testing as claimed in claim 4, wherein said when said hardware to be tested shows said test information, said first module issues an alarm prompt, comprising:
when the hardware to be tested shows the test information, the first module fails to successfully acquire the information to be tested within a first set time;
the first module controls the second module to power off the hardware to be tested, and the first module sends out an alarm prompt.
6. The method of hardware testing of claim 2, comprising:
and after the first module controls the second module to power off the hardware to be tested for a second set time, the first module controls the second module to supply power to the hardware to be tested.
7. The method of hardware testing of claim 2, comprising:
the test information comprises an identification code;
starting the test equipment, and electrifying the first module;
the control part controls the power supply part to supply power to the hardware to be tested;
judging whether the scanning piece successfully acquires the identification code displayed in the display area;
and when the scanning piece successfully acquires the identification code, judging that the hardware to be tested is successfully started.
8. An electronic device, wherein the electronic device comprises:
a processor;
and a memory storing computer-executable instructions that, when executed, cause the processor to perform the method of any of claims 2-7.
9. A computer readable storage medium, wherein the computer readable storage medium stores one or more programs which, when executed by a processor, implement the method of any of claims 2-7.
CN202110974709.1A 2021-08-24 2021-08-24 Hardware testing device and method and electronic device Pending CN113704033A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110974709.1A CN113704033A (en) 2021-08-24 2021-08-24 Hardware testing device and method and electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110974709.1A CN113704033A (en) 2021-08-24 2021-08-24 Hardware testing device and method and electronic device

Publications (1)

Publication Number Publication Date
CN113704033A true CN113704033A (en) 2021-11-26

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110974709.1A Pending CN113704033A (en) 2021-08-24 2021-08-24 Hardware testing device and method and electronic device

Country Status (1)

Country Link
CN (1) CN113704033A (en)

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