CN113703234A - Display panel and display device - Google Patents
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- CN113703234A CN113703234A CN202110879335.5A CN202110879335A CN113703234A CN 113703234 A CN113703234 A CN 113703234A CN 202110879335 A CN202110879335 A CN 202110879335A CN 113703234 A CN113703234 A CN 113703234A
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- 230000003071 parasitic effect Effects 0.000 claims abstract description 42
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- 238000000034 method Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 239000012788 optical film Substances 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008094 contradictory effect Effects 0.000 description 1
- 210000002858 crystal cell Anatomy 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
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- 230000009467 reduction Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- 239000012780 transparent material Substances 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136218—Shield electrodes
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136222—Colour filters incorporated in the active matrix substrate
Abstract
The invention discloses a display panel and a display device, wherein the display panel comprises a color film substrate and an array substrate, the color film substrate comprises a first substrate and a first common electrode arranged on the first substrate, the array substrate comprises a second substrate and a color resistance layer arranged on the second substrate, a plurality of data lines and a plurality of scanning lines, the plurality of data lines and the plurality of scanning lines are arranged in a staggered mode, each data line and each scanning line are positioned between the second substrate and the color resistance layer, one side, back to the second substrate, of the color resistance layer is provided with an electrode layer, the electrode layer comprises a plurality of transparent electrodes arranged at intervals, and the transparent electrodes and the data lines are arranged in a one-to-one correspondence mode and are used for shielding parasitic capacitance between the data lines and the first common electrode; each transparent electrode comprises two sub-electrodes arranged at intervals along the extension direction of the data line, and the orthographic projection of the two sub-electrodes of each transparent electrode on the plane where the data line is located shields the two sides of the data line along the length direction. The display panel provided by the invention has good display effect.
Description
Technical Field
The present invention relates to the field of liquid crystal display technologies, and in particular, to a display panel and a display device.
Background
In order to increase the aperture ratio and transmittance of the display panel, a color filter on Array process, referred to as COA fabrication process, is commonly used in the art to fabricate the color resistors on the Array substrate.
In the related art, in order to shield the parasitic capacitance between the data line on the array substrate and the common electrode on the color filter substrate side, a transparent electrode needs to be disposed on the color resistor at a position corresponding to the data line, and the parasitic capacitance between the data line and the common electrode on the color filter substrate side is shielded by the transparent electrode. The data lines and the transparent electrodes are arranged opposite to each other with the color resistance layer interposed therebetween, and the transparent electrodes need to shield parasitic capacitance between the whole data lines and the common electrode on the side of the color film substrate, so that the transparent electrodes need to extend and penetrate through the display area of the whole display panel, which causes another considerable parasitic capacitance to be formed between the transparent electrodes and the data, and this parasitic capacitance will cause distortion of driving signals sent by chips in the display panel, thereby affecting the display effect of pixel units in the display panel.
Disclosure of Invention
The main objective of the present invention is to provide a display panel, which is to improve and design a single transparent electrode into two sub-electrodes, so that orthogonal projections of the two sub-electrodes on a plane where a data line is located respectively shield two side edges of the data line along a length direction, thereby reducing an overall width of the transparent electrode, reducing a portion of parasitic capacitance in the display panel, and improving a display effect of the display panel.
In order to achieve the above object, the present invention provides a display panel, where the display panel includes a color film substrate and an array substrate, the color film substrate includes a first substrate and a first common electrode disposed on the first substrate, the array substrate includes a second substrate, and a color resistance layer disposed on the second substrate, a plurality of data lines and a plurality of scan lines, the plurality of data lines and the plurality of scan lines are arranged in a crisscross manner, each data line and each scan line are located between the second substrate and the color resistance layer, and one side of the color resistance layer, which faces away from the second substrate, is provided with an electrode layer;
the electrode layer comprises a plurality of transparent electrodes which are arranged at intervals, the transparent electrodes and the data lines are arranged in a one-to-one correspondence mode and used for shielding parasitic capacitance between the data lines and the first common electrodes;
each transparent electrode comprises two sub-electrodes arranged at intervals along the extension direction of the data line, and the orthographic projection of the two sub-electrodes of each transparent electrode on the plane where the data line is located shields two side edges of the data line along the length direction.
In an embodiment of the invention, an orthogonal projection portion of each sub-electrode on a plane where one data line is located protrudes from one side edge of the data line along the length direction.
In an embodiment of the invention, the width of the portion of the orthographic projection of each sub-electrode on the plane of one data line, which protrudes from one long side of the data line, is defined as d1, and d1 is greater than or equal to 1.5 μm.
In an embodiment of the present invention, each of the transparent electrodes further includes at least one electrode segment;
the two sub-electrodes of each transparent electrode are electrically connected with at least one electrode segment.
In an embodiment of the invention, the transparent electrode includes a plurality of electrode segments arranged at intervals, and each electrode segment is located between two adjacent sub-electrodes and connects two of the sub-electrodes.
In an embodiment of the invention, each of the electrode segments is disposed to be offset from any of the scan lines.
In an embodiment of the invention, each of the electrode segments and the two sub-electrodes of each of the transparent electrodes are integrally formed.
In an embodiment of the invention, the display panel further includes a plurality of pixel electrodes;
the extending direction of the scanning lines is perpendicular to the extending direction of the data lines, a pixel area is defined between two adjacent data lines and two adjacent scanning lines, the color resistance layer is arranged in each pixel area, and each pixel electrode is arranged in one pixel area and is positioned on one side, back to the second substrate, of the color resistance layer;
each sub-electrode is at least partially positioned between one pixel electrode and one data line and is used for shielding parasitic capacitance between the pixel electrode and the data line.
In an embodiment of the invention, the spacing between the two sub-electrodes of each transparent electrode is defined as d1, and d1 is less than or equal to 2 μm and less than or equal to 3 μm.
Furthermore, the present invention also provides a display device, including:
the display panel described above; and
the array substrate of the display panel is arranged on the light-emitting side of the backlight module and is positioned between the backlight module and the color film substrate of the display panel.
The display panel comprises a color film substrate and an array substrate, wherein the color film substrate comprises a first substrate and a first common electrode arranged on the first substrate, the array substrate comprises a second substrate, a color resistance layer arranged on the second substrate, a plurality of data lines and a plurality of scanning lines, the plurality of data lines and the plurality of scanning lines are arranged in a criss-cross mode, each data line and each scanning line are located between the second substrate and the color resistance layer, an electrode layer is arranged on one side, back to the second substrate, of the color resistance layer, the electrode layer comprises a plurality of transparent electrodes arranged at intervals, and the transparent electrodes and the data lines are arranged in a one-to-one correspondence mode and used for shielding parasitic capacitance between the data lines and the first common electrode; each transparent electrode comprises two sub-electrodes arranged at intervals along the extension direction of the data line, and the orthographic projection of the two sub-electrodes of each transparent electrode on the plane where the data line is located shields the two sides of the data line along the length direction. Therefore, the transparent electrode is improved and designed into the two sub-electrodes which are arranged in parallel, so that an interval is formed between the two sub-electrodes, the whole width of the transparent electrode can be greatly reduced, the equivalent parasitic capacitance between the transparent electrode and the data line is reduced, the influence of the equivalent parasitic capacitance on the distortion of a driving signal sent by a chip in the display panel is reduced, and the display effect of the display panel is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the invention;
FIG. 2 is a cross-sectional view of the display panel of FIG. 1 taken along line A-A';
FIG. 3 is a schematic view of another structure of a display panel according to an embodiment of the present invention;
FIG. 4 is a schematic structural diagram of a display device according to a second embodiment of the present invention;
the reference numbers illustrate:
the implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that all the directional indicators (such as up, down, left, right, front, and rear … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the movement situation, etc. in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indicator is changed accordingly.
In the present invention, unless otherwise expressly stated or limited, the terms "connected," "secured," and the like are to be construed broadly, and for example, "secured" may be a fixed connection, a removable connection, or an integral part; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In addition, the descriptions related to "first", "second", etc. in the present invention are only for descriptive purposes and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. Throughout this document, "and/or" is meant to include three juxtaposed aspects, exemplified by "A and/or B," including either the A aspect, or the B aspect, or both A and B. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.
The first embodiment is as follows:
the invention provides a display panel, which is shown in fig. 1 and fig. 2, and includes a color film substrate 1 and an array substrate 2, where the color film substrate 1 includes a first substrate 11 and a first common electrode 12 disposed on the first substrate 11, the array substrate 2 includes a second substrate 21, a color resistance layer 22 disposed on the second substrate 21, a plurality of data lines 23 and a plurality of scan lines 24, the plurality of data lines 23 and the plurality of scan lines 24 are arranged in a crisscross manner, the data lines 23 and the scan lines 24 are both in a long strip-shaped extension structure, exemplarily, the cross-sectional shapes of the data lines 23 and the scan lines 24 are rectangles, a long side of the data line 23 is a long side of an edge of the data line 23, and a short side of the data line 23 is a short side of an edge of the data line 23. Each data line 23 and each scanning line 24 are located between the second substrate 21 and the color resistance layer 22, an electrode layer is arranged on one side of the color resistance layer 22, which is opposite to the second substrate 21, and the electrode layer comprises a plurality of transparent electrodes 25 which are arranged at intervals, and the transparent electrodes 25 and the data lines 23 are arranged in a one-to-one correspondence manner and are used for shielding parasitic capacitance between the data lines 23 and the first common electrode 12; each transparent electrode 25 includes two sub-electrodes 251 disposed at intervals along the extending direction of the data line 23, and the orthogonal projection of the two sub-electrodes 251 of each transparent electrode 25 on the plane of the data line 23 shields the two long sides of the data line 23.
In this embodiment, the color filter substrate 1 and the array substrate 2 are oppositely disposed, and liquid crystal is filled between the color filter substrate 1 and the array substrate 2 to form a liquid crystal cell. The first common electrode 12 is a common electrode on the color filter substrate 1 side, the array substrate 2 is provided with a second common electrode 28, the second common electrode 28 is a common electrode on the array substrate 2 side, and when the first common electrode 12 and the second common electrode 28 are electrified, an electric field capable of driving liquid crystal to deflect is formed between the first common electrode 12 and the second common electrode 28, so that the arrangement form of liquid crystal molecules is changed, and the expression of pixel units on the array substrate 2 is controlled. The plurality of scanning lines 24 and the plurality of data lines 23 are arranged in a criss-cross manner on the side of the array substrate 2 to form a grid shape, a pixel unit is defined in each grid hole, a color resistance layer 22 consisting of a red color resistance, a blue color resistance and a green color resistance can be arranged in each pixel unit, and the color resistance layer 22 is positioned above the data lines 23 and the scanning lines 24. The first common electrode 12, the second common electrode 28 and the electrode layer can be made of a transparent material, such as indium tin oxide, which is not limited herein.
To better explain the present embodiment, as shown in fig. 1 and 2, in order to shield the parasitic capacitance between the data line 23 and the first common electrode 12, an electrode layer is generally disposed above the data line 23, the electrode layer is disposed between the data line 23 and the first common electrode 12, and when the electrode layer, the data line 23 and the first common electrode 12 are powered on, the transparent electrode 25 can be used to shield the parasitic capacitance between the data line 23 and the first common electrode 12. Since the data line 23 extends through the display area of the whole display panel, the electrode layer is correspondingly designed to extend through the display area of the whole display panel, which results in that although the color resistance layer 22 is separated between the data line 23 and the electrode layer, the parasitic capacitance between the data line 23 and the electrode layer is still considerable, which will generate a new larger parasitic capacitance in the display panel, and these parasitic capacitances may cause distortion of the driving signal in the display panel, resulting in poor display of the display panel. In view of the above problem, the present embodiment designs the electrode layer as two sub-electrodes 251 disposed at intervals and in parallel, and each transparent electrode 25 is located above one data line 23 and extends in the same direction as the data line 23, so that each transparent electrode 25 can shield the parasitic capacitance between the first common electrode 12 and one data line 23. The transparent electrode 25 is improved and designed into two sub-electrodes 251 which are arranged in parallel, so that an interval is formed between the two sub-electrodes 251, the whole width of the transparent electrode 25 can be greatly reduced, the equivalent parasitic capacitance between the transparent electrode 25 and the data line 23 is reduced, the influence of the equivalent parasitic capacitance on the distortion of a driving signal sent by a chip in the display panel can be reduced, and the display effect of the display panel is improved. Each sub-electrode 251 extends from the display area of the display panel to the non-display area of the display panel, and is connected to the working circuit of the display panel in the non-display area to obtain power supply.
It is worth pointing out that, because the distance between the data line 23 and the electrode layer is much smaller than the distance between the data line 23 and the first common electrode 12, the influence of the parasitic capacitance between the data line 23 and the electrode layer on the display effect of the display panel is greater than the influence of the parasitic capacitance between the data line 23 and the first common electrode 12 on the display effect of the display panel. Therefore, when the transparent electrode 25 is designed to include two sub-electrodes 251 and there is a gap between the two sub-electrodes 251, although the data line 23 and the first common electrode 12 can form a parasitic capacitance through the gap between the two sub-electrodes 251, on the basis that the transparent electrode 25 is designed to include two sub-electrodes 251, the parasitic capacitance formed by the data line 23 and the first common electrode 12 through the gap between the two sub-electrodes 251 is much smaller than the parasitic capacitance formed by the data line 23 and the transparent electrode 25 through the gap between the two sub-electrodes 251, so that the parasitic capacitance in the liquid crystal display panel as a whole will exhibit a greatly reduced potential.
In an embodiment of the invention, as shown in fig. 1 and fig. 2, an orthographic projection of each sub-electrode 251 on a plane where a data line 23 is located protrudes from a long side of the data line 23.
In the present embodiment, the long side of the data line 23 is a side of the data line 23 that is longer in length at the edge, i.e., a side extending in the extending direction of the data line 23. Each sub-electrode 251 shields the long side of the data line 23 on the vertical light path of the liquid crystal display panel, so that the sub-electrodes 251 can shield the parasitic capacitance between the data line 23 and the first common electrode 12 as much as possible, and the display effect of the display panel is ensured.
Optionally, the width of the portion of each sub-electrode 251, which protrudes from a long side of the data line 23 in the orthographic projection of the data line 23 on the plane of the data line 23, is defined as d1, and d1 ≧ 1.5 μm. At this time, the sub-electrode 251 can completely shield the long side of the data line 23, and a portion protruding from the long side of the data line 23 is disposed on a vertical light path of the display panel, so that a shielding effect of the sub-electrode 251 on a parasitic capacitance between the data line 23 and the first common electrode 12 can be ensured.
In one embodiment of the present invention, as shown in fig. 3, each transparent electrode 25 further comprises at least one electrode segment 252; the two sub-electrodes 251 of each transparent electrode 25 are electrically connected to at least one electrode segment 252.
In this embodiment, the two sub-electrodes 251 in each transparent electrode 25 are electrically connected through at least one electrode segment 252, so that the two electrodes can be connected in parallel through the electrode segments 252, thereby reducing the overall resistance of the transparent electrode 25, facilitating saving the electric energy loss of the transparent electrode 25 during power-on, and making the transparent electrode 25 easier to be driven. Wherein, the electrode segment 252 may connect the end of the sub-electrode 251 or the portion between the two ends of the electrode segment 252, and the length of the electrode segment 252 may be greater than the distance between the two electrode segments 252 in each transparent electrode 25.
In an embodiment of the present invention, as shown in fig. 3, the transparent electrode 25 includes a plurality of electrode segments 252 disposed at intervals, and each electrode segment 252 is located between two adjacent sub-electrodes 251 and connects two sub-electrodes 251.
In the embodiment, the length of each electrode segment 252 is equal to the distance between the two sub-electrodes 251 in each transparent electrode 25, and each electrode segment 252 is located between the two sub-electrodes 251 in one transparent electrode 25 and is connected to the two sub-electrodes 251, so that the length of the electrode segment 252 can be reduced as much as possible, and the material cost of the electrode segment 252 can be reduced.
In one embodiment of the present invention, as shown in fig. 3, each electrode segment 252 is disposed to be offset from any scan line 24.
In this embodiment, the orthogonal projection of the electrode segment 252 on the plane of the scan line 24 shields the scan line 24, or the orthogonal projection of the electrode segment 252 on the plane of the scan line 24 does not overlap with the scan line 24, so that interference between the scan line 24 and the electrode segment 252 on the optical path propagation path of the display panel can be reduced, and generation of parasitic capacitance between the electrode segment 252 and the scan line 24, which results in generation of new parasitic capacitance, can be avoided as much as possible. It should be noted that, because the electrode segments 252 are located between two adjacent sub-electrodes 251, the length of the electrode segments 252 is shorter, when the number of the electrode segments 252 is smaller, even if the electrode segments 252 are overlapped on the vertical light path of the display panel, the parasitic capacitance between each electrode segment 252 and each scan line 24 is smaller, and the parasitic capacitance is not enough to exert too great influence on the transmission of the driving signals in the display panel, so the influence on the display effect of the display panel is not great; however, if the number of the electrode segments 252 is larger, the parasitic capacitance between each electrode segment 252 and each scan line 24 is larger, and may directly affect the transmission of the driving signal in the display panel, which may affect the display effect of the display panel.
In an embodiment of the present invention, as shown in fig. 3, each electrode segment 252 of each transparent electrode 25 and the two sub-electrodes 251 are integrally formed.
In the embodiment, each electrode segment 252 of each transparent electrode 25 and the two sub-electrodes 251 are integrally formed, so that on one hand, the processing procedure and the processing cost of the transparent electrode 25 can be saved, on the other hand, the compactness of the structure of the transparent electrode 25 can be improved, the electric conduction performance of the transparent electrode 25 is prevented from being influenced by the connection point or the transition section between the electrode segment 252 and the sub-electrode 251, and the electric consumption of the transparent electrode 25 is reduced.
In an embodiment of the invention, as shown in fig. 1 and fig. 2, the display panel further includes a plurality of pixel electrodes 26; the extending direction of the scan lines 24 is perpendicular to the extending direction of the data lines 23, a pixel region 27 is defined between two adjacent data lines 23 and two adjacent scan lines 24, a color resist layer 22 is arranged in each pixel region 27, and each pixel electrode 26 is arranged in one pixel region 27 and is positioned on one side of the color resist layer 22, which faces away from the second substrate 21; each sub-electrode 251 is at least partially located between a pixel electrode 26 and a data line 23, and is used for shielding parasitic capacitance between the pixel electrode 26 and the data line 23.
In this embodiment, at least part of the sub-electrode 251 is located between the pixel unit and the data line 23, and the parasitic capacitance between at least part of the data line 23 and the pixel electrode 26 can be shielded by the sub-electrode 251, so that the influence of the parasitic capacitance between the data line 23 and the pixel electrode 26 on the transmission of the driving signal in the display panel is reduced, and the display effect of the display panel is improved.
In one embodiment of the present invention, as shown in FIG. 1, the spacing between the two sub-electrodes 251 of each transparent electrode 25 is defined as d1, and d1 is 2 μm or less and 3 μm or less.
In the present embodiment, the distance d1 between the two sub-electrodes 251 in each transparent electrode 25 is set to be greater than or equal to 2 μm and less than or equal to 3 μm, so that the two sub-electrodes 251 in each transparent electrode 25 have a maximum spacing distance therebetween, and each sub-electrode 251 can shield the long side of one data line 23 on the vertical light path of the display panel, thereby ensuring that no display light leakage occurs on the peripheral side of the data line 23, and reducing the parasitic capacitance between the transparent electrode 25 and the data line 23. If the distance between the two sub-electrodes 251 is smaller than 2 μm, the distance between the sub-electrodes 251 is too small, the reduction of the overall width of the transparent electrode 25 is small, and a considerable parasitic capacitance affecting the display effect of the display panel still exists between the transparent electrode 25 and the data line 23. If the spacing between the sub-electrodes 251 is greater than 3 μm, the spacing between two adjacent sub-electrodes 251 is too large, and it is likely that the sub-electrodes 251 will not sufficiently shield the data line 23 in the vertical light path of the display panel, which will cause the data line 23 to form a larger parasitic capacitance with the first common electrode 12 through the spacing space between two adjacent sub-electrodes 251, and thus the display effect of the display panel will be affected.
Example two:
the invention further provides a display device, as shown in fig. 4, the display device includes the display panel and the backlight module 3 in the above embodiments, and the array substrate 2 of the display panel is disposed on the light exit side of the backlight module 3 and is located between the backlight module 3 and the color film substrate 1 of the display panel.
In the present embodiment, the backlight module 3 includes a back plate, a light source, an optical film, and the like, and the optical film includes an optical sheet for transmitting light emitted from the light source, such as a diffusion sheet and a light guide sheet. The array substrate 2 of the display panel is arranged on the light-emitting side of the backlight module 3, and the backlight module 3 is used for providing backlight for the display panel, so that the color film substrate 1 side of the display panel displays images outwards. The specific structure of the display panel refers to the above embodiments, and since the display device adopts all technical solutions of all the above embodiments, at least all the beneficial effects brought by the technical solutions of the above embodiments are achieved, and no further description is given here.
The above description is only an alternative embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications and equivalents of the present invention, which are made by the contents of the present specification and the accompanying drawings, or directly/indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A display panel comprises a color film substrate and an array substrate, wherein the color film substrate comprises a first substrate and a first common electrode arranged on the first substrate, the array substrate comprises a second substrate and a color resistance layer, a plurality of data lines and a plurality of scanning lines, the color resistance layer, the data lines and the scanning lines are arranged on the second substrate in a staggered mode, each data line and each scanning line are located between the second substrate and the color resistance layer, and an electrode layer is arranged on one side, opposite to the second substrate, of the color resistance layer, and the display panel is characterized in that:
the electrode layer comprises a plurality of transparent electrodes which are arranged at intervals, the transparent electrodes and the data lines are arranged in a one-to-one correspondence mode and used for shielding parasitic capacitance between the data lines and the first common electrodes;
each transparent electrode comprises two sub-electrodes arranged at intervals along the extension direction of the data line, and the orthographic projection of the two sub-electrodes of each transparent electrode on the plane where the data line is located shields two side edges of the data line along the length direction.
2. The display panel of claim 1, wherein an orthographic projection of each of the sub-electrodes on a plane of one of the data lines protrudes from a side of the data line along a length direction.
3. The display panel of claim 2, wherein a width of a portion of the orthographic projection of each of the sub-electrodes on a plane of one of the data lines, which protrudes from one side of the data line in the length direction, is defined as d1, and d1 is greater than or equal to 1.5 μm.
4. The display panel of claim 1, wherein each of the transparent electrodes further comprises at least one electrode segment;
the two sub-electrodes of each transparent electrode are electrically connected with at least one electrode segment.
5. The display panel according to claim 4, wherein the transparent electrode comprises a plurality of electrode segments arranged at intervals, each electrode segment is located between two adjacent sub-electrodes and connects two sub-electrodes.
6. The display panel of claim 4, wherein each of the electrode segments is offset from any of the scan lines.
7. The display panel according to claim 4, wherein each of the electrode segments of each of the transparent electrodes is integrally formed with the two sub-electrodes.
8. The display panel according to any one of claims 1 to 7, further comprising a plurality of pixel electrodes;
the extending direction of the scanning lines is perpendicular to the extending direction of the data lines, a pixel area is defined between two adjacent data lines and two adjacent scanning lines, the color resistance layer is arranged in each pixel area, and each pixel electrode is arranged in one pixel area and is positioned on one side, back to the second substrate, of the color resistance layer;
each sub-electrode is at least partially positioned between one pixel electrode and one data line and is used for shielding parasitic capacitance between the pixel electrode and the data line.
9. The display panel according to any one of claims 1 to 7, wherein a spacing between the two sub-electrodes of each of the transparent electrodes is defined as d1, 2 μm. ltoreq. d 1. ltoreq.3 μm.
10. A display device, characterized in that the display device comprises:
the display panel according to any one of claims 1 to 9; and
the array substrate of the display panel is arranged on the light-emitting side of the backlight module and is positioned between the backlight module and the color film substrate of the display panel.
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