CN113700391A - Drive control system of intelligent lock - Google Patents

Drive control system of intelligent lock Download PDF

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Publication number
CN113700391A
CN113700391A CN202111258865.4A CN202111258865A CN113700391A CN 113700391 A CN113700391 A CN 113700391A CN 202111258865 A CN202111258865 A CN 202111258865A CN 113700391 A CN113700391 A CN 113700391A
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China
Prior art keywords
pin
chip
resistor
connector
capacitor
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Application number
CN202111258865.4A
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Chinese (zh)
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CN113700391B (en
Inventor
李兵
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Shandong Ailin Intelligent Technology Co Ltd
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Shandong Ailin Intelligent Technology Co Ltd
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Publication of CN113700391B publication Critical patent/CN113700391B/en
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    • E—FIXED CONSTRUCTIONS
    • E05—LOCKS; KEYS; WINDOW OR DOOR FITTINGS; SAFES
    • E05B—LOCKS; ACCESSORIES THEREFOR; HANDCUFFS
    • E05B49/00—Electric permutation locks; Circuits therefor ; Mechanical aspects of electronic locks; Mechanical keys therefor
    • E—FIXED CONSTRUCTIONS
    • E05—LOCKS; KEYS; WINDOW OR DOOR FITTINGS; SAFES
    • E05B—LOCKS; ACCESSORIES THEREFOR; HANDCUFFS
    • E05B47/00—Operating or controlling locks or other fastening devices by electric or magnetic means
    • E05B47/0001—Operating or controlling locks or other fastening devices by electric or magnetic means with electric actuators; Constructional features thereof
    • E05B47/0012—Operating or controlling locks or other fastening devices by electric or magnetic means with electric actuators; Constructional features thereof with rotary electromotors
    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07C—TIME OR ATTENDANCE REGISTERS; REGISTERING OR INDICATING THE WORKING OF MACHINES; GENERATING RANDOM NUMBERS; VOTING OR LOTTERY APPARATUS; ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDED FOR ELSEWHERE
    • G07C9/00—Individual registration on entry or exit
    • G07C9/00174—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys
    • G07C9/00817—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys where the code of the lock can be programmed
    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07C—TIME OR ATTENDANCE REGISTERS; REGISTERING OR INDICATING THE WORKING OF MACHINES; GENERATING RANDOM NUMBERS; VOTING OR LOTTERY APPARATUS; ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDED FOR ELSEWHERE
    • G07C9/00—Individual registration on entry or exit
    • G07C9/00174—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys
    • G07C9/00944—Details of construction or manufacture
    • E—FIXED CONSTRUCTIONS
    • E05—LOCKS; KEYS; WINDOW OR DOOR FITTINGS; SAFES
    • E05B—LOCKS; ACCESSORIES THEREFOR; HANDCUFFS
    • E05B47/00—Operating or controlling locks or other fastening devices by electric or magnetic means
    • E05B2047/0048—Circuits, feeding, monitoring
    • E—FIXED CONSTRUCTIONS
    • E05—LOCKS; KEYS; WINDOW OR DOOR FITTINGS; SAFES
    • E05B—LOCKS; ACCESSORIES THEREFOR; HANDCUFFS
    • E05B47/00—Operating or controlling locks or other fastening devices by electric or magnetic means
    • E05B2047/0094—Mechanical aspects of remotely controlled locks
    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07C—TIME OR ATTENDANCE REGISTERS; REGISTERING OR INDICATING THE WORKING OF MACHINES; GENERATING RANDOM NUMBERS; VOTING OR LOTTERY APPARATUS; ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDED FOR ELSEWHERE
    • G07C9/00—Individual registration on entry or exit
    • G07C9/00174—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys
    • G07C9/00182—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys operated with unidirectional data transmission between data carrier and locks
    • G07C2009/00238—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys operated with unidirectional data transmission between data carrier and locks the transmittted data signal containing a code which is changed
    • G07C2009/00253—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys operated with unidirectional data transmission between data carrier and locks the transmittted data signal containing a code which is changed dynamically, e.g. variable code - rolling code
    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07C—TIME OR ATTENDANCE REGISTERS; REGISTERING OR INDICATING THE WORKING OF MACHINES; GENERATING RANDOM NUMBERS; VOTING OR LOTTERY APPARATUS; ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDED FOR ELSEWHERE
    • G07C9/00—Individual registration on entry or exit
    • G07C9/00174—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys
    • G07C9/00309—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys operated with bidirectional data transmission between data carrier and locks
    • G07C2009/0042—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys operated with bidirectional data transmission between data carrier and locks the transmitted data signal containing a code which is changed
    • G07C2009/00476—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys operated with bidirectional data transmission between data carrier and locks the transmitted data signal containing a code which is changed dynamically
    • G07C2009/00492—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys operated with bidirectional data transmission between data carrier and locks the transmitted data signal containing a code which is changed dynamically whereby the code is a rolling code

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Lock And Its Accessories (AREA)

Abstract

The application discloses drive control system of intelligence lock, including password control module, host system, power module, pilot lamp module, data decoding module, drive module, radio frequency module, spacing module and signal processing module, host system connects password control module, pilot lamp module, data decoding module, drive module, radio frequency module, spacing module and signal processing module, and power module is used for supplying power for each module, radio frequency module includes radio frequency remote control transmitting unit, radio frequency remote control receiving unit, radio frequency antenna unit, radio frequency signal processing unit. Has the following advantages: the device can activate radio frequency signals, integrates a wireless signal digital sequence filtering component, can set a digital sequence according to needs, and can respond only when receiving a specific digital sequence, so that the activation phenomenon caused by other signal interference can be effectively avoided.

Description

Drive control system of intelligent lock
Technical Field
The invention discloses a drive control system of an intelligent lock, and belongs to the technical field of electronic control.
Background
The appearance of full-automatic lock makes the intelligent degree of lock have very big promotion, especially need not change the lock body when full-automatic intelligence lock is installed, and the application is wide, and easy operation therefore receives consumer's welcome, so becomes the new favorite of intelligence lock trade.
But from the use condition of the full-automatic intelligent lock purchased by the current consumer, the prospect is not optimistic, and as the number of minor defects is large, the failure rate is high, and the complaints of the consumer are large, a plurality of large-scale intelligent lock companies are forbidden to the high-grade product.
The radio frequency function in the existing intelligent lock does not have a radio frequency signal processing function, activation phenomena caused by other signal interference are avoided, a highly confidential rolling code and decryption function cannot be generated, power consumption is high, the radio frequency communication distance is short, safety is low, a motor limit function and a one-key starting limit function are not provided, and the motor and the one-key starting cannot be prevented from being blocked.
Disclosure of Invention
The invention aims to solve the technical problems and provides a drive control system of an intelligent lock, which has a one-key starting function, can activate radio frequency signals, integrates a wireless signal digital sequence filtering component, can set a digital sequence according to needs, and can respond only when a specific digital sequence is received by a device, so that the activation phenomenon caused by other signal interference can be effectively avoided.
In order to solve the technical problems, the invention adopts the following technical scheme:
a drive control system of an intelligent lock comprises a password control module, a main control module, a power supply module, an indicator light module, a data decoding module, a drive module, a radio frequency module, a limit module and a signal processing module, wherein the main control module is connected with the password control module, the indicator light module, the data decoding module, the drive module, the radio frequency module, the limit module and the signal processing module;
the driving module comprises a chip U5, a chip U5 is L9110, a pin 7 of the chip U5 is connected with one end of a resistor R18 and a pin 6 of a chip U6, the other end of the resistor R18 is grounded, a pin 6 of the chip U5 is connected with one end of the resistor R5 and a pin 7 of the chip U5, the other end of the resistor R5 is grounded, a pin 2 and a pin 3 of the chip U5 are connected with one end of a capacitor C5 and are connected with a 6VZ power supply, the other end of the capacitor C5 is grounded, a pin 4 of the chip U5 is connected with a pin 10 of a relay JC 5, a pin 9 of the relay JC 5 is connected with a pin 1 of the chip U5, a pin 4 of the relay JC 5 is connected with a pin 4 of the chip U5, a pin 5 of the relay JC 5 is connected with a source of a MOS tube Q5, a gate of the MOS tube Q5 is grounded, a drain of the MOS tube Q5 is connected with one end of the resistor R5 and a pin 12 of the 7 of the chip U JC 5, the MOS tube Q5, and the other end of the relay VP 5 is connected with a power supply of the diode of the relay JC 5, and the relay VP 5, and the other end of the relay JC 5 is connected with the diode of the relay JC 5, the grid of the MOS transistor Q3 is grounded, the drain of the MOS transistor Q3 is connected with one end of a capacitor C19 and the source of the MOS transistor Q1, the other end of the capacitor C19 is grounded, the drain of the MOS transistor Q1 is connected with a motor conversion interface connected with the other end of the programming isolation J1, and the grid of the MOS transistor Q1 is connected with a 3.3V _ PKE power supply.
Further, the main control module includes a chip U3 and a chip U6, the model of the chip U6 is PIC16LF1936, the model of the chip U3 is PIC16F1827, pin 1 of the chip U6 is connected with one end of a programming isolation J2, the other end of the programming isolation J2 is connected with one end of a resistor R13, one end of a capacitor C15 and one end of a diode D1, the other end of the diode D1 and the other end of the resistor R31 are connected with a 3.3V _ main control power supply, the capacitor C15 and pin 2 of the chip U15 are connected with a main control wake-up interface, pin 5 of the chip U15 is connected with one end of a resistor R15, the other end of the resistor R15 is connected with a 3.3V _ main control power supply, pin 3 of the chip U15 is connected with one end of a resistor R15 and a source of an MOS transistor Q15, the other end of the resistor R15 is connected with an RSSI interface, the other end of the resistor R15 is connected with a ground, and the other end of the resistor R15 is connected with the resistor R15, and the other end of the resistor R15 is connected with a ground, the other end of the resistor R17 is grounded, a pin 25 of the chip U6 is connected with one end of a resistor R20, a pin 24 of the chip U6 is connected with one end of a resistor R22, a pin 21 of the chip U6 is connected with one end of a resistor R24, a pin 20 of the chip U6, the other end of the resistor R20, the other end of the resistor R22 and the other end of the resistor R24 are connected with one end of a capacitor C16, one end of the resistor R14 and one end of a capacitor C17, and are connected with a 3.3V _ master control power supply, the other end of the capacitor C16 and the other end of the capacitor C17 are grounded, the other end of the resistor R14 is connected with one end of a password recovery key S2, and the other end of the password recovery key S2 is grounded;
a pin 1 of the chip U3 is connected with one end of a resistor R5 and one end of a capacitor C2, a pin 2 of the chip U3 is connected with one end of a resistor R6 and one end of a capacitor C3, the other end of the resistor R5, the other end of the capacitor C5, the other end of the resistor R5 and the other end of the capacitor C5 are grounded, a pin 4 of the chip U5 is connected with one end of a programming isolation J5, the other end of the programming isolation J5 is connected with one end of a resistor R5, one end of the capacitor C5 and one end of an emergency switch key S5 and connected with a motor conversion interface, the other end of the resistor R5 is connected with a 3.3V _ PKE power supply, the other end of the capacitor C5 and the other end of the emergency switch key S5 are grounded, a pin 19 of the chip U5 is connected with one end of the resistor R5, a pin 18 of the chip U5 is connected with one end of the resistor R5, a pin 17 of the chip U5 is connected with one end of the resistor R5, a pin 20 of the chip U5 is connected with one end of the capacitor C5 and one end of the capacitor C363V _ PKE power supply, and one end of the PKE 3, the other end of the power supply are connected with the PKE 3, the power supply, the other end of the capacitor C9 and the other end of the capacitor C10 are grounded, a 14 pin of the chip U3 is connected with one end of a resistor R11, a 13 pin of the chip U3 is connected with one end of a resistor R12, and the other end of the resistor R11 and the other end of the resistor R12 are grounded.
Further, the password control module comprises a chip U16, the model of the chip U16 is WTC6212 16, the 1 pin of the chip U16 is connected with one end of a resistor R16, the other end of the resistor R16 is connected with the 7 pin of a connector P16, the 2 pin of the chip U16 is connected with one end of the resistor R16, the other end of the resistor R16 is connected with the 3 pin of the connector P16, the 3 pin of the chip U16 is connected with one end of the resistor R16, the other end of the resistor R16 is connected with the 8 pin of the connector P16, the 4 pin of the chip U16 is connected with one end of the resistor R16, the other end of the resistor R16 is connected with the 2 pin of the connector P16, the 5 pin of the chip U16 is connected with one end of the resistor R16, the other end of the resistor R16 is connected with one end of the connector P16, the 6 pin of the chip U16 is connected with one end of the resistor R16, the other end of the resistor R16 is connected with one end of the connector P16, the other end of the connector P16 is connected with one end of the connector P16, the other end of the resistor R51 is connected with the 11 pin of a connector P0, the 21 pin of the chip U16 is connected with one end of a resistor R62, the other end of the resistor R62 is connected with the 5 pin of a connector P0, the 22 pin of the chip U16 is connected with one end of a resistor R61, the other end of the resistor R61 is connected with the 6 pin of a connector P0, the 23 pin of the chip U16 is connected with one end of a resistor R60, the other end of the resistor R60 is connected with the 12 pin of a connector P0, the 24 pin of the chip U16 is connected with one end of a resistor R59, and the other end of the resistor R59 is connected with the 4 pin of a connector P0;
the 20 pin of the chip U16 is connected with one end of a resistor R63, the other end of the resistor R63 is connected with a 3.8V _ main control power supply, the 19 pin of the chip U16 is connected with the 2 pin of a connector P25, the 2 pin of a connector P25 is connected with the 2 pin of a connector P5, the 2 pin of a connector P5 is connected with the 23 pin of the chip U6, the 16 pin of the chip U16 is connected with the 1 pin of a connector P24, the 1 pin of the connector P24 is connected with the 1 pin of the connector P4, the 1 pin of the connector P4 is connected with the 14 pin of the chip U4, the 15 pin of the chip U4 is connected with the 2 pin of the connector P4, the 2 pin of the connector P4 is connected with the 2 pin of the P4, the 2 pin of the connector P4 is connected with the 13 pin of the chip U4, the 14 pin of the connector U4 is connected with the 3 pin of the P4, the 3 pin of the P4 is connected with the pin of the connector P4, the connector P4 is connected with the pin of the connector P4, the connector P364 pin of the connector P connector. The 4 pins of the connector P24 are connected with the 4 pins of the connector P4, the 4 pins of the connector P4 are connected with the 11 pins of the chip U6, the 11 pins of the chip U16 are connected with the 1 pin of the connector P25 and the drain of the MOS tube Q11, the grid of the MOS tube Q11 is connected with a password dormancy control interface, the source of the MOS tube Q11 is connected with the 12 pins of the chip U16, the 1 pin of the connector P25 is connected with the 1 pin of the connector P5, and the 1 pin of the connector P5 is connected with the 11 pins of the chip U3;
the 9 feet of the chip U16 are connected with one end of a capacitor C47, the other end of the capacitor C47 is grounded, the 18 feet of the chip U16 are connected with one end of a capacitor C48, the other end of the capacitor C48 is grounded, the 17 feet of the chip U16 are connected with one end of a resistor R64, the other end of the resistor R64 is connected with the 18 feet of the chip U16 and is connected with a 3.8V _ master control power supply, the 12 feet of the chip U16 are connected with one end of a resistor R65, the other end of the resistor R65 is connected with one end of a capacitor C49 and is connected with the 3.8V _ master control power supply, and the other end of the capacitor C49 is grounded.
Further, the data decoding module comprises a chip U1, the model of the chip U1 is TDH6300, a pin 1 of the chip U1 is connected with one end of a resistor R44 and one end of a capacitor C33, and is connected with a V3V power supply, a pin 2 of the chip U1 is connected with the other end of the resistor R44 and one end of a key S1, the other end of the key S1 is grounded, a pin 3 of the chip U1 is connected with one end of a resistor R43, the other end of the resistor R43 is connected with one end of a diode D12, the other end of the diode D12 is grounded, a pin 4 of the chip U1 is connected with one end of a resistor R45 and one end of a capacitor C34, the other end of the resistor R45 is connected with a V3V power supply, the other end of the capacitor C34 is grounded, a pin 5 of the chip U1 is connected with one end of a resistor R46, and the other end of the resistor R46 is connected with a V3V power supply.
The data decoding module further comprises a chip U8, the model of the chip U8 is I9110, the pin 7 of the chip U8 is connected with the pin 8 of the chip U1, the pin 6 of the chip U8 is connected with the pin 9 of the chip U1, the pins 2 and 3 of the chip U8 are connected with one end of a capacitor C35, and the other end of the capacitor C35 is grounded;
the data decoding module further comprises a chip U9, the model of the chip U9 is MAX741, an 8 pin of the chip U9 is connected with a 12 pin of the chip U1, one end of a resistor R47 and one end of a capacitor C36, the other end of the resistor R47 and the other end of the capacitor C36 are grounded, and a 6 pin and a 7 pin of the chip U9 are connected with a 2 pin and a 3 pin of the chip U8;
furthermore, the data decoding module further comprises a chip U4 and a chip U2, the model of the chip U4 is IRF5851, the model of the chip U2 is HT7330, the 3 pin of the chip U4 is connected with one end of a resistor R41 and the 6 pin of a chip U4, the other end of the resistor R41 is connected with one end of a diode D11, one end of a capacitor Cc1 and the 2 pin of the chip U4, the other end of the capacitor Cc1 is grounded, the other end of the diode D11 is connected with the 4 pin of the chip U4, the 1 pin of the chip U4 is connected with one end of a resistor R42 and the 10 pin of the chip U1, and the other end of the resistor R42 is grounded;
the 2 feet of the chip U2 are connected with the 4 feet of the chip U4 and one end of a capacitor C31, and are connected with a V key 6V in parallel, the other end of the capacitor C31 is grounded, the 3 feet of the chip U2 are connected with one end of a capacitor C32 and are connected with a V3V power supply, and the other end of the capacitor C32 is grounded.
Further, the signal processing module comprises a MOS transistor Q5 and a MOS transistor Q7, the drain of the MOS transistor Q5 is connected with one end of a resistor R30 and the 10 pin of a chip U6, the drain of the MOS transistor Q7 is connected with one end of a resistor R31 and the 9 pin of a chip U6, the source of the MOS transistor Q5 is connected with the 4 pin of a connector P7, the source of the MOS transistor Q7 is connected with the 1 pin of a connector P7, and the gate of the MOS transistor Q5, the gate of the MOA transistor Q7, the other end of the resistor R30 and the other end of the resistor R31 are grounded; the signal processing module further comprises an MOS tube Q4 and an MOS tube Q6, the drain of the MOS tube Q4 is connected with one end of a resistor R28, one end of a diode D4 and one end of a diode D3, the other end of the resistor R28 is grounded with the gate of the MOS tube Q4, the other end of a diode D4 is connected with the drain of the MOS tube Q3 of the driving module, the other end of the diode D3 is connected with a pin 15 of a chip U3, the source of the MOS tube Q3 is connected with one end of the resistor R3, the other end of the resistor R3 is connected with the pin 3 of a connector P3, the drain of the MOS tube Q3 is connected with one end of the resistor R3, one end of the diode D3 and one end of the diode D3, the other end of the resistor R3 is grounded with the gate of the MOS tube Q3, the other end of the diode D3 is connected with the drain of the MOS tube Q3 of the driving module, the pin 16 of the diode D3 is connected with the connector of the chip U3;
the signal processing module further comprises a connector P27, the external sound and light control of the connector P27 is realized, 1 pin of the connector P27 is connected with 1 pin of the connector P7, 2 pins of the connector P27 are connected with 2 pins of the connector P7 and 2 pins of the two-color LED lamp D21, 3 pins of the connector P27 are connected with 3 pins of the connector P7 and 1 pin of the two-color LED lamp D21, 4 pins of the connector P27 are connected with 4 pins of the connector P7 and one end of a buzzer, and the other end of the buzzer, 3 pins of the two-color LED lamp D21 and 4 pins of the two-color LED lamp D21 are connected with 6V.
Furthermore, the radio frequency module comprises a radio frequency remote control transmitting unit, a radio frequency remote control receiving unit, a radio frequency antenna unit and a radio frequency signal processing unit;
the radio frequency remote control transmitting unit comprises a chip U12, wherein the model of the chip U12 is MICRF211ABQS, a crystal oscillator X21 is connected between a pin 1 and a pin 16 of the chip U12, a pin 3 of the chip U12 is connected with one end of an inductor L22 and one end of a capacitor C52, the other end of the inductor L22 is grounded, the other end of a capacitor C52 is connected with one end of a capacitor C51 and one end of an inductor L21 and is connected with a high-frequency receiving antenna interface, the other end of the capacitor C51 and the other end of the inductor L21 are grounded, a pin 5 of the chip U21 is connected with one end of a capacitor C21 and one end of the capacitor C21 and is connected with a 3.8V _ PKE power supply, the other end of the capacitor C21 and the other end of the capacitor C21 are grounded, a pin 8 of the chip U21 is connected with a pin 2 of a connector P21 and a pin 2 of the connector P21, a pin 10 of the chip U21 is connected with a pin 4 of the connector P21, and a pin 3612 of the connector P21 is connected with a capacitor C21 of the connector P21 and a connector C21 of the chip. The other end of the capacitor C55 is grounded, the pin 13 of the chip U12 is connected with one end of a capacitor C54, the other end of the capacitor C54 is grounded, the pin 14 of the chip U12 is connected with the pin 3 of a connector P25, the pin 3 of a connector P25 is connected with the pin 3 of a connector P5, and the pin 3 of the connector P5 is connected with the pin 1 of a chip U3;
the radio frequency remote control receiving unit chip U10, the model of the chip U10 is MICRF211ABQS, a crystal oscillator X11 is connected between a pin 1 and a pin 16 of the chip U10, a pin 3 of the chip U10 is connected with one end of an inductor L12 and one end of a capacitor C42, the other end of the inductor L12 is grounded, the other end of a capacitor C42 is connected with one end of a capacitor C41 and one end of an inductor L11 and is connected with a high frequency receiving antenna interface connected with the radio frequency remote control transmitting unit, the other end of a capacitor C41 and the other end of an inductor L11 are grounded, a pin 5 of the chip U10 is connected with one end of a capacitor C43 and is connected with a 3.8V _ PKE power supply, the other end of a capacitor C43 is grounded, a pin 8 of the chip U43 is connected with a pin 6 of a connector P43, a pin 10 of the chip U43 is connected with a pin 4 of the connector P43, a pin 4 of the P43 is connected with a pin 4 of the connector P43, a pin of the connector P43, and a pin 6P 43 of the connector P43 is connected with a pin 362P connector of the connector P43, the 12 pin of the chip U10 is connected with one end of a capacitor C45, the other end of the capacitor C45 is grounded, the 13 pin of the chip U10 is connected with one end of a capacitor C44, the other end of the capacitor C44 is grounded, the 14 pin of the chip U10 is connected with the 8 pin of a connector P8, the 4 pin of the connector P8 is connected with the 4 pin of a connector P28 and the 5 pin of the connector P5, and the 5 pin of the connector P5 is connected with the 2 pin of the chip U3.
Furthermore, the radio frequency signal processing unit comprises a chip U22, the model of the chip U22 is MCP2030-I/ST, a pin 11 of the chip U22 is connected with one end of a capacitor C62 and one end of an inductor LX, a pin 10 of the chip U22 is connected with one end of a capacitor C63 and one end of an inductor LY, a pin 9 of the chip U22 is connected with one end of a capacitor C64 and one end of an inductor LZ, the other end of the capacitor C62, the other end of the inductor LX, the other end of a capacitor C63, the other end of the inductor LY, the other end of the capacitor C64 and the other end of the inductor LZ are grounded, a pin 13 of the chip U22 is connected with one end of the capacitor C65 and one end of a resistor R73, the other end of the capacitor C65 and the other end of the resistor R73 are grounded, a pin 7 and a pin 8 of the chip U22 are connected with one end of a capacitor C72 and are connected with a power supply, and the other end of the capacitor C72 is grounded;
the radio frequency signal processing unit further comprises a chip U23, the model of the chip U23 is PIC12F508, the pin 2 of the chip U23 is connected with the pin 2 of the chip U22, the pin 3 of the chip U23 is connected with the pin 3 of the chip U22, and the pin 6 of the chip U23 is connected with the pin 6 of the chip U22;
the radio frequency signal processing unit further comprises a chip U21, the model of the chip U21 is HCS300-I/SN, pin 1 of the chip U21 is connected with pin 5 of the chip U23, pin 6 of the chip U21 is connected with one end of a resistor R72, the other end of the resistor R72 is connected with a base of a triode Q72, a collector of the triode Q72 is connected with an emitter of a triode Q71 and one end of a capacitor C71, a collector of the triode Q71 and the other end of the capacitor C71 are connected with one end of a capacitor C70 and one end of an inductor L62, a base of the triode Q71 is connected with one end of a resistor R71 and one end of a filter X41, pin 1 of the filter X41 is connected with the other end of a resistor R71, the other end of the inductor L62 and one end of an inductor L63, the other end of the inductor L63 is connected with one end of a capacitor C69 and one end of an inductor L61, the other end of the inductor L61 is connected with a VDD power supply, and the other end of the capacitor C69, and the pin 2 and pin 4 of the filter X41 are grounded.
Further, the radio frequency antenna unit comprises a chip U7, the model of the chip U7 is TC4422, a pin 2 of the chip U7 is connected with one end of a resistor R29 and a pin 10 of the chip U3, a pin 1 of the chip U7 is connected with one end of a capacitor C21 and one end of a capacitor C20, the other end of the capacitor C21 and the other end of the capacitor C20 are grounded, a pin 8 of the chip U7 is connected with one end of a capacitor C22 and the other end of the capacitor C22 are grounded, and a pin 6 and a pin 7 of the chip U7 are connected with a pin 1 of a connector P1.
Furthermore, the limiting module comprises a MOS transistor Q31, the source of the MOS transistor Q31 is connected with one end of a limiting switch key S32, one end of a limiting switch key S31, one end of a diode D33 and one end of a diode D34, the other end of a limiting switch key S32 is connected with the pin 2 of a connector P3 and the pin 6 of the connector P41, the other end of a limiting switch key S31 is connected with one end of a diode D31 and one end of a diode D32, the other end of the diode D31 is connected with the pin 3 of a connector P3 and the pin 5 of a connector P41, the other end of the diode D32 is connected with the pin 4 of a connector P41, the other end of the diode D33 is connected with the pin 2 of a connector P41, and the other end of the diode D34 is connected with the pin 3 of a connector P41;
a pin 6 of the connector P41 is connected with one end of a limit switch key S42, a pin 5 of the connector P41 is connected with one end of a diode D41, a pin 4 of the connector P41 is connected with one end of a diode D42, the other end of a diode D41 and the other end of a diode D42 are connected with one end of a limit switch key S41, the other ends of a limit switch key S41 and the other end of the limit switch key S42 are connected with a pin 1 of a connector P3, a pin 3 of the connector P41 is connected with one end of a diode D43, a pin 2 of the connector P41 is connected with one end of a diode D44, a pin 1 of the connector P41, the other end of the diode D43 and the other end of the diode D44 are connected with a drain electrode of a MOS tube Q40, and a source electrode of the MOS tube Q40 is connected with a pin 1 of the connector P3;
the pin 1 of the connector P3 is connected with the source electrode of a MOS tube Q9, the drain electrode of the MOS tube Q9 is connected with one end of a diode D9, one end of a diode D10 and one end of a resistor R35, the other end of the resistor R35 is grounded, the other end of the diode D9 is connected with the pin 3 of a chip U3, and the other end of the diode D10 is connected with the pin 22 of the chip U6.
By adopting the technical scheme, compared with the prior art, the invention has the following technical effects:
the device can activate the radio frequency signal, integrates a wireless signal digital sequence filtering component, can set a digital sequence according to needs, and only when receiving a specific digital sequence, the device responds, so that the activation phenomenon caused by other signal interference can be effectively avoided.
Drawings
In order to more clearly illustrate the detailed description of the invention or the technical solutions in the prior art, the drawings that are needed in the detailed description of the invention or the prior art will be briefly described below. Throughout the drawings, like elements or portions are generally identified by like reference numerals. In the drawings, elements or portions are not necessarily drawn to scale.
FIG. 1 is a circuit diagram of a main control module according to the present invention;
FIG. 2 is a circuit diagram of a cryptographic control module of the present invention;
FIG. 3 is a circuit diagram of a data decoding module according to the present invention;
FIG. 4 is a circuit diagram of a driving module according to the present invention;
FIG. 5 is a circuit diagram of a portion of a signal processing module according to the present invention;
FIG. 6 is a circuit diagram of the RF remote transmitter unit of the present invention;
FIG. 7 is a circuit diagram of an RF remote control receiving unit according to the present invention;
FIG. 8 is a circuit diagram of an RF signal processing unit according to the present invention;
FIG. 9 is a circuit diagram of the RF antenna unit of the present invention;
FIG. 10 is a circuit diagram of a position limiting module according to the present invention;
fig. 11 is a circuit diagram of each interface in the present invention.
Detailed Description
Embodiment 1, as shown in fig. 1 to 11, a drive control system of intelligent lock, including password control module, a main control module, a power module, an indicator light module, a data decoding module, a drive module, a radio frequency module, spacing module and signal processing module, main control module connects password control module, an indicator light module, a data decoding module, a drive module, a radio frequency module, spacing module and signal processing module, power module is used for supplying power to each module, drive module connects data decoding module and signal processing module, password control module is used for inputting the password and unblanks, drive module is used for driving the motor action of unblanking, radio frequency module is used for the radio frequency remote control to unblank, spacing module is used for spacing and the PKE start key of main control motor is spacing.
As shown in fig. 1, the main control module adopts a main-auxiliary dual control system, the main control module includes a chip U3 and a chip U6, the model of the chip U6 is PIC16LF1936, the model of the chip U3 is PIC16F1827, pin 1 of the chip U6 is connected to one end of a programming isolation J2, the other end of the programming isolation J2 is connected to one end of a resistor R13, one end of a capacitor C15 and one end of a diode D1, the other end of the diode D1 and the other end of the resistor R31 are connected to a 3.3V _ main control power supply, pin 2 of the capacitor C15 and the chip U6 is connected to a main control wake-up interface, pin 5 of the chip U6 is connected to one end of a resistor R21, the other end of the resistor R21 is connected to a 3.3V _ main control power supply, pin 3 of the chip U6 is connected to one end of a resistor R16 and a source of a MOS transistor Q16, the other end of the resistor R16 is connected to a ground, the other end of a 27 pin of a chip U6 is connected with one end of a resistor R17, the other end of the resistor R17 is grounded, one end of a 25 pin of a chip U6 is connected with one end of a resistor R20, one end of a 24 pin of a chip U6 is connected with one end of a resistor R22, one end of a 21 pin of a chip U6 is connected with one end of a resistor R24, the other end of a chip U6, the other end of a resistor R20, the other end of a resistor R22 and the other end of a resistor R24 are connected with one end of a capacitor C16, one end of a resistor R14 and one end of a capacitor C17 and are connected with a 3.3V _ main control power supply, the other end of a capacitor C16 and the other end of a capacitor C17 are grounded, the other end of a resistor R14 is connected with one end of a password recovery key S2, and the other end of a password recovery key S2 is grounded.
A pin 1 of the chip U3 is connected with one end of a resistor R5 and one end of a capacitor C2, a pin 2 of the chip U3 is connected with one end of a resistor R6 and one end of a capacitor C3, the other end of the resistor R5, the other end of the capacitor C5, the other end of the resistor R5 and the other end of the capacitor C5 are grounded, a pin 4 of the chip U5 is connected with one end of a programming isolation J5, the other end of the programming isolation J5 is connected with one end of a resistor R5, one end of the capacitor C5 and one end of an emergency switch key S5 and connected with a motor conversion interface, the other end of the resistor R5 is connected with a 3.3V _ PKE power supply, the other end of the capacitor C5 and the other end of the emergency switch key S5 are grounded, a pin 19 of the chip U5 is connected with one end of the resistor R5, a pin 18 of the chip U5 is connected with one end of the resistor R5, a pin 17 of the chip U5 is connected with one end of the resistor R5, a pin 20 of the chip U5 is connected with one end of the capacitor C5 and one end of the capacitor C363V _ PKE power supply, and one end of the PKE 3, the other end of the power supply are connected with the PKE 3, the power supply, the other end of the capacitor C9 and the other end of the capacitor C10 are grounded, a 14 pin of the chip U3 is connected with one end of a resistor R11, a 13 pin of the chip U3 is connected with one end of a resistor R12, and the other end of the resistor R11 and the other end of the resistor R12 are grounded.
As shown in fig. 2, the cryptographic control module includes a chip U16, the model of the chip U16 is WTC6212 16, a pin 1 of the chip U16 is connected to one end of a resistor R16, the other end of the resistor R16 is connected to a pin 7 of a connector P16, a pin 2 of the chip U16 is connected to one end of the resistor R16, the other end of the resistor R16 is connected to a pin 3 of the connector P16, a pin 3 of the chip U16 is connected to one end of the resistor R16, the other end of the resistor R16 is connected to an pin 8 of the connector P16, a pin 4 of the chip U16 is connected to one end of the resistor R16, the other end of the resistor R16 is connected to a pin 2 of the connector P16, a pin 5 of the chip U16 is connected to one end of the resistor R16, the other end of the resistor R16 is connected to one end of the pin 6 of the connector P16, the other end of the resistor R16 is connected to one end of the pin P16, the connector P16, the other end of the resistor R16 is connected to one end of the connector P16, and one end of the connector P16 is connected to one end of the connector P16, the other end of the resistor R51 is connected with the 11 pin of a connector P0, the 21 pin of the chip U16 is connected with one end of a resistor R62, the other end of the resistor R62 is connected with the 5 pin of a connector P0, the 22 pin of the chip U16 is connected with one end of a resistor R61, the other end of the resistor R61 is connected with the 6 pin of a connector P0, the 23 pin of the chip U16 is connected with one end of a resistor R60, the other end of the resistor R60 is connected with the 12 pin of a connector P0, the 24 pin of the chip U16 is connected with one end of a resistor R59, and the other end of the resistor R59 is connected with the 4 pin of a connector P0.
The 20 pin of the chip U16 is connected with one end of a resistor R63, the other end of the resistor R63 is connected with a 3.8V _ main control power supply, the 19 pin of the chip U16 is connected with the 2 pin of a connector P25, the 2 pin of a connector P25 is connected with the 2 pin of a connector P5, the 2 pin of a connector P5 is connected with the 23 pin of the chip U6, the 16 pin of the chip U16 is connected with the 1 pin of a connector P24, the 1 pin of the connector P24 is connected with the 1 pin of the connector P4, the 1 pin of the connector P4 is connected with the 14 pin of the chip U4, the 15 pin of the chip U4 is connected with the 2 pin of the connector P4, the 2 pin of the connector P4 is connected with the 2 pin of the P4, the 2 pin of the connector P4 is connected with the 13 pin of the chip U4, the 14 pin of the connector U4 is connected with the 3 pin of the P4, the 3 pin of the P4 is connected with the pin of the connector P4, the connector P4 is connected with the pin of the connector P4, the connector P364 pin of the connector P connector. The 4 pins of the connector P24 are connected with the 4 pins of the connector P4, the 4 pins of the connector P4 are connected with the 11 pins of the chip U6, the 11 pins of the chip U16 are connected with the 1 pin of the connector P25 and the drain of the MOS tube Q11, the gate of the MOS tube Q11 is connected with a password dormancy control interface, the source of the MOS tube Q11 is connected with the 12 pins of the chip U16, the 1 pin of the connector P25 is connected with the 1 pin of the connector P5, and the 1 pin of the connector P5 is connected with the 11 pins of the chip U3.
The 9 feet of the chip U16 are connected with one end of a capacitor C47, the other end of the capacitor C47 is grounded, the 18 feet of the chip U16 are connected with one end of a capacitor C48, the other end of the capacitor C48 is grounded, the 17 feet of the chip U16 are connected with one end of a resistor R64, the other end of the resistor R64 is connected with the 18 feet of the chip U16 and is connected with a 3.8V _ master control power supply, the 12 feet of the chip U16 are connected with one end of a resistor R65, the other end of the resistor R65 is connected with one end of a capacitor C49 and is connected with the 3.8V _ master control power supply, and the other end of the capacitor C49 is grounded.
As shown in fig. 3, the data decoding module includes a chip U1, the model of the chip U1 is TDH6300, pin 1 of the chip U1 is connected to one end of a resistor R44 and one end of a capacitor C33, and is connected to a V3V power supply, pin 2 of the chip U1 is connected to the other end of the resistor R44 and one end of a key S1, the other end of the key S1 is grounded, pin 3 of the chip U1 is connected to one end of a resistor R43, the other end of the resistor R43 is connected to one end of a diode D12, the other end of the diode D12 is grounded, pin 4 of the chip U1 is connected to one end of a resistor R45 and one end of a capacitor C34, the other end of the resistor R45 is connected to a V3V power supply, the other end of the capacitor C34 is grounded, pin 5 of the chip U1 is connected to one end of a resistor R46, and the other end of the resistor R46 is connected to a V3V power supply.
The data decoding module further comprises a chip U8, the model of the chip U8 is I9110, the 7 pin of the chip U8 is connected with the 8 pin of the chip U1, the 6 pin of the chip U8 is connected with the 9 pin of the chip U1, the 2 pin and the 3 pin of the chip U8 are connected with one end of a capacitor C35, and the other end of the capacitor C35 is grounded.
The data decoding module further comprises a chip U9, the model of the chip U9 is MAX741, an 8 pin of the chip U9 is connected with a 12 pin of the chip U1, one end of a resistor R47 and one end of a capacitor C36, the other end of the resistor R47 and the other end of the capacitor C36 are grounded, and a 6 pin and a 7 pin of the chip U9 are connected with a 2 pin and a 3 pin of the chip U8.
The data decoding module further comprises a chip U4 and a chip U2, the model of the chip U4 is IRF5851, the model of the chip U2 is HT7330, the 3 pin of the chip U4 is connected with one end of a resistor R41 and the 6 pin of a chip U4, the other end of the resistor R41 is connected with one end of a diode D11, one end of a capacitor Cc1 and the 2 pin of the chip U4, the other end of the capacitor Cc1 is grounded, the other end of the diode D11 is connected with the 4 pin of the chip U4, the 1 pin of the chip U4 is connected with one end of a resistor R42 and the 10 pin of the chip U1, and the other end of the resistor R42 is grounded.
The 2 feet of the chip U2 are connected with the 4 feet of the chip U4 and one end of a capacitor C31, and are connected with a V key 6V in parallel, the other end of the capacitor C31 is grounded, the 3 feet of the chip U2 are connected with one end of a capacitor C32 and are connected with a V3V power supply, and the other end of the capacitor C32 is grounded.
As shown in fig. 4, the driving module includes a chip U5, a chip U5 having a model number L9110, a pin 7 of the chip U5 is connected to one end of a resistor R18 and a pin 6 of the chip U6, the other end of the resistor R18 is grounded, a pin 6 of the chip U5 is connected to one end of the resistor R5 and the pin 7 of the chip U5, the other end of the resistor R5 is grounded, pins 2 and 3 of the chip U5 are connected to one end of a capacitor C5 and connected to a 6VZ power supply, the other end of the capacitor C5 is grounded, a pin 4 of the chip U5 is connected to a pin 10 of a relay JC 5, a pin 9 of the relay JC 5 is connected to a pin 1 of the chip U5, a pin 4 of the relay JC 5 is connected to a pin 4 of the chip U5, a pin 5 of the MOS transistor JC 5 is connected to a source of the MOS transistor Q5, a gate of the MOS transistor Q5 is connected to a drain of the transistor Q5, a pin 12 of the MOS transistor Q5 and a source of the diode Q5, a terminal VP 5 and a terminal VP 5, the grid of the MOS transistor Q3 is grounded, the drain of the MOS transistor Q3 is connected with one end of a capacitor C19 and the source of the MOS transistor Q1, the other end of the capacitor C19 is grounded, the drain of the MOS transistor Q1 is connected with a motor conversion interface connected with the other end of the programming isolation J1, and the grid of the MOS transistor Q1 is connected with a 3.3V _ PKE power supply.
As shown in fig. 5, the signal processing module includes a MOS transistor Q5 and a MOS transistor Q7, a drain of the MOS transistor Q5 is connected to one end of a resistor R30 and a pin 10 of a chip U6, a drain of the MOS transistor Q7 is connected to one end of a resistor R31 and a pin 9 of a chip U6, a source of the MOS transistor Q5 is connected to a pin 4 of a connector P7, a source of the MOS transistor Q7 is connected to a pin 1 of a connector P7, and a gate of the MOS transistor Q5, a gate of the MOA transistor Q7, the other end of the resistor R30 and the other end of the resistor R31 are grounded; the signal processing module further comprises a MOS tube Q4 and a MOS tube Q6, the drain of the MOS tube Q4 is connected with one end of a resistor R28, one end of a diode D4 and one end of a diode D3, the other end of the resistor R28 is grounded with the grid of the MOS tube Q4, the other end of the diode D4 is connected with the drain of a MOS tube Q3 of the driving module, the other end of the diode D3 is connected with a pin 15 of a chip U6, the source of the MOS tube Q4 is connected with one end of a resistor R27, the other end of the resistor R27 is connected with a pin 3 of a connector P7, the drain of the MOS tube Q6 is connected with one end of a resistor R32, one end of a diode D5 and one end of a diode D6, the other end of the resistor R32 is grounded with the grid of the MOS tube Q6, the other end of the diode D5 is connected with the drain of a MOS tube Q2 of the driving module, the other end of the diode D6 is connected with a pin 16 of the chip U6, the source of the MOS tube Q4 is connected with one end of a resistor R33, and the other end of the connector P33 is connected with a pin 7.
The signal processing module further comprises a connector P27, the external sound and light control of the connector P27 is realized, 1 pin of the connector P27 is connected with 1 pin of the connector P7, 2 pins of the connector P27 are connected with 2 pins of the connector P7 and 2 pins of the two-color LED lamp D21, 3 pins of the connector P27 are connected with 3 pins of the connector P7 and 1 pin of the two-color LED lamp D21, 4 pins of the connector P27 are connected with 4 pins of the connector P7 and one end of a buzzer, and the other end of the buzzer, 3 pins of the two-color LED lamp D21 and 4 pins of the two-color LED lamp D21 are connected with 6V.
As shown in fig. 6 to 9, the rf module includes an rf remote transmitting unit, an rf remote receiving unit, an rf antenna unit, and an rf signal processing unit.
As shown in fig. 6, the rf remote control transmitting unit includes a chip U12, the model of the chip U12 is MICRF211ABQS, a crystal oscillator X21 is connected between pins 1 and 16 of the chip U12, pin 3 of the chip U12 is connected with one end of an inductor L22 and one end of a capacitor C52, the other end of the inductor L22 is grounded, the other end of the capacitor C52 is connected with one end of a capacitor C51 and one end of an inductor L21 and connected to a high frequency receiving antenna interface, the other end of the capacitor C51 and the other end of the inductor L21 are grounded, pin 5 of the chip U21 is connected with one end of a capacitor C21 and connected to a 3.8V _ PKE power supply, the other end of the capacitor C21 and the other end of the capacitor C21 are grounded, pin 8 of the chip U21 is connected with pin 2 of the connector P21 and pin 2 of the connector P21, pin 10 of the chip U21 is connected with pin 4 of the connector P21, pin of the chip U21 is connected with pin 4 of the connector P21 and pin 21 and one end of the capacitor C21 of the connector P21, the other end of the capacitor C55 is grounded, the pin 13 of the chip U12 is connected with one end of the capacitor C54, the other end of the capacitor C54 is grounded, the pin 14 of the chip U12 is connected with the pin 3 of the connector P25, the pin 3 of the connector P25 is connected with the pin 3 of the connector P5, and the pin 3 of the connector P5 is connected with the pin 1 of the chip U3.
As shown in fig. 7, the rf remote control receiving unit chip U10, the chip U10 is of the MICRF211ABQS type, a crystal oscillator X11 is connected between the pin 1 and the pin 16 of the chip U10, the pin 3 of the chip U10 is connected with one end of an inductor L12 and one end of a capacitor C42, the other end of the inductor L12 is grounded, the other end of a capacitor C42 is connected with one end of a capacitor C41 and one end of an inductor L11 and is connected with a high frequency receiving antenna interface connected with the rf remote control transmitting unit, the other end of a capacitor C41 and the other end of an inductor L11 are grounded, the pin 5 of the chip U10 is connected with one end of a capacitor C43 and is connected with a 3.8V _ PKE power supply, the other end of the capacitor C43 is grounded, the pin 8 of the chip U43 is connected with the pin 6 of the connector P43, the pin 10 of the chip U43 is connected with the pin 4 of the connector P43, the pin 4 of the connector P43 is connected with the pin 20 of the chip U43, the connector P43 is connected with the pin 366 of the connector P43, the connector of the pin 43, the 12 pin of the chip U10 is connected with one end of a capacitor C45, the other end of the capacitor C45 is grounded, the 13 pin of the chip U10 is connected with one end of a capacitor C44, the other end of the capacitor C44 is grounded, the 14 pin of the chip U10 is connected with the 8 pin of a connector P8, the 4 pin of the connector P8 is connected with the 4 pin of a connector P28 and the 5 pin of the connector P5, and the 5 pin of the connector P5 is connected with the 2 pin of the chip U3.
As shown in fig. 8, the rf signal processing unit includes a chip U22, the model of the chip U22 is MCP2030-I/ST, pin 11 of the chip U22 is connected to one end of a capacitor C62 and one end of an inductor LX, pin 10 of the chip U22 is connected to one end of a capacitor C63 and one end of an inductor LY, pin 9 of the chip U22 is connected to one end of a capacitor C64 and one end of an inductor LZ, the other end of the capacitor C62, the other end of the inductor LX, the other end of a capacitor C63, the other end of the inductor LY, the other end of a capacitor C64 and the other end of the inductor LZ, pin 13 of the chip U22 is connected to one end of a capacitor C65 and one end of a resistor R73, the other end of a capacitor C65 and the other end of a resistor R73 are grounded, pin 7 and pin 8 of the chip U22 are connected to one end of a capacitor C72 and connected to a power supply VDD, and the other end of the capacitor C72 is grounded.
The radio frequency signal processing unit further comprises a chip U23, the model of the chip U23 is PIC12F508, the pin 2 of the chip U23 is connected with the pin 2 of the chip U22, the pin 3 of the chip U23 is connected with the pin 3 of the chip U22, and the pin 6 of the chip U23 is connected with the pin 6 of the chip U22.
The radio frequency signal processing unit further comprises a chip U21, the model of the chip U21 is HCS300-I/SN, pin 1 of the chip U21 is connected with pin 5 of the chip U23, pin 6 of the chip U21 is connected with one end of a resistor R72, the other end of the resistor R72 is connected with a base of a triode Q72, a collector of the triode Q72 is connected with an emitter of a triode Q71 and one end of a capacitor C71, a collector of the triode Q71 and the other end of the capacitor C71 are connected with one end of a capacitor C70 and one end of an inductor L62, a base of the triode Q71 is connected with one end of a resistor R71 and one end of a filter X41, pin 1 of the filter X41 is connected with the other end of a resistor R71, the other end of the inductor L62 and one end of an inductor L63, the other end of the inductor L63 is connected with one end of a capacitor C69 and one end of an inductor L61, the other end of the inductor L61 is connected with a VDD power supply, and the other end of the capacitor C69, and the pin 2 and pin 4 of the filter X41 are grounded.
The radio frequency signal processing unit can activate radio frequency signals, integrates a wireless signal digital sequence filtering component, can set a digital sequence according to needs, and a device responds only when receiving a specific digital sequence, so that the activation phenomenon caused by other signal interference can be effectively avoided.
As shown in fig. 9, the rf antenna unit includes a chip U7, the model of the chip U7 is TC4422, pin 2 of the chip U7 is connected to one end of a resistor R29 and pin 10 of the chip U3, pin 1 of the chip U7 is connected to one end of a capacitor C21 and one end of a capacitor C20, and is connected to a 6V _125K power supply, the other end of the capacitor C21 and the other end of the capacitor C20 are grounded, pin 8 of the chip U7 is connected to one end of a capacitor C22 and is connected to a 6V _125K power supply, the other end of the capacitor C22 is grounded, and pin 6 and pin 7 of the chip U7 are connected to pin 1 of a connector P1.
As shown in fig. 10, the limiting module includes a MOS transistor Q31, a source of the MOS transistor Q31 is connected to one end of a limiting switch button S32, one end of a limiting switch button S31, one end of a diode D33 and one end of a diode D34, the other end of the limiting switch button S32 is connected to the pin 2 of a connector P3 and the pin 6 of the connector P41, the other end of the limiting switch button S31 is connected to one end of a diode D31 and one end of a diode D32, the other end of the diode D31 is connected to the pin 3 of a connector P3 and the pin 5 of a connector P41, the other end of the diode D32 is connected to the pin 4 of a connector P41, the other end of the diode D33 is connected to the pin 2 of a connector P41, and the other end of the diode D34 is connected to the pin 3 of a connector P41.
The pin 6 of the connector P41 is connected with one end of a limit switch key S42, the pin 5 of the connector P41 is connected with one end of a diode D41, the pin 4 of the connector P41 is connected with one end of a diode D42, the other end of a diode D41 and the other end of a diode D42 are connected with one end of a limit switch key S41, the other end of a limit switch key S41 and the other end of the limit switch key S42 are connected with a pin 1 of a connector P3, the pin 3 of the connector P41 is connected with one end of a diode D43, the pin 2 of the connector P41 is connected with one end of a diode D44, the pin 1 of the connector P41, the other end of the diode D43 and the other end of the diode D44 are connected with a drain electrode of a MOS tube Q40, and a source electrode of the MOS tube Q40 is connected with the pin 1 of the connector P3.
The pin 1 of the connector P3 is connected with the source electrode of a MOS tube Q9, the drain electrode of the MOS tube Q9 is connected with one end of a diode D9, one end of a diode D10 and one end of a resistor R35, the other end of the resistor R35 is grounded, the other end of the diode D9 is connected with the pin 3 of a chip U3, and the other end of the diode D10 is connected with the pin 22 of the chip U6.
The description of the present invention has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the invention in the form disclosed. Many modifications and variations will be apparent to practitioners skilled in this art. The embodiment was chosen and described in order to best explain the principles of the invention and the practical application, and to enable others of ordinary skill in the art to understand the invention for various embodiments with various modifications as are suited to the particular use contemplated.

Claims (10)

1. The utility model provides a drive control system of intelligence lock which characterized in that: the intelligent control system comprises a password control module, a main control module, a power module, an indicator light module, a data decoding module, a driving module, a radio frequency module, a limiting module and a signal processing module, wherein the main control module is connected with the password control module, the indicator light module, the data decoding module, the driving module, the radio frequency module, the limiting module and the signal processing module;
the limiting module comprises an MOS tube Q31, the source of the MOS tube Q31 is connected with one end of a limiting switch key S32, one end of a limiting switch key S31, one end of a diode D33 and one end of a diode D34, the other end of a limiting switch key S32 is connected with the 2 pin of a connector P3 and the 6 pin of the connector P41, the other end of a limiting switch key S31 is connected with one end of a diode D31 and one end of a diode D32, the other end of the diode D31 is connected with the 3 pin of a connector P3 and the 5 pin of a connector P41, the other end of the diode D32 is connected with the 4 pin of a connector P41, the other end of the diode D33 is connected with the 2 pin of a connector P41, and the other end of a diode D34 is connected with the 3 pin of a connector P41;
a pin 6 of the connector P41 is connected with one end of a limit switch key S42, a pin 5 of the connector P41 is connected with one end of a diode D41, a pin 4 of the connector P41 is connected with one end of a diode D42, the other end of a diode D41 and the other end of a diode D42 are connected with one end of a limit switch key S41, the other ends of a limit switch key S41 and the other end of the limit switch key S42 are connected with a pin 1 of a connector P3, a pin 3 of the connector P41 is connected with one end of a diode D43, a pin 2 of the connector P41 is connected with one end of a diode D44, a pin 1 of the connector P41, the other end of the diode D43 and the other end of the diode D44 are connected with a drain electrode of a MOS tube Q40, and a source electrode of the MOS tube Q40 is connected with a pin 1 of the connector P3;
the pin 1 of the connector P3 is connected with the source electrode of a MOS tube Q9, the drain electrode of the MOS tube Q9 is connected with one end of a diode D9, one end of a diode D10 and one end of a resistor R35, the other end of the resistor R35 is grounded, the other end of the diode D9 is connected with the pin 3 of a chip U3, and the other end of the diode D10 is connected with the pin 22 of the chip U6.
2. The driving control system of an intelligent lock as recited in claim 1, wherein: the main control module comprises a chip U3 and a chip U6, the model of the chip U6 is PIC16LF1936, the model of the chip U3 is PIC16F1827, the pin 1 of the chip U6 is connected with one end of a programming isolation J2, the other end of the programming isolation J2 is connected with one end of a resistor R13, one end of a capacitor C15 and one end of a diode D1, the other end of the diode D1 and the other end of the resistor R1 are connected with a 3.3V _ main control power supply, the capacitor C1 and the pin 2 of the chip U1 are connected with a main control interface, the pin 5 of the chip U1 is connected with one end of a resistor R1, the other end of the resistor R1 is connected with a 3.3V _ main control power supply, the pin 3 of the chip U1 is connected with one end of the resistor R1 and the source of an MOS tube Q1, the other end of the resistor R1 is connected with the ground, the other end of the resistor R1 and the other end of the resistor R1 is connected with the RSSI 1, the ground of the chip U1, the resistor R1 and the other end of the resistor R1 is connected with the resistor R1, a pin 25 of a chip U6 is connected with one end of a resistor R20, a pin 24 of a chip U6 is connected with one end of a resistor R22, a pin 21 of the chip U6 is connected with one end of a resistor R24, a pin 20 of a chip U6, the other end of the resistor R20, the other end of the resistor R22 and the other end of the resistor R24 are connected with one end of a capacitor C16, one end of a resistor R14 and one end of a capacitor C17, the two ends of the capacitor C16 and the other end of the capacitor C17 are grounded, the other end of the resistor R14 is connected with one end of a password recovery key S2, and the other end of the password recovery key S2 is grounded;
a pin 1 of the chip U3 is connected with one end of a resistor R5 and one end of a capacitor C2, a pin 2 of the chip U3 is connected with one end of a resistor R6 and one end of a capacitor C3, the other end of the resistor R5, the other end of the capacitor C5, the other end of the resistor R5 and the other end of the capacitor C5 are grounded, a pin 4 of the chip U5 is connected with one end of a programming isolation J5, the other end of the programming isolation J5 is connected with one end of a resistor R5, one end of the capacitor C5 and one end of an emergency switch key S5 and connected with a motor conversion interface, the other end of the resistor R5 is connected with a 3.3V _ PKE power supply, the other end of the capacitor C5 and the other end of the emergency switch key S5 are grounded, a pin 19 of the chip U5 is connected with one end of the resistor R5, a pin 18 of the chip U5 is connected with one end of the resistor R5, a pin 17 of the chip U5 is connected with one end of the resistor R5, a pin 20 of the chip U5 is connected with one end of the capacitor C5 and one end of the capacitor C363V _ PKE power supply, and one end of the PKE 3, the other end of the power supply are connected with the PKE 3, the power supply, the other end of the capacitor C9 and the other end of the capacitor C10 are grounded, a 14 pin of the chip U3 is connected with one end of a resistor R11, a 13 pin of the chip U3 is connected with one end of a resistor R12, and the other end of the resistor R11 and the other end of the resistor R12 are grounded.
3. The driving control system of an intelligent lock as recited in claim 1, wherein: the password control module comprises a chip U16, the model of the chip U16 is WTC6212 16, the 1 pin of the chip U16 is connected with one end of a resistor R16, the other end of the resistor R16 is connected with the 7 pin of a connector P16, the 2 pin of the chip U16 is connected with one end of the resistor R16, the other end of the resistor R16 is connected with the 3 pin of the connector P16, the 3 pin of the chip U16 is connected with one end of the resistor R16, the other end of the resistor R16 is connected with the 8 pin of the connector P16, the 4 pin of the chip U16 is connected with one end of the resistor R16, the other end of the resistor R16 is connected with the 2 pin of the connector P16, the 5 pin of the chip U16 is connected with one end of the resistor R16, the other end of the resistor R16 is connected with one end of the connector P16, the 6 pin of the chip U16 is connected with one end of the connector P16, the other end of the resistor R16 is connected with the 1 pin of the connector P16, the 7 pin of the chip U16 is connected with one end of the resistor R16, the other end of the resistor R51 is connected with the 11 pin of a connector P0, the 21 pin of the chip U16 is connected with one end of a resistor R62, the other end of the resistor R62 is connected with the 5 pin of a connector P0, the 22 pin of the chip U16 is connected with one end of a resistor R61, the other end of the resistor R61 is connected with the 6 pin of a connector P0, the 23 pin of the chip U16 is connected with one end of a resistor R60, the other end of the resistor R60 is connected with the 12 pin of a connector P0, the 24 pin of the chip U16 is connected with one end of a resistor R59, and the other end of the resistor R59 is connected with the 4 pin of a connector P0;
the 20 pin of the chip U16 is connected with one end of a resistor R63, the other end of the resistor R63 is connected with a 3.8V _ main control power supply, the 19 pin of the chip U16 is connected with the 2 pin of a connector P25, the 2 pin of a connector P25 is connected with the 2 pin of a connector P5, the 2 pin of a connector P5 is connected with the 23 pin of the chip U6, the 16 pin of the chip U16 is connected with the 1 pin of a connector P24, the 1 pin of the connector P24 is connected with the 1 pin of the connector P4, the 1 pin of the connector P4 is connected with the 14 pin of the chip U4, the 15 pin of the chip U4 is connected with the 2 pin of the connector P4, the 2 pin of the connector P4 is connected with the 2 pin of the P4, the 2 pin of the connector P4 is connected with the 13 pin of the chip U4, the 14 pin of the connector U4 is connected with the 3 pin of the P4, the 3 pin of the P4 is connected with the pin of the connector P4, the connector P4 is connected with the pin of the connector P4, the connector P364 pin of the connector P connector. The 4 pins of the connector P24 are connected with the 4 pins of the connector P4, the 4 pins of the connector P4 are connected with the 11 pins of the chip U6, the 11 pins of the chip U16 are connected with the 1 pin of the connector P25 and the drain of the MOS tube Q11, the grid of the MOS tube Q11 is connected with a password dormancy control interface, the source of the MOS tube Q11 is connected with the 12 pins of the chip U16, the 1 pin of the connector P25 is connected with the 1 pin of the connector P5, and the 1 pin of the connector P5 is connected with the 11 pins of the chip U3;
the 9 feet of the chip U16 are connected with one end of a capacitor C47, the other end of the capacitor C47 is grounded, the 18 feet of the chip U16 are connected with one end of a capacitor C48, the other end of the capacitor C48 is grounded, the 17 feet of the chip U16 are connected with one end of a resistor R64, the other end of the resistor R64 is connected with the 18 feet of the chip U16 and is connected with a 3.8V _ master control power supply, the 12 feet of the chip U16 are connected with one end of a resistor R65, the other end of the resistor R65 is connected with one end of a capacitor C49 and is connected with the 3.8V _ master control power supply, and the other end of the capacitor C49 is grounded.
4. The driving control system of an intelligent lock as recited in claim 1, wherein: the data decoding module comprises a chip U1, the model of the chip U1 is TDH6300, a pin 1 of the chip U1 is connected with one end of a resistor R44 and one end of a capacitor C33 and is connected with a V3V power supply, a pin 2 of the chip U1 is connected with the other end of the resistor R44 and one end of a key S1, the other end of the key S1 is grounded, a pin 3 of the chip U1 is connected with one end of a resistor R43, the other end of the resistor R43 is connected with one end of a diode D12, the other end of the diode D12 is grounded, a pin 4 of the chip U1 is connected with one end of a resistor R45 and one end of a capacitor C34, the other end of the resistor R45 is connected with a V3V power supply, the other end of the capacitor C34 is grounded, a pin 5 of the chip U1 is connected with one end of a resistor R46, and the other end of the resistor R46 is connected with a V3V power supply;
the data decoding module further comprises a chip U8, the model of the chip U8 is I9110, the pin 7 of the chip U8 is connected with the pin 8 of the chip U1, the pin 6 of the chip U8 is connected with the pin 9 of the chip U1, the pins 2 and 3 of the chip U8 are connected with one end of a capacitor C35, and the other end of the capacitor C35 is grounded;
the data decoding module further comprises a chip U9, the model of the chip U9 is MAX741, an 8 pin of the chip U9 is connected with a 12 pin of the chip U1, one end of a resistor R47 and one end of a capacitor C36, the other end of the resistor R47 and the other end of the capacitor C36 are grounded, and a 6 pin and a 7 pin of the chip U9 are connected with a 2 pin and a 3 pin of the chip U8.
5. The driving control system of an intelligent lock as recited in claim 1, wherein: the data decoding module further comprises a chip U4 and a chip U2, the model of the chip U4 is IRF5851, the model of the chip U2 is HT7330, the 3 pin of the chip U4 is connected with one end of a resistor R41 and the 6 pin of a chip U4, the other end of the resistor R41 is connected with one end of a diode D11, one end of a capacitor Cc1 and the 2 pin of the chip U4, the other end of the capacitor Cc1 is grounded, the other end of the diode D11 is connected with the 4 pin of the chip U4, the 1 pin of the chip U4 is connected with one end of a resistor R42 and the 10 pin of the chip U1, and the other end of the resistor R42 is grounded;
the 2 feet of the chip U2 are connected with the 4 feet of the chip U4 and one end of a capacitor C31, and are connected with a V key 6V in parallel, the other end of the capacitor C31 is grounded, the 3 feet of the chip U2 are connected with one end of a capacitor C32 and are connected with a V3V power supply, and the other end of the capacitor C32 is grounded.
6. The driving control system of an intelligent lock as recited in claim 1, wherein: the signal processing module comprises an MOS tube Q5 and an MOS tube Q7, the drain electrode of the MOS tube Q5 is connected with one end of a resistor R30 and a pin 10 of a chip U6, the drain electrode of the MOS tube Q7 is connected with one end of a resistor R31 and a pin 9 of a chip U6, the source electrode of the MOS tube Q5 is connected with a pin 4 of a connector P7, the source electrode of the MOS tube Q7 is connected with a pin 1 of a connector P7, the grid electrode of the MOS tube Q5, the grid electrode of the MOA tube Q7, the other end of the resistor R30 and the other end of the resistor R31 are grounded; the signal processing module further comprises an MOS tube Q4 and an MOS tube Q6, the drain of the MOS tube Q4 is connected with one end of a resistor R28, one end of a diode D4 and one end of a diode D3, the other end of the resistor R28 is grounded with the gate of the MOS tube Q4, the other end of a diode D4 is connected with the drain of the MOS tube Q3 of the driving module, the other end of the diode D3 is connected with a pin 15 of a chip U3, the source of the MOS tube Q3 is connected with one end of the resistor R3, the other end of the resistor R3 is connected with the pin 3 of a connector P3, the drain of the MOS tube Q3 is connected with one end of the resistor R3, one end of the diode D3 and one end of the diode D3, the other end of the resistor R3 is grounded with the gate of the MOS tube Q3, the other end of the diode D3 is connected with the drain of the MOS tube Q3 of the driving module, the pin 16 of the diode D3 is connected with the connector of the chip U3;
the signal processing module further comprises a connector P27, the external sound and light control of the connector P27 is realized, 1 pin of the connector P27 is connected with 1 pin of the connector P7, 2 pins of the connector P27 are connected with 2 pins of the connector P7 and 2 pins of the two-color LED lamp D21, 3 pins of the connector P27 are connected with 3 pins of the connector P7 and 1 pin of the two-color LED lamp D21, 4 pins of the connector P27 are connected with 4 pins of the connector P7 and one end of a buzzer, and the other end of the buzzer, 3 pins of the two-color LED lamp D21 and 4 pins of the two-color LED lamp D21 are connected with 6V.
7. The driving control system of an intelligent lock as recited in claim 1, wherein: the radio frequency module comprises a radio frequency remote control transmitting unit, a radio frequency remote control receiving unit, a radio frequency antenna unit and a radio frequency signal processing unit;
the radio frequency remote control transmitting unit comprises a chip U12, wherein the model of the chip U12 is MICRF211ABQS, a crystal oscillator X21 is connected between a pin 1 and a pin 16 of the chip U12, a pin 3 of the chip U12 is connected with one end of an inductor L22 and one end of a capacitor C52, the other end of the inductor L22 is grounded, the other end of a capacitor C52 is connected with one end of a capacitor C51 and one end of an inductor L21 and is connected with a high-frequency receiving antenna interface, the other end of the capacitor C51 and the other end of the inductor L21 are grounded, a pin 5 of the chip U21 is connected with one end of a capacitor C21 and one end of the capacitor C21 and is connected with a 3.8V _ PKE power supply, the other end of the capacitor C21 and the other end of the capacitor C21 are grounded, a pin 8 of the chip U21 is connected with a pin 2 of a connector P21 and a pin 2 of the connector P21, a pin 10 of the chip U21 is connected with a pin 4 of the connector P21, and a pin 3612 of the connector P21 is connected with a capacitor C21 of the connector P21 and a connector C21 of the chip. The other end of the capacitor C55 is grounded, the pin 13 of the chip U12 is connected with one end of the capacitor C54, the other end of the capacitor C54 is grounded, the pin 14 of the chip U12 is connected with the pin 3 of the connector P25, the pin 3 of the connector P25 is connected with the pin 3 of the connector P5, and the pin 3 of the connector P5 is connected with the pin 1 of the chip U3.
8. The driving control system of an intelligent lock as recited in claim 7, wherein: the radio frequency remote control receiving unit chip U10, the model of the chip U10 is MICRF211ABQS, a crystal oscillator X11 is connected between a pin 1 and a pin 16 of the chip U10, a pin 3 of the chip U10 is connected with one end of an inductor L12 and one end of a capacitor C42, the other end of the inductor L12 is grounded, the other end of a capacitor C42 is connected with one end of a capacitor C41 and one end of an inductor L11 and is connected with a high frequency receiving antenna interface connected with the radio frequency remote control transmitting unit, the other end of a capacitor C41 and the other end of an inductor L11 are grounded, a pin 5 of the chip U10 is connected with one end of a capacitor C43 and is connected with a 3.8V _ PKE power supply, the other end of a capacitor C43 is grounded, a pin 8 of the chip U43 is connected with a pin 6 of a connector P43, a pin 10 of the chip U43 is connected with a pin 4 of the connector P43, a pin 4 of the P43 is connected with a pin 4 of the connector P43, a pin of the connector P43, and a pin 6P 43 of the connector P43 is connected with a pin 362P connector of the connector P43, the 12 pin of the chip U10 is connected with one end of a capacitor C45, the other end of the capacitor C45 is grounded, the 13 pin of the chip U10 is connected with one end of a capacitor C44, the other end of the capacitor C44 is grounded, the 14 pin of the chip U10 is connected with the 8 pin of a connector P8, the 4 pin of the connector P8 is connected with the 4 pin of a connector P28 and the 5 pin of the connector P5, and the 5 pin of the connector P5 is connected with the 2 pin of the chip U3.
9. The driving control system of an intelligent lock as recited in claim 7, wherein: the radio frequency signal processing unit comprises a chip U22, the model of the chip U22 is MCP2030-I/ST, a pin 11 of the chip U22 is connected with one end of a capacitor C62 and one end of an inductor LX, a pin 10 of the chip U22 is connected with one end of a capacitor C63 and one end of an inductor LY, a pin 9 of the chip U22 is connected with one end of a capacitor C64 and one end of an inductor LZ, the other end of the capacitor C62, the other end of the inductor LX, the other end of a capacitor C63, the other end of the inductor LY, the other end of the capacitor C64 and the other end of the inductor LZ are grounded, a pin 13 of the chip U22 is connected with one end of the capacitor C65 and one end of a resistor R73, the other end of the capacitor C65 and the other end of the resistor R73 are grounded, a pin 7 and a pin 8 of the chip U22 are connected with one end of the capacitor C72 and connected with a VDD power supply, and the other end of the capacitor C72 is grounded;
the radio frequency signal processing unit further comprises a chip U23, the model of the chip U23 is PIC12F508, the pin 2 of the chip U23 is connected with the pin 2 of the chip U22, the pin 3 of the chip U23 is connected with the pin 3 of the chip U22, and the pin 6 of the chip U23 is connected with the pin 6 of the chip U22;
the radio frequency signal processing unit further comprises a chip U21, the model of the chip U21 is HCS300-I/SN, pin 1 of the chip U21 is connected with pin 5 of the chip U23, pin 6 of the chip U21 is connected with one end of a resistor R72, the other end of the resistor R72 is connected with a base of a triode Q72, a collector of the triode Q72 is connected with an emitter of a triode Q71 and one end of a capacitor C71, a collector of the triode Q71 and the other end of the capacitor C71 are connected with one end of a capacitor C70 and one end of an inductor L62, a base of the triode Q71 is connected with one end of a resistor R71 and one end of a filter X41, pin 1 of the filter X41 is connected with the other end of a resistor R71, the other end of the inductor L62 and one end of an inductor L63, the other end of the inductor L63 is connected with one end of a capacitor C69 and one end of an inductor L61, the other end of the inductor L61 is connected with a VDD power supply, and the other end of the capacitor C69, and the pin 2 and pin 4 of the filter X41 are grounded.
10. The driving control system of an intelligent lock as recited in claim 7, wherein: the radio frequency antenna unit comprises a chip U7, the model of the chip U7 is TC4422, a pin 2 of the chip U7 is connected with one end of a resistor R29 and a pin 10 of the chip U3, a pin 1 of the chip U7 is connected with one end of a capacitor C21 and one end of a capacitor C20 and is connected with a 6V-125K power supply, the other end of the capacitor C21 and the other end of a capacitor C20 are grounded, a pin 8 of the chip U7 is connected with one end of a capacitor C22 and is connected with the 6V-125K power supply, the other end of the capacitor C22 is grounded, and a pin 6 and a pin 7 of the chip U7 are connected with a pin 1 of a connector P1.
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DE10025094A1 (en) * 2000-05-20 2001-11-22 Volkswagen Ag Motor vehicle valet parking device for executing different functions on a motor vehicle with an electrical control device uses a special key programmed by a defined operational action to restrict preset functions
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CN110821298A (en) * 2019-12-02 2020-02-21 珠海优特物联科技有限公司 Locking mechanism, lock cylinder and lockset
CN111809967A (en) * 2020-04-24 2020-10-23 南宁学院 Coded lock drive control circuit
CN112150678A (en) * 2020-11-26 2020-12-29 山东艾琳智能科技有限公司 Control system of unlocking function of intelligent lock
CN113110112A (en) * 2021-05-12 2021-07-13 南通弘铭机械有限公司 High-voltage switch running-in semi-physical simulation test system and control method

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10025094A1 (en) * 2000-05-20 2001-11-22 Volkswagen Ag Motor vehicle valet parking device for executing different functions on a motor vehicle with an electrical control device uses a special key programmed by a defined operational action to restrict preset functions
EP1376481A2 (en) * 2002-06-21 2004-01-02 Kabushiki Kaisha Tokai Rika Denki Seisakusho Electronic key system
CN110821298A (en) * 2019-12-02 2020-02-21 珠海优特物联科技有限公司 Locking mechanism, lock cylinder and lockset
CN111809967A (en) * 2020-04-24 2020-10-23 南宁学院 Coded lock drive control circuit
CN112150678A (en) * 2020-11-26 2020-12-29 山东艾琳智能科技有限公司 Control system of unlocking function of intelligent lock
CN113110112A (en) * 2021-05-12 2021-07-13 南通弘铭机械有限公司 High-voltage switch running-in semi-physical simulation test system and control method

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Denomination of invention: A drive control system of intelligent lock

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Address after: Room 301, Building 19, Weifang Jiashi Incubation Industrial Park, No. 5888 East Outer Ring Road, Hanting District, Weifang City, Shandong Province, 261100

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Address before: 261000 a1301, Weifang Internet of things Industrial Park, 9877 Jiankang East Street, Yongchun community, Qingchi street, high tech Zone, Weifang City, Shandong Province

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