CN113690289B

CN113690289B - Display substrate, preparation method thereof and display device

Info

Publication number: CN113690289B
Application number: CN202110984252.2A
Authority: CN
Inventors: 崔钊; 张楠; 张锋; 刘文渠; 吕志军; 董立文; 孟德天; 王利波; 侯东飞; 李柳青; 黄海涛; 姚琪
Original assignee: BOE Technology Group Co Ltd
Current assignee: BOE Technology Group Co Ltd
Priority date: 2021-08-25
Filing date: 2021-08-25
Publication date: 2024-05-14
Anticipated expiration: 2041-08-25
Also published as: CN113690289A

Abstract

The disclosure provides a display substrate, a preparation method thereof and a display device. The display substrate comprises a plurality of pixel island areas, a plurality of connecting bridge areas and a plurality of isolation areas, the display substrate comprises a sounding display structure layer and a cavity structure layer which are overlapped, the sounding display structure layer comprises a sounding structure layer arranged on a substrate and a display structure layer arranged on one side, far away from the substrate, of the sounding structure layer, and the cavity structure layer is arranged on one side, far away from the display structure layer, of the substrate; isolation grooves are formed in the sounding structure layer and the display structure layer of at least one isolation area. According to the display device, the isolation grooves are arranged between the pixel island areas, and can isolate sound waves propagating in the plane of the display substrate, so that the standing wave effect is prevented from affecting the screen display and the screen to generate mechanical problems.

Description

Display substrate, preparation method thereof and display device

Technical Field

The disclosure relates to the field of display technologies, and in particular, to a display substrate, a manufacturing method thereof and a display device.

Background

Sound is an important aspect of man-machine interaction between display products and users, and its role and position in display products is becoming more and more important. The traditional display product is usually to set up sound generating mechanism (e.g. speaker) alone and realize sound output, and the speaker is set up in the side of display screen, and the volume is great, and occupation space is big, and not only low frequency effect is relatively poor, influences thickness and the screen ratio of display product moreover, is unfavorable for realizing narrow frame. The screen sounding technology has the advantages of small volume, small occupied space, water resistance, dust resistance, screen occupation ratio improvement and the like, and is rapidly developed in recent years.

The research of the inventor discovers that the existing screen sounding product has the problem of display influence due to standing wave effect and has the problem of lower integration level.

Disclosure of Invention

The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

The technical problem to be solved by the embodiments of the present disclosure is to provide a display substrate, a manufacturing method thereof, and a display device, so as to solve the problems of the existing structure, such as influence on display and low integration level.

In one aspect, an embodiment of the present disclosure provides a display substrate, including a plurality of pixel island regions, a plurality of connection bridge regions, and a plurality of isolation regions, where the connection bridge regions are located between adjacent pixel island regions and configured to implement signal communication of the adjacent pixel island regions through connection lines, and the isolation regions are located between the adjacent pixel island regions except for a region where the connection bridge regions are located; the display substrate comprises a sounding display structure layer and a cavity structure layer which are overlapped on a plane perpendicular to the display substrate, wherein the sounding display structure layer comprises a sounding structure layer arranged on a substrate and a display structure layer arranged on one side of the sounding structure layer away from the substrate, and the cavity structure layer is arranged on one side of the substrate away from the display structure layer; isolation grooves are formed in the sounding structure layer and the display structure layer of at least one isolation area.

In an exemplary embodiment, the sounding structure layer of the pixel island region includes a first electrode layer disposed on the substrate, a piezoelectric layer disposed on a side of the first electrode layer away from the substrate, a second electrode layer disposed on a side of the piezoelectric layer away from the substrate, and a protective layer disposed on a side of the second electrode layer away from the substrate; the first electrode layer comprises at least one first electrode and the second electrode layer comprises at least one second electrode, the orthographic projection of the first electrode on the substrate at least partially overlapping the orthographic projection of the second electrode on the substrate.

In an exemplary embodiment, the cavity structure layer comprises a first bonding layer arranged on one side of the substrate far away from the display structure layer and a substrate layer arranged on one side of the first bonding layer far away from the substrate, wherein at least one cavity is arranged on the substrate layer, the cavity is a groove formed in one side of the substrate layer close to the substrate, or the cavity is a through hole formed in the substrate layer; the orthographic projection of the cavity on the substrate at least partially overlaps with the orthographic projection of the first electrode or the second electrode in the sound-emitting structure layer on the substrate.

In an exemplary embodiment, the cavity structure layer further includes a second adhesive layer disposed on a side of the substrate layer remote from the base, and a reflective layer disposed on a side of the second adhesive layer remote from the base.

In an exemplary embodiment, the sound-generating structural layer of the connection bridge region includes a piezoelectric layer disposed on the substrate and a protective layer disposed on a side of the piezoelectric layer away from the substrate; the display structure layer of the connecting bridge region comprises a first inorganic layer arranged on the protective layer, a first organic layer arranged on one side of the first inorganic layer away from the substrate, a connecting line arranged on one side of the first organic layer away from the substrate and a second organic layer covering the connecting line.

In an exemplary embodiment, the display structure layer of the pixel island region includes a driving structure layer disposed at a side of the sound emitting structure layer away from the substrate and a light emitting structure layer disposed at a side of the driving structure layer away from the substrate; the driving structure layer comprises a first insulating layer arranged on the protective layer, a transistor arranged on one side of the first insulating layer far away from the substrate and a second flat layer covering the transistor; the first inorganic layer of the connection bridge region and the first insulating layer of the pixel island region are arranged in the same layer, the connecting line of the connection bridge region and the source electrode and the drain electrode of the transistor of the pixel island region are arranged in the same layer, and the second organic layer of the connection bridge region and the second flat layer of the pixel island region are arranged in the same layer.

On the other hand, the embodiment of the disclosure also provides a display device, which comprises the display substrate.

In still another aspect, an embodiment of the present disclosure further provides a method for manufacturing a display substrate, where the display substrate includes a plurality of pixel island regions, a plurality of connection bridge regions, and a plurality of isolation regions, the connection bridge regions are located between adjacent pixel island regions and configured to implement signal communication of the adjacent pixel island regions through connection lines, and the isolation regions are located between the adjacent pixel island regions except for a region where the connection bridge regions are located; the preparation method comprises the following steps:

Form sound production display structure layer and cavity structure layer respectively, form sound production display structure layer and include: sequentially forming a sounding structure layer and a display structure layer which are arranged on one side, far away from the substrate, of the sounding structure layer on the substrate, wherein isolation grooves are formed in the sounding structure layer and the display structure layer of at least one isolation region;

and attaching the cavity structure layer to one side of the substrate far away from the display structure layer.

In an exemplary embodiment, form sound production structural layer and setting in proper order on the basement sound production structural layer keep away from the display structural layer of basement one side, be provided with the isolation groove on sound production structural layer and the display structural layer of at least one isolation zone, include:

forming a sounding structure layer on a substrate, wherein the sounding structure layer of the connecting bridge region and the isolation region comprises a piezoelectric layer arranged on the substrate and a protective layer arranged on one side of the piezoelectric layer far away from the substrate;

And forming a display structure layer on the sounding structure layer, and forming an isolation groove on the sounding structure layer and the display structure layer of at least one isolation region, wherein the isolation groove exposes the substrate.

In an exemplary embodiment, forming isolation grooves on the sound emitting structure layer and the display structure layer of at least one isolation region includes:

sequentially forming a first inorganic layer and a composite insulating layer on the protective layers of the connecting bridge region and the isolation region;

removing the composite insulating layer of the connecting bridge region and the isolation region through one-time patterning process to form a first groove;

Removing the first inorganic layer, the protective layer and the piezoelectric layer of the isolation region through another patterning process, and forming a second groove in the first groove;

Forming a first organic layer filling the first and second grooves;

forming a connecting line, wherein the connecting line is positioned on one side of the first organic layer of the connecting bridge region, which is far away from the substrate;

Forming a second organic layer, wherein the second organic layer covers the connecting line of the connecting bridge region;

And removing the first organic layer and the second organic layer of the isolation region to form an isolation groove, wherein the isolation groove exposes the substrate.

In an exemplary embodiment, the display structure layer of the pixel island region includes a driving structure layer disposed at a side of the sound emitting structure layer away from the substrate and a light emitting structure layer disposed at a side of the driving structure layer away from the substrate; the driving structure layer comprises a first insulating layer arranged on the protective layer, a transistor arranged on one side of the first insulating layer far away from the substrate and a second flat layer covering the transistor; the first inorganic layer of the connecting bridge area and the first insulating layer of the pixel island area are arranged in the same layer and are formed simultaneously through the same patterning process, the connecting line of the connecting bridge area and the source electrode and the drain electrode of the transistor of the pixel island area are arranged in the same layer and are formed simultaneously through the same patterning process, and the second organic layer of the connecting bridge area and the second flat layer of the pixel island area are arranged in the same layer and are formed simultaneously through the same patterning process.

In an exemplary embodiment, after forming the pixel defining layer of the light emitting structure layer, the first and second planarization layers of the isolation region are removed.

In an exemplary embodiment, forming a cavity structure layer includes:

At least one cavity is formed on the substrate layer, and the cavity is a groove or a through hole formed on the substrate layer.

In an exemplary embodiment, attaching the cavity structure layer to a side of the substrate remote from the display structure layer includes:

The substrate layer is attached to one side, far away from the display structure layer, of the substrate layer through a first bonding layer, and orthographic projection of a cavity on the substrate layer on the substrate at least partially overlaps orthographic projection of a first electrode or a second electrode in the sounding structure layer on the substrate;

and a reflecting layer is attached to one side, far away from the substrate, of the substrate layer through a second bonding layer.

The embodiment of the disclosure provides a display substrate, a preparation method thereof and a display device, wherein an isolation groove is arranged between pixel island areas, and can isolate sound waves propagating in the plane of the display substrate, so that the standing wave effect is prevented from affecting screen display and mechanical problems of a screen. The display substrate of the embodiment of the disclosure is provided with the sounding structure layer and the display structure layer on the same side of the substrate, and the display substrate is of an integrated structure and integrally prepared, so that the integration level is high, the overall thickness of a product can be reduced, and the product requirement of light and thin is met.

Other aspects will become apparent upon reading and understanding the accompanying drawings and detailed description.

Drawings

The accompanying drawings are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate and do not limit the application. The shapes and sizes of the various components in the drawings are not to scale, and are intended to illustrate the present application only.

FIG. 1 is a schematic diagram of a screen sounding television;

fig. 2 is a schematic plan view of a display substrate according to an embodiment of the disclosure;

fig. 3 is a schematic plan view of a pixel island according to an exemplary embodiment of the present disclosure;

fig. 4 is a schematic cross-sectional structure of a display substrate according to an exemplary embodiment of the present disclosure;

FIG. 5 is a schematic cross-sectional view of another display substrate according to an exemplary embodiment of the present disclosure;

FIG. 6 is a schematic diagram of a sound emitting structure layer patterned in accordance with an embodiment of the present disclosure;

FIG. 7 is a schematic diagram of a transistor film patterned according to an embodiment of the disclosure;

FIG. 8 is a schematic diagram of an embodiment of the present disclosure after forming a first groove pattern;

FIG. 9 is a schematic diagram of an embodiment of the present disclosure after forming a second groove pattern;

FIG. 10 is a schematic diagram of an embodiment of the present disclosure after forming an active via pattern;

FIG. 11 is a schematic diagram of a first flat layer pattern formed according to an embodiment of the present disclosure;

FIG. 12 is a schematic illustration of an embodiment of the present disclosure after forming a third conductive layer pattern;

FIG. 13 is a schematic diagram of a second flat layer pattern formed according to an embodiment of the present disclosure;

FIG. 14 is a schematic illustration of an embodiment of the present disclosure after anode patterning;

FIG. 15 is a schematic diagram of a pixel defining layer pattern formed according to an embodiment of the present disclosure;

FIG. 16 is a schematic illustration of an embodiment of the present disclosure after forming an isolation trench pattern;

FIG. 17 is a schematic diagram of an embodiment of the present disclosure after patterning an organic light emitting layer;

FIG. 18 is a schematic diagram of an embodiment of the present disclosure after forming a cathode pattern;

FIG. 19 is a schematic diagram of a package structure layer patterned according to an embodiment of the disclosure;

FIG. 20 is a schematic view of an embodiment of the present disclosure after attachment of a cover plate;

FIG. 21 is a schematic diagram of an embodiment of the present disclosure after patterning a substrate layer;

Fig. 22 is a schematic diagram of a bonding process according to an embodiment of the present disclosure.

Reference numerals illustrate:

1-a glass carrier plate; 10-a substrate; 20-a sounding structure layer;

21-a first electrode; 22-a piezoelectric layer; 23-a second electrode;

24-a protective layer; 30-a display structure layer; 30a—a drive structure layer;

30b—a light emitting structure layer; 30c—a packaging structure layer; 31—a first insulating layer;

32-a second insulating layer; 33-a third insulating layer; 34-a fourth insulating layer;

35—a first planar layer; 36-a second planarization layer; 40-a cavity structure layer;

41-a substrate layer; 42-cavity; 43—a first tie layer;

44-a second tie layer; 45-a reflective film; 50-sounding display structure layer;

61-anode; 62-a pixel definition layer; 63—an organic light emitting layer;

64-cathode; 80-cover plate; 81-a cover plate bonding layer;

90-isolation groove; 91-a first groove; 92-a second groove;

100-pixel island region; 101-a transistor; 102-a storage capacitor;

103-connecting lines; 200-a bridge region; 300-isolation region.

Detailed Description

For the purposes of making the objects, technical solutions and advantages of the present disclosure more apparent, embodiments of the present disclosure will be described in detail hereinafter with reference to the accompanying drawings. Note that embodiments may be implemented in a number of different forms. One of ordinary skill in the art can readily appreciate the fact that the manner and content may be varied into a wide variety of forms without departing from the spirit and scope of the present disclosure. Accordingly, the present disclosure should not be construed as being limited to the following description of the embodiments. Embodiments of the present disclosure and features of embodiments may be combined with each other arbitrarily without conflict. In order to keep the following description of the embodiments of the present disclosure clear and concise, the present disclosure omits a detailed description of some known functions and known components. The drawings of the embodiments of the present disclosure relate only to the structures related to the embodiments of the present disclosure, and other structures may be referred to in general

The scale of the drawings in this disclosure may be referred to in the actual process, but is not limited thereto. For example: the width-to-length ratio of the channel, the thickness and the spacing of each film layer, and the width and the spacing of each signal line can be adjusted according to actual needs. The number of pixels in the display substrate and the number of sub-pixels in each pixel are not limited to the number shown in the drawings, the drawings described in the present disclosure are only schematic structural drawings, and one mode of the present disclosure is not limited to the shapes or values shown in the drawings, etc.

The ordinal numbers of "first", "second", "third", etc. in the present specification are provided to avoid mixing of constituent elements, and are not intended to be limited in number.

In the present specification, for convenience, words such as "middle", "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, which indicate an azimuth or a positional relationship, are used to describe positional relationships of constituent elements with reference to the drawings, only for convenience of description and simplification of the description, and do not indicate or imply that the apparatus or elements referred to must have a specific azimuth, be configured and operated in a specific azimuth, and thus are not to be construed as limiting the present disclosure. The positional relationship of the constituent elements is appropriately changed according to the direction in which the respective constituent elements are described. Therefore, the present invention is not limited to the words described in the specification, and may be appropriately replaced according to circumstances.

In this specification, the terms "mounted," "connected," and "connected" are to be construed broadly, unless explicitly stated or limited otherwise. For example, it may be a fixed connection, a removable connection, or an integral connection; may be a mechanical connection, or an electrical connection; may be directly connected, or indirectly connected through intermediate members, or may be in communication with the interior of two elements. The specific meaning of the terms in this disclosure will be understood by those of ordinary skill in the art in the specific context.

In this specification, a transistor means an element including at least three terminals of a gate electrode, a drain electrode, and a source electrode. The transistor has a channel region between a drain electrode (a drain electrode terminal, a drain region, or a drain electrode) and a source electrode (a source electrode terminal, a source region, or a source electrode), and a current can flow through the drain electrode, the channel region, and the source electrode. Note that in this specification, a channel region refers to a region through which current mainly flows.

In this specification, the first electrode may be a drain electrode, the second electrode may be a source electrode, or the first electrode may be a source electrode and the second electrode may be a drain electrode. In the case of using a transistor having opposite polarity, or in the case of a change in the direction of current during circuit operation, the functions of the "source electrode" and the "drain electrode" may be interchanged. Therefore, in this specification, "source electrode" and "drain electrode" may be exchanged with each other.

In this specification, "electrically connected" includes a case where constituent elements are connected together by an element having some electric action. The "element having a certain electric action" is not particularly limited as long as it can transmit and receive an electric signal between the constituent elements connected. Examples of the "element having some electric action" include not only an electrode and a wiring but also a switching element such as a transistor, a resistor, an inductor, a capacitor, other elements having various functions, and the like.

In the present specification, "parallel" means a state in which two straight lines form an angle of-10 ° or more and 10 ° or less, and therefore, a state in which the angle is-5 ° or more and 5 ° or less is also included. The term "perpendicular" refers to a state in which the angle formed by two straight lines is 80 ° or more and 100 ° or less, and thus includes a state in which the angle is 85 ° or more and 95 ° or less.

In this specification, "film" and "layer" may be exchanged with each other. For example, the "conductive layer" may be sometimes replaced with a "conductive film". In the same manner, the "insulating film" may be replaced with the "insulating layer" in some cases.

The triangle, rectangle, trapezoid, pentagon or hexagon, etc. in this specification are not strictly defined, but may be approximated to triangle, rectangle, trapezoid, pentagon or hexagon, etc., and there may be some small deformation due to tolerance, and there may be lead angles, arc edges, deformation, etc.

The term "about" in this disclosure refers to values that are not strictly limited to the limits, but are allowed to fall within the limits of the process and measurement errors.

Fig. 1 is a schematic diagram of a structure of a screen sounding television. As shown in fig. 1, the main structure of the screen sounding television comprises a display device a and two sounding devices B, wherein one sounding device B is arranged at a first position of a left side area of the display device a, the other sounding device B is arranged at a second position of a right side area of the display device a, and the two sounding devices B respectively excite the screen to vibrate and sound at two positions. The present inventors have found that when a screen at a first position and a screen at a second position vibrate simultaneously, in addition to pushing air to vibrate to make a sound, vibration waves at the two positions propagate in the screen, when the vibration waves at the two positions meet at an intermediate position, superposition of two rows of vibration waves occurs, and superposition of two vibration waves traveling at the same frequency but in opposite directions generates a standing wave effect, so that the amplitude and energy at the intermediate position are greatly enhanced, not only the display effect of the screen, such as waviness, etc., can be affected, but also mechanical problems of the screen, such as screen deformation, can occur. In addition, the existing screen sounding product is usually provided with a display structure and a sounding structure part respectively, and then the display structure and the sounding structure part are attached together, so that the integration level of the product is low, the whole thickness is thick, and the requirements of light and thin are not facilitated.

In order to solve the problems of low influence on display and integration level and the like of the existing structure, the exemplary embodiment of the disclosure provides a display substrate, which comprises a plurality of pixel island regions, a plurality of connecting bridge regions and a plurality of isolation regions, wherein the connecting bridge regions are positioned between adjacent pixel island regions and are configured to realize signal communication of the adjacent pixel island regions through connecting wires, and the isolation regions are positioned between the adjacent pixel island regions except for the regions where the connecting bridge regions are positioned; the display substrate comprises a sounding display structure layer and a cavity structure layer which are overlapped on a plane perpendicular to the display substrate, wherein the sounding display structure layer comprises a sounding structure layer arranged on a substrate and a display structure layer arranged on one side of the sounding structure layer away from the substrate, and the cavity structure layer is arranged on one side of the substrate away from the display structure layer; isolation grooves are provided on the sound emitting structure layer and the display structure layer of at least one isolation region, the isolation grooves being configured to block propagation of sound waves within the display substrate.

In an exemplary embodiment, the isolation groove may be used as a physical dividing unit, and a physical separation is formed between the sound generating units, so that the vibration waves generated by the sound generating units stop propagating when propagating to the isolation groove, thereby avoiding the standing wave effect (resonance phenomenon) generated by superposition of the vibration waves, avoiding the influence of the standing wave effect on the screen display effect, and avoiding the generation of the screen mechanics problem due to the standing wave effect.

Fig. 2 is a schematic plan view of a display substrate according to an embodiment of the disclosure. As shown in fig. 2, the body structure of the display substrate according to the embodiment of the present disclosure may include a plurality of pixel island regions 100 distributed in an array and spaced apart from each other, and at least one connection bridge region 200 and at least one isolation region 300 between adjacent pixel island regions 100.

In an exemplary embodiment, the pixel island regions 100 are configured to realize image display, the connection bridge regions 200 between adjacent pixel island regions 100 are configured to realize signal communication of the adjacent pixel island regions 100 through connection lines, and the isolation regions 300 between the adjacent pixel island regions 100 are configured to block propagation of sound waves in the plane of the display substrate by providing isolation grooves. In an exemplary embodiment, in the region between adjacent pixel island regions 100, the isolation region 300 may be a region other than the region where the connection bridge region 200 is located.

In an exemplary embodiment, the display substrate may be an organic light emitting diode display substrate or a quantum dot light emitting diode display substrate. Organic LIGHT EMITTING Diodes (OLED) and Quantum-dot LIGHT EMITTING Diodes (QLED) are active light emitting display devices, and have advantages of self-luminescence, wide viewing angle, high contrast ratio, low power consumption, extremely high reaction speed, light weight, flexibility, low cost, and the like. With the continuous development of Display technology, a Flexible Display device (Flexible Display) using an OLED or a QLED as a light emitting device and a thin film transistor (Thin Film Transistor, abbreviated as TFT) for signal control has become a mainstream product in the current Display field.

Fig. 3 is a schematic plan view of a pixel island according to an exemplary embodiment of the disclosure, taking an OLED display device as an example. As shown in fig. 3, the pixel island region 100 may include at least one pixel unit P, and the pixel unit P may include a first sub-pixel P1 emitting light of a first color, a second sub-pixel P2 emitting light of a second color, and a third sub-pixel P3 emitting light of a third color, and the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 each include a pixel driving circuit and a light emitting device. The pixel driving circuits in the first, second and third sub-pixels P1, P2 and P3 are respectively connected to the scan signal line, the data signal line and the light emitting signal line, and the pixel driving circuits are configured to receive the data voltage transmitted by the data signal line and output a corresponding current to the light emitting device under the control of the scan signal line and the light emitting signal line. The light emitting devices in the first, second and third sub-pixels P1, P2 and P3 are respectively connected to the pixel driving circuits of the sub-pixels, and the light emitting devices are configured to emit light of corresponding brightness in response to the current output from the pixel driving circuits of the sub-pixels.

In an exemplary embodiment, the first subpixel P1 may be a red (R) subpixel, the second subpixel P2 may be a green (G) subpixel, the third subpixel P3 may be a blue (B) subpixel, the three subpixels may be rectangular, diamond-shaped, pentagonal, or hexagonal in shape, and the three subpixels may be arranged in a horizontal, vertical, or delta manner. In some possible embodiments, the pixel unit may include four sub-pixels, and the four sub-pixels may be arranged in a horizontal juxtaposition, a vertical juxtaposition, a Square (Square) or a Diamond (Diamond), etc., which is not limited herein.

In an exemplary embodiment, the shape of the pixel island 300 may be rectangular or square in a plane parallel to the display substrate, and corners of the rectangle or square may be provided with arc-shaped chamfers, which is not limited herein. In an exemplary embodiment, the width of the pixel island 300 may be about 300 μm to 800 μm.

In an exemplary embodiment, the shape of the connection bridge region 200 may include any one or more of the following in a plane parallel to the display substrate: the shape of the "L" or the plurality of "L" shapes, the shape of the "Z" or the plurality of "Z" shapes, are not limited herein. In an exemplary embodiment, the width of the connection bridge region 200 may be about 40 μm to 100 μm.

In an exemplary embodiment, at least one isolation region 300 may be provided with an isolation groove, a structural film layer in the isolation groove is removed, and the isolation groove is configured to block sound waves propagating in a plane of the display substrate, so as to avoid standing wave effects caused by superposition of vibration waves traveling in the same frequency but in opposite directions, avoid influencing a screen display effect due to the standing wave effects, and avoid generating a screen mechanical problem due to the standing wave effects.

In an exemplary embodiment, the shape of the isolation groove may include any one of the following in a plane parallel to the display substrate: the shape of the "I" or the plurality of "I" shapes, the shape of the "T" or the plurality of "T" shapes, the shape of the "L" or the plurality of "L" shapes, the disclosure is not limited herein. In an exemplary embodiment, the isolation trench may have a width of about 10 μm to 100 μm. For example, the width of the isolation trench may be about 10 μm to 20 μm.

Fig. 4 is a schematic cross-sectional structure of a display substrate according to an exemplary embodiment of the present disclosure. As shown in fig. 4, the display substrate may include a pixel island region 100, a connection bridge region 200, and an isolation region 300 between the pixel island region 100 and the connection bridge region 200. The main structure of the display substrate may include the cavity structure layer 40 and the sound emitting display structure layer 50 stacked on a plane perpendicular to the display substrate. In an exemplary embodiment, the sounding display structure layer 50 may include the sounding structure layer 20 disposed on the substrate 10 and the display structure layer 30 disposed on a side of the sounding structure layer 20 away from the substrate 10, and the cavity structure layer 40 may be disposed on a side of the substrate 10 away from the display structure layer 30, so as to form an integrally structured and integrally prepared screen sounding display substrate, which not only has a higher integration level, but also can reduce the overall thickness of the product and realize the product requirement of light and thin.

In an exemplary embodiment, at least one isolation region 300 may be provided with at least one isolation groove 90, the sounding structure layer 20 and the display structure layer 30 in the isolation groove 90 may be removed, and the surface of the substrate 10 may be exposed, so that the isolation groove 90 may be used as a physical dividing unit, and a physical separation is formed between the sounding units, so that the propagation of the vibration wave generated by the sounding units is stopped when the vibration wave propagates to the isolation groove 90, thereby avoiding the standing wave effect (resonance phenomenon) generated due to the superposition of the vibration wave, avoiding the influence on the screen display effect due to the standing wave effect, and avoiding the occurrence of the screen mechanics problem due to the standing wave effect.

Fig. 5 is a schematic cross-sectional structure of another display substrate according to an exemplary embodiment of the present disclosure. As shown in fig. 5, the display substrate may include a sounding structure layer 20 disposed on the base 10 and a display structure layer 30 disposed on the sounding structure layer 20 on a plane perpendicular to the display substrate, and the cavity structure layer 40 may be disposed on a side of the base 10 remote from the display structure layer 30.

In an exemplary embodiment, the display substrate may include a cover plate 80 disposed at a side of the display structure layer 30 remote from the base, and the cover plate 80 may be attached to the display structure layer 30 through a cover plate adhesive layer 81.

In an exemplary embodiment, the sound emitting structure layer 20 of the pixel island region 100 may include a first electrode layer disposed on the substrate 10, a piezoelectric layer disposed on a side of the first electrode layer away from the substrate, a second electrode layer disposed on a side of the piezoelectric layer away from the substrate, and a protective layer disposed on a side of the second electrode layer away from the substrate, the piezoelectric layer being configured to generate mechanical vibration by the first electrode layer and the second electrode layer to generate sound waves.

In an exemplary embodiment, the display structure layer 30 of the pixel island region 100 may include a driving structure layer disposed at a side of the sound emitting structure layer 20 remote from the substrate, a light emitting structure layer disposed at a side of the driving structure layer remote from the substrate, and a package structure layer disposed at a side of the light emitting structure layer remote from the substrate.

In an exemplary embodiment, the cavity structure layer 40 may include a first adhesive layer disposed at a side of the substrate 10 remote from the display structure layer 30, a substrate layer disposed at a side of the first adhesive layer remote from the substrate, a second adhesive layer disposed at a side of the substrate layer remote from the substrate, and a reflective layer disposed at a side of the second adhesive layer remote from the substrate.

In an exemplary embodiment, the isolation trench 90 may be disposed at the at least one isolation region 300, and the isolation trench 90 may expose the substrate 10.

In an exemplary embodiment, the first electrode layer may include at least one first electrode, the second electrode layer may include at least one second electrode, a front projection of the first electrode on the substrate at least partially overlaps a front projection of the second electrode on the substrate, and the first and second electrodes and the piezoelectric layer between the first and second electrodes constitute a piezoelectric sounding unit generating an acoustic wave.

In an exemplary embodiment, at least one cavity may be disposed on the substrate layer, and the cavity may be a groove formed on a side of the substrate layer near the base, or may be a through hole formed on the substrate layer. The orthographic projection of the cavity on the substrate at least partially overlaps with the orthographic projection of the piezoelectric sound emitting unit on the substrate in the sound emitting structure layer, the cavity being configured to propagate sound waves generated by the piezoelectric sound emitting unit.

In an exemplary embodiment, the sound emitting structure layer of the connection bridge region 200 may include a piezoelectric layer disposed on the substrate 10 and a protective layer disposed on a side of the piezoelectric layer remote from the substrate. The display structure layer of the connection bridge region 200 may include a first inorganic layer disposed on the protective layer, a first organic layer disposed on a side of the first inorganic layer away from the substrate, a connection line disposed on a side of the first organic layer away from the substrate, and a second organic layer covering the connection line.

In an exemplary embodiment, the driving structure layer of the pixel island region 100 may include a first insulating layer disposed on the sound emitting structure layer 20, a transistor disposed at a side of the first insulating layer remote from the substrate, and a second flat layer covering the transistor.

In an exemplary embodiment, the first inorganic layer of the connection bridge region 200 may be disposed in the same layer as the first insulating layer of the pixel island region 100 and formed simultaneously through the same patterning process, the connection line of the connection bridge region 200 is disposed in the same layer as the source and drain electrodes of the transistor of the pixel island region 100 and formed simultaneously through the same patterning process, and the second organic layer of the connection bridge region 200 is disposed in the same layer as the second planarization layer of the pixel island region 100 and formed simultaneously through the same patterning process.

The display substrate is provided by the exemplary embodiment of the disclosure, the isolation groove is arranged in the isolation area, and the sounding structure layer and the display structure layer in the isolation groove are removed, so that the isolation groove can block sound waves propagating in the plane of the display substrate, and the standing wave effect is prevented from affecting the screen display and the screen to generate mechanical problems. The display substrate of the embodiment of the disclosure is provided with the sounding structure layer and the display structure layer on the same side of the substrate, and the display substrate is of an integrated structure and integrally prepared, so that the integration level is high, the overall thickness of a product can be reduced, and the product requirement of light and thin is met.

An exemplary description will be made below by a manufacturing process of the display substrate. The "patterning process" referred to in this disclosure includes, for metallic materials, inorganic materials, or transparent conductive materials, processes such as photoresist coating, mask exposure, development, etching, photoresist stripping, and the like, and for organic materials, processes such as organic material coating, mask exposure, and development, and the like. The deposition may be any one or more of sputtering, evaporation, chemical vapor deposition, coating may be any one or more of spraying, spin coating, and ink jet printing, and etching may be any one or more of dry etching and wet etching, without limitation of the disclosure. "film" refers to a layer of film formed by depositing, coating, or other process a material on a substrate. The "film" may also be referred to as a "layer" if the "film" does not require a patterning process throughout the fabrication process. If the "thin film" requires a patterning process throughout the fabrication process, it is referred to as a "thin film" prior to the patterning process, and as a "layer" after the patterning process. The "layer" after the patterning process includes at least one "pattern". The term "a and B are arranged in the same layer" in the present disclosure means that a and B are formed simultaneously by the same patterning process, and the "thickness" of the film layer is the dimension of the film layer in the direction perpendicular to the display substrate. In the exemplary embodiments of the present disclosure, "the orthographic projection of B is within the range of the orthographic projection of a" or "the orthographic projection of a includes the orthographic projection of B" means that the boundary of the orthographic projection of B falls within the boundary range of the orthographic projection of a or the boundary of the orthographic projection of a overlaps with the boundary of the orthographic projection of B.

The manufacturing process of the display substrate of the exemplary embodiment of the disclosure may include three parts, namely, preparation of a sounding display structure layer, preparation of a cavity structure layer and lamination treatment. The preparation of the sounding display structural layer and the preparation of the cavity structural layer have no sequence requirement, can be performed simultaneously, and the lamination treatment is performed after the preparation of the sounding display structural layer and the preparation of the cavity structural layer are completed. The preparation process of the three parts is respectively described below.

Preparation of the first part, sounding display Structure layer

In an exemplary embodiment, the process of preparing the sound emitting display structure layer may include the following operations.

(1) A substrate is prepared. In an exemplary embodiment, the substrate may include a flexible material layer, a first inorganic material layer, and a second inorganic material layer stacked on the glass carrier, the flexible material layer may be made of Polyimide (PI), polyethylene terephthalate (PET), or a surface-treated polymer flexible film, the first and second inorganic material layers may be made of silicon nitride (SiNx) or silicon oxide (SiOx), etc., may be a single-layer structure, or may be a multi-layer structure, the first inorganic material layer may be referred to as a Barrier (Barrier) layer, the second inorganic material layer may be referred to as a Buffer (Buffer) layer, and the provision of the first and second inorganic material layers in the substrate may improve the water-oxygen resistance of the substrate, prevent water and oxygen from being immersed into the display structure layer from below the flexible material layer, affecting the electrical characteristics of the transistor and the light emitting characteristics of the organic light emitting layer.

In an exemplary embodiment, the preparation process of the substrate may include: firstly, coating a flexible material layer on a glass carrier plate, and forming the flexible material layer after curing and film forming; subsequently depositing a first inorganic material film on the flexible material layer to form a first inorganic material layer (Barrier layer) covering the flexible material layer; and then depositing a second inorganic material film on the first inorganic material layer to form a second inorganic material layer (Buffer layer) covering the first inorganic material layer, thereby completing the preparation of the substrate.

After this process, the pixel island 100, the bridge region 200, and the isolation region 300 all include a substrate disposed on a glass carrier.

(2) And preparing a sound-producing structural layer pattern on the substrate. In an exemplary embodiment, preparing the sound emitting structure layer pattern may include:

A first metal thin film is deposited on the substrate 10, and patterned through a patterning process to form a first electrode layer pattern disposed on the second inorganic material layer of the substrate 10, which may be located at the pixel island region 100, and may include a plurality of first electrodes 21 disposed at intervals. In this patterning process, the first metal film connecting the bridge region 200 and the isolation region 300 is etched away.

Subsequently, a piezoelectric material solution system is coated, and a piezoelectric material film with certain piezoelectric properties is formed by heat curing treatment, crystallization (high temperature) treatment and polarization treatment under a high-voltage electric field in sequence, and is patterned by a patterning process to form a piezoelectric layer 22 pattern covering the first conductive layer pattern.

In an exemplary embodiment, the material of the piezoelectric layer may be an organic piezoelectric material, or may be a composite piezoelectric material of an organic piezoelectric material and an inorganic piezoelectric material. The organic piezoelectric material may be polyvinylidene fluoride (Polyvinylidene Fluoride, PVDF for short), binary polymer or ternary polymer, and the composite piezoelectric material may be a composite piezoelectric material composed of piezoelectric ceramics, and the like.

In an exemplary embodiment, the patterning of the thin film of piezoelectric material is etching away the piezoelectric layer in areas outside the display area (e.g., the bonding areas) so as not to interfere with the subsequent bonding process. In the present patterning process, the connection bridge region 200 and the isolation region 300 remain thin films of piezoelectric material.

Subsequently, a second metal film is deposited, and the second metal film is patterned through a patterning process to form a second electrode layer pattern disposed on the piezoelectric layer 22, which may be located at the pixel island region 100, and which may include a plurality of second electrodes 23 disposed at intervals. In this patterning process, the second metal film connecting the bridge region 200 and the isolation region 300 is etched away.

Subsequently, a protective film is coated, and a protective layer 24 covering the second conductive layer is formed after curing treatment. In the present patterning process, the connection bridge region 200 and the isolation region 300 remain with the protection layer 24.

In an exemplary embodiment, the front projection of the first electrode 21 onto the substrate at least partially overlaps the front projection of the second electrode 23 onto the substrate.

In an exemplary embodiment, the front projection of the first electrode 21 on the substrate is located within the range of the front projection of the second electrode 23 on the substrate, or the front projection of the second electrode 23 on the substrate is located within the range of the front projection of the first electrode 21 on the substrate, i.e. the positions of the first electrode 21 and the second electrode 23 are in one-to-one correspondence and opposite each other, so that the first electrode 21, the piezoelectric layer 22 and the second electrode 23 having overlapping areas constitute a piezoelectric sounding unit for generating sound waves, and the piezoelectric layer 22 generates mechanical vibration under the effect of the potential difference of the first electrode 21 and the second electrode 23, causing the film layer above the piezoelectric layer 22 to vibrate, thereby sounding.

In an exemplary embodiment, the first electrode 21 may be a receiving electrode (Rx), the second electrode 23 may be a transmitting electrode (Tx), or the first electrode 21 may be a transmitting electrode (Tx), and the second electrode 23 may be a receiving electrode (Rx).

In an exemplary embodiment, the material of the protective layer 24 may be an organic material such as a Resin (Resin) having a dielectric constant of about 3, or the like. The protective layer 24 may serve at least two purposes: firstly, as a flat layer, the sounding structure layer has a relatively flat surface, so that the subsequent preparation is facilitated. And secondly, an insulating layer is used for forming an insulating structure between the electrode of the sounding structure layer and the transistor of the driving structure layer, so that when the sounding structure layer with the sandwich structure is excited by an electric signal, a capacitor is formed between the second electrode and the electrode of the transistor, and the electric characteristics of the transistor are affected.

After this process, the pixel island 100 may include a sounding structure layer 20 disposed on the substrate 10, where the sounding structure layer 20 may include the substrate 10 disposed on the glass carrier 1, a first electrode layer disposed on the substrate 10 and including a plurality of first electrodes 21, a piezoelectric layer 22 disposed on the first electrode layer, a second electrode layer disposed on the piezoelectric layer 22 and including a plurality of second electrodes 23, and a protective layer 24 covering the second electrode layer. The connection bridge region 200 and the isolation region 300 may include a substrate 10 disposed on the glass carrier plate 1, a piezoelectric layer 22 disposed on the substrate 10, and a protective layer 24 covering the piezoelectric layer 22, as shown in fig. 6, and fig. 6 is a cross-sectional view taken along A-A in fig. 2.

(3) A transistor film layer pattern is prepared on a substrate. In an exemplary embodiment, preparing the transistor film layer pattern may include:

A first insulating film and a semiconductor film are sequentially deposited on a substrate on which the foregoing patterns are formed, the semiconductor film is patterned by a patterning process to form a first insulating layer 31 covering the protective layer, and a semiconductor layer pattern disposed on the first insulating layer 31, the semiconductor layer pattern including at least a first active layer. In the present patterning process, the semiconductor film connecting the bridge region 200 and the isolation region 300 is etched away, leaving the first insulating film.

Subsequently, a second insulating film and a first conductive film are sequentially deposited, the first conductive film is patterned by a patterning process, a second insulating layer 32 covering the semiconductor layer pattern is formed, and a first conductive layer pattern including at least a first gate electrode and a first plate is disposed on the second insulating layer 32. In the present patterning process, the first conductive film connecting the bridge region 200 and the isolation region 300 is etched away, and the second insulating film remains.

Subsequently, a third insulating film and a second conductive film are sequentially deposited, the second conductive film is patterned by a patterning process, a third insulating layer 33 covering the first conductive layer is formed, and a second conductive layer pattern is disposed on the third insulating layer 33, the second conductive layer pattern at least includes a second polar plate, and an orthographic projection of the second polar plate on the substrate at least partially overlaps an orthographic projection of the first polar plate on the substrate. In the present patterning process, the second conductive film connecting the bridge region 200 and the isolation region 300 is etched away, leaving the third insulating film.

Thus, a transistor film pattern is prepared. The transistor film layer of the pixel island 100 may include a first insulating layer, a semiconductor layer, a second insulating layer, a first conductive layer, a third insulating layer, and a second conductive layer stacked, and the transistor film layer connecting the bridge region 200 and the isolation region 300 may include a first insulating layer 31, a second insulating layer 32, and a third insulating layer 33 stacked, as shown in fig. 7, fig. 7 being a cross-sectional view in A-A direction of fig. 2.

(4) Forming a groove pattern. In an exemplary embodiment, forming the groove pattern may include: a fourth insulating film is deposited on the substrate on which the foregoing pattern is formed, forming a fourth insulating layer 34 covering the second conductive layer. A photoresist layer is then coated, exposed and developed through a mask to form a photoresist pattern, the photoresist is covered on the fourth insulating layer 34 of the pixel island 100, and the photoresist connecting the bridge region 200 and the isolation region 300 is removed to expose the surface of the fourth insulating layer 34. After the first recess 91 is formed by the etching process, the remaining photoresist is stripped. The first recess 91 may be located in the connection bridge region 200 and the isolation region 300, and the fourth insulating layer 34, the third insulating layer 33, and the second insulating layer 32 within the first recess 91 are etched away to expose the surface of the first insulating layer 31, as shown in fig. 8, which is a cross-sectional view in A-A direction of fig. 2.

In an exemplary embodiment, the first insulating layer 31 of the connection bridge region 200 may serve as a first inorganic layer of the region, and the second, third, and fourth insulating layers 32, 33, and 34 of the connection bridge region 200 serve as composite insulating layers of the region, so that the first inorganic layer of the connection bridge region 200 is disposed in the same layer as the first insulating layer 31 of the pixel island region 100 and is simultaneously formed through the same patterning process.

A photoresist layer is then coated, exposed and developed through a mask to form a photoresist pattern, and the fourth insulating layer 34 of the pixel island 100 and the first insulating layer 31 of the connection bridge region 200 are covered with photoresist, and the photoresist of the isolation region 300 is removed to expose the surface of the first insulating layer 31.

The second recess 92 is formed by an etching process and the remaining photoresist is stripped. The second recess 92 may be located in the isolation region 300, i.e., the second recess 92 is located in the first recess 91, and the first insulating layer 31, the protective layer 24 and the piezoelectric layer 22 in the second recess 92 are etched away to expose the surface of the substrate 10, as shown in fig. 9, and fig. 9 is a cross-sectional view in the direction A-A in fig. 2.

In an exemplary embodiment, the second recess 92 may etch away a portion of the thickness of the substrate 10. For example, the second recess 92 may etch away a second inorganic material layer (Buffer) in the substrate 10, the second recess 92 exposing the first inorganic material layer of the substrate 10. As another example, the second recess 92 may etch away the second inorganic material layer (Buffer layer) and the first inorganic material layer (Barrier layer) in the substrate 10, and the second recess 92 exposes the flexible material layer of the substrate 10, which is not limited herein.

In an exemplary embodiment, the Process of forming the first recess 91 may be referred to as a first etching Process (EP 1 for short), and the Process of forming the second recess 92 may be referred to as a second etching Process (EP 2 for short).

In an exemplary embodiment, the processing of EP1 and EP2 may be performed in synchronization with the processing of the bending region of the bonding region in the display substrate. In an exemplary embodiment, the bonding region in the display substrate is provided with a bending region configured to bend the bonding region to the back side of the display substrate. The bending region is formed with a groove by a patterning process of the first MASK (Etch Bending A MASK, abbreviated as EBA MASK) and a patterning process of the second MASK (Etch Bending B MASK, abbreviated as EBB MASK) to reduce the thickness of the bending region. In the present disclosure, the process of EP1 may be performed in synchronization with the process of EBA MASK, and the process of EP2 may be performed in synchronization with the process of EBB MASK while corresponding grooves are formed in the isolation region 300 and the inflection region.

(5) An active via pattern is formed. In an exemplary embodiment, forming the active via pattern may include: the fourth insulating layer 34 is patterned by a patterning process, at least two active vias K1 are formed on the fourth insulating layer 34, the two active vias K1 are located in the pixel island region 100, the fourth insulating layer 34, the third insulating layer 33 and the second insulating layer 32 in the two active vias K1 are etched away, and both ends of the first active layer are exposed, as shown in fig. 10, and fig. 10 is a cross-sectional view in A-A direction in fig. 2.

(6) A first planarization layer pattern is formed. In an exemplary embodiment, forming the first planarization layer pattern may include: a first flat film is coated on the substrate on which the foregoing pattern is formed, and a first flat layer 35 filling the first and second grooves 91 and 92 is formed as shown in fig. 11, and fig. 11 is a cross-sectional view in A-A direction of fig. 2.

In an exemplary embodiment, the first planarization layer 35 is located at the connection bridge region 200 and the isolation region 300 as a first organic layer. The first planarization layer 35 located in the connection bridge region 200 fills the first groove 91, the first planarization layer 35 located in the isolation region 300 fills the second groove 92, and a surface of the first planarization layer 35 of the connection bridge region 200 on a side away from the substrate and a surface of the first planarization layer 35 of the isolation region 300 on a side away from the substrate may be flush. In an exemplary embodiment, the first planarization film of the pixel island 100 is entirely removed, and the surface of the first planarization layer 35 of the isolation region 300 on the side close to the pixel island 100 away from the substrate and the surface of the fourth insulation layer 34 of the pixel island 100 on the side close to the isolation region 300 away from the substrate may be flush.

(7) And forming a third conductive layer pattern. In an exemplary embodiment, forming the third conductive layer pattern may include: depositing a third conductive film on the substrate with the patterns, and patterning the third conductive film through a patterning process to form a third conductive layer pattern, wherein the third conductive layer pattern at least comprises: the first source electrode and the first drain electrode located in the pixel island region 100, and the plurality of connection lines 103 located in the connection bridge region 200 are shown in fig. 12, and fig. 12 is a cross-sectional view in the A-A direction of fig. 2.

In an exemplary embodiment, the first source electrode and the first drain electrode of the pixel island region 100 are disposed in the same layer as the plurality of connection lines 103 connecting the bridge region 200, and are simultaneously formed through the same patterning process. The first source electrode and the first drain electrode located in the pixel island region 100 are disposed on the fourth insulating layer 34, the first drain electrode is connected to one end of the first active layer through one active via K1, and the first drain electrode is connected to the other end of the first active layer through the other active via K1. The plurality of connection lines 103 located in the connection bridge region 200 are disposed on the first planarization layer 35, and the plurality of connection lines 103 are disposed at intervals. In this patterning process, the third conductive film of the isolation region 300 is etched away.

In an exemplary embodiment, the pixel island region 100 is peripherally formed with two-directional (row and column direction) connection bridge regions 200, and connection lines of one-directional connection bridge region 200 may include at least a power connection line and a data connection line, and connection lines of the other-directional connection bridge region 200 may include at least a scan connection line and a light emission control line. Only one direction of connection lines connecting the bridge regions 200 is illustrated in fig. 12, and the connection lines may be formed in the same layer as the data signal lines and by the same patterning process. The connection line of the connection bridge region of the other direction may be the same layer as the first conductive layer or the second conductive layer and formed by the same patterning process.

(8) A second flat layer pattern is formed. In an exemplary embodiment, forming the second flat layer pattern may include: a second flat film is coated on the substrate on which the foregoing pattern is formed, and a second flat layer 36 is formed to cover the third conductive layer pattern, as shown in fig. 13, fig. 13 being a sectional view in the A-A direction of fig. 2.

In an exemplary embodiment, at least the connection via K2 is formed on the second planarization layer 36 located in the pixel island 100, and the second planarization layer 36 within the connection via K2 is removed to expose the surface of the first drain electrode. The second planarization layer 36 located at the connection bridge region 200 is disposed on the first planarization layer 35, and the second planarization layer 36 located at the isolation region 300 serves as a second organic layer covering the plurality of connection lines 103.

Thus, the driving structure layer 30A pattern is completed. The driving structure layer 30A of the pixel island region 100 may include a first insulating layer 31, a semiconductor layer, a second insulating layer 32, a first conductive layer, a third insulating layer 33, a second conductive layer, a fourth insulating layer 34, a second conductive layer, and a second flat layer 36 stacked on the sound emitting structure layer 20, the semiconductor layer, the first conductive layer, the second conductive layer, and the second conductive layer constitute a first transistor 101 and a storage capacitor 102 of the pixel driving circuit, the first transistor 101 may include a first active layer, a first gate electrode, a first source electrode, and a first drain electrode, and the storage capacitor 102 may include a first plate and a second plate. The driving structure layer 30A of the connection bridge region 200 may include a first insulation layer 31 disposed at the sound emitting structure layer 20 and a first groove 91 disposed at a side of the first insulation layer 31 remote from the substrate, the second insulation layer 32, the third insulation layer 33, and the fourth insulation layer 34 within the first groove 91 are removed, the first planarization layer 35 fills the first groove 91, a plurality of connection lines 103 are disposed on the first planarization layer 35, and the second planarization layer 36 covers the plurality of connection lines 103. The driving structure layer 30A of the isolation region 300 may include a second groove 92 provided on the substrate 10, the piezoelectric layer 22, the protective layer 24, the first insulating layer 31, the second insulating layer 32, the third insulating layer 33, and the fourth insulating layer 34 within the second groove 92 are removed, the first planarization layer 35 fills the second groove 92, and the second planarization layer 36 is provided on the first planarization layer 35. In an exemplary embodiment, the first transistor 101 may be a driving transistor in a pixel driving circuit, and the driving transistor may be a thin film transistor (Thin Film Transistor, abbreviated as TFT).

In an exemplary embodiment, the first, second, third, and fourth insulating layers may employ any one or more of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON), and may be a single layer, a multi-layer, or a composite layer. The first insulating layer may be referred to as a buffer layer, the second and third insulating layers may be referred to as (GI) layers, and the fourth insulating layer may be referred to as an interlayer Insulating (ILD) layer. The first, second, and third conductive films may be made of a metal material such as any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), or an alloy material of the above metals such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb), and may be a single-layer structure, or a multi-layer composite structure such as Ti/Al/Ti, or the like. The first and second planarization layers may be made of an organic material such as resin or the like. The active layer film may be made of various materials such as amorphous indium gallium zinc Oxide (a-IGZO), zinc oxynitride (ZnON), indium Zinc Tin Oxide (IZTO), amorphous silicon (a-Si), polycrystalline silicon (p-Si), hexathiophene, polythiophene, etc., i.e., the present disclosure is applicable to transistors manufactured based on Oxide technology, silicon technology, and organic technology.

(9) An anode pattern is formed. In an exemplary embodiment, forming the anode pattern may include: a fourth conductive film is deposited on the substrate on which the foregoing pattern is formed, the fourth conductive film is patterned by a patterning process, an anode 61 is patterned in the pixel island 100, and the anode 61 is connected to the first drain electrode of the first transistor 101 through the connection via K2, as shown in fig. 14, and fig. 14 is a cross-sectional view in A-A direction in fig. 2.

In an exemplary embodiment, the fourth conductive film may be a metal material or a transparent conductive material, the metal material may include any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), or an alloy material of the above metals, and the transparent conductive material may include Indium Tin Oxide (ITO) or Indium Zinc Oxide (IZO). In an exemplary embodiment, the conductive film may be a single layer structure or a multi-layer composite structure such as ITO/Al/ITO or the like.

In an exemplary embodiment, the fourth conductive film connecting the bridge region 200 and the isolation region 300 is etched away in the present patterning process.

(10) A pixel defining layer pattern is formed. In an exemplary embodiment, forming the pixel definition layer pattern may include: a pixel defining film is coated on the substrate on which the foregoing pattern is formed, the pixel defining film is patterned by a patterning process, a pixel defining layer 62 is patterned on the pixel island region 100, a pixel opening K3 is provided on the pixel defining layer 62, the pixel defining film in the pixel opening K3 is removed, and the surface of the anode 61 is exposed, as shown in fig. 15, fig. 15 is a cross-sectional view in A-A direction in fig. 2.

In an exemplary embodiment, the material of the pixel defining layer may include polyimide, acryl, polyethylene terephthalate, or the like.

In an exemplary embodiment, the pixel defining film connecting the bridge region 200 and the isolation region 300 is removed in the present patterning process.

In an exemplary embodiment, a patterning process of a halftone (Half Tone Mask) or gray Tone Mask may be employed, a spacer pillar pattern may be formed when forming the pixel definition layer, and the spacer pillar may be disposed outside the pixel opening, the spacer pillar being configured to support the fine metal Mask in a subsequent evaporation process, which is not limited herein.

(11) Forming an isolation trench pattern. In an exemplary embodiment, forming the isolation trench pattern may include: the first and second planar layers 35 and 36 of the isolation region 300 are removed to form a pattern of isolation trenches 90, as shown in fig. 16, which is a cross-sectional view taken along the A-A direction in fig. 2.

In an exemplary embodiment, isolation trenches 90 may be located in isolation region 300, with first and second planar layers 35 and 36 within isolation trenches 90 removed, exposing second recesses 92, i.e., isolation trenches 90 exposing the surface of substrate 10.

In an exemplary embodiment, the first and second planarization layers 35 and 36 may be processed using an ashing (Ashing) process or a patterning process.

(12) An organic light emitting layer pattern is formed. In an exemplary embodiment, forming the organic light emitting layer pattern may include: on the substrate on which the above pattern is formed, the organic light emitting layer 63 is patterned by vapor deposition or ink jet printing, as shown in fig. 17, and fig. 17 is a cross-sectional view in A-A direction in fig. 2.

In an exemplary embodiment, the organic light emitting layer 63 may be located at the pixel island region 100, the organic light emitting layer 63 of the pixel island region 100 is connected to the anode electrode 61 through the pixel opening K3, and the connection bridge region 200 and the isolation region 300 are not evaporated or printed with an organic light emitting material.

In an exemplary embodiment, the organic light emitting layer may include an emitting layer (EML), and any one or more of the following: a Hole Injection Layer (HIL), a Hole Transport Layer (HTL), an Electron Blocking Layer (EBL), a Hole Blocking Layer (HBL), an Electron Transport Layer (ETL), and an Electron Injection Layer (EIL). In an exemplary embodiment, the organic light emitting layer may be formed by evaporation using a fine metal reticle (FINE METAL MASK, abbreviated as FMM).

In an exemplary embodiment, the organic light emitting layer may be prepared as follows. An open mask plate is adopted to sequentially evaporate a hole injection layer and a hole transport layer, and a common layer of the hole injection layer and the hole transport layer is formed on a display substrate. Then, the electron blocking layer and the red light emitting layer are evaporated on the red sub-pixel, the electron blocking layer and the green light emitting layer are evaporated on the green sub-pixel, and the electron blocking layer and the blue light emitting layer of the adjacent sub-pixel can be slightly overlapped (for example, the overlapped part occupies less than 10% of the area of the respective light emitting layer pattern), or can be isolated. And then, sequentially evaporating a hole blocking layer, an electron transport layer and an electron injection layer by adopting an open mask plate, and forming a common layer of the hole blocking layer, the electron transport layer and the electron injection layer on the display substrate.

In an exemplary embodiment, the electron blocking layer may serve as a microcavity adjustment layer of the light emitting device, and the thickness of the organic light emitting layer between the cathode and the anode may be made to satisfy the design of the microcavity length by designing the thickness of the electron blocking layer. In some exemplary embodiments, a hole transport layer, a hole blocking layer, or an electron transport layer in an organic light emitting layer may be employed as a microcavity adjustment layer of a light emitting device, and the disclosure is not limited herein.

In an exemplary embodiment, the light emitting layer may include a Host (Host) material and a guest (Dopant) material doped in the Host material, and the doping ratio of the guest material of the light emitting layer is 1% to 20%. In the doping proportion range, on one hand, the light-emitting layer host material can effectively transfer exciton energy to the light-emitting layer guest material to excite the light-emitting layer guest material to emit light, and on the other hand, the light-emitting layer host material 'dilutes' the light-emitting layer guest material, so that the fluorescent quenching caused by the mutual collision between molecules of the light-emitting layer guest material and the mutual collision between energies is effectively improved, and the light-emitting efficiency and the service life of a device are improved. In an exemplary embodiment, the doping ratio refers to a ratio of the mass of the guest material to the mass of the light emitting layer, i.e., mass percent. In an exemplary embodiment, the host material and the guest material may be co-evaporated by a multi-source evaporation process to uniformly disperse the host material and the guest material in the light emitting layer, and the doping ratio may be controlled by controlling the evaporation rate of the guest material during the evaporation process or by controlling the evaporation rate ratio of the host material and the guest material. In an exemplary embodiment, the thickness of the light emitting layer may be about 10nm to 50nm.

In an exemplary embodiment, the hole injection layer may employ an inorganic oxide such as molybdenum oxide, titanium oxide, vanadium oxide, rhenium oxide, ruthenium oxide, chromium oxide, zirconium oxide, hafnium oxide, tantalum oxide, silver oxide, tungsten oxide, or manganese oxide, or may employ a p-type dopant of a strong electron withdrawing system and a dopant of a hole transport material. In an exemplary embodiment, the hole injection layer may have a thickness of about 5nm to 20nm.

In an exemplary embodiment, a material having higher hole mobility, such as an arylamine compound, may be used as the hole transport layer, and a substituent group thereof may be carbazole, methylfluorene, spirofluorene, dibenzothiophene, furan, or the like. In an exemplary embodiment, the hole transport layer may have a thickness of about 40nm to 150nm.

In an exemplary embodiment, the hole blocking layer and the electron transporting layer may employ aromatic heterocyclic compounds, such as imidazole derivatives, for example, benzimidazole derivatives, imidazopyridine derivatives, benzimidazole benzophenanthridine derivatives, and the like; pyrimidine derivatives, triazine derivatives and other oxazine derivatives; compounds containing a nitrogen-containing six-membered ring structure such as quinoline derivatives, isoquinoline derivatives and phenanthroline derivatives (including compounds having a phosphine oxide substituent on the heterocycle). In an exemplary embodiment, the hole blocking layer may have a thickness of about 5nm to 15nm, and the electron transport layer may have a thickness of about 20nm to 50nm.

In an exemplary embodiment, the electron injection layer may employ an alkali metal or metal, such as lithium fluoride (LiF), ytterbium (Yb), magnesium (Mg), or calcium (Ca), or a compound of these alkali metals or metals, or the like. In an exemplary embodiment, the electron injection layer may have a thickness of about 0.5nm to 2nm.

(13) A cathode pattern is formed. In an exemplary embodiment, forming the cathode pattern may include: on the substrate on which the above pattern is formed, a cathode 64 pattern is formed by vapor deposition of an open mask, as shown in fig. 18, and fig. 18 is a cross-sectional view in A-A direction in fig. 2.

In an exemplary embodiment, the cathode 64 may be located at the pixel island region 100, the cathode 64 is connected to the organic light emitting layer 63, and it is achieved that the organic light emitting layer 63 is connected to the anode 61 and the cathode 64 at the same time, and the connection bridge region 200 and the isolation region 300 do not have an evaporated cathode. Since the organic light emitting layer 63 is disposed between the anode 61 and the cathode 64 and is connected to the anode 61 and the cathode 64, respectively, the anode 23 is connected to the first drain electrode of the first transistor 101, thereby realizing light emission control of the organic light emitting layer 63.

In an exemplary embodiment, the cathode may employ any one or more of magnesium (Mg), silver (Ag), aluminum (Al), copper (Cu), and lithium (Li), or an alloy made of any one or more of the above metals.

In some possible exemplary embodiments, the optical coupling layer pattern may be formed after the cathode pattern is formed, the optical coupling layer is disposed on the cathode, the refractive index of the optical coupling layer may be greater than that of the cathode, which is advantageous for light extraction and increases light extraction efficiency, and the material of the optical coupling layer may be an organic material, or an inorganic material, or an organic material and an inorganic material, and may be a single layer, a multi-layer, or a composite layer, which is not limited herein.

Thus, the light emitting structure layer 30B is prepared. In the pixel island region 100, the light emitting structure layer 30B may include an anode electrode 61, a pixel defining layer 22, an organic light emitting layer 63, and a cathode electrode 64, the organic light emitting layer 63 being disposed between the anode electrode 61 and the cathode electrode 64.

(14) And forming a packaging structure layer pattern. In an exemplary embodiment, forming the encapsulation structure layer pattern may include: on the substrate with the patterns, a first packaging film is deposited by using an open mask plate in a deposition mode to form a first packaging layer pattern, then a second packaging material is printed by using the open mask plate in an ink-jet printing process to form a second packaging layer pattern, then a third packaging film is deposited by using the open mask plate in a deposition mode to form a third packaging layer pattern, and the stacked first packaging layer, second packaging layer and third packaging layer form a packaging structure layer 30C, as shown in FIG. 19, FIG. 19 is a cross-sectional view in the direction A-A in FIG. 2.

In an exemplary embodiment, the first encapsulation layer and the third encapsulation layer may be any one or more of silicon oxide (SiOx), silicon nitride (SiNx) and silicon oxynitride (SiON), and may be a single layer, a multi-layer or a composite layer, so that external water and oxygen cannot enter the light emitting structure layer, and the deposition manner may be Chemical Vapor Deposition (CVD) or Atomic Layer Deposition (ALD) or the like. The second encapsulation layer may be made of an organic material, such as a resin, and functions to encapsulate each film layer of the display substrate, so as to improve structural stability and flatness.

In an exemplary embodiment, the encapsulation structure layer 30C may be located in the pixel island region 100 and the connection bridge region 200, the encapsulation structure layer 30C of the pixel island region 100 covers the cathode 64, and the encapsulation structure layer 30C of the connection bridge region 200 covers the second planarization layer 36, forming a stacked structure of inorganic material/organic material/inorganic material, ensuring package integrity, and effectively isolating external water and oxygen.

In an exemplary embodiment, after the encapsulation layer is prepared, a touch structure layer (TSP) may be formed on the encapsulation structure layer, and the touch structure layer may include a touch electrode layer, or include a touch electrode layer and a touch insulation layer, which is not limited herein.

Thus, the sounding display structure layer is prepared.

In an exemplary embodiment, after the preparation of the sounding display structure layer is completed, the processing of attaching the cover plate, peeling the glass carrier plate and the like can be included. In an exemplary embodiment, the conforming cover plate may include: a Cover Glass (CG) 80 is attached to the above-formed structural layer by a Cover adhesive layer 81, as shown in fig. 20. In an exemplary embodiment, the cover bonding layer 81 may employ an optical adhesive (OCA).

Preparation of the second part, cavity Structure layer

In an exemplary embodiment, the preparation process of the cavity structure layer may include the following operations. The substrate layer 41 is prepared, and a plurality of cavities 42 are formed on the substrate layer 41 by directly mechanically punching the substrate layer 41 or by patterning process or the like, as shown in fig. 21.

In an exemplary embodiment, the substrate layer 41 may be glass or the like, and forming the cavity through patterning may include: a metal film layer is deposited on the substrate layer 41, a Mask layer pattern is formed as a Mask (Hard Mask) by a patterning process, and then a cavity is formed by an acid etching process of hydrofluoric acid (HF), and then the Mask layer is stripped.

In an exemplary embodiment, the plurality of cavities 42 may be spaced apart, the plurality of cavities 42 may be grooves formed in the substrate layer 41 on a side near the base, or the plurality of cavities 42 may be through holes formed in the substrate layer 41.

In an exemplary embodiment, a plurality of alignment marks (marks) may be disposed on the cavity structure layer to improve alignment accuracy when the cavity structure layer is bonded to the sound emitting display structure layer.

Third part, laminating treatment

In an exemplary embodiment, the lamination process may include the following operations. The substrate layer 41 is firstly attached to one side, far away from the display structural layer, of the substrate 10 through the first bonding layer 43, namely the cavity structural layer is attached to the sounding display structural layer together, then the reflecting film 45 is attached to one side, far away from the sounding display structural layer, of the cavity structural layer through the second bonding layer 44, and finally the piezoelectric type screen sounding OLED display substrate is formed, as shown in fig. 22.

In an exemplary embodiment, the orthographic projection of the cavity 42 on the substrate on the cavity structure layer at least partially overlaps the orthographic projection of the piezoelectric sound unit (first electrode and second electrode) substrate on the sound emitting display structure layer.

In an exemplary embodiment, the orthographic projection of the cavity on the cavity structure layer on the substrate is located within the range of the orthographic projection on the substrate of the piezoelectric sounding unit on the sounding display structure layer, or the orthographic projection on the substrate of the piezoelectric sounding unit on the sounding display structure layer is located within the range of the orthographic projection of the cavity on the substrate of the cavity structure layer, that is, the positions of the cavity and the piezoelectric sounding unit are in one-to-one correspondence and are opposite, so that the cavity can transmit the acoustic signal generated by the piezoelectric sounding unit.

In an exemplary embodiment, the first and second adhesive layers 43 and 44 may employ optical adhesive (OCA), and the reflective film 45 may employ a material that reflects sound waves.

Thus, the preparation was completed for the preparation of the display substrate according to the exemplary embodiment of the present disclosure.

According to the structure and the preparation process of the display substrate of the exemplary embodiment of the disclosure, the isolation groove is formed in at least one isolation area between adjacent pixel island areas, and the sounding structure layer and the display structure layer in the isolation groove are removed, so that the isolation groove can block sound waves propagating in the film layer of the display substrate, standing wave effects caused by superposition of vibration waves traveling in the same frequency but in opposite directions are avoided, display effects of a screen are prevented from being influenced, and mechanical problems of the screen are avoided. According to the display substrate, the sounding structure layer and the display structure layer are arranged on the same side of the substrate, the sounding structure and the display structure are integrated, the integrated structure is formed, the display substrate is integrally manufactured, the integration level is high, the overall thickness of a product can be reduced, and the product requirement of light and thin is met. The piezoelectric material and the cavity on the substrate layer form a glass-based Micro Electro-mechanical system (Micro Electro MECHANICAL SYSTEM, MEMS for short) structure to generate vibration sound, and the reflection layer at the lowest layer is utilized to reflect sound waves, so that the integration level is further improved, and the overall thickness of the product can be further reduced. The preparation process can be realized by using the existing mature preparation equipment, is less in improvement on the existing process, can be well compatible with the existing preparation process, is simple in process realization, easy to implement, high in production efficiency, low in production cost and high in yield.

The structure of the display substrate and the manufacturing process thereof according to the exemplary embodiments of the present disclosure are merely one exemplary illustration. In exemplary embodiments, the corresponding structures may be altered and patterning processes may be increased or decreased as desired. For example, piezoelectric sounding units may be disposed in all pixel islands of the display substrate to form a full-screen sounding display substrate. For another example, a piezoelectric sounding unit may be disposed in a portion of the pixel island region of the display substrate, so as to form a display substrate with sounding in a portion of the pixel island region. For another example, isolation grooves may be provided between the set pixel island regions, which are pixel island regions having the piezoelectric sounding units. For another example, the isolation trenches in the isolation region may be one or more, and the disclosure is not limited thereto.

In an exemplary embodiment, the scheme of providing the isolation groove on the display substrate to prevent the standing wave effect is also applicable to the electromagnetic sound generating structure, and the disclosure is not limited herein.

In an exemplary embodiment, the display substrate of the present disclosure may be applied to a display device having a pixel driving circuit, such as an OLED, a quantum dot display (QLED), a light emitting diode display (Micro LED or Mini LED), or a quantum dot light emitting diode display (QDLED), etc., which is not limited herein.

The exemplary embodiment of the disclosure also provides a preparation method of the display substrate. In an exemplary embodiment, the display substrate includes a plurality of pixel island regions, a plurality of connection bridge regions between adjacent pixel island regions configured to enable signal communication of the adjacent pixel island regions through connection lines, and a plurality of isolation regions between the adjacent pixel island regions except for a region where the connection bridge regions are located. In an exemplary embodiment, the preparation method may include:

In an exemplary embodiment, a sounding structure layer and a display structure layer disposed on one side of the sounding structure layer away from the substrate are sequentially formed on the substrate, and an isolation groove is disposed on the sounding structure layer and the display structure layer of at least one isolation region, which may include:

In an exemplary embodiment, forming isolation grooves on the sound emitting structure layer and the display structure layer of at least one isolation region may include:

Forming a first organic layer filling the first and second grooves;

In an exemplary embodiment, the composite insulating layer may include a second insulating layer, a third insulating layer, and a fourth insulating layer stacked.

In an exemplary embodiment, the display structure layer of the pixel island region may include a driving structure layer disposed at a side of the sound emitting structure layer away from the substrate and a light emitting structure layer disposed at a side of the driving structure layer away from the substrate; the driving structure layer may include a first insulating layer disposed on the protective layer, a transistor disposed on a side of the first insulating layer away from the substrate, and a second flat layer covering the transistor; the first inorganic layer of the connecting bridge area and the first insulating layer of the pixel island area are arranged in the same layer and are formed simultaneously through the same patterning process, the connecting line of the connecting bridge area and the source electrode and the drain electrode of the transistor of the pixel island area are arranged in the same layer and are formed simultaneously through the same patterning process, and the second organic layer of the connecting bridge area and the second flat layer of the pixel island area are arranged in the same layer and are formed simultaneously through the same patterning process.

In an exemplary embodiment, forming the cavity structure layer may include: at least one cavity is formed on the substrate layer, and the cavity is a groove or a through hole formed on the substrate layer.

In an exemplary embodiment, attaching the cavity structure layer to a side of the substrate away from the display structure layer may include:

In this embodiment, the structure, materials, related parameters and detailed preparation process of each film layer are described in the foregoing embodiments, and are not described herein.

The embodiment provides a preparation method of a display substrate, by arranging isolation grooves in at least one isolation area between adjacent pixel island areas, a sound-producing structure layer and a display structure layer in the isolation grooves are removed, so that the isolation grooves can block sound waves transmitted in a film layer in the display substrate, standing wave effects caused by superposition of vibration waves traveling in the same frequency but in opposite directions are avoided, display effects of a screen are prevented from being influenced, and mechanical problems of the screen are avoided. According to the display substrate, the sounding structure layer and the display structure layer are arranged on the same side of the substrate, the sounding structure and the display structure are integrated, the integrated structure is formed, the display substrate is integrally manufactured, the integration level is high, the overall thickness of a product can be reduced, and the product requirement of light and thin is met. The preparation process can be realized by using the existing mature preparation equipment, is less in improvement on the existing process, can be well compatible with the existing preparation process, is simple in process realization, easy to implement, high in production efficiency, low in production cost and high in yield.

The present disclosure also provides a display device including the display substrate of the foregoing embodiment. The display device may be: any product or component with display function such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame or a navigator.

Although the embodiments of the present invention are described above, the embodiments are only used for facilitating understanding of the present invention, and are not intended to limit the present invention. Any person skilled in the art can make any modification and variation in form and detail without departing from the spirit and scope of the present disclosure, but the scope of the present disclosure is to be determined by the appended claims.

Claims

1. The display substrate is characterized by comprising a plurality of pixel island regions, a plurality of connecting bridge regions and a plurality of isolation regions, wherein the connecting bridge regions are positioned between adjacent pixel island regions and are configured to realize signal communication of the adjacent pixel island regions through connecting wires, and the isolation regions are positioned between the adjacent pixel island regions except for the regions where the connecting bridge regions are positioned; the display substrate comprises a sounding display structure layer and a cavity structure layer which are overlapped on a plane perpendicular to the display substrate, wherein the sounding display structure layer comprises a sounding structure layer arranged on a substrate and a display structure layer arranged on one side of the sounding structure layer away from the substrate, and the cavity structure layer is arranged on one side of the substrate away from the display structure layer; isolation grooves are formed in the sounding structure layer and the display structure layer of at least one isolation area; the sounding structure layer of the pixel island region comprises a first electrode layer arranged on the substrate, a piezoelectric layer arranged on one side of the first electrode layer away from the substrate, a second electrode layer arranged on one side of the piezoelectric layer away from the substrate and a protective layer arranged on one side of the second electrode layer away from the substrate; the first electrode layer comprises at least one first electrode and the second electrode layer comprises at least one second electrode, the orthographic projection of the first electrode on the substrate at least partially overlapping the orthographic projection of the second electrode on the substrate.

2. The display substrate according to claim 1, wherein the cavity structure layer comprises a first adhesive layer arranged on a side of the base away from the display structure layer and a substrate layer arranged on a side of the first adhesive layer away from the base, at least one cavity is arranged on the substrate layer, the cavity is a groove formed on a side of the substrate layer close to the base, or the cavity is a through hole formed on the substrate layer; the orthographic projection of the cavity on the substrate at least partially overlaps with the orthographic projection of the first electrode or the second electrode in the sound-emitting structure layer on the substrate.

3. The display substrate of claim 2, wherein the cavity structure layer further comprises a second adhesive layer disposed on a side of the substrate layer remote from the base and a reflective layer disposed on a side of the second adhesive layer remote from the base.

4. A display substrate according to any one of claims 1 to 3, wherein the sound-emitting structure layer of the connection bridge region comprises a piezoelectric layer provided on the base and a protective layer provided on a side of the piezoelectric layer away from the base; the display structure layer of the connecting bridge region comprises a first inorganic layer arranged on the protective layer, a first organic layer arranged on one side of the first inorganic layer away from the substrate, a connecting line arranged on one side of the first organic layer away from the substrate and a second organic layer covering the connecting line.

5. The display substrate according to claim 4, wherein the display structure layer of the pixel island region includes a driving structure layer provided on a side of the sound emitting structure layer away from the base and a light emitting structure layer provided on a side of the driving structure layer away from the base; the driving structure layer comprises a first insulating layer arranged on the protective layer, a transistor arranged on one side of the first insulating layer far away from the substrate and a second flat layer covering the transistor; the first inorganic layer of the connection bridge region and the first insulating layer of the pixel island region are arranged in the same layer, the connecting line of the connection bridge region and the source electrode and the drain electrode of the transistor of the pixel island region are arranged in the same layer, and the second organic layer of the connection bridge region and the second flat layer of the pixel island region are arranged in the same layer.

6. A display device comprising the display substrate according to any one of claims 1 to 5.

7. A method of manufacturing the display substrate according to any one of claims 1 to 5, wherein the display substrate comprises a plurality of pixel island regions, a plurality of connection bridge regions between adjacent pixel island regions configured to realize signal communication of the adjacent pixel island regions through connection lines, and a plurality of isolation regions between the adjacent pixel island regions except for the region where the connection bridge regions are located; the preparation method comprises the following steps:

8. The method of manufacturing of claim 7, wherein a sounding structure layer and a display structure layer disposed on a side of the sounding structure layer away from the substrate are sequentially formed on the substrate, and isolation grooves are disposed on the sounding structure layer and the display structure layer of at least one isolation region, comprising:

9. The method of manufacturing of claim 8, wherein forming isolation grooves on the sound emitting structure layer and the display structure layer of at least one isolation region comprises:

Forming a first organic layer filling the first and second grooves;

10. The method of manufacturing according to claim 9, wherein the display structure layer of the pixel island region includes a driving structure layer provided on a side of the sound emitting structure layer away from the substrate and a light emitting structure layer provided on a side of the driving structure layer away from the substrate; the driving structure layer comprises a first insulating layer arranged on the protective layer, a transistor arranged on one side of the first insulating layer far away from the substrate and a second flat layer covering the transistor; the first inorganic layer of the connecting bridge area and the first insulating layer of the pixel island area are arranged in the same layer and are formed simultaneously through the same patterning process, the connecting line of the connecting bridge area and the source electrode and the drain electrode of the transistor of the pixel island area are arranged in the same layer and are formed simultaneously through the same patterning process, and the second organic layer of the connecting bridge area and the second flat layer of the pixel island area are arranged in the same layer and are formed simultaneously through the same patterning process.

11. The method of manufacturing according to claim 10, wherein the first and second planarization layers of the isolation region are removed after the pixel defining layer of the light emitting structure layer is formed.

12. The method of manufacturing of claim 7, wherein forming the cavity structure layer comprises:

13. The method of manufacturing according to claim 12, wherein attaching the cavity structure layer to the side of the substrate remote from the display structure layer comprises: