CN113690134A - Preparation method of metal silicide, semiconductor device and electronic equipment - Google Patents

Preparation method of metal silicide, semiconductor device and electronic equipment Download PDF

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Publication number
CN113690134A
CN113690134A CN202010427338.0A CN202010427338A CN113690134A CN 113690134 A CN113690134 A CN 113690134A CN 202010427338 A CN202010427338 A CN 202010427338A CN 113690134 A CN113690134 A CN 113690134A
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China
Prior art keywords
metal silicide
heat treatment
forming
silicon
layer
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Pending
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CN202010427338.0A
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Chinese (zh)
Inventor
金玄永
郭挑远
徐康元
熊文娟
高建峰
杨涛
李俊峰
王文武
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Institute of Microelectronics of CAS
Zhenxin Beijing Semiconductor Co Ltd
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Institute of Microelectronics of CAS
Zhenxin Beijing Semiconductor Co Ltd
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Application filed by Institute of Microelectronics of CAS, Zhenxin Beijing Semiconductor Co Ltd filed Critical Institute of Microelectronics of CAS
Priority to CN202010427338.0A priority Critical patent/CN113690134A/en
Publication of CN113690134A publication Critical patent/CN113690134A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
    • H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System the conductive layers comprising silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/456—Ohmic electrodes on silicon
    • H01L29/458—Ohmic electrodes on silicon for thin film silicon, e.g. source or drain electrode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate

Abstract

The embodiment of the invention provides a preparation method of metal silicide, a semiconductor device and electronic equipment, relating to the technical field of semiconductors, and on one hand, the diffusion and aggregation of materials with larger consumption in the second heat treatment process are avoided; on the other hand, the metal oxide which is not high in temperature resistance is prevented from being converted into a material with high contact resistance at high temperature. A preparation method of metal silicide comprises the following steps: providing a silicon substrate, wherein the silicon substrate is provided with a doped region; forming a dielectric layer on a silicon substrate, and forming a contact hole in the dielectric layer, wherein the contact hole exposes the doped region; forming a metal layer on the doped region; carrying out first heat treatment; forming a material layer containing a silicon element on the metal layer; and carrying out secondary heat treatment.

Description

Preparation method of metal silicide, semiconductor device and electronic equipment
Technical Field
The invention relates to the technical field of semiconductors, in particular to a preparation method of a metal silicide, a semiconductor device and electronic equipment.
Background
At present, metal silicides are widely used in semiconductor devices such as transistors. Among the commonly used metal silicides are nickel silicide (NiSi), such as titanium silicide (TiSi)2) Cobalt silicide (CoSi)2) And the like.
TiSi2And CoSi2Although having a strong heat resistance, a large amount of silicon will be consumed in the process of forming the metal silicide. In the case where the contact hole is small, for example, the size of the contact hole is less than 20nm, when silicon reacts with metal to form metal silicide, a large amount of silicon near the metal is consumed, and silicon farther from the metal gradually diffuses and gathers toward a region near the metal, resulting in unevenness of the lower surface of the finally formed metal silicide 11 (fig. 1).
NiSi typically can only withstand temperatures below 600 ℃, although it consumes only a small amount of silicon during the formation of metal silicide. If the temperature is higher than 600 ℃, the NiSi with low resistance will be changed to the NiSi with high resistance2The conversion results in an increase in contact resistance, which affects the performance of the semiconductor device.
Disclosure of Invention
The embodiment of the invention provides a preparation method of metal silicide, a semiconductor device and electronic equipment, on one hand, materials with large consumption are prevented from being diffused and gathered in the second heat treatment process; on the other hand, the metal oxide which is not high in temperature resistance is prevented from being converted into a material with high contact resistance at high temperature.
In order to achieve the above purpose, the embodiment of the invention adopts the following technical scheme:
in a first aspect, a method for preparing a metal silicide is provided, which includes: providing a silicon substrate, wherein the silicon substrate is provided with a doped region; forming a dielectric layer on a silicon substrate, and forming a contact hole in the dielectric layer, wherein the contact hole exposes the doped region; forming a metal layer on the doped region; carrying out first heat treatment; forming a material layer containing a silicon element on the metal layer; and carrying out secondary heat treatment.
Optionally, after the forming the dielectric layer and before the performing the first thermal treatment, the method for preparing a metal silicide further includes: forming a protective layer on the metal layer; after the first heat treatment is carried out and before the material layer containing the silicon element is formed, the preparation method of the metal silicide further comprises the following steps: and removing the protective layer.
Optionally, after performing the second heat treatment, the method for preparing a metal silicide further includes: and removing the material layer containing the silicon element.
Optionally, before the second heat treatment, the material of the material layer containing silicon element includes amorphous silicon.
Optionally, the material layer containing silicon element is formed by one of PVD, CVD, ALD and evaporation process.
Optionally, the metal silicide is NiSi or TiSi2、CoSi2At least one of (1).
Optionally, the temperature for forming the material layer containing silicon element is less than or equal to the temperature of the first heat treatment.
In a second aspect, a semiconductor device is provided, which includes a metal silicide prepared by the method for preparing a metal silicide according to the first aspect.
In a third aspect, an electronic device is provided, which includes the semiconductor device of the second aspect.
Optionally, the electronic device includes at least one of a smartphone, a computer, a tablet, a wearable smart device, an artificial smart device, and a mobile power source.
Embodiments of the present invention provide a method for preparing a metal silicide, a semiconductor device, and an electronic device, in which a material layer containing a silicon element covering a metal layer at the bottom of a contact hole is formed on a dielectric layer, and the material layer containing the silicon element is in direct contact with the metal layer. If the material of the metal silicide is TiSi2And CoSi2When the material with larger silicon consumption is subjected to the second heat treatment, the material layer containing the silicon element can supplement the consumed silicon to the metal silicide so as to avoid the silicon from diffusing and aggregating to cause the surface of the finally formed metal silicide to be uneven; compared with the prior art, the metal silicide formed by the embodiment of the invention is thinner and more uniform. If the metal silicide is a material such as NiSi which does not resist high temperature, the metal silicide can be applied to less than 900 ℃ after the material layer containing silicon element is formed, so that the metal silicide can be applied to more metal silicides which do not resist high temperature, and the metal silicide which does not resist high temperature is prevented from being converted into a material with high contact resistance, so that the performance of a semiconductor device is prevented from being influenced when the metal silicide is applied to the semiconductor device.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a semiconductor device provided in the prior art;
FIG. 2 is a flow chart of forming a metal silicide according to an embodiment of the present invention;
FIG. 3 is a diagram illustrating a process of forming a metal silicide according to an embodiment of the present invention;
FIG. 4 is a diagram illustrating a process of forming a metal silicide according to an embodiment of the present invention;
fig. 5 is a process diagram of forming a metal silicide according to an embodiment of the invention.
Reference numerals:
10-a silicon substrate; 101-doped region; 20-a dielectric layer; 21-a contact hole; 22-a barrier layer; 23-a tungsten layer; a layer of 30-silicon material; 40-a protective layer; 50-metal layer.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is illustrative only and is not intended to limit the scope of the present disclosure. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present disclosure.
Various structural schematics according to embodiments of the present disclosure are shown in the figures. The figures are not drawn to scale, wherein certain details are exaggerated and possibly omitted for clarity of presentation. The shapes of various regions, layers, and relative sizes and positional relationships therebetween shown in the drawings are merely exemplary, and deviations may occur in practice due to manufacturing tolerances or technical limitations, and a person skilled in the art may additionally design regions/layers having different shapes, sizes, relative positions, as actually required.
In the context of the present disclosure, when a layer/element is referred to as being "on" another layer/element, it can be directly on the other layer/element or intervening layers/elements may be present. In addition, if a layer/element is "on" another layer/element in one orientation, then that layer/element may be "under" the other layer/element when the orientation is reversed.
The embodiment of the invention provides a preparation method of metal silicide, which can be realized by the following steps as shown in fig. 2:
s11: as shown in fig. 3, a silicon substrate 10 is provided, the silicon substrate 10 having a doped region 101. A dielectric layer 20 is formed on the silicon substrate 10, and a contact hole 21 is formed in the dielectric layer 20, the contact hole 21 exposing the doped region 101. And a metal layer 50 is formed on the doping 101.
In some embodiments, the doped region 101 may be located in a source drain region, or may be located on a top surface of a polysilicon gate, for example, as will be appreciated by those skilled in the art. The source and drain regions are electrically connected to respective contacts. The electrical connection effect between the doped source and drain regions and respective contacts is still not ideal enough, thereby affecting the signal transmission.
Based on this, the metal layer 50 is formed on the doped region 101, so that the metal reacts with silicon to generate metal silicide with stronger conductivity, thereby improving the electrical connection effect between the source and drain regions and the respective contacts, and improving the signal transmission effect.
In some embodiments, the doped region 101 may be an n-type doped region or a p-type doped region.
In some embodiments, the material of the silicon substrate 10 may be amorphous silicon or polycrystalline silicon, for example.
In some embodiments, the contact hole 21 formed in the dielectric layer 20 exposes the doped region 101 on the silicon substrate 10.
In some embodiments, the material of the dielectric layer 20 is not limited as long as the dielectric layer 20 can perform an insulating function.
Illustratively, the material of the dielectric layer 20 may be silicon oxide, silicon nitride, or the like.
S12: a first heat treatment is performed.
Here, by the first heat treatment, a metal-rich silicide may be formed.
In some embodiments, the metal silicide is CoSi2For example, the temperature of the first heat treatment may be less than 600 ℃.
In some embodiments, the first heat treatment may be performed by a general annealing (anneal) process, a Rapid Thermal Processing (RTP) process, a laser annealing (laser anneal), or the like.
S13, as shown in fig. 4, a material layer 30 containing a silicon element is formed on the metal layer 50.
In some embodiments, the material of the material layer 30 containing silicon element is not limited as long as the material of the material layer 30 includes silicon.
As an example, the material of the material layer 30 containing silicon element may include amorphous silicon, for example.
In some embodiments, the material layer 30 containing silicon element may be formed by using one of Physical Vapor Deposition (PVD), Chemical Vapor Deposition (CVD), Atomic Layer Deposition (ALD), evaporation process, and the like.
In some embodiments, after forming the material layer 30 containing elemental silicon, the metal silicide may be completed at less than 900 ℃ during a subsequent second thermal treatment.
In some embodiments, the silicon-containing material layer 30 may completely cover the surface of the dielectric layer 20, the sidewalls of the contact hole 21, and the metal layer 50 at the bottom of the contact hole 21; alternatively, the material layer 30 containing a silicon element may cover only the side wall of the contact hole 21 and the metal layer 50 at the bottom of the contact hole 21.
And S14, performing second heat treatment.
Here, by the second heat treatment, a silicon-rich silicide may be formed.
Wherein for TiSi2And CoSi2In other words, a large amount of silicon is consumed in the second heat treatment.
In some embodiments, the metal silicide is CoSi2For example, the temperature of the second heat treatment may be less than 800 ℃.
In some embodiments, if the material of the material layer 30 containing silicon element includes amorphous silicon, after the second heat treatment, the material of the material layer 30 containing silicon element may further include polysilicon.
In some embodiments, after the second heat treatment, the method for preparing a metal silicide may further include: the material layer 30 containing silicon element is removed.
Here, the silicon material layer 30 may be removed by a material strip (strip), etching (etch), or the like.
In some embodiments, the second heat treatment may be performed by a conventional annealing process, a rapid thermal processing process, a laser annealing process, or the like.
The embodiment of the invention provides a preparation method of metal silicide, which can form a material layer 30 containing silicon element on a dielectric layer 20, wherein the material layer 30 covers a metal layer 50 at the bottom of a contact hole 21, and the material layer 30 containing silicon element is directly contacted with the metal layer 50. If the material of the metal silicide is TiSi2And CoSi2When the material with larger silicon consumption is subjected to the second heat treatment, the material layer 30 containing silicon element can supplement the consumed silicon to the metal silicide so as to avoid the silicon from diffusing and aggregating to cause the surface of the finally formed metal silicide to be uneven; compared with the prior art, the metal silicide formed by the embodiment of the invention is thinner and more uniform. If the material of the metal silicide is a material such as NiSi that does not resist high temperature, the metal silicide can be applied to less than 900 ℃ after the material layer 30 containing silicon element is formed, so that the metal silicide can be applied to more metal silicides that do not resist high temperature, and the metal silicide that does not resist high temperature is prevented from being converted into a material with high contact resistance, so as to avoid affecting the performance of the semiconductor device when the metal silicide is applied to the semiconductor device.
Optionally, after the dielectric layer 20 is formed and before the first heat treatment, the method for preparing a metal silicide further includes: as shown in fig. 5, a protective layer 40 is formed on the metal layer 50.
In some embodiments, the material of the protective layer 40 may be, for example, TiN, TaN, or the like. The protective layer 40 can prevent an unnecessary oxide layer or metal oxide layer from being formed during the heat treatment.
Alternatively, the material of the protective layer 40 may be polysilicon. If the material of the protection layer 40 is polysilicon, the temperature of the first heat treatment and the second heat treatment should be adaptively adjusted.
In some embodiments, the protection layer 40 may completely cover the surface of the dielectric layer 20, the sidewalls of the contact hole 21, and the metal layer 50 at the bottom of the contact hole 21; alternatively, the protective layer 40 may cover only the sidewalls of the contact hole 21 and the bottom metal layer 50 of the contact hole 21.
After the first heat treatment and before the material layer 30 containing silicon is formed, the method for preparing a metal silicide further includes: the protective layer 40 is removed.
After the protective layer 40 is removed, the material layer 30 containing silicon element formed subsequently can be directly contacted with the metal layer 50.
Alternatively, the temperature for forming the material layer 30 containing silicon element is less than or equal to the temperature of the first heat treatment.
The high temperature resistance of the metal silicide is not improved before the material layer 30 containing silicon element is formed, and the first heat treatment is completed. The temperature of the first heat treatment is generally not sufficient to affect the metal oxides which are not resistant to high temperatures and cause their conversion into other materials.
Based on this, the temperature for forming the material layer 30 containing silicon element can be lower than or equal to the temperature for the first heat treatment, so as to avoid that the temperature for forming the material layer 30 containing silicon element affects the metal oxide which is not high temperature resistant and causes the metal oxide to be converted into other materials with high contact resistance, thereby affecting the performance of the semiconductor device.
The embodiment of the invention also provides a semiconductor device which comprises the metal silicide, wherein the metal silicide is prepared by the preparation method of the metal silicide described in any one of the embodiments.
An embodiment of the present invention provides a semiconductor device, including the metal silicide prepared by any one of the foregoing embodiments. In the preparation of the metal silicide, a material layer 30 containing a silicon element may be formed on the dielectric layer 20 to cover the metal layer 50 at the bottom of the contact hole 21, and the material layer 30 containing a silicon element may be in direct contact with the metal layer 50. If the material of the metal silicide is TiSi2And CoSi2When the material with larger silicon consumption is subjected to the second heat treatment, the material layer 30 containing silicon element can supplement the consumed silicon to the metal silicide so as to avoid the silicon from diffusing and aggregating to cause the surface of the finally formed metal silicide to be uneven; compared with the prior art, the metal silicide formed by the embodiment of the invention is thinner and more uniform. If the material of the metal silicide is NiSi or other materials which can not resist high temperature,after the material layer 30 containing silicon element is formed, the metal silicide can be applied to the temperature below 900 ℃, so that the metal silicide can be applied to more metal silicides which do not resist high temperature, the metal silicide which do not resist high temperature can be prevented from being converted into a material with high contact resistance, and the influence on the performance of a semiconductor device when the metal silicide is applied to the semiconductor device can be avoided.
An embodiment of the present invention further provides an electronic device including the semiconductor device according to any one of the foregoing embodiments.
In some embodiments, a specific use of the electronic device is not limited as long as the above-described semiconductor device is included in the electronic device.
By way of example, the electronic device includes at least one of a smartphone, a computer, a tablet, a wearable smart device, an artificial smart device, a mobile power source.
Other explanations and advantageous effects of the electronic device are the same as those of the metal silicide, and are not repeated herein.
In the above description, the technical details of patterning, etching, and the like of each layer are not described in detail. It will be appreciated by those skilled in the art that layers, regions, etc. of the desired shape may be formed by various technical means. In addition, in order to form the same structure, those skilled in the art can also design a method which is not exactly the same as the method described above. In addition, although the embodiments are described separately above, this does not mean that the measures in the embodiments cannot be used in advantageous combination.
The embodiments of the present disclosure have been described above. However, these examples are for illustrative purposes only and are not intended to limit the scope of the present disclosure. The scope of the disclosure is defined by the appended claims and equivalents thereof. Various alternatives and modifications can be devised by those skilled in the art without departing from the scope of the present disclosure, and such alternatives and modifications are intended to be within the scope of the present disclosure.

Claims (10)

1. A method for preparing metal silicide is characterized by comprising the following steps:
providing a silicon substrate, wherein the silicon substrate is provided with a doped region;
forming a dielectric layer on a silicon substrate, and forming a contact hole in the dielectric layer, wherein the contact hole exposes the doped region;
forming a metal layer on the doped region;
carrying out first heat treatment;
forming a material layer containing a silicon element on the metal layer;
and carrying out secondary heat treatment.
2. The method of claim 1, wherein after the forming the dielectric layer and before the performing the first thermal treatment, the method further comprises:
forming a protective layer on the metal layer;
after the first heat treatment is carried out and before the material layer containing the silicon element is formed, the preparation method of the metal silicide further comprises the following steps:
and removing the protective layer.
3. The method for preparing metal silicide according to claim 1 or 2, wherein the method for preparing metal silicide further comprises, after the second heat treatment:
and removing the material layer containing the silicon element.
4. The method as claimed in claim 1 or 2, wherein the material of the material layer containing silicon element comprises amorphous silicon before the second heat treatment.
5. The method of claim 1 or 2, wherein the material layer containing silicon element is formed by one of PVD, CVD, ALD and evaporation.
6. The method for preparing metal silicide according to claim 1 or 2, wherein the metal silicide is NiSi or TiSi2、CoSi2At least one of (1).
7. The method according to claim 6, wherein a temperature for forming the material layer containing elemental silicon is less than or equal to a temperature of the first heat treatment.
8. A semiconductor device comprising a metal silicide produced by the method for producing a metal silicide according to any one of claims 1 to 7.
9. An electronic device characterized by comprising the semiconductor device according to claim 8.
10. The electronic device of claim 9, wherein the electronic device comprises at least one of a smartphone, a computer, a tablet, a wearable smart device, an artificial smart device, and a mobile power source.
CN202010427338.0A 2020-05-19 2020-05-19 Preparation method of metal silicide, semiconductor device and electronic equipment Pending CN113690134A (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6165903A (en) * 1998-11-04 2000-12-26 Advanced Micro Devices, Inc. Method of forming ultra-shallow junctions in a semiconductor wafer with deposited silicon layer to reduce silicon consumption during salicidation
US6274470B1 (en) * 1999-11-26 2001-08-14 Oki Electric Industry Co., Ltd. Method for fabricating a semiconductor device having a metallic silicide layer
US6297148B1 (en) * 1999-08-19 2001-10-02 Advanced Micro Devices, Inc. Method of forming a silicon bottom anti-reflective coating with reduced junction leakage during salicidation
CN1726582A (en) * 2002-12-20 2006-01-25 皇家飞利浦电子股份有限公司 Method of manufacturing a semiconductor device and semiconductor device obtained with such a method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6165903A (en) * 1998-11-04 2000-12-26 Advanced Micro Devices, Inc. Method of forming ultra-shallow junctions in a semiconductor wafer with deposited silicon layer to reduce silicon consumption during salicidation
US6297148B1 (en) * 1999-08-19 2001-10-02 Advanced Micro Devices, Inc. Method of forming a silicon bottom anti-reflective coating with reduced junction leakage during salicidation
US6274470B1 (en) * 1999-11-26 2001-08-14 Oki Electric Industry Co., Ltd. Method for fabricating a semiconductor device having a metallic silicide layer
CN1726582A (en) * 2002-12-20 2006-01-25 皇家飞利浦电子股份有限公司 Method of manufacturing a semiconductor device and semiconductor device obtained with such a method

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