CN113687806A - DeMura method of display screen, display screen and storage medium - Google Patents
DeMura method of display screen, display screen and storage medium Download PDFInfo
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Abstract
The application discloses a DeMura method of a display screen, the display screen and a storage medium. The method comprises the following steps: acquiring a pixel area of a display screen; detecting the pixel region to acquire Mura data of the pixel region; determining at least two different pixel regions according to the Mura data; performing block division on the at least two different pixel regions using different division sizes; and performing DeMura (Mura compensation) on the divided pixel region, namely reducing the memory usage of compensation data while ensuring the performance of a DeMura system.
Description
Technical Field
The application relates to the technical field of display, in particular to a DeMura method of a display screen, the display screen and a storage medium.
Background
Mura occurs during the fabrication of OLED or LCD display devices due to process technology imperfections, resulting in brightness differences of the display devices, forming various defects. The DeMura system refers to a method or algorithm for effectively removing Mura existing on OLED, LCD display screens. Typically, the DeMura algorithm is implemented inside a DDI (display driver chip) to perform Mura compensation for all pixels of the display device. However, if DeMura is performed for all pixels of OLED and LCD display screens, the amount of internal and external storage of DDI for storing compensation data will increase greatly, and the cost is too high.
Disclosure of Invention
In view of this, embodiments of the present application provide a DeMura method for a display screen, and a storage medium, which can reduce the amount of storage of compensation data while ensuring the performance of a DeMura system.
In a first aspect, the present application provides a DeMura method for a display screen, including:
acquiring a pixel area of a display screen;
detecting the pixel region to acquire Mura data of the pixel region;
determining at least two different pixel regions according to the Mura data;
performing block division on the at least two different pixel regions using different division sizes;
and performing DeMura on the divided pixel regions.
Optionally, the module dividing the at least two different pixel regions by using different division sizes includes:
performing module division on a pixel region with more Mura by using a smaller division size;
and performing module division on the pixel region with less Mura by using a larger division size.
Optionally, the performing module division on the pixel region with more Mura using a smaller division size includes:
performing module division on the pixel region with more Mura by using a division size of 1x1 or 2x 2;
the module division is performed on the pixel area with less Mura by using a larger division size, and the module division comprises the following steps:
the block division is performed using a division size of 4x4 or 8x8 or 16x16 or 32x32 for the Mura-less pixel region.
Optionally, the performing DeMura on the divided pixel region includes:
generating Mura compensation data by adopting a polynomial compensation mode;
and performing Mura compensation on the divided pixel regions by using the Mura compensation data.
Optionally, the polynomial compensation comprises at least one of: polynomial compensation of order 1, polynomial compensation of order 2, polynomial compensation of order 3.
Optionally, the performing DeMura on the divided pixel region includes:
searching the Mura compensation data by using an LUT lookup table mode, and coding the Mura compensation data according to a raster scanning direction;
and carrying out lossless compression on the encoded Mura compensation data.
Optionally, the encoded Mura compensation data includes prefix bits and suffix bits.
Optionally, the performing DeMura on the divided pixel region further includes:
and decoding the suffix bits of the compressed Mura compensation data in the raster scanning direction.
In a second aspect, an embodiment of the present application provides a display screen, where the display screen includes: a memory and a processor, wherein the memory has stored thereon a DeMura program, which when executed by the processor implements the steps of the DeMura method of a display screen according to the first aspect.
In a third aspect, an embodiment of the present application provides a readable storage medium, where a DeMura program is stored, and when executed by a processor, the DeMura program implements the steps of the DeMura method for a display screen according to the first aspect.
The DeMura method of the display screen comprises the steps of detecting a pixel area by obtaining the pixel area of the display screen to obtain Mura data of the pixel area, determining at least two different pixel areas according to the Mura data, carrying out module division on the at least two different pixel areas by using different division sizes, and carrying out DeMura (Mura compensation) on the divided pixel areas, namely reducing the storage amount of compensation data while ensuring the performance of a DeMura system.
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In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic flowchart of a DeMura method of a display screen according to an embodiment of the present application;
fig. 2 is a schematic structural diagram of a DeMura system according to an embodiment of the present application;
FIG. 3 is a graph of a reference gray scale value according to an embodiment of the present application;
FIG. 4 is a flow chart illustrating the sub-steps of step S400 according to an embodiment of the present application;
FIG. 5 is a block diagram of a pixel region according to an embodiment of the present disclosure;
FIG. 6 is a flow chart illustrating the sub-steps of step S500 according to an embodiment of the present application;
FIG. 7 is a flow chart illustrating the sub-steps of step S500 according to another embodiment of the present application;
FIG. 8 is a diagram illustrating the search and encoding of Mura compensation data according to an embodiment of the present application;
fig. 9 is a schematic diagram illustrating encoding of Mura compensation data of a 16x16 module according to an embodiment of the present application;
fig. 10 is a schematic diagram of the division of a 16 × 16 module with 32 gray scale values according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application clearer, the technical solutions of the present application will be clearly and completely described below with reference to the embodiments and the accompanying drawings. It is to be understood that the embodiments described are only a few embodiments and not all embodiments. The following embodiments and their technical features may be combined with each other without conflict.
Mura occurs during the fabrication of OLED or LCD display devices due to process technology imperfections, resulting in brightness differences of the display devices, forming various defects. The DeMura system refers to a method or algorithm for effectively removing Mura existing on OLED, LCD display screens. Typically, the DeMura algorithm is implemented inside a DDI (display driver chip) to perform Mura compensation for all pixels of the display device. However, if DeMura is performed for all pixels of OLED and LCD display screens, the amount of internal and external storage of DDI for storing compensation data will increase greatly, and the cost is too high.
Generally, to implement the DeMura system, the DDI internal storage uses SRAM storage and the external storage uses flash memory. After the compensation data is stored in the external flash memory, the compensation data is read from the flash memory when the external flash memory is powered on, and is copied and used in the internal SRAM. Since SRAM is used inside DDI and flash memory is used outside, Demura system will be a factor to increase OLED and LCD display cost. However, the yield of the finished display screen in the quality inspection can be improved by applying the Demura system, and the performance of the display screen is improved. Particularly in the manufacturing industry, the demand for applying the Demura system on the large-size mobile phone display screen is higher and higher because the yield is an important index of sales profits.
In a constituent Demura system, generally smaller module sizes enable better performance. Finally, if Demura is composed in units of all 1 pixel, the best Demura results can be obtained. However, if Demura is performed with 1 × 1 modules, i.e., with 1 pixel as the minimum unit, the amount of external flash and internal SRAM memory requirements is the greatest. That is, the larger the size of the module is, the smaller the number of modules is, and finally the usage of the external flash memory and the internal SRAM memory is reduced, so that the most efficient Demura system can be realized.
Based on the above, the present application provides a DeMura method for a display screen, and a storage medium, where Mura data of pixel regions are obtained first, at least two different pixel regions are determined according to the Mura data, and a smaller partition size is used for module division in a pixel region with more Mura, a larger partition size is used for module division in a pixel region with less Mura, and then Mura compensation is performed, so that the memory usage of compensation data is reduced while the performance of a DeMura system is ensured.
In a first aspect, an embodiment of the present application provides a DeMura method for a display screen, as shown in fig. 1, the method includes:
step S100: acquiring a pixel area of a display screen;
step S200: detecting the pixel region to acquire Mura data of the pixel region;
step S300: determining at least two different pixel regions according to the Mura data;
step S400: performing block division on at least two different pixel regions by using different division sizes;
step S500: and performing DeMura on the divided pixel regions.
In some embodiments, the DeMura method of this embodiment is applied to a display screen, and the pixel region is detected by obtaining the pixel region of the display screen to obtain the Mura data of the pixel region, at least two different pixel regions are determined according to the Mura data, at least two different pixel regions are divided into modules by using different division sizes, and the DeMura is performed on the divided pixel regions, so that the memory usage of compensation data can be reduced while the performance of a DeMura system is ensured.
FIG. 2 is a schematic diagram of the structure of the Demura system. 100 is a Demura system. 110 is a Demura encoder, or Mura compensation data generator. 120 is a Demura decoder, or Mura data compensator. 111 is a Mura display device, such as OLED, LCD, etc., which can display images. 112 is a Mura data capture device, referring to a camera device that detects Mura of a display device, which can extract R, G, B the luminance data of the imagery. The Mura compensation data generation module 113 generates the Mura compensation data in various ways by using an optimal method for the Mura compensation. 114 is a Mura compensation data storage module for storing the Mura compensation data in a flash memory externally connected to the DDI through the DDI mounted on the OLED display device. 121 is a Mura compensation data copying module for copying Mura compensation data from the flash memory to the internal SRAM memory. And 122, a Mura compensation module, configured to perform Mura compensation using the Mura compensation data. And 123, a display module for displaying the Mura compensated image.
In some embodiments, in order to correct Mura of the OLED, LCD screen, the Mura of the display screen needs to be detected first with a special camera. In this case, it is preferable to perform Mura detection on all of the 0 to 255 gray scale values, but it is practically impossible to perform Mura detection because of the processing time and the use of excessive resources in Mura compensation. Therefore, the Mura detection is only carried out on a few reference gray values, and the data of the Mura detection is used for forming an effective Mura compensation algorithm. As shown in FIG. 3, the graph of the specific reference gray-level values includes 32-gray-level value, 64-gray-level value, 96-gray-level value, 128-gray-level value, 160-gray-level value, 192-gray-level value, and 224-gray-level value. In this manner, the Mura data (luminance) is obtained with the camera for the specific values (32, 64, 96, 128, 160, 192, 224) of the R, G, B gradation value.
In some embodiments, as shown in fig. 4, step S400 includes:
step S410: performing module division on a pixel region with more Mura by using a smaller division size;
step S420: and performing module division on the pixel region with less Mura by using a larger division size.
In some embodiments, a pixel region with more Mura is divided into modules by using a smaller division size, so that all the Mura can be better Demura, and better performance is realized. The pixel area with less Mura is divided into modules by using a larger division size, so that the memory consumption of compensation data can be reduced.
In some embodiments, step S410 comprises:
performing module division on the pixel region with more Mura by using a division size of 1x1 and/or 2x 2;
step S420 includes:
the pixel regions with less Mura are divided into blocks by using division sizes of 4x4 and/or 8x8 and/or 16x16 and/or 32x 32.
In some embodiments, as shown in fig. 5, the pixel regions with more Mura are divided into blocks using a division size of 1x1 and/or 2x2, and the pixel regions with less Mura are divided into blocks using a division size of 4x4 and/or 8x8 and/or 16x16 and/or 32x 32. The division size may be adjusted according to actual conditions, and this embodiment is not limited to this.
In some embodiments, the division into 32x32 and 16x16 modules is a Mura-less module. That is, because there are fewer Mura, the Mura data captured by these modules with cameras have equal values or very subtle differences. The Mura values of the 8x8 module are less uniform than the 16x16 module, but the values within the demarcated 8x8 module are similar. Among the divided 8x8 blocks, the blocks with non-uniform Mura values (too large difference in values) of all pixels in the block are divided into 4x4 blocks again. Such a process goes through 2x2 module division and finally proceeds to 1x1 modules that cannot be further divided. Specifically, it is determined whether a 16x16 block needs to be divided into 4 8x8 blocks, and 256 Mura pixel values within the 16x16 block need to be analyzed. The method of deciding whether to divide 4 8x8 blocks is to use the statistical flag of all Mura pixels of the 16x16 block. For example, the average, standard deviation, minimum, maximum, etc. are calculated, and finally how large the Mura is, if the Mura is larger than the predetermined standard, the Mura is divided into 4 smaller modules, otherwise the modules are maintained as they are.
In some embodiments, as shown in fig. 6, step S500 includes:
step S510: generating Mura compensation data by adopting a polynomial compensation mode;
step S520: and performing Mura compensation on the divided pixel regions by using the Mura compensation data.
In some embodiments, with the Mura display device, the target luminance differs from the actual luminance. Therefore, to compensate for the difference, Mura compensation data is generated using various methods. Generally, the brightness distribution of a display device has a characteristic of a gamma 2.2 curve. Since the gamma characteristics of the display device with Mura are different from the gamma 2.2 curve, the difference needs to be compensated. Generally, a polynomial compensation mode is mostly adopted in a Mura compensation method of the OLED display device. The polynomial compensation includes at least one of: polynomial compensation of order 1, polynomial compensation of order 2, polynomial compensation of order 3, i.e. a way of modeling and compensating for the difference between the gamma 2.2 curve and the actual gamma characteristic curve of the display device using polynomial of order 1, polynomial of order 2, and polynomial of order 3. The Mura compensation data is generally constructed with a polynomial of order 2. The values of a, b, and c can be obtained by modeling [ Diff _ Gamma _ Ideal _ Gamma-Real _ Gamma ] using a polynomial such as Y ═ ax ^2+ bx + c. The values of a, b, c are stored in flash memory in an appropriate form to compensate for Mura. If the values of a, b, and c are determined for all pixels, the memory requirement is too high. Therefore, the data is divided into blocks such as 32x32, 16x16, 8x8, 4x2, and 2x2, and the same values of a, b, and c are obtained for the blocks and used, thereby reducing the amount of memory required. And if the gamma curve does not conform to the gamma 2.2 curve, adjusting the gray value of the actual gamma curve to be matched with the gamma 2.2, and realizing Mura compensation.
In some embodiments, as shown in fig. 7, step S500 includes:
step S530: searching the Mura compensation data by using an LUT lookup table mode, and coding the Mura compensation data in cooperation with a raster scanning direction;
step S540: and carrying out lossless compression on the encoded Mura compensation data.
In some embodiments, the Mura compensation data is looked Up by using a Look-Up Table (LUT-Up Table) manner, and the Mura compensation data is encoded in cooperation with the raster scanning direction. As shown in fig. 8, the divided 16x16 module is searched for Mura compensation data and encoded. 810 in FIG. 8 shows the result of the final division of the 16x16 module into 8x 8-1 x1 modules. 811 denotes an order of encoding the Mura compensation data of the divided modules. The Mura compensation data is found and assigned the most suitable entries in the predefined 256 LUTs (Look-Up tables). In this case, the LUT may be constructed by various methods other than vector quantization or clustering.
Referring to fig. 8, it can be seen first at 820 that the 16x16 module is divided into 4 8x8 modules, with the Mura compensation data of the 16x16 module assigned to 0 xFF. This value is an entry of the 256 LUTs. 0xFF is not a direct Mura compensation data value, and refers to a special value where a module is partitioned. That is, if a value of 0xFF occurs, it means that the current module is divided into 4 small modules. 830 indicates that there are 4 8x8 modules. Here, a module with a value of 0xYY indicates that the appropriate value is found in the LUT. That is, the value 0xYY refers to any value of 0x00 ~ 0xFE expressed in 16-ary. A module with a value of 0xYY means that it is no longer split into smaller modules. These blocks with a value of 0xYY mean that all pixels within a block have the same or similar values and are therefore Mura-less blocks and do not require further partitioning. Only the 8x8 module in the upper right corner of 830 has a value of 0xFF, and the other 3 modules are not divided. In 840, the 8x8 module distinguished as 0xFF is subdivided into 4x4 modules. Likewise, 3 blocks with a value of 0xYY are no longer divided, only the top right 4x4 block is again divided into 42 x2 blocks. At 850, the morphology of the division into 42 × 2 modules can be confirmed. Finally 860 denotes that 12 x2 module is divided into 41 x1 modules.
Referring to fig. 9, the encoding order of the Mura compensation data of each module after 1 16 × 16 module is divided into 8x 8-1 x1 modules according to the degree of Mura is shown in detail. The 16x16 module has a dot in the center. This dot represents the corresponding encoded data for the module. Arrows indicate the order in which the 16x16 modules are encoded when divided into 16x16 → 8x8 → 4x4 → 2x2 → 1x 1. The encoding is done from start to finish on each dot. 860 of fig. 8 is combined with fig. 9, i.e. it is known that this is encoded together with the table in fig. 9. The module level indicates which module corresponds to each encoded value. That is, 16 refers to a 16x16 module, and the corresponding code value is FF. The actual encoded data does not contain a module level value. But from the coding level values we can know exactly the module level of the current coding value and use this information to perform Mura compensation.
In some embodiments, referring to fig. 10, it is shown how a 16x16 module of 32 gray scale values is partitioned. The 8x8 modules all have a gray value of 32. A gray value of 32 overall indicates no Mura and therefore does not require further segmentation into smaller modules. 1010. 1020, 1030 show the presence of Mura in 1 8 × 8 block, where the gray values are not all 32, and several pixels have values greater or less than 32, so that the blocks are divided into 4x4, 2x2, and 1x1 blocks. The 4x4 block in 1010 is not all 32 values, but 2 of the 16 pixel values are 33, 1 31, and therefore are composed of similar values, and the average value of the 4x4 block is close to 32. The module will not continue to be divided into 42 x2 modules. Instead, the individual pixel values within 1020, 1030 exhibit a variety of distributions. These modules Mura are therefore more and consist of values that differ considerably from 32. The 2x2 block of 1020 consists of 3 32, 1 33 pixels and is not further divided into 1x1 blocks. The 1040 block has 4 pixels with values greater than 32, 3 of 38, and 1 of 37. But the 2x2 module will not continue to be divided into 1x1 modules. The reason is that the pixel values, although relatively larger than 32, are all made up of similar values. As such, while the average is greater than 32, the modules with smaller average deviations need not be continuously divided into smaller modules. Since the module can use one LUT entry for Mura compensation. However, like the 2x2 block of 1030, when all the values are different, the standard deviation is large, and the difference between the minimum value and the maximum value is also large, i.e. the block is the most serious block of Mura. Therefore, the module needs to be divided into the final 1 × 1 modules and processed to perform Mura compensation well.
In some embodiments, the Mura compensation needs to be performed in the direction and order of the raster scan, so the order of fig. 9 is applied to match the order of the raster scan. The coded data is obtained by coding actual data of 0-8 lines of raster scanning lines. The data matched in sequence is listed along the raster scanning 0 line, and then the coded data can be obtained. The encoded data is read and processed in order in a Mura decoder.
In some embodiments, the Mura compensation data obtained using the modular division approach necessarily results in a large number of modular division code (0xFF) values. Depending on the number of divided modules, a corresponding number of 0xFF values may also be generated. The divided modules are encoded with a value of 0 xFF. When the prefix code value is 0, 0xFF can be allocated, and 1 bit is substituted for the value 0xFF of 1 byte. The prefix code 10, i.e., the 0x2 value, is composed of 4 bits and can represent 16 values at the maximum. Thus, the value of 8 bits can be represented by 6 bits, and the data compression effect can be obtained. The reason for this is to allocate fewer bits to indexes that are more structurally frequent for the LUT. In most cases, the histogram frequency recorded in the value between 0 and 15 is large, and therefore, the data compression efficiency can be greatly improved. The indexes with smaller frequency are respectively allocated into 16, 32, 64 and 128 prefix codes 1100, 1101, 1110 and 1111, so as to realize lossless data compression.
In some embodiments, the encoded Mura compensation data includes prefix bits and suffix bits.
In some embodiments, step S500 further comprises:
and decoding the suffix bits of the compressed Mura compensation data in the raster scanning direction.
In some embodiments, as described above, the encoded Mura compensation data includes prefix bits and suffix bits. The Demura decoder needs to restore R, G, B compensation data compressed with the lossless compression code to the original. In order to restore the compressed code to the original state, after detecting the prefix code in the decoder, decoding the suffix bit according to the raster scanning direction, and obtaining the original Mura compensation code.
In some embodiments, decoding is performed in raster scan order, meaning that decoding is performed row by row, one by one. For example, assuming that the first module is divided into 8x8, the Mura compensation data of the 8x8 module needs to be kept until the decoding of all 8 lines is completed.
In a second aspect, an embodiment of the present application provides a display screen, including: a memory and a processor, wherein the memory has stored thereon a DeMura program which, when executed by the processor, implements the steps of the DeMura method of a display screen as described in the first aspect.
In some embodiments, the DeMura method for a display screen according to the first aspect is applied to a display screen, so that the display effect of an image can be effectively improved. For a specific implementation process, reference is made to the description of the first aspect, which is not repeated herein.
In some embodiments, the display screen may be an OLED display screen, an LCD display screen, or the like.
In a third aspect, an embodiment of the present application provides a readable storage medium, where a DeMura program is stored, and when executed by a processor, the DeMura program implements the steps of the DeMura method for a display screen according to the first aspect.
One of ordinary skill in the art will appreciate that the functional modules/units in the systems, devices disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof.
In a hardware implementation, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed by several physical components in cooperation. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any technology for storage of information such as computer readable instructions, data structures, program modules or other data, as is well known to those of ordinary skill in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, Digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can accessed by a computer. In addition, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media as known to those skilled in the art.
Although the application has been shown and described with respect to one or more implementations, equivalent alterations and modifications will occur to others skilled in the art based upon a reading and understanding of this specification and the annexed drawings. This application is intended to embrace all such modifications and variations and is limited only by the scope of the appended claims. In particular regard to the various functions performed by the above described components, the terms used to describe such components are intended to correspond, unless otherwise indicated, to any component which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary implementations of the specification.
That is, the above-mentioned embodiments are only some embodiments of the present application, and not intended to limit the scope of the present application, and all equivalent structures or equivalent flow transformations made by the contents of the specification and the drawings, such as the combination of technical features between the embodiments, or the direct or indirect application to other related technical fields, are included in the scope of the present application.
Without further limitation, reference to an element identified by the phrase "comprising an … …" does not exclude the presence of additional like elements in the process, article, or apparatus that comprises the element, and that elements, features, or elements having the same designation in different embodiments may or may not have the same meaning as that of the particular embodiment described herein, or that particular meaning should be determined from its interpretation in the particular embodiment or from its context in the particular embodiment.
In addition, although the terms "first, second, third, etc. are used herein to describe various information, such information should not be limited to these terms. These terms are only used to distinguish one type of information from another. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well. The terms "or" and/or "are to be construed as inclusive or meaning any one or any combination. An exception to this definition will occur only when a combination of elements, functions, steps or operations are inherently mutually exclusive in some way.
In this application, the word "in some embodiments" is used to mean "serving as an example, instance, or illustration. Any embodiment described herein as "in some embodiments" is not necessarily to be construed as preferred or advantageous over other embodiments. The previous description is provided to enable any person skilled in the art to make and use the present application. In the foregoing description, various details have been set forth for the purpose of explanation. It will be apparent to one of ordinary skill in the art that the present application may be practiced without these specific details. In other instances, well-known structures and processes are not shown in detail to avoid obscuring the description of the present application with unnecessary detail. Thus, the present application is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.
Claims (10)
1. A DeMura method of a display screen, comprising:
acquiring a pixel area of a display screen;
detecting the pixel region to acquire Mura data of the pixel region;
determining at least two different pixel regions according to the Mura data;
performing block division on the at least two different pixel regions using different division sizes;
and performing DeMura on the divided pixel regions.
2. The DeMura method of a display screen of claim 1, wherein the modular division of the at least two different pixel regions using different division sizes comprises:
performing module division on a pixel region with more Mura by using a smaller division size;
and performing module division on the pixel region with less Mura by using a larger division size.
3. The DeMura method of claim 2, wherein the performing block division on the Mura-rich pixel region by using a smaller division size comprises:
performing module division on the pixel region with more Mura by using a division size of 1x1 or 2x 2;
the module division is performed on the pixel area with less Mura by using a larger division size, and the module division comprises the following steps:
the block division is performed using a division size of 4x4 or 8x8 or 16x16 or 32x32 for the Mura-less pixel region.
4. The DeMura method of a display screen of claim 1, wherein the DeMura of the divided pixel regions comprises:
generating Mura compensation data by adopting a polynomial compensation mode;
and performing Mura compensation on the divided pixel regions by using the Mura compensation data.
5. DeMura method for a display screen according to claim 4, wherein the polynomial compensation comprises at least one of: polynomial compensation of order 1, polynomial compensation of order 2, polynomial compensation of order 3.
6. The DeMura method of a display screen of claim 1, wherein the DeMura of the divided pixel regions comprises:
searching the Mura compensation data by using an LUT lookup table mode, and coding the Mura compensation data according to a raster scanning direction;
and carrying out lossless compression on the encoded Mura compensation data.
7. The DeMura method for a display screen of claim 6, wherein the encoded Mura compensation data comprises prefix bits and suffix bits.
8. The DeMura method of a display screen of claim 7, wherein the DeMura of the divided pixel regions further comprises:
and decoding the suffix bits of the compressed Mura compensation data in the raster scanning direction.
9. A display screen, wherein the display screen comprises: memory and a processor, wherein the memory has stored thereon a DeMura program which when executed by the processor implements the steps of a DeMura method for a display screen according to any of claims 1 to 8.
10. A readable storage medium, having stored thereon a DeMura program which, when executed by a processor, implements the steps of a DeMura method for a display screen according to any of claims 1 to 8.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023097735A1 (en) * | 2021-11-30 | 2023-06-08 | Tcl华星光电技术有限公司 | Compensation method for display, and display |
| US12027131B2 (en) | 2021-11-30 | 2024-07-02 | Tcl China Star Optoelectronics Technology Co., Ltd. | Compensation method for display and display |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105632443A (en) * | 2016-03-09 | 2016-06-01 | 深圳市华星光电技术有限公司 | Mura phenomenon compensation method |
| US20160247432A1 (en) * | 2014-12-10 | 2016-08-25 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Method for obtaining compensation value of gray scale of a pixel |
| CN108877740A (en) * | 2018-07-25 | 2018-11-23 | 昆山国显光电有限公司 | Obtain method, apparatus, computer equipment and the storage medium of Mura offset data |
| KR20200066831A (en) * | 2018-12-03 | 2020-06-11 | (주)나이시스 | The non-uniforom compensation method of AMOLED display panel |
| CN112216236A (en) * | 2019-07-09 | 2021-01-12 | 陕西坤同半导体科技有限公司 | Display panel compensation method, device and system |
-
2021
- 2021-08-17 CN CN202110946879.9A patent/CN113687806A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20160247432A1 (en) * | 2014-12-10 | 2016-08-25 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Method for obtaining compensation value of gray scale of a pixel |
| CN105632443A (en) * | 2016-03-09 | 2016-06-01 | 深圳市华星光电技术有限公司 | Mura phenomenon compensation method |
| CN108877740A (en) * | 2018-07-25 | 2018-11-23 | 昆山国显光电有限公司 | Obtain method, apparatus, computer equipment and the storage medium of Mura offset data |
| US20200143726A1 (en) * | 2018-07-25 | 2020-05-07 | Kunshan Go-Visionox Opto-Electronics Co., Ltd. | Method and apparatus for acquiring mura compensation data, computer device and storage medium |
| KR20200066831A (en) * | 2018-12-03 | 2020-06-11 | (주)나이시스 | The non-uniforom compensation method of AMOLED display panel |
| CN112216236A (en) * | 2019-07-09 | 2021-01-12 | 陕西坤同半导体科技有限公司 | Display panel compensation method, device and system |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023097735A1 (en) * | 2021-11-30 | 2023-06-08 | Tcl华星光电技术有限公司 | Compensation method for display, and display |
| US12027131B2 (en) | 2021-11-30 | 2024-07-02 | Tcl China Star Optoelectronics Technology Co., Ltd. | Compensation method for display and display |
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