CN113687786A - EEPROM (electrically erasable programmable read-only memory) reading and writing method with variable data block width - Google Patents

EEPROM (electrically erasable programmable read-only memory) reading and writing method with variable data block width Download PDF

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CN113687786A
CN113687786A CN202110964240.3A CN202110964240A CN113687786A CN 113687786 A CN113687786 A CN 113687786A CN 202110964240 A CN202110964240 A CN 202110964240A CN 113687786 A CN113687786 A CN 113687786A
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address
block
state
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马朔昕
邰元
王坦
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Terry Technologies Nanjing Co ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614Improving the reliability of storage systems
    • G06F3/0616Improving the reliability of storage systems in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638Organizing or formatting or addressing of data
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638Organizing or formatting or addressing of data
    • G06F3/0644Management of space entities, e.g. partitions, extents, pools
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

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  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)

Abstract

The invention relates to an EEPROM data structure and a read-write method thereof, which comprises the steps of dynamically adapting the size of a write data block, circularly writing data into different areas in a storage space and shifting the data by a certain displacement after each cycle. The translation is based on the latest writing starting position in the last cycle after the last position, so that the displacement changes along with the cycle, address offset is performed on one data block in the previous cycle, the contents of the data blocks written by the two are mostly overlapped without changing, and the excessive service life caused by concentrated writing of certain addresses is avoided due to small part of stagger. The method solves the problem that the service life of the EEPROM storage unit is not evenly worn due to the data characteristics because a small part of written data frequently changes, most of the written data is usually 0 and only occasionally changes in some applications, and prolongs the service life of the EEPROM storage while ensuring the space use efficiency.

Description

EEPROM (electrically erasable programmable read-only memory) reading and writing method with variable data block width
Technical Field
The invention relates to the field of storage equipment, in particular to a method for prolonging the write life of an EEPROM (electrically erasable programmable read-only memory). .
Background
In the design of an embedded system, applications that need to retain part of dynamic parameters after power failure are often encountered, and an EEPROM (Electrically Erasable Programmable read only memory) is usually used to implement a power-off storage function.
However, EEPROM writing and erasing has a lifetime limit, typically 10 ten thousand times.
Generally, the method for prolonging the write life of the EEPROM is to fixedly divide the storage space of the EEPROM into a plurality of areas, and use each area in turn when writing each time, so as to avoid repeatedly writing the same address without using other spaces, and thus the write life of the whole storage space is uniformly consumed.
However, in some applications, some parameters may change each time data is stored, but most of the remaining parameters are 0 and need not be written repeatedly. According to the commonly used method of writing in a partitioned area, it means that the storage locations of the frequently changing parameters wear out at a much higher rate than the storage locations of the parameters which are usually 0, i.e. the write lifetime of the storage space does not wear out uniformly.
Disclosure of Invention
In view of the above, the present invention provides an EEPROM data structure and a read/write method thereof that dynamically reads and writes and cyclically adjusts a write offset according to a write data length, by recording a past written data position and adding an offset at an initial position thereof, the probability that frequently changing data and all 0 data are written into the same memory cell is the same regardless of an input data length, that is, the write life of all memory spaces is uniformly consumed.
In order to achieve the above object, the present invention provides a method for reading and writing an EEPROM with variable data block width, which comprises the following steps.
One of the steps is to obtain the number S of the state storage area units from the preset valuestateAnd the number of data storage area units SdataDividing a storage space into a state storage area and a data storage area;
each unit of the state storage area is identified by a state address which is increased from 0, and the capacity of each unit is fixed to a certain byte number and occupies 1 address; each unit stores three values of a data block number, a data block start address and a data block end address; all the data block numbers are written into S at resetstate+1;
Each unit of the data storage area is identified by a data address which is increased from 0, the capacity of each unit is fixed to a certain byte number and occupies 1 address, each unit stores data, and a plurality of continuous units form and store a data block;
the addresses are allowed to be circularly accessed, namely, the next bit of the tail address in the storage addresses automatically points to the first address in the storage addresses, and the next bit of the tail address in the data addresses automatically points to the first address in the data addresses; mathematically, this can be done by a remainder operation, symbolizing%.
And step two, starting a reading process, reading the data block numbers of each unit from the state storage area, forming a data block number sequence, reserving the front and back sequence of the data block number sequence, and allowing cyclic access in the following access process, namely defining the next bit at the tail of the sequence as the first bit of the sequence.
Thirdly, searching a discontinuous position of a first serial number backwards from the head in the data block serial number sequence;
if there is no discontinuous position, recording the current block state address Pindex=0, current block number Vindex=0, current block starting address is Bdata=0, outputting empty data, ending the reading process, and jumping to the eleventh step;
otherwise, recording the former address of the two numbers of the position with discontinuous numbers as the last written block state address Pindex,-1(if the last and first numbers are not consecutive, Pindex,-1=Sstate-1) and the next step is performed.
Fourthly, according to the last written block state address Pindex,-1The state information stored in the memory cell to which the state information is directed is read from the state memory area and is respectively recorded as the last write block number Vindex,-1Last written block start address Bdata,-1And the last write block end address Edata,-1
Step five, reading out and outputting B in the data storage areadata,-1To Edata,-1And finishing the reading process of the data in the address.
Sixth step, the current block number V is recordedindex=(Vindex,-1+1)%(Sstate+1), current block state address Pindex=(Pindex,-1+1)% Sstate
And seventhly, reading a pair of the data block starting address and the data block ending address of each unit from the state storage area, regarding each pair as an element, forming a data block starting and ending address sequence, keeping the front and back sequence of the data block starting and ending address sequence, and allowing cyclic access to the sequence in the following access process, namely defining the next bit at the tail of the sequence as the first bit of the sequence.
Eighthly, in the data block start-stop address sequence, writing the previous address (P) of the block state address from the lastindex,-1-1)%SstateInitially, the first unit containing the last written block end address is searched forward until the last address (P) after the last written block state address is returnedindex,-1+1)%Sstate
If the search has no result, the initial address of the current block is recorded as Bdata=(Edata,-1+1)%SdataAnd jumping to the eleventh step;
otherwise, the number of the data block recorded in the state storage unit corresponding to the searched element is recorded as a front overlapped block number Vindex,opAnd the next step is performed.
Nine steps, recording the number V of the rear block of the front overlapped blockindex,aop=(Vindex,op+1)%Sstate
Tenthly, reading the data block start address in the unit with the data block number equal to the block number after the previous overlapped block in the state storage area, and recording the data block start address as the block start address B after the previous overlapped blockdata,aop(ii) a Calculating the initial address B of the current blockdata=(Edata,aop+1)%Sdata
Eleven steps, starting a writing process, inputting data from the outside, the length of which is SblockCalculating the end address E of the current blockdata=(Bdata+Sblock-1)%Sdata
Twelve steps, the state V isindex,Bdata,EdataRespectively writing into the addresses PindexThe unit of the state storage area pointed to writes the input data into the address BdataStart to EdataOf data storage areas to which addresses pointAnd ending the writing process.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings of the embodiments can be obtained according to the drawings without creative efforts.
FIG. 1 is an initial state of an EEPROM in an exemplary process.
Fig. 2 is the state of the EEPROM after the 1 st write in the example configuration.
Fig. 3 is the EEPROM post 2 nd write state in the example configuration.
Fig. 4 is a state of the EEPROM after 3 rd writing in the exemplary configuration.
Fig. 5 is the EEPROM state after the 4 th write in the example configuration.
Fig. 6 is a state of the EEPROM after the 5 th writing in the exemplary configuration.
Fig. 7 is a state of the EEPROM after the 6 th writing in the exemplary configuration.
Fig. 8 is a state of the EEPROM after 7 th writing in the exemplary configuration.
Fig. 9 is the state of the EEPROM after the 8 th writing in the exemplary configuration.
Fig. 10 is a state of the EEPROM after the 9 th writing in the exemplary configuration.
Fig. 11 is a flow chart of the read-write flow.
Detailed Description
Reference will now be made in detail to the accompanying drawings and described embodiments. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the invention. It will be understood by those skilled in the art, however, that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures, components, and circuits have not been described in detail as not to unnecessarily obscure the embodiments.
In this embodiment, the parameters of the EEPROM write program are configured as: number of state area cells: sstate=6, number of data area units: sdata= 16; in addition, in order to visually reflect the data updating effect, frequently-changed data is assumed to be the first 2 bytes of the data block, and in order to facilitate identification, English capital and lower case values, namely a, b to z, are sequentially and circularly taken; the other infrequently numbered data is 0.
In order to meet the general computer program rules and facilitate understanding, the following data addresses and sequence numbers are all 0 as the minimum value.
In the EEPROM using flow aimed by the read-write method, the main situation is that the state information is read from the EEPROM when the program is started, and the state information is written back to the EEPROM to be stored in a power-off mode after the program is ended, so that the read operation is necessarily accompanied by one-time write operation, and the data related to the read operation and the write operation are closely related, so that the variables used in the read operation are not strictly distinguished to be used for the write operation or the read operation.
Since the read operation does not change the storage content, and the target content of the read operation is the data of the last write operation, the following diagrams are directed to the state after the write operation is completed; the state after the read operation, and the data read, can be viewed from the result diagram after the previous cycle.
For a read operation, the last write block number obtained by the operation is recorded as Vindex,-1The last write block status address is Pindex,-1The last write block starting address is Bdata,-1The last write block termination address is Edata,-1
For write-once operation, the overlapped block is marked with the number Vindex,op(ii) a The front overlapped block and the rear block are numbered Vindex,aopThe starting address of the block after the previous overlapped block is Bdata,aop(ii) a Recording the length of data to be written as SblockThe current block is numbered VindexThe current block status address is PindexThe starting address of the current block is BdataThe current block termination address is Edata
The physical storage form of each content area and the initial state of the memory are shown in fig. 1. Wherein the block numbers are all initialized to Sstate+1=7。
Several read and write cycles are illustrated below to show the update logic of the memory.
The state of the memory after the 1 st write is completed is shown in fig. 2. The gray background is marked with the changed content, and the operation flow is as follows.
The memory reads the previous state shown in fig. 1. Since the block number of all status addresses is Sstate+1, initial state, so empty data is read, and the current block state address is 0= Pindex Current block number 0= VindexThe current block starting address is 0= Bdata
Further, the externally obtained data input length is 3= SblockThus the current block end address Edata=(Bdata+Sblock-1)%Sdata=(0+3-1)%16=2。
Therefore, the state [ V ]index,Bdata,Edata]=[0,0,2]Writing PindexAddress of =0, write input data to Bdata=0 start to EdataAddress of = 2.
The state of the memory after the 2 nd write is completed is shown in fig. 3. With the gray background marked for the changed content. The operation flow is as follows.
The memory reads the previous state shown in fig. 2. The block number is not consecutive between state addresses 0 and 1, so the last written block state address is Pindex,-1= 0; reading the last written block number V from this addressindex,-1=0, last write block start address is Edata,-1=0, last write block end address is Edata,-1=2, [ E ] can be readdata,-1,Edata,-1]Segment data.
Further, the current state address Pindex=(Pindex,-1+1)%Sstate= 0+ 1% 6=1, and the current block number is Vindex=(Vindex,-1+1)%(Sstate+1) = (0+1)% (6+1) = 1; due to Edata,-1Starting address B of the current block, not included in the address range of other blocksdata=(Edata,-1+1)%Sdata=(2+1)%16=3。
Further, the memory obtained data input length is 4= SblockDue to the factAnd the current block end address Edata=(Bdata+Sblock-1)%Sdata=(3+4-1)%16=6。
Therefore, the state [ V ]index,Bdata,Edata]=[1,3,6]Writing PindexAddress of =1, write input data into Bdata=3 start to EdataAddress of = 6.
The state of the memory after the 3 rd write is completed is shown in fig. 4. With the gray background marked for the changed content. The operation flow is as follows.
The memory reads the previous state shown in fig. 3. The block number is not consecutive between status addresses 1 and 2, so the last written block status address is Pindex,-1= 1; reading the last written block number V from this addressindex,-1=1, last write block start address is Edata,-1=3, last write block end address is Edata,-1=6, [ E ] can be readdata,-1,Edata,-1]Segment data.
Further, the current state address Pindex=(Pindex,-1+1)%Sstate= 1+ 1% 6=2, current block number Vindex=(Vindex,-1+1)%(Sstate+1) = (1+1)% (6+1) = 2; due to Edata,-1Starting address B of the current block, not included in the address range of other blocksdata=(Edata,-1+1)%Sdata=(6+1)%16=7。
Further, the memory obtained data input length is 5= SblockThus the current block end address Edata=(Bdata+Sblock-1)%Sdata=(7+5-1)%16=11。
Therefore, the state [ V ]index,Bdata,Edata]=[2,7,11]Writing PindexAddress of =2, write input data to Bdata=7 start to EdataAddress of = 11.
The state of the memory after the 4 th write is completed is shown in fig. 5. With the gray background marked for the changed content. The operation flow is as follows.
The memory reads the previous state shown in fig. 4. The block number is at state address 2 and3, so that the last written block state address is Pindex,-1= 2; reading the last written block number V from this addressindex,-1=2, last write block start address is Edata,-1=7, last write block end address is Edata,-1=11, [ E ] can be readdata,-1,Edata,-1]Segment data.
Further, the current state address Pindex=(Pindex,-1+1)%Sstate= 2+ 1% 6=3, current block number Vindex=(Vindex,-1+1)%(Sstate+1) = (2+1)% (6+1) = 3; due to Edata,-1Starting address B of the current block, not included in the address range of other blocksdata=(Edata,-1+1)%Sdata=(11+1)%16=12。
Further, the memory obtained data input length is 5= SblockThus the current block end address Edata=(Bdata+Sblock-1)%Sdata=(12+5-1)%16=0。
Therefore, the state [ V ]index,Bdata,Edata]=[3,12,0]Writing PindexAddress of =3, write input data to Bdata=12 start to EdataAddress of =0, i.e. from BdataWriting until the end of the data area, and writing the rest from the beginning of the data area until Edata
In the following loop, pre-overlap fast processing will occur.
The state of the memory after the 5 th write is completed is shown in fig. 6. With the gray background marked for the changed content. The operation flow is as follows.
The memory reads the previous state shown in fig. 5. The block number is not consecutive between status addresses 3 and 4, so the last written block status address is Pindex,-1= 3; reading the last written block number V from this addressindex,-1=3, last write block start address is Bdata,-1=12, last write block end address is Edata,-1=0, [ E ] can be readdata,-1,Edata,-1]Segment data.
Further, the current state address Pindex=(Pindex,-1+1)%Sstate= 3+ 1% 6=4, and the current block number is Vindex=(Vindex,-1+1)%(Sstate+1) = (3+1)% (6+1) = 4; seeking forward from the last written block due to Edata,-1=0 address range [0,2 ] included in block number 0]Inner, thus the front overlapped block number is 0= Vindex,op
Further, the front overlapped block and the rear block are numbered Vindex,aop=(Vindex,op+1)%Sstate= 0+ 1% = (5 = 1); according to number Vindex,aopThe starting address of the block after reading the pre-overlap block is Bdata,aop=3。
Further, the current block start address Bdata=(Edata,aop+1)%Sdata= 3+ 1% 16=4, and the memory obtained data input length is 5= SblockThe current block end address Edata=(Bdata+Sblock-1)%Sdata=(4+5-1)%16=8。
Therefore, the state [ V ]index,Bdata,Edata]=[4,4,8]Writing PindexAddress of =4, write input data to Bdata=4 start to EdataAddress of = 8.
The state of the memory after the 6 th write is completed is shown in fig. 7. With the gray background marked for the changed content. The operation flow is as follows.
The memory reads the previous state shown in FIG. 6; the block number is not consecutive between status addresses 4 and 5, so the last written block status address is Pindex,-1= 4; reading the last written block number V from this addressindex,-1=4, last write block start address is Bdata,-1=4, last write block end address is Edata,-1=8, [ E ] can be readdata,-1,Edata,-1]Segment data.
Further, the current state address Pindex=(Pindex,-1+1)%Sstate= 4+ 1% 6=5, current block number Vindex=(Vindex,-1+1)%(Sstate+1) = (4+1)% (6+1) =5; seeking forward from the last written block due to Edata,-1=8 address range [7,11 ] included in block number 2]Inner, thus the front overlapped block number is 2=Vindex,op
Further, the front overlapped block and the rear block are numbered Vindex,aop=(Vindex,op+1)%Sstate= 2+ 1% = (5 = 3); according to number Vindex,aopThe starting address of the block after reading the pre-overlap block is Bdata,aop=12。
Further, the current block start address Bdata=(Edata,aop+1)%Sdata= (12+1)%16= 13; memory get data input length of 6= SblockThe current block end address Edata=(Bdata+Sblock-1)%Sdata=(13+6-1)%16=2。
Therefore, the state [ V ]index,Bdata,Edata]=[5,13,2]Writing PindexAddress of =5, write input data into Bdata=13 start to EdataAddress of =2, i.e. from BdataWriting until the end of the data area, and writing the rest from the beginning of the data area until Edata
The state of the memory after the 7 th write is completed is shown in fig. 8. With the gray background marked for the changed content. The operation flow is as follows.
The memory reads the previous state shown in fig. 7. The block number is not consecutive between status addresses 5 and 0, so the last written block status address is Pindex,-1=5; reading the last written block number V from this addressindex,-1=5, last write block start address is Bdata,-1=13, last write block end address is Edata,-1=2, [ E ] can be readdata,-1,Edata,-1]Segment data.
Further, the current state address Pindex=(Pindex,-1+1)%Sstate= 5+1)%6=0, and the current block number is Vindex=(Vindex,-1+1)%(Sstate+1) = (5+1)% (6+1) = 6; seeking forward from the last written block due to Edata,-1=2 address range [0,2 ] included in block number 0]Inner (pre-write state, i.e. shown in fig. 7), so the pre-overlap block number is 0= Vindex,op
Further, the front overlapped block and the rear block are numbered Vindex,aop=(Vindex,op+1)%Sstate= 0+ 1% = (5 = 1); according to number Vindex,aopThe starting address of the block after reading the pre-overlap block is Bdata,aop=3。
Further, the current block start address Bdata=(Edata,aop+1)%Sdata=(3+1)%16=4。
Further, the memory obtained data input length is 7= SblockThe current block end address Edata=(Bdata+Sblock-1)%Sdata=(4+7-1)%16=10。
Therefore, the state [ V ]index,Bdata,Edata]=[6,4,10]Writing PindexAddress of =0, write input data to Bdata=4 start to EdataAddress of = 10.
The state of the memory after the 8 th write is completed is shown in fig. 9. With the gray background marked for the changed content. The operation flow is as follows.
The memory reads the previous state shown in FIG. 8, the block number is not consecutive between state addresses 0 and 1, so the last written block state address is Pindex,-1= 0; reading the last written block number V from this addressindex,-1=6, last write block start address is Bdata,-1=4, last write block end address is Edata,-1=10, [ E ] can be readdata,-1,Edata,-1]Segment data.
Further, the current state address Pindex=(Pindex,-1+1)%Sstate= 0+ 1% 6=1, and the current block number is Vindex=(Vindex,-1+1)%(Sstate+1) = (6+1)% (6+1) = 0; seeking forward from the last written block due to Edata,-1=10 address range [7,11 ] included in block number 2]Inner, thus the front overlapped block number is 2= Vindex,op
Further, the front overlapped block and the rear block are numbered Vindex,aop=(Vindex,op+1)%Sstate= 2+1)%6= 3; according to number Vindex,aopThe starting address of the block after reading the pre-overlap block is Bdata,aop=12。
Further, the current block start address Bdata=(Edata,aop+1)%Sdata= (12+1)%16= 13; memory get data input length of 4= SblockThe current block end address Edata=(Bdata+Sblock-1)%Sdata=(13+4-1)%16=0。
Therefore, the state [ V ]index,Bdata,Edata]=[0,13,0]Writing PindexAddress of =1, write input data into Bdata=14 start to EdataAddress of =0, i.e. from BdataWriting until the end of the data area, and writing the rest from the beginning of the data area until Edata
The state of the memory after the 9 th write is completed is shown in fig. 10. With the gray background marked for the changed content. The operation flow is as follows.
The memory reads the previous state shown in FIG. 9, the block number is not consecutive between state addresses 1 and 2, so the last written block state address is Pindex,-1= 1; reading the last written block number V from this addressindex,-1=0, last write block start address is Bdata,-1=14, last write block end address is Edata,-1=0, [ E ] can be readdata,-1,Edata,-1]Segment data.
Further, the current state address Pindex=(Pindex,-1+1)%Sstate= 1+ 1% 6=2, current block number Vindex=(Vindex,-1+1)%(Sstate+1) = (0+1)% (6+1) = 1; seeking forward from the last written block due to Edata,-1=0 address range [13,2 ] included in block number 5]Inner, thus the front overlapped block number is 5= Vindex,op
Further, the front overlapped block and the rear block are numbered Vindex,aop=(Vindex,op+1)%Sstate= 5+1)%6= 0; according to number Vindex,aopThe starting address of the block after reading the pre-overlap block is Bdata,aop=4。
Further, the current block start address Bdata=(Edata,aop+1)%Sdata= 4+ 1% 16=5, and the memory acquisition data input length is 4= SblockThe current block end address Edata=(Bdata+Sblock-1)%Sdata=(5+4-1)%16=8。
Therefore, the state [ V ]index,Bdata,Edata]=[1,5,8]Writing PindexAddress of =2, write input data to Bdata=5 start to EdataAddress of = 8.
So far, the key steps in the flow of completing one cycle for all variables have been demonstrated.
The present invention is not limited to the above embodiments, and the technical solutions of the above embodiments of the present invention may be combined with each other in a crossing manner to form a new technical solution, and any technical solutions formed by using equivalent substitutions fall within the scope of the present invention.

Claims (1)

1. An EEPROM data structure and a read-write method thereof are characterized by comprising the following steps:
one of the steps is to obtain the number S of the state storage area units from the preset valuestateAnd the number of data storage area units SdataDividing a storage space into a state storage area and a data storage area;
each unit of the state storage area is identified by a state address which is increased from 0, and the capacity of each unit is fixed to a certain byte number and occupies 1 address; each unit stores three values of a data block number, a data block start address and a data block end address; all the data block numbers are written into S at resetstate+1;
Each unit of the data storage area is identified by a data address which is increased from 0, the capacity of each unit is fixed to a certain byte number and occupies 1 address, each unit stores data, and a plurality of continuous units form and store a data block;
the addresses are allowed to be circularly accessed, namely, the next bit of the tail address in the storage addresses automatically points to the first address in the storage addresses, and the next bit of the tail address in the data addresses automatically points to the first address in the data addresses; mathematically, this can be done by a remainder operation, with the notation;
step two, starting a reading process, reading the data block numbers of each unit from the state storage area, forming a data block number sequence, reserving the front and back sequence of the data block number sequence, and allowing cyclic access in the following access process, namely defining the next bit at the tail of the sequence as the first bit of the sequence;
thirdly, searching a discontinuous position of a first serial number backwards from the head in the data block serial number sequence;
if there is no discontinuous position, recording the current block state address Pindex=0, current block number Vindex=0, current block starting address is Bdata=0, outputting empty data, ending the reading process, and jumping to the eleventh step;
otherwise, recording the former address of the two numbers of the position with discontinuous numbers as the last written block state address Pindex,-1(if the last and first numbers are not consecutive, Pindex,-1=Sstate-1) and the next step;
fourthly, according to the last written block state address Pindex,-1The state information stored in the memory cell to which the state information is directed is read from the state memory area and is respectively recorded as the last write block number Vindex,-1Last written block start address Bdata,-1And the last write block end address Edata,-1
Step five, reading out and outputting B in the data storage areadata,-1To Edata,-1Ending the reading process of the data in the address;
sixth step, the current block number V is recordedindex=(Vindex,-1+1)%(Sstate+1), current block state address Pindex=(Pindex,-1+1)% Sstate
Reading a pair of the data block start address and the data block end address of each unit from the state storage area, regarding each pair as an element, forming a data block start-stop address sequence and keeping the front-back sequence, and allowing cyclic access to the sequence in the following access process, namely defining the next bit at the end of the sequence as the first bit of the sequence;
eighthly, in the data block start-stop address sequence, writing the previous address (P) of the block state address from the lastindex,-1-1)%SstateStarting, to the last address (P) of the last write block status addressindex,-1+1)%SstateEnding, searching forward the first unit containing the last written block end address in the interval of the start-stop address;
if the search has no result, the initial address of the current block is recorded as Bdata=(Edata,-1+1)%SdataAnd jumping to the eleventh step;
otherwise, the number of the data block recorded in the state storage unit corresponding to the searched element is recorded as a front overlapped block number Vindex,opAnd carrying out the next step;
nine steps, recording the number V of the rear block of the front overlapped blockindex,aop=(Vindex,op+1)%Sstate
Tenthly, reading the data block start address in the unit with the data block number equal to the block number after the previous overlapped block in the state storage area, and recording the data block start address as the block start address B after the previous overlapped blockdata,aop(ii) a Calculating the initial address B of the current blockdata=(Edata,aop+1)%Sdata
Eleven steps, starting a writing process, inputting data from the outside, the length of which is SblockCalculating the end address E of the current blockdata=(Bdata+Sblock-1)%Sdata
Twelve steps, the state V isindex,Bdata,EdataRespectively writing into the addresses PindexThe unit of the state storage area pointed to writes the input data into the address BdataStart to EdataAnd ending the writing process by the unit of the data storage area pointed by the address.
CN202110964240.3A 2021-08-22 2021-08-22 EEPROM (electrically erasable programmable read-only memory) reading and writing method with variable data block width Pending CN113687786A (en)

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