CN113687786A

CN113687786A - A method of reading and writing EEPROM with variable data block width

Info

Publication number: CN113687786A
Application number: CN202110964240.3A
Authority: CN
Inventors: 马朔昕; 邰元; 王坦
Original assignee: Terry Technologies Nanjing Co ltd
Current assignee: Terry Technologies Nanjing Co ltd
Priority date: 2021-08-22
Filing date: 2021-08-22
Publication date: 2021-11-23

Abstract

The invention relates to an EEPROM data structure and a reading and writing method thereof, including dynamically adapting the size of the written data block, cyclically writing data into different areas in the storage space, and translating it by a certain displacement after each cycle. The base of translation is the latest writing start position in the last cycle after the last position, so the displacement changes with the cycle, and at the same time, the address offset is performed compared to a data block in the previous cycle, and the two write The content of the incoming data blocks is mostly overlapped without changing, and a small part is staggered, which avoids writing certain addresses in a centralized manner and consumes too much life. The above method solves the problem that a small part of the data written in some applications changes frequently, and most of the data is usually 0 and only changes occasionally. The problem of uneven wear and tear of the life of the EEPROM memory cells caused by such data characteristics can extend the EEPROM while ensuring space usage efficiency. lifespan of memory.

Description

EEPROM (electrically erasable programmable read-only memory) reading and writing method with variable data block width

Technical Field

The invention relates to the field of storage equipment, in particular to a method for prolonging the write life of an EEPROM (electrically erasable programmable read-only memory). .

Background

In the design of an embedded system, applications that need to retain part of dynamic parameters after power failure are often encountered, and an EEPROM (Electrically Erasable Programmable read only memory) is usually used to implement a power-off storage function.

However, EEPROM writing and erasing has a lifetime limit, typically 10 ten thousand times.

Generally, the method for prolonging the write life of the EEPROM is to fixedly divide the storage space of the EEPROM into a plurality of areas, and use each area in turn when writing each time, so as to avoid repeatedly writing the same address without using other spaces, and thus the write life of the whole storage space is uniformly consumed.

However, in some applications, some parameters may change each time data is stored, but most of the remaining parameters are 0 and need not be written repeatedly. According to the commonly used method of writing in a partitioned area, it means that the storage locations of the frequently changing parameters wear out at a much higher rate than the storage locations of the parameters which are usually 0, i.e. the write lifetime of the storage space does not wear out uniformly.

Disclosure of Invention

In view of the above, the present invention provides an EEPROM data structure and a read/write method thereof that dynamically reads and writes and cyclically adjusts a write offset according to a write data length, by recording a past written data position and adding an offset at an initial position thereof, the probability that frequently changing data and all 0 data are written into the same memory cell is the same regardless of an input data length, that is, the write life of all memory spaces is uniformly consumed.

In order to achieve the above object, the present invention provides a method for reading and writing an EEPROM with variable data block width, which comprises the following steps.

One of the steps is to obtain the number S of the state storage area units from the preset value_stateAnd the number of data storage area units S_dataDividing a storage space into a state storage area and a data storage area;

each unit of the state storage area is identified by a state address which is increased from 0, and the capacity of each unit is fixed to a certain byte number and occupies 1 address; each unit stores three values of a data block number, a data block start address and a data block end address; all the data block numbers are written into S at reset_state+1；

Each unit of the data storage area is identified by a data address which is increased from 0, the capacity of each unit is fixed to a certain byte number and occupies 1 address, each unit stores data, and a plurality of continuous units form and store a data block;

the addresses are allowed to be circularly accessed, namely, the next bit of the tail address in the storage addresses automatically points to the first address in the storage addresses, and the next bit of the tail address in the data addresses automatically points to the first address in the data addresses; mathematically, this can be done by a remainder operation, symbolizing%.

And step two, starting a reading process, reading the data block numbers of each unit from the state storage area, forming a data block number sequence, reserving the front and back sequence of the data block number sequence, and allowing cyclic access in the following access process, namely defining the next bit at the tail of the sequence as the first bit of the sequence.

Thirdly, searching a discontinuous position of a first serial number backwards from the head in the data block serial number sequence;

if there is no discontinuous position, recording the current block state address P_index=0, current block number V_index=0, current block starting address is B_data=0, outputting empty data, ending the reading process, and jumping to the eleventh step;

otherwise, recording the former address of the two numbers of the position with discontinuous numbers as the last written block state address P_index,-1(if the last and first numbers are not consecutive, P_index,-1=S_state-1) and the next step is performed.

Fourthly, according to the last written block state address P_index,-1The state information stored in the memory cell to which the state information is directed is read from the state memory area and is respectively recorded as the last write block number V_index,-1Last written block start address B_data,-1And the last write block end address E_data,-1。

Step five, reading out and outputting B in the data storage area_data,-1To E_data,-1And finishing the reading process of the data in the address.

Sixth step, the current block number V is recorded_index=(V_index,-1+1)%(S_state+1), current block state address P_index=(P_index,-1+1)% S_state。

And seventhly, reading a pair of the data block starting address and the data block ending address of each unit from the state storage area, regarding each pair as an element, forming a data block starting and ending address sequence, keeping the front and back sequence of the data block starting and ending address sequence, and allowing cyclic access to the sequence in the following access process, namely defining the next bit at the tail of the sequence as the first bit of the sequence.

Eighthly, in the data block start-stop address sequence, writing the previous address (P) of the block state address from the last_index,-1-1)%S_stateInitially, the first unit containing the last written block end address is searched forward until the last address (P) after the last written block state address is returned_index,-1+1)%S_state；

If the search has no result, the initial address of the current block is recorded as B_data=(E_data,-1+1)%S_dataAnd jumping to the eleventh step;

otherwise, the number of the data block recorded in the state storage unit corresponding to the searched element is recorded as a front overlapped block number V_index,opAnd the next step is performed.

Nine steps, recording the number V of the rear block of the front overlapped block_index,aop=(V_index,op+1)%S_state。

Tenthly, reading the data block start address in the unit with the data block number equal to the block number after the previous overlapped block in the state storage area, and recording the data block start address as the block start address B after the previous overlapped block_data,aop(ii) a Calculating the initial address B of the current block_data=(E_data,aop+1)%S_data。

Eleven steps, starting a writing process, inputting data from the outside, the length of which is S_blockCalculating the end address E of the current block_data=(B_data+S_block-1)%S_data。

Twelve steps, the state V is_index,B_data，E_dataRespectively writing into the addresses P_indexThe unit of the state storage area pointed to writes the input data into the address B_dataStart to E_dataOf data storage areas to which addresses pointAnd ending the writing process.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings of the embodiments can be obtained according to the drawings without creative efforts.

FIG. 1 is an initial state of an EEPROM in an exemplary process.

Fig. 2 is the state of the EEPROM after the 1 st write in the example configuration.

Fig. 3 is the EEPROM post 2 nd write state in the example configuration.

Fig. 4 is a state of the EEPROM after 3 rd writing in the exemplary configuration.

Fig. 5 is the EEPROM state after the 4 th write in the example configuration.

Fig. 6 is a state of the EEPROM after the 5 th writing in the exemplary configuration.

Fig. 7 is a state of the EEPROM after the 6 th writing in the exemplary configuration.

Fig. 8 is a state of the EEPROM after 7 th writing in the exemplary configuration.

Fig. 9 is the state of the EEPROM after the 8 th writing in the exemplary configuration.

Fig. 10 is a state of the EEPROM after the 9 th writing in the exemplary configuration.

Fig. 11 is a flow chart of the read-write flow.

Detailed Description

Reference will now be made in detail to the accompanying drawings and described embodiments. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the invention. It will be understood by those skilled in the art, however, that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures, components, and circuits have not been described in detail as not to unnecessarily obscure the embodiments.

In this embodiment, the parameters of the EEPROM write program are configured as: number of state area cells: s_state=6, number of data area units: s_data= 16; in addition, in order to visually reflect the data updating effect, frequently-changed data is assumed to be the first 2 bytes of the data block, and in order to facilitate identification, English capital and lower case values, namely a, b to z, are sequentially and circularly taken; the other infrequently numbered data is 0.

In order to meet the general computer program rules and facilitate understanding, the following data addresses and sequence numbers are all 0 as the minimum value.

In the EEPROM using flow aimed by the read-write method, the main situation is that the state information is read from the EEPROM when the program is started, and the state information is written back to the EEPROM to be stored in a power-off mode after the program is ended, so that the read operation is necessarily accompanied by one-time write operation, and the data related to the read operation and the write operation are closely related, so that the variables used in the read operation are not strictly distinguished to be used for the write operation or the read operation.

Since the read operation does not change the storage content, and the target content of the read operation is the data of the last write operation, the following diagrams are directed to the state after the write operation is completed; the state after the read operation, and the data read, can be viewed from the result diagram after the previous cycle.

For a read operation, the last write block number obtained by the operation is recorded as V_index,-1The last write block status address is P_index,-1The last write block starting address is B_data,-1The last write block termination address is E_data,-1。

For write-once operation, the overlapped block is marked with the number V_index,op(ii) a The front overlapped block and the rear block are numbered V_index,aopThe starting address of the block after the previous overlapped block is B_data,aop(ii) a Recording the length of data to be written as S_blockThe current block is numbered V_indexThe current block status address is P_indexThe starting address of the current block is B_dataThe current block termination address is E_data。

The physical storage form of each content area and the initial state of the memory are shown in fig. 1. Wherein the block numbers are all initialized to S_state+1=7。

Several read and write cycles are illustrated below to show the update logic of the memory.

The state of the memory after the 1 st write is completed is shown in fig. 2. The gray background is marked with the changed content, and the operation flow is as follows.

The memory reads the previous state shown in fig. 1. Since the block number of all status addresses is S_state+1, initial state, so empty data is read, and the current block state address is 0= P_index Current block number 0= V_indexThe current block starting address is 0= B_data。

Further, the externally obtained data input length is 3= S_blockThus the current block end address E_data=(B_data+S_block-1)%S_data=(0+3-1)%16=2。

Therefore, the state [ V ]_index,B_data，E_data]=[0,0,2]Writing P_indexAddress of =0, write input data to B_data=0 start to E_dataAddress of = 2.

The state of the memory after the 2 nd write is completed is shown in fig. 3. With the gray background marked for the changed content. The operation flow is as follows.

The memory reads the previous state shown in fig. 2. The block number is not consecutive between state addresses 0 and 1, so the last written block state address is P_index,-1= 0; reading the last written block number V from this address_index,-1=0, last write block start address is E_data,-1=0, last write block end address is E_data,-1=2, [ E ] can be read_data,-1,E_data,-1]Segment data.

Further, the current state address P_index=(P_index,-1+1)%S_state= 0+ 1% 6=1, and the current block number is V_index=(V_index,-1+1)%(S_state+1) = (0+1)% (6+1) = 1; due to E_data,-1Starting address B of the current block, not included in the address range of other blocks_data=(E_data,-1+1)%S_data=(2+1)%16=3。

Further, the memory obtained data input length is 4= S_blockDue to the factAnd the current block end address E_data=(B_data+S_block-1)%S_data=(3+4-1)%16=6。

Therefore, the state [ V ]_index,B_data，E_data]=[1,3,6]Writing P_indexAddress of =1, write input data into B_data=3 start to E_dataAddress of = 6.

The state of the memory after the 3 rd write is completed is shown in fig. 4. With the gray background marked for the changed content. The operation flow is as follows.

The memory reads the previous state shown in fig. 3. The block number is not consecutive between status addresses 1 and 2, so the last written block status address is P_index,-1= 1; reading the last written block number V from this address_index,-1=1, last write block start address is E_data,-1=3, last write block end address is E_data,-1=6, [ E ] can be read_data,-1,E_data,-1]Segment data.

Further, the current state address P_index=(P_index,-1+1)%S_state= 1+ 1% 6=2, current block number V_index=(V_index,-1+1)%(S_state+1) = (1+1)% (6+1) = 2; due to E_data,-1Starting address B of the current block, not included in the address range of other blocks_data=(E_data,-1+1)%S_data=(6+1)%16=7。

Further, the memory obtained data input length is 5= S_blockThus the current block end address E_data=(B_data+S_block-1)%S_data=(7+5-1)%16=11。

Therefore, the state [ V ]_index,B_data，E_data]=[2,7,11]Writing P_indexAddress of =2, write input data to B_data=7 start to E_dataAddress of = 11.

The state of the memory after the 4 th write is completed is shown in fig. 5. With the gray background marked for the changed content. The operation flow is as follows.

The memory reads the previous state shown in fig. 4. The block number is at state address 2 and3, so that the last written block state address is P_index,-1= 2; reading the last written block number V from this address_index,-1=2, last write block start address is E_data,-1=7, last write block end address is E_data,-1=11, [ E ] can be read_data,-1,E_data,-1]Segment data.

Further, the current state address P_index=(P_index,-1+1)%S_state= 2+ 1% 6=3, current block number V_index=(V_index,-1+1)%(S_state+1) = (2+1)% (6+1) = 3; due to E_data,-1Starting address B of the current block, not included in the address range of other blocks_data=(E_data,-1+1)%S_data=(11+1)%16=12。

Further, the memory obtained data input length is 5= S_blockThus the current block end address E_data=(B_data+S_block-1)%S_data=(12+5-1)%16=0。

Therefore, the state [ V ]_index,B_data，E_data]=[3,12,0]Writing P_indexAddress of =3, write input data to B_data=12 start to E_dataAddress of =0, i.e. from B_dataWriting until the end of the data area, and writing the rest from the beginning of the data area until E_data。

In the following loop, pre-overlap fast processing will occur.

The state of the memory after the 5 th write is completed is shown in fig. 6. With the gray background marked for the changed content. The operation flow is as follows.

The memory reads the previous state shown in fig. 5. The block number is not consecutive between status addresses 3 and 4, so the last written block status address is P_index,-1= 3; reading the last written block number V from this address_index,-1=3, last write block start address is B_data,-1=12, last write block end address is E_data,-1=0, [ E ] can be read_data,-1,E_data,-1]Segment data.

Further, the current state address P_index=(P_index,-1+1)%S_state= 3+ 1% 6=4, and the current block number is V_index=(V_index,-1+1)%(S_state+1) = (3+1)% (6+1) = 4; seeking forward from the last written block due to E_data,-1=0 address range [0,2 ] included in block number 0]Inner, thus the front overlapped block number is 0= V_index,op。

Further, the front overlapped block and the rear block are numbered V_index,aop=(V_index,op+1)%S_state= 0+ 1% = (5 = 1); according to number V_index,aopThe starting address of the block after reading the pre-overlap block is B_data,aop=3。

Further, the current block start address B_data=(E_data,aop+1)%S_data= 3+ 1% 16=4, and the memory obtained data input length is 5= S_blockThe current block end address E_data=(B_data+S_block-1)%S_data=(4+5-1)%16=8。

Therefore, the state [ V ]_index,B_data，E_data]=[4,4,8]Writing P_indexAddress of =4, write input data to B_data=4 start to E_dataAddress of = 8.

The state of the memory after the 6 th write is completed is shown in fig. 7. With the gray background marked for the changed content. The operation flow is as follows.

The memory reads the previous state shown in FIG. 6; the block number is not consecutive between status addresses 4 and 5, so the last written block status address is P_index,-1= 4; reading the last written block number V from this address_index,-1=4, last write block start address is B_data,-1=4, last write block end address is E_data,-1=8, [ E ] can be read_data,-1,E_data,-1]Segment data.

Further, the current state address P_index=(P_index,-1+1)%S_state= 4+ 1% 6=5, current block number V_index=(V_index,-1+1)%(S_state+1) = (4+1)% (6+1) =5; seeking forward from the last written block due to E_data,-1=8 address range [7,11 ] included in block number 2]Inner, thus the front overlapped block number is 2=V_index,op。

Further, the front overlapped block and the rear block are numbered V_index,aop=(V_index,op+1)%S_state= 2+ 1% = (5 = 3); according to number V_index,aopThe starting address of the block after reading the pre-overlap block is B_data,aop=12。

Further, the current block start address B_data=(E_data,aop+1)%S_data= (12+1)%16= 13; memory get data input length of 6= S_blockThe current block end address E_data=(B_data+S_block-1)%S_data=(13+6-1)%16=2。

Therefore, the state [ V ]_index,B_data，E_data]=[5,13,2]Writing P_indexAddress of =5, write input data into B_data=13 start to E_dataAddress of =2, i.e. from B_dataWriting until the end of the data area, and writing the rest from the beginning of the data area until E_data。

The state of the memory after the 7 th write is completed is shown in fig. 8. With the gray background marked for the changed content. The operation flow is as follows.

The memory reads the previous state shown in fig. 7. The block number is not consecutive between status addresses 5 and 0, so the last written block status address is P_index,-1=5; reading the last written block number V from this address_index,-1=5, last write block start address is B_data,-1=13, last write block end address is E_data,-1=2, [ E ] can be read_data,-1,E_data,-1]Segment data.

Further, the current state address P_index=(P_index,-1+1)%S_state= 5+1)%6=0, and the current block number is V_index=(V_index,-1+1)%(S_state+1) = (5+1)% (6+1) = 6; seeking forward from the last written block due to E_data,-1=2 address range [0,2 ] included in block number 0]Inner (pre-write state, i.e. shown in fig. 7), so the pre-overlap block number is 0= V_index,op。

Further, the current block start address B_data=(E_data,aop+1)%S_data=(3+1)%16=4。

Further, the memory obtained data input length is 7= S_blockThe current block end address E_data=(B_data+S_block-1)%S_data=(4+7-1)%16=10。

Therefore, the state [ V ]_index,B_data，E_data]=[6,4,10]Writing P_indexAddress of =0, write input data to B_data=4 start to E_dataAddress of = 10.

The state of the memory after the 8 th write is completed is shown in fig. 9. With the gray background marked for the changed content. The operation flow is as follows.

The memory reads the previous state shown in FIG. 8, the block number is not consecutive between state addresses 0 and 1, so the last written block state address is P_index,-1= 0; reading the last written block number V from this address_index,-1=6, last write block start address is B_data,-1=4, last write block end address is E_data,-1=10, [ E ] can be read_data,-1,E_data,-1]Segment data.

Further, the current state address P_index=(P_index,-1+1)%S_state= 0+ 1% 6=1, and the current block number is V_index=(V_index,-1+1)%(S_state+1) = (6+1)% (6+1) = 0; seeking forward from the last written block due to E_data,-1=10 address range [7,11 ] included in block number 2]Inner, thus the front overlapped block number is 2= V_index,op。

Further, the front overlapped block and the rear block are numbered V_index,aop=(V_index,op+1)%S_state= 2+1)%6= 3; according to number V_index,aopThe starting address of the block after reading the pre-overlap block is B_data,aop=12。

Further, the current block start address B_data=(E_data,aop+1)%S_data= (12+1)%16= 13; memory get data input length of 4= S_blockThe current block end address E_data=(B_data+S_block-1)%S_data=(13+4-1)%16=0。

Therefore, the state [ V ]_index,B_data，E_data]=[0,13,0]Writing P_indexAddress of =1, write input data into B_data=14 start to E_dataAddress of =0, i.e. from B_dataWriting until the end of the data area, and writing the rest from the beginning of the data area until E_data。

The state of the memory after the 9 th write is completed is shown in fig. 10. With the gray background marked for the changed content. The operation flow is as follows.

The memory reads the previous state shown in FIG. 9, the block number is not consecutive between state addresses 1 and 2, so the last written block state address is P_index,-1= 1; reading the last written block number V from this address_index,-1=0, last write block start address is B_data,-1=14, last write block end address is E_data,-1=0, [ E ] can be read_data,-1,E_data,-1]Segment data.

Further, the current state address P_index=(P_index,-1+1)%S_state= 1+ 1% 6=2, current block number V_index=(V_index,-1+1)%(S_state+1) = (0+1)% (6+1) = 1; seeking forward from the last written block due to E_data,-1=0 address range [13,2 ] included in block number 5]Inner, thus the front overlapped block number is 5= V_index,op。

Further, the front overlapped block and the rear block are numbered V_index,aop=(V_index,op+1)%S_state= 5+1)%6= 0; according to number V_index,aopThe starting address of the block after reading the pre-overlap block is B_data,aop=4。

Further, the current block start address B_data=(E_data,aop+1)%S_data= 4+ 1% 16=5, and the memory acquisition data input length is 4= S_blockThe current block end address E_data=(B_data+S_block-1)%S_data=(5+4-1)%16=8。

Therefore, the state [ V ]_index,B_data，E_data]=[1,5,8]Writing P_indexAddress of =2, write input data to B_data=5 start to E_dataAddress of = 8.

So far, the key steps in the flow of completing one cycle for all variables have been demonstrated.

The present invention is not limited to the above embodiments, and the technical solutions of the above embodiments of the present invention may be combined with each other in a crossing manner to form a new technical solution, and any technical solutions formed by using equivalent substitutions fall within the scope of the present invention.

Claims

1. An EEPROM data structure and a read-write method thereof are characterized by comprising the following steps:

the addresses are allowed to be circularly accessed, namely, the next bit of the tail address in the storage addresses automatically points to the first address in the storage addresses, and the next bit of the tail address in the data addresses automatically points to the first address in the data addresses; mathematically, this can be done by a remainder operation, with the notation;

step two, starting a reading process, reading the data block numbers of each unit from the state storage area, forming a data block number sequence, reserving the front and back sequence of the data block number sequence, and allowing cyclic access in the following access process, namely defining the next bit at the tail of the sequence as the first bit of the sequence;

otherwise, recording the former address of the two numbers of the position with discontinuous numbers as the last written block state address P_index,-1(if the last and first numbers are not consecutive, P_index,-1=S_state-1) and the next step;

fourthly, according to the last written block state address P_index,-1The state information stored in the memory cell to which the state information is directed is read from the state memory area and is respectively recorded as the last write block number V_index,-1Last written block start address B_data,-1And the last write block end address E_data,-1；

Step five, reading out and outputting B in the data storage area_data,-1To E_data,-1Ending the reading process of the data in the address;

sixth step, the current block number V is recorded_index=(V_index,-1+1)%(S_state+1), current block state address P_index=(P_index,-1+1)% S_state；

Reading a pair of the data block start address and the data block end address of each unit from the state storage area, regarding each pair as an element, forming a data block start-stop address sequence and keeping the front-back sequence, and allowing cyclic access to the sequence in the following access process, namely defining the next bit at the end of the sequence as the first bit of the sequence;

eighthly, in the data block start-stop address sequence, writing the previous address (P) of the block state address from the last_index,-1-1)%S_stateStarting, to the last address (P) of the last write block status address_index,-1+1)%S_stateEnding, searching forward the first unit containing the last written block end address in the interval of the start-stop address;

otherwise, the number of the data block recorded in the state storage unit corresponding to the searched element is recorded as a front overlapped block number V_index,opAnd carrying out the next step;

nine steps, recording the number V of the rear block of the front overlapped block_index,aop=(V_index,op+1)%S_state；

Tenthly, reading the data block start address in the unit with the data block number equal to the block number after the previous overlapped block in the state storage area, and recording the data block start address as the block start address B after the previous overlapped block_data,aop(ii) a Calculating the initial address B of the current block_data=(E_data,aop+1)%S_data；

Eleven steps, starting a writing process, inputting data from the outside, the length of which is S_blockCalculating the end address E of the current block_data=(B_data+S_block-1)%S_data；

Twelve steps, the state V is_index,B_data，E_dataRespectively writing into the addresses P_indexThe unit of the state storage area pointed to writes the input data into the address B_dataStart to E_dataAnd ending the writing process by the unit of the data storage area pointed by the address.