CN113686882A

CN113686882A - Circuit board, electronic equipment, detection method of circuit board and detection device of circuit board

Info

Publication number: CN113686882A
Application number: CN202111122196.8A
Authority: CN
Inventors: 冯帅
Original assignee: Vivo Mobile Communication Co Ltd
Current assignee: Vivo Mobile Communication Co Ltd
Priority date: 2021-09-24
Filing date: 2021-09-24
Publication date: 2021-11-23

Abstract

The application discloses a circuit board, electronic equipment, a detection method of the circuit board and a detection device of the circuit board. Wherein, the circuit board includes: the multilayer lead layers are arranged in a stacked mode, each layer of lead layer comprises an identification area, and each identification area comprises an identification part; in any two adjacent layers of the wire layers, the identification area of the upper layer also comprises a light-transmitting part, and the projection of the light-transmitting part of the upper layer on the lower layer covers the identification part of the lower layer; in any two adjacent layers of wire layers, the identification area of the lower layer also comprises a shading part, the shading part of the lower layer covers the identification part of the upper layer in the projection of the upper layer, and the identification part of the lower layer and the identification part of the upper layer are arranged in a staggered manner. This application determines whether the superpose order on multilayer wire layer is correct according to the pattern that the identification portion on multilayer wire layer corresponds, and this setting can high-efficiently detect out whether qualified circuit board has reduced the detection degree of difficulty of circuit board, is favorable to promoting the machining efficiency of circuit board, is favorable to promoting the yields of product, and then is favorable to reducing the manufacturing cost of product.

Description

Circuit board, electronic equipment, detection method of circuit board and detection device of circuit board

Technical Field

The application belongs to the technical field of circuit boards, and particularly relates to a circuit board, electronic equipment, a detection method of the circuit board and a detection device of the circuit board.

Background

In the related art, the circuit board includes a plurality of layers of copper foils, and it is impossible to identify whether the stacking sequence of the plurality of layers of copper foils is correct, and the stacking sequence of the plurality of layers of copper foils can be determined by a functional test only after the mounting operation, so that rework is often generated, and waste of materials and manpower is caused.

Disclosure of Invention

The application aims to provide a circuit board, an electronic device, a detection method of the circuit board, a detection device of the circuit board and a readable storage medium, and at least solves one of the problems that in the prior art, the overlapping sequence of multiple layers of copper foils of the circuit board cannot be detected in time, rework is easy to happen, and material and labor are wasted.

In order to solve the technical problem, the present application is implemented as follows:

in a first aspect, an embodiment of the present application provides a circuit board, including: the multilayer lead layers are arranged in a stacked mode, each layer of lead layer comprises an identification area, and each identification area comprises an identification part; in any two adjacent layers of the wire layers, the identification area of the upper layer also comprises a light-transmitting part, and the projection of the light-transmitting part of the upper layer on the lower layer covers the identification part of the lower layer; in any two adjacent layers of wire layers, the identification area of the lower layer also comprises a shading part, the shading part of the lower layer covers the identification part of the upper layer in the projection of the upper layer, and the identification part of the lower layer and the identification part of the upper layer are arranged in a staggered manner.

In a second aspect, an embodiment of the present application provides an electronic device, including: a wiring board as in any of the embodiments of the first aspect.

In a third aspect, an embodiment of the present application provides a method for detecting a circuit board, including: acquiring an image of the circuit board; determining a pattern corresponding to the identification area of the circuit board according to the image; and determining whether the circuit board is qualified or not according to the pattern.

In a fourth aspect, an embodiment of the present application provides a detection apparatus for a circuit board, including: the acquisition module is used for acquiring images of the circuit board; the first execution module is used for determining a pattern corresponding to the identification area of the circuit board according to the image; and the second execution module is used for determining whether the circuit board is qualified or not according to the pattern.

In a fifth aspect, an embodiment of the present application provides an electronic device, which includes a processor, a memory, and a program or an instruction stored on the memory and executable on the processor, where the program or the instruction, when executed by the processor, implements the steps of the method for detecting a circuit board according to any one of the third aspects.

In a sixth aspect, an embodiment of the present application provides a readable storage medium, on which a program or instructions are stored, and when the program or instructions are executed by a processor, the steps of the detection method for the circuit board according to any one of the embodiments of the third aspect are implemented.

In an embodiment of the present application, a circuit board includes a plurality of layers of wires, each layer of wires including a label area, the label area including a label portion. Because in arbitrary two adjacent layers of wire layers, the identification area on upper strata still includes the printing opacity portion, and the printing opacity portion of upper strata covers the identification portion of lower floor in the projection of lower floor, and the identification area of lower floor still includes the shading portion, and the shading portion of lower floor covers the identification portion of upper strata in the projection of upper strata, and the identification portion of lower floor and the identification portion of upper strata stagger arrangement. It can be understood that, in the multilayer conductive wire layer, the projection of the light-transmitting portion of the upper layer on the lower layer can cover all the identification portions positioned on the lower layer, and the projection of the light-shielding portion of the lower layer on the upper layer can cover all the identification portions positioned on the upper layer.

In addition, because the lower layer of the mark part is staggered with the upper layer of the mark part, the mark part of any one layer of the lead layer can be observed from the top of the circuit board after the multiple layers of leads are laminated.

Therefore, whether the stacking sequence of the multilayer wire layers is correct can be determined according to the pattern corresponding to the identification part of the multilayer wire layers.

If the pattern is wrong, the superposition sequence of one or more of the lead layers is wrong, the circuit board is unqualified, and subsequent processing procedures (such as surface mounting) cannot be carried out, so that the loss can be reduced, the waste of raw materials and manpower is avoided, and the yield of products can be ensured.

If the pattern is correct, the stacking sequence of the multilayer conductor layers is correct, and the subsequent processes can be carried out.

This setting can guarantee the performance of product, is favorable to promoting the yields of product, is favorable to reducing the manufacturing cost of product.

Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.

Drawings

The above and/or additional aspects and advantages of the present application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:

FIG. 1 is a schematic diagram of a first view of a multilayer identification area of a circuit board according to a first embodiment of the present application;

FIG. 2 is a schematic diagram of a second perspective view of a multilayer identification area of a circuit board according to a first embodiment of the present application;

FIG. 3 is a schematic diagram of a first view of a multilayer identification area of a circuit board according to a second embodiment of the present application;

FIG. 4 is a schematic diagram of a second perspective view of a multilayer identification area of a circuit board according to a second embodiment of the present application;

FIG. 5 is an exploded view of a multilayer identification area of a wiring board according to a third embodiment of the present application;

FIG. 6 is a schematic diagram of a plurality of circuit boards according to one embodiment of the present application;

FIG. 7 is a schematic flow chart diagram of a method for inspecting a circuit board according to an embodiment of the present application;

FIG. 8 is a schematic block diagram of a detection device for a circuit board according to one embodiment of the present application;

FIG. 9 is one of the schematic block diagrams of an electronic device according to one embodiment of the present application;

FIG. 10 is a second schematic block diagram of an electronic device according to one embodiment of the present application.

Reference numerals:

the correspondence between reference numerals and part names in fig. 1 to 6 is:

100 circuit board, 110 conductor layer, 112 mark area, 114 mark part, 116 light transmission part, 118 light shading part, 120 conductive part and 130 insulating layer.

Detailed Description

Reference will now be made in detail to embodiments of the present application, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

The features of the terms first and second in the description and in the claims of the present application may explicitly or implicitly include one or more of such features. In the description of the present application, "a plurality" means two or more unless otherwise specified. In addition, "and/or" in the specification and claims means at least one of connected objects, a character "/" generally means that a preceding and succeeding related objects are in an "or" relationship.

In the description of the present application, it is to be understood that the terms "central," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the present application and to simplify the description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the present application.

In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.

The wiring board 100, the electronic device, the detection method of the wiring board 100, the detection apparatus of the wiring board 100, and the readable storage medium according to the embodiment of the present application are described below with reference to fig. 1 to 10.

As shown in fig. 1, 2, 3, 4, and 5, a wiring board 100 according to some embodiments of the present application includes: a plurality of conductor layers 110 arranged in a stacked manner, wherein each conductor layer 110 comprises a mark area 112, and the mark area 112 comprises a mark part 114; in any two adjacent layers of the wire layers 110, the mark region 112 of the upper layer further includes a light-transmitting portion 116, and the projection of the light-transmitting portion 116 of the upper layer on the lower layer covers the mark portion 114 of the lower layer; in any two adjacent layers of the wire layers 110, the lower-layer mark region 112 further includes a light shielding portion 118, the light shielding portion 118 of the lower layer covers the upper-layer mark portion 114 in the projection of the upper layer, and the lower-layer mark portion 114 is arranged in a staggered manner with respect to the upper-layer mark portion 114.

In this embodiment, the wiring board 100 includes a plurality of wiring layers 110, each wiring layer 110 including a label area 112, the label area 112 including a label portion 114. In any two adjacent layers of the wire layers 110, the upper layer of the identification region 112 further includes a light-transmitting portion 116, the projection of the light-transmitting portion 116 on the lower layer covers the lower layer of the identification portion 114, the lower layer of the identification region 112 further includes a light-shielding portion 118, the projection of the light-shielding portion 118 on the lower layer covers the upper layer of the identification portion 114, and the lower layer of the identification portion 114 and the upper layer of the identification portion 114 are arranged in a staggered manner. It is understood that in the multilayer conductive line layer 110, the projection of the transparent portion 116 of the upper layer on the lower layer can cover all the markers 114 located on the lower layer, and the projection of the light-shielding portion 118 of the lower layer on the upper layer can cover all the markers 114 located on the upper layer.

For example, the number of the lead layers 110 is N, the projection of the transparent portion 116 of the third layer on the fourth layer can cover the marker portion 114 of the (N-3) layer below it, and the projection of the light-shielding portion 118 of the fourth layer on the third layer can cover the marker portions 114 of the first, second, and third layers.

In addition, since the lower mark 114 is offset from the upper mark 114, the mark 114 of any one of the lead layers 110 can be observed from the top of the wiring board 100 after the plurality of lead layers 110 are stacked.

Therefore, whether the stacking order of the multi-layer wire layer 110 is correct can be determined according to the pattern corresponding to the identification part 114 of the multi-layer wire layer 110.

If the pattern is wrong, it indicates that the stacking sequence of one or more of the conductive layers 110 in the plurality of conductive layers 110 is wrong, the circuit board 100 is not qualified, and subsequent processing procedures (such as mounting) cannot be performed, so that the loss can be reduced, waste of raw materials and manpower can be avoided, and the yield of products can be ensured.

If the pattern is correct, the stacking sequence of the multi-layer conductive wire layer 110 is correct, and the subsequent processes can be performed.

It can be understood that the light shielding portion 118 of the lower layer covers the mark portion 114 of the upper layer in the projection of the upper layer, the light shielding portion 118 has a shielding function, and the mark portion 114 located below the light shielding portion 118 is not exposed through the light-transmitting portion 116 of the upper layer. When the stacking sequence of one or more conductive layers 110 in the plurality of conductive layers 110 is incorrect, the mark portion 114 of a part of the conductive layer 110 is shielded by the light shielding portion 118, and only the mark portion 114 of the part of the conductive layer 110 can be exposed through the light-transmitting portion 116 at the topmost layer. Thus, it is possible to quickly detect that the circuit board 100 is a defective product, and therefore, the circuit board needs to be reworked and cannot flow into the next process.

Specifically, as shown in fig. 3 and 4, the fifth wire layer 110 is erroneously stacked, and thus, when viewed from the mark region 112 of the first wire layer 110, the mark portion 114 of the second layer, the mark portion 114 of the third layer, and the mark portion 114 of the fourth layer are all shielded by the light shielding portion 118 of the fifth wire layer 110, so that only the mark portion 114 of the first layer, the mark portion 114 of the fifth layer, and the mark portion 114 of the sixth layer can be seen.

The area of the light-transmitting portion 116 of the wire layer 110 gradually increases in a direction from the bottommost layer to the topmost layer of the wiring board 100; it can also be said that the area of the light shielding portion 118 of the wiring layer 110 gradually decreases in the direction from the lowermost layer to the uppermost layer. Wherein the topmost logo region 112 does not include the light blocking portion 118.

Specifically, as shown in fig. 1 to 5, the wiring board 100 includes six wiring layers 110, in any two adjacent wiring layers 110 in the six wiring layers 110, the identification region 112 of the upper layer further includes a light-transmitting portion 116, a projection of the light-transmitting portion 116 of the upper layer on the lower layer covers the identification portion 114 of the lower layer, the identification region 112 of the lower layer further includes a light-shielding portion 118, the light-shielding portion 118 of the lower layer on the upper layer covers the identification portion 114 of the upper layer, and the identification portion 114 of the lower layer is arranged in a staggered manner with the identification portion 114 of the upper layer. That is, in the case where the plurality of conductive line layers 110 are stacked in a predetermined order, the mark portions 114 of the conductive line layers 110 of the second to sixth layers are exposed through the light-transmitting portion 116 of the first conductive line layer 110. In the case where the plurality of conductive layers 110 are not stacked in the predetermined order, the mark portion 114 of a part of the six mark areas 112 is shielded.

As shown in fig. 3 and 4, if the number of the marks 114 is less than six, it indicates that the stacking sequence of the one or more conductive layers 110 is wrong; if the pattern formed by the six marks 114 is wrong, it indicates that the stacking sequence of one or more layers of the conductive layers 110 is wrong, or the conductive layers 110 of other circuit boards 100 are mixed into the current circuit board 100.

This setting can high-efficiently detect out whether qualified circuit board 100 has reduced circuit board 100's the detection degree of difficulty, is favorable to promoting circuit board 100's machining efficiency, and then is favorable to reducing the manufacturing cost of product.

As shown in fig. 1, 2 and 6, the number of the mark portions 114 is 6, and the 6 mark portions 114 are arranged in the order of "1, 2, 3, 4, 5 and 6", which indicates that the stacking order of the multilayer conductive line layer 110 is correct, and the subsequent processes can be performed.

Specifically, as shown in fig. 1 to 5, in any two adjacent conductor layers 110, the identification portions 114 on the lower layer are arranged in a staggered manner with the identification portions 114 on the upper layer. That is to say, in two adjacent layers of wire layers 110, the identification portion 114 of lower floor can not be overlapped with the identification portion 114 of upper strata and is in the same place, and each identification portion 114 all sets up independently for the pattern that multilayer identification portion 114 encloses is clear visible, so is favorable to reducing the detection degree of difficulty of circuit board 100, is favorable to promoting circuit board 100's detection efficiency.

In some embodiments, the logo portions 114 of any two adjacent layers of logo regions 112 are shaped differently.

In specific applications, the structures of the identifiers 114 of the plurality of identifiers 112 are reasonably arranged, so that the identifiers 114 of any two adjacent layers of identifiers 112 in the plurality of identifiers 112 are different in shape, that is, each layer of identifier 112 is different from the identifiers 114 of other layers, and thus, the layer where the identifier 114 is located can be quickly identified through the identifier 114. This be provided with and reduced the detection degree of difficulty, can not appear obscuring, do benefit to the efficiency that promotes detection circuit board 100.

Specifically, as shown in fig. 1 to 5, the identification portion 114 of the identification area 112 is associated with the number of layers of the wire layer 110. The mark 114 of the first wire layer 110 is 1, the mark 114 of the second wire layer 110 is 2, the mark 114 of the third wire layer 110 is 3, the mark 114 of the fourth wire layer 110 is 4, the mark 114 of the fifth wire layer 110 is 5, and the mark 114 of the sixth wire layer 110 is 6.

In some embodiments, the identifier 114 includes: a text label 114 and/or a graphic label 114.

In a specific application, the identification portion 114 includes a text, for example, the identification portion 114 includes: numbers, symbols, chinese characters, english, etc., which are not listed herein.

In a specific application, the identification portion 114 includes a graphic identification portion 114, for example, the identification portion 114 includes: circular, polygonal, irregular (irregular refers to irregularly shaped patterns), etc., which are not listed here.

In a specific application, the identification portion 114 includes a text identification portion 114 and a graphic identification portion 114.

In some embodiments, as shown in FIG. 1, light blocking portion 118 of logo region 112 is located on one side of light-transmissive portion 116.

In a specific application, the matching structure of the light shielding portion 118 and the light transmitting portion 116 of the same identification region 112 may be set according to specific practical use requirements, so that the light shielding portion 118 of the identification region 112 is located on one side of the light transmitting portion 116. Thus, when the plurality of conductor layers 110 are stacked, the mark 114 is linearly arranged.

In some embodiments, as shown in fig. 5, light blocking portions 118 of logo region 112 are arranged along a circumferential direction of light-transmissive portion 116.

In a specific application, the matching structure of the light shielding portion 118 and the light-transmitting portion 116 of the same identification region 112 may be set according to specific practical use requirements, so that the light shielding portion 118 of the identification region 112 is arranged along the circumferential direction of the light-transmitting portion 116. Thus, after the plurality of conductor layers 110 are stacked, the markers 114 are arranged in an array. This arrangement advantageously reduces the space usage of the multi-layer indicia areas 112 and facilitates the utilization of corner space of the conductor layers 110.

In some embodiments, the light-transmitting portion 116 is only required to transmit light, so as to ensure that the mark portion 114 located at the lower layer can be exposed through the light-transmitting portion 116 of the upper layer.

Optionally, light-transmissive portion 116 includes any one or combination of: light-transmitting holes, hollow structures and resin light-transmitting portions 116.

In particular applications, light-transmissive portion 116 includes any one or combination of: the light hole, the hollow structure and the resin light transmission part 116 are arranged to ensure that the identification part 114 on the lower layer can be exposed through the light transmission part 116 on the upper layer.

In some embodiments, as shown in fig. 6, the conductive line layer 110 further includes a conductive portion 120, and the identification region 112 is connected to an outer edge of the conductive portion 120.

In a specific application, the conductive layer 110 further includes a conductive portion 120, and the matching structure of the conductive portion 120 and the identification area 112 is reasonably arranged, so that the identification area 112 is connected to the outer edge of the conductive portion 120, and after the multiple layers of conductive layers 110 are stacked and the circuit board 100 is inspected to be a qualified product through the multiple layers of identification areas 112, the multiple layers of identification areas 112 can be cut off, so that the identification area 112 and the conductive portion 120 are separated. This setting can not occupy the line area of walking of conductive part 120, has rationally utilized the corner clout (for example, technology rim charge) of wire layer 110, is favorable to reducing the input of raw and other materials, is favorable to reduction in production cost.

In addition, since the mark region 112 is connected to the outer edge of the conductive part 120, the structure of the conductive part 120 is not affected after the mark region 112 is cut.

Specifically, fig. 6 shows four wiring boards 100.

In some embodiments, as shown in fig. 1 and 3, the wiring board 100 further includes: a plurality of insulating layers 130, and one insulating layer 130 is disposed between any two adjacent conductive lines 110.

In a specific application, the circuit board 100 further includes a plurality of insulating layers 130, and a matching structure of the plurality of insulating layers 130 and the plurality of conductive layers 110 is reasonably provided, so that one insulating layer 130 is provided between any two adjacent conductive layers 110.

Specifically, the circuit board 100 includes N wiring layers 110 and (N-1) insulating layers 130, and one insulating layer 130 is disposed between any two adjacent wiring layers 110.

In some embodiments, the insulating layer 130 is a light transmissive insulating layer 130.

In a specific application, the insulating layer 130 is a light-transmitting insulating layer 130 by properly arranging the structure of the insulating layer 130. This arrangement ensures that the mark portion 114 of the bottom mark region 112 is not blocked by the insulating layer 130, and provides an effective and reliable structural support for the mark portion 114 of the bottom wire layer 110 to be exposed through the transparent portion 116 of the top layer.

An embodiment of the present application provides an electronic device, including: the wiring board 100 of the above embodiment. Therefore, all the advantages of the circuit board 100 are not discussed herein.

Specifically, the electronic device may be a mobile terminal such as a mobile phone, a wearable device, a tablet computer, a laptop computer, a mobile computer, an augmented reality device (also referred to as an AR device), a virtual reality device (also referred to as a VR device), a handheld game console, and the like.

The embodiment of the application provides a detection method of a circuit board, as shown in fig. 7, the detection method of the circuit board includes:

step 702, acquiring an image of a circuit board;

step 704, determining a pattern corresponding to the identification area of the circuit board according to the image;

and step 706, determining whether the circuit board is qualified according to the pattern.

In a specific application, the circuit board comprises a plurality of layers of conducting wires, each layer of conducting wire comprises a mark area, and the mark area comprises a mark part. Because in arbitrary two adjacent layers of wire layers, the identification area on upper strata still includes the printing opacity portion, and the printing opacity portion of upper strata covers the identification portion of lower floor in the projection of lower floor, and the identification area of lower floor still includes the shading portion, and the shading portion of lower floor covers the identification portion of upper strata in the projection of upper strata, and the identification portion of lower floor and the identification portion of upper strata stagger arrangement. It can be understood that, in the multilayer conductive wire layer, the projection of the light-transmitting portion of the upper layer on the lower layer can cover all the identification portions positioned on the lower layer, and the projection of the light-shielding portion of the lower layer on the upper layer can cover all the identification portions positioned on the upper layer.

For example, the number of the lead layers is N, the projection of the light-transmitting portion of the third layer on the fourth layer can cover the mark portion of the (N-3) layer below the light-transmitting portion, and the projection of the light-shielding portion of the fourth layer on the third layer can cover the mark portions of the first layer, the second layer, and the third layer.

So as to determine whether the stacking sequence of the multilayer wire layers is correct according to the corresponding pattern of the identification part of the multilayer wire layers.

It can be understood that the light shielding part of the lower layer covers the identification part of the upper layer in the projection of the upper layer, the light shielding part has the function of shielding, and the identification part positioned at the lower layer of the light shielding part cannot be exposed through the light-transmitting part of the upper layer. When the overlapping sequence of one or more of the plurality of lead layers is wrong, the mark part of a part of the lead layer is shielded by the shading part, and only the mark part of the lead layer can be exposed through the light-transmitting part at the topmost layer. Therefore, the circuit board can be quickly detected to be a defective product, needs to be reworked and cannot flow into the next procedure.

Specifically, as shown in fig. 3 and 4, the fifth layer of wires is stacked in a wrong position, so that the mark portion of the second layer, the mark portion of the third layer, and the mark portion of the fourth layer are shielded by the light shielding portion of the fifth layer of wires when viewed from the mark area of the first layer of wires, and thus only the mark portion of the first layer, the mark portion of the fifth layer, and the mark portion of the sixth layer can be seen.

The area of the light-transmitting part of the lead layer is gradually increased along the direction from the bottommost layer to the topmost layer of the circuit board; it can also be said that the area of the light shielding portion of the wiring layer gradually decreases in the direction from the lowermost layer to the uppermost layer. Wherein, the identification area of the topmost layer does not comprise a shading part.

Specifically, as shown in fig. 1 to 5, the circuit board includes six wire layers, in any two adjacent wire layers in the six wire layers, the identification region of the upper layer further includes a light-transmitting portion, the projection of the light-transmitting portion of the upper layer on the lower layer covers the identification portion of the lower layer, the identification region of the lower layer further includes a light-shielding portion, the projection of the light-shielding portion of the lower layer on the upper layer covers the identification portion of the upper layer, and the identification portion of the lower layer and the identification portion of the upper layer are arranged in a staggered manner. That is, in the case that the plurality of lead layers are stacked in a predetermined order, the mark portions of the second to sixth lead layers are exposed through the light-transmitting portion of the first lead layer. Under the condition that the plurality of layers of lead layers are not stacked according to the preset sequence, the identification part of one identification area in the six layers of identification areas is shielded.

As shown in fig. 3 and 4, if the number of the marks is less than six, it is indicated that the stacking sequence of the one or more conductive layers is wrong; if the pattern surrounded by the six identification parts is wrong, the wrong stacking sequence of one or more layers of conducting wire layers is indicated, or the conducting wire layers of other circuit boards are mixed in the current circuit board.

Whether this setting can high-efficiently detect out the circuit board qualified, has reduced the detection degree of difficulty of circuit board, is favorable to promoting the machining efficiency of circuit board, and then is favorable to reducing the manufacturing cost of product.

As shown in fig. 1, 2 and 6, the number of the mark portions is 6, and the 6 mark portions are arranged in the order of "1, 2, 3, 4, 5 and 6", which indicates that the stacking order of the multilayer conductor layers is correct, and the subsequent processes can be performed.

Specifically, as shown in fig. 1 to 5, in any two adjacent conductor layers, the identification portions of the lower layer are arranged in a staggered manner with the identification portions of the upper layer. That is to say, in arbitrary adjacent two-layer wire layer, the identification portion of lower floor can not fold with the identification portion on upper strata and establish together, and each identification portion all sets up independently for the pattern that multilayer identification portion encloses is clear visible, so is favorable to reducing the detection degree of difficulty of circuit board, is favorable to promoting the detection efficiency of circuit board.

In some embodiments, determining whether the wiring board is acceptable according to the pattern includes: determining the number of the identification parts of the circuit board according to the pattern; determining that the stacking sequence of the multilayer conductor layers of the circuit board is wrong based on the number of the identification parts being smaller than the target number; and determining that the stacking sequence of the multilayer lead layers of the circuit board is correct based on the fact that the number of the identification parts is equal to the target number and the characteristic information of the identification parts is matched with the target characteristic information.

In a specific application, each layer of the lead layer comprises a mark area, and the mark area comprises a mark part and a light-transmitting part, that is, each layer of the lead layer comprises the mark part, and the number of the mark parts can reflect the number of the lead layers. When the overlapping sequence of the multilayer circuit board body is wrong, part of the identification part can be shielded by the shading part of the lead layer, and only part of the identification part of the lead layer can be exposed through the light-transmitting part on the topmost layer.

That is, when the number of the marking portions is smaller than the target number, it is indicated that the stacking order of the multilayer wiring board body is wrong, and thus, it is possible to quickly detect that the wiring board is a defective product, needs rework, and cannot flow into the next process.

And when the number of the identification parts is equal to the target number, further determining the characteristic information of the identification parts of the circuit board according to the pattern, and matching the characteristic information with the target characteristic information. And when the characteristic information is matched with the target characteristic information, determining that the stacking sequence of the multilayer conductor layers of the circuit board is correct. And when the characteristic information does not match with the target characteristic information, determining that the stacking sequence of the multilayer conductor layers of the circuit board is wrong. That is, the pattern is secondarily checked to ensure accuracy of detecting whether the circuit board is qualified.

For example, there are two circuit boards, a first circuit board and a second circuit board, each circuit board includes four layers of conducting wires, the identification portion of the first circuit board includes a digital identification portion, and the identification portion of the second circuit board includes a graphic identification portion. And if the third layer of the lead layer of the second circuit board is inserted between the second layer of the lead layer and the fourth layer of the lead layer of the first circuit board by mistake. At this time, when looking down from the topmost layer, there is a possibility that all four identification portions are exposed, but it does not mean that the circuit board is acceptable. And further analyzing the pattern corresponding to the identification area of the circuit board, determining the characteristic information of the identification part according to the pattern, and comparing to confirm that the identification part of the third layer is not matched with the target characteristic information, thereby determining that the circuit board is unqualified. This setting has promoted the detection precision of circuit board.

Specifically, the feature information includes any one of or a combination of the following: the position of the marker, the type of the marker, and the shape of the marker.

Specifically, the location of the identification portion refers to which location of the identification region the identification portion is located, such as the middle, left, right, corner, etc., which are not exemplified herein.

Specifically, the type of the mark portion refers to a character mark portion, a figure mark portion, and the like, which are not exemplified herein.

Specifically, the shape of the mark portion refers to an ellipse, a polygon, a special shape, and the like, which are not exemplified herein. Wherein, the irregular shape refers to an irregular shape.

As shown in fig. 8, an embodiment of the present application provides a detection apparatus 800 for a circuit board, where the detection apparatus 800 for a circuit board includes:

the acquisition module 802 is used for acquiring an image of a circuit board;

a first execution module 804, configured to determine, according to the image, a pattern corresponding to the identification area of the circuit board;

and a second executing module 806, configured to determine whether the circuit board is qualified according to the pattern.

In this embodiment, the circuit board inspection apparatus 800 includes an acquisition module 802, a first execution module 804, and a second execution module 806. The circuit board comprises a plurality of layers of lead layers, wherein each layer of lead layer comprises an identification area, and the identification area comprises an identification part and a light-transmitting part. In any two adjacent layers of wire layers, the identification area on the upper layer further comprises a light transmission part, the projection of the light transmission part on the upper layer on the lower layer covers the identification part on the lower layer, the identification area on the lower layer further comprises a shading part, the projection of the shading part on the lower layer on the upper layer covers the identification part on the upper layer, and the identification part on the lower layer and the identification part on the upper layer are arranged in a staggered mode. That is, the mark portion of the lead layer of the bottom layer can be exposed through the light-transmitting portion of the top layer. That is, after the plurality of lead layers are laminated, the mark portion of any one of the lead layers can be observed from the top of the wiring board.

The collecting module 802 obtains an image of a circuit board, the first executing module 804 determines a pattern corresponding to an identification area of the circuit board according to the obtained image of the circuit board, and the second executing module 806 determines whether the stacking sequence of the multilayer conductor layers is correct according to the pattern so as to determine whether the circuit board is a qualified product.

Whether this setting can high-efficiently detect out the circuit board qualified, has reduced the detection degree of difficulty of circuit board, is favorable to promoting the machining efficiency of circuit board, is favorable to promoting the yields of product, and then is favorable to reducing the manufacturing cost of product.

In some embodiments, the second performing module 806 is configured to determine the number of identifiers of the circuit board according to the pattern; determining that the stacking sequence of the multilayer conductor layers of the circuit board is wrong based on the number of the identification parts being smaller than the target number; and determining that the stacking sequence of the multilayer lead layers of the circuit board is correct based on the fact that the number of the identification parts is equal to the target number and the characteristic information of the identification parts is matched with the target characteristic information.

In specific application, each layer of the lead layer comprises a mark area, each layer of the lead layer comprises mark parts, and the number of the mark parts can reflect the number of the lead layers. When the overlapping sequence of the multilayer circuit board body is wrong, part of the identification part can be shielded by the shading part of the lead layer, and only part of the identification part of the lead layer can be exposed through the light-transmitting part on the topmost layer. That is, the second executing module 806 is configured to determine that the stacking order of the multi-layer circuit board bodies is incorrect when the number of the identification portions is smaller than the target number, so that the circuit board can be quickly detected as a defective product, needs to be reworked, and cannot flow into the next process.

In a specific application, when the number of the identification portions is equal to the target number, the second executing module 806 determines the feature information of the identification portions of the circuit board according to the pattern, and matches the feature information with the target feature information. And when the characteristic information is matched with the target characteristic information, determining that the stacking sequence of the multilayer conductor layers of the circuit board is correct. And when the characteristic information does not match with the target characteristic information, determining that the stacking sequence of the multilayer conductor layers of the circuit board is wrong. That is, the pattern is secondarily checked to ensure accuracy of detecting whether the circuit board is qualified.

The detection device 800 of the circuit board in the embodiment of the present application may be a device, or may be a component, an integrated circuit, or a chip in a terminal. The device can be mobile electronic equipment or non-mobile electronic equipment. By way of example, the mobile electronic device may be a mobile phone, a tablet Computer, a notebook Computer, a palm top Computer, an in-vehicle electronic device, a wearable device, an Ultra-mobile Personal Computer (UMPC), a netbook or a Personal Digital Assistant (PDA), and the like, and the non-mobile electronic device may be a server, a Network Attached Storage (NAS), a Personal Computer (Personal Computer, PC), a Television (TV), a teller machine, a self-service machine, and the like, and the embodiments of the present application are not particularly limited.

The detection device 800 of the circuit board in the embodiment of the present application may be a device having an operating system. The operating system may be an Android (Android) operating system, an ios operating system, or other possible operating systems, and embodiments of the present application are not limited specifically.

The detection apparatus 800 for a circuit board provided in this embodiment of the application can implement each process implemented in the detection method embodiment for a circuit board in fig. 7, and is not described here again to avoid repetition.

Optionally, as shown in fig. 9, an electronic device 900 is further provided in this embodiment of the present application, and includes a processor 902, a memory 904, and a program or an instruction stored in the memory 904 and executable on the processor 902, where the program or the instruction is executed by the processor 902 to implement each process of the above-mentioned embodiment of the method for detecting a circuit board, and can achieve the same technical effect, and in order to avoid repetition, details are not repeated here.

It should be noted that the electronic device 900 in the embodiment of the present application includes the mobile electronic device 900 and the non-mobile electronic device 900 described above.

Fig. 10 is a schematic hardware structure diagram of an electronic device 1000 implementing an embodiment of the present application.

The electronic device 1000 includes, but is not limited to: radio unit 1002, network module 1004, audio output unit 1006, input unit 1008, sensors 1028, display unit 1014, interface unit 1020, memory 1018, and processor 1030.

Those skilled in the art will appreciate that the electronic device 1000 may further comprise a power source (e.g., a battery) for supplying power to various components, and the power source may be logically connected to the processor 1030 through a power management system, so as to implement functions of managing charging, discharging, and power consumption through the power management system. The electronic device structure shown in fig. 10 does not constitute a limitation of the electronic device, and the electronic device 1000 may include more or less components than those shown, or combine some components, or arrange different components, and thus, the description is omitted here.

The sensor 1028 is used for acquiring an image of the circuit board; and the processor 1030 is configured to determine a pattern corresponding to the identification area of the circuit board according to the image, and determine whether the circuit board is qualified according to the pattern.

In this embodiment, the wiring board includes a plurality of layers of wire, each layer of wire including a label region, the label region including a label portion. Because in arbitrary two adjacent layers of wire layers, the identification area on upper strata still includes the printing opacity portion, and the printing opacity portion of upper strata covers the identification portion of lower floor in the projection of lower floor, and the identification area of lower floor still includes the shading portion, and the shading portion of lower floor covers the identification portion of upper strata in the projection of upper strata, and the identification portion of lower floor and the identification portion of upper strata stagger arrangement. It can be understood that, in the multilayer conductive wire layer, the projection of the light-transmitting portion of the upper layer on the lower layer can cover all the identification portions positioned on the lower layer, and the projection of the light-shielding portion of the lower layer on the upper layer can cover all the identification portions positioned on the upper layer.

In some embodiments, a processor 1030 configured to determine a number of identifiers of the wiring board from the pattern; determining that the stacking sequence of the multilayer conductor layers of the circuit board is wrong based on the number of the identification parts being smaller than the target number; and determining that the stacking sequence of the multilayer lead layers of the circuit board is correct based on the fact that the number of the identification parts is equal to the target number and the characteristic information of the identification parts is matched with the target characteristic information.

It should be understood that, in the embodiment of the present application, the radio frequency unit 1002 may be configured to send and receive information or send and receive signals during a call, and in particular, receive downlink data of a base station or send uplink data to the base station. Radio frequency unit 1002 includes, but is not limited to, an antenna, at least one amplifier, a transceiver, a coupler, a low noise amplifier, a duplexer, and the like.

The network module 1004 provides wireless broadband internet access to the user, such as assisting the user in emailing, browsing web pages, and accessing streaming media.

The audio output unit 1006 may convert audio data received by the radio frequency unit 1002 or the network module 1004 or stored in the memory 1018 into an audio signal and output as sound. Also, the audio output unit 1006 may also provide audio output related to a specific function performed by the electronic apparatus 1000 (e.g., a call signal reception sound, a message reception sound, etc.). The audio output unit 1006 includes a speaker, a buzzer, a receiver, and the like.

The input unit 1008 is used to receive audio or video signals. The input Unit 1008 may include a Graphics Processing Unit (GPU) 1010 and a microphone 1012, and the Graphics Processing Unit 1010 processes image data of still pictures or video obtained by an image capturing device such as a camera in a video capturing mode or an image capturing mode. The processed image frames may be displayed on the display unit 1014, or stored in the memory 1018 (or other storage medium), or transmitted via the radio frequency unit 1002 or the network module 1004. The microphone 1012 may receive sound and may be capable of processing the sound into audio data, and the processed audio data may be converted into a format output transmittable to a mobile communication base station via the radio frequency unit 1002 in case of a phone call mode.

The electronic device 1000 also includes at least one sensor 1028 such as a fingerprint sensor 1028, a pressure sensor 1028, an iris sensor 1028, a molecular sensor 1028, a gyroscope, a barometer, a hygrometer, a thermometer, an infrared sensor 1028, a light sensor 1028, a motion sensor 1028, an image sensor 1028, and other sensors 1028.

The display unit 1014 is used to display information input by a user or information provided to the user. The display unit 1014 may include a display panel 1016, and the display panel 1016 may be configured in the form of a liquid crystal display, an organic light emitting diode, or the like.

The user input unit 1022 may be used to receive input numeric or character information and generate key signal inputs related to user settings and function control of the electronic device 1000. Specifically, the user input unit 1022 includes a touch panel 1024 and other input devices 1026. Touch panel 1024, also referred to as a touch screen, may collect touch operations by a user on or near it. Touch panel 1024 can include two portions, a touch detection device and a touch controller. The touch detection device detects the touch direction of a user, detects a signal brought by touch operation and transmits the signal to the touch controller; the touch controller receives touch information from the touch sensing device, converts the touch information into touch point coordinates, sends the touch point coordinates to the processor 1030, and receives and executes commands sent by the processor 1030. Other input devices 1026 may include, but are not limited to, a physical keyboard, function keys (e.g., volume control keys, switch keys, etc.), a trackball, a mouse, and a joystick, which are not described in detail herein.

Further, the touch panel 1024 can be overlaid on the display panel 1016, and when the touch panel 1024 detects a touch operation thereon or nearby, the touch operation is transmitted to the processor 1030 to determine the type of the touch event, and then the processor 1030 provides a corresponding visual output on the display panel 1016 according to the type of the touch event. The touch panel 1024 and the display panel 1016 may be provided as two separate components or may be integrated into one component.

The interface unit 1020 is an interface for connecting an external device to the electronic apparatus 1000. For example, the external device may include a wired or wireless headset port, an external power supply (or battery charger) port, a wired or wireless data port, a memory card port, a port for connecting a device having a detection module, an audio input/output (I/O) port, a video I/O port, an earphone port, and the like. The interface unit 1020 may be used to receive input (e.g., data information, power, etc.) from an external device and transmit the received input to one or more elements within the electronic apparatus 1000 or may be used to transmit data between the electronic apparatus 1000 and the external device.

Memory 1018 may be used to store software programs as well as various data. The memory 1018 may mainly include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application program required for at least one function (such as a sound playing function, an image playing function, and the like), and the like; the storage data area may store data (such as audio data, a phonebook, etc.) created according to the use of the mobile terminal, and the like. Additionally, memory 1018 may include high-speed random access memory 1018, and may also include non-volatile memory 1018, such as at least one piece of disk memory 1018, flash memory devices, or other volatile solid state memory 1018.

The processor 1030 performs various functions and processes for the electronic device 1000 by executing or executing software programs and/or modules stored in the memory 1018, as well as invoking data stored in the memory 1018, thereby monitoring the electronic device 1000 as a whole. Processor 1030 may include one or more processing units; preferably, processor 1030 may integrate application processor 1030 and modem processor 1030, wherein application processor 1030 primarily handles operating systems, user interfaces, application programs, and the like, and modem processor 1030 primarily handles wireless communications.

The embodiment of the present application further provides a readable storage medium, where a program or an instruction is stored on the readable storage medium, and when the program or the instruction is executed by the processor 1030, the program or the instruction implements each process of the above-mentioned embodiment of the method for detecting a circuit board, and can achieve the same technical effect, and in order to avoid repetition, details are not described here again.

Wherein the processor 1030 is the processor 1030 in the electronic device 1000 in the above embodiments. Readable storage media, including computer-readable storage media, such as computer Read-Only Memory 1018 (ROM), Random Access Memory 1018 (RAM), magnetic or optical disk, and so forth.

The embodiment of the present application further provides a chip, where the chip includes a processor 1030 and a communication interface, the communication interface is coupled to the processor 1030, and the processor 1030 is configured to run a program or an instruction, so as to implement each process of the above information processing method embodiment, and achieve the same technical effect, and in order to avoid repetition, the description is omitted here. It should be understood that the chips mentioned in the embodiments of the present application may also be referred to as system-on-chip, system-on-chip or system-on-chip, etc.

In the description herein, reference to the description of the terms "one embodiment," "some embodiments," "an illustrative embodiment," "an example," "a specific example," or "some examples" or the like means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

While embodiments of the present application have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the application, the scope of which is defined by the claims and their equivalents.

Claims

1. A circuit board, comprising:

the lead wire comprises a plurality of lead layers which are arranged in a stacked mode, wherein each lead layer comprises an identification area, and each identification area comprises an identification part;

in any two adjacent layers of the lead layers, the identification area on the upper layer also comprises a light-transmitting part, and the projection of the light-transmitting part on the upper layer on the lower layer covers the identification part on the lower layer;

in any two adjacent layers of the wire layers, the lower layer of the identification area also comprises a shading part, the shading part of the lower layer covers the upper layer of the identification part in the projection of the upper layer, and the identification part of the lower layer and the upper layer of the identification part are arranged in a staggered manner.

2. The wiring board of claim 1,

the shapes of the identification parts of any two adjacent layers of the identification areas are different.

3. Wiring board according to claim 1 or 2,

the identification portion includes: a character identification part and/or a figure identification part.

4. Wiring board according to claim 1 or 2,

the light shielding part of the identification area is positioned on one side of the light transmission part; or

The light shielding part of the identification area is arranged along the circumferential direction of the light transmission part.

5. Wiring board according to claim 1 or 2,

the wire layer further comprises a conductive part, and the identification area is connected with the outer edge of the conductive part.

6. The wiring board of claim 1 or 2, further comprising:

and one insulating layer is arranged between any two adjacent conductor layers.

7. An electronic device, comprising:

a wiring board as claimed in any one of claims 1 to 6.

8. A detection method of a circuit board is characterized by comprising the following steps:

acquiring an image of the circuit board;

determining a pattern corresponding to the identification area of the circuit board according to the image;

and determining whether the circuit board is qualified or not according to the pattern.

9. The method for inspecting a wiring board according to claim 8, wherein said determining whether the wiring board is acceptable according to the pattern includes:

determining the number of the identification parts of the circuit board according to the pattern;

determining that the stacking sequence of the multilayer lead layers of the circuit board is wrong based on the number of the identification parts being smaller than the target number;

and determining that the stacking sequence of the multilayer lead layers of the circuit board is correct based on the fact that the number of the identification parts is equal to the target number and the characteristic information of the identification parts is matched with the target characteristic information.

10. A detection apparatus for a circuit board, comprising:

the acquisition module is used for acquiring the image of the circuit board;

the first execution module is used for determining a pattern corresponding to the identification area of the circuit board according to the image;

and the second execution module is used for determining whether the circuit board is qualified or not according to the pattern.