CN113676274A - Signal time delay estimation method, device, equipment and storage medium - Google Patents
Signal time delay estimation method, device, equipment and storage medium Download PDFInfo
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Abstract
The embodiment of the invention provides a signal delay estimation method, a device, equipment and a storage medium, wherein the signal delay estimation method is used for signal receiving equipment and comprises the following steps: receiving a first reference signal for time delay estimation; determining a corresponding time domain estimation channel according to the first reference signal; determining at least two first time domain positions meeting set conditions according to the time domain estimation channel; acquiring a second time domain position from each first time domain position according to a set rule; and determining a time delay estimation value corresponding to the first reference signal according to the second time domain position. Therefore, the embodiment of the invention improves the accuracy of signal delay estimation.
Description
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a method, an apparatus, a device, and a storage medium for estimating a signal delay.
Background
In a cellular communication system, there is a certain distance between the user and the base station, which results in the signal transmitted by the user arriving with a time lag behind that expected by the base station, i.e. there is a delay. If delay estimation and compensation are not performed on the delayed arrival signals, the estimated channel quality is affected, and then the multi-user pairing performance, the downlink forming gain performance, the uplink receiving performance, the related measurement and the like are affected, so that the uplink throughput and the downlink throughput are lost.
Disclosure of Invention
To solve the problems in the prior art, embodiments of the present invention provide a method, an apparatus, a device, and a storage medium for estimating a signal delay.
The embodiment of the invention provides a signal delay estimation method, which is used for signal receiving equipment and comprises the following steps:
receiving a first reference signal for time delay estimation;
determining a corresponding time domain estimation channel according to the first reference signal;
determining at least two first time domain positions meeting set conditions according to the time domain estimation channel;
acquiring a second time domain position from each first time domain position according to a set rule;
and determining a time delay estimation value corresponding to the first reference signal according to the second time domain position.
Optionally, the signal receiving device is a base station, the time delay estimation is uplink time delay estimation, and the first reference signal is a reference signal used for uplink time delay estimation and sent by a terminal.
Optionally, the signal receiving device is a terminal, the time delay estimation is downlink time delay estimation, and the first reference signal is a reference signal sent by a base station and used for downlink time delay estimation.
Optionally, the determining a corresponding time domain estimation channel according to the first reference signal includes:
calculating to obtain a frequency domain estimation channel according to the first reference signal and the local reference signal;
and carrying out frequency domain to time domain conversion on the frequency domain estimation channel to obtain a corresponding time domain estimation channel.
Optionally, the calculating a frequency domain estimated channel according to the first reference signal and the local reference signal includes:
calculating by using a first formula to obtain the frequency domain estimation channel; wherein the first formula comprises:
h(i)＝r(i)×conj(s(i))
wherein h (i) denotes a frequency domain estimation channel; r (i) denotes a first reference signal; conj (s (i)) means taking the conjugate of s (i); s (i) denotes a local reference signal; i represents a subcarrier index, and the value range of i is 1 to NSC(ii) a Wherein N isSCIndicating the total number of subcarriers.
Optionally, the setting condition includes: and the channel power corresponding to the first time domain position is a maximum value.
Optionally, the determining, according to the time domain estimated channel, at least two first time domain positions that satisfy a set condition includes:
calculating the channel power of the time domain estimation channel;
and acquiring at least two maximum values from the channel power of the time domain estimation channel, wherein the time domain position corresponding to the maximum values is the first time domain position.
Optionally, the obtaining a second time domain position from each of the first time domain positions according to a set rule includes:
determining a minimum value in each of the first time domain positions, the minimum value being the second time domain position.
Optionally, the determining the time delay estimation value corresponding to the first reference signal according to the second time domain position includes:
and calculating the time length from the second time domain position to the starting point of the channel, wherein the time length is the time delay estimation value corresponding to the first reference signal.
Optionally, the calculating a time length from the second time domain position to a channel starting point, where the time length is a time delay estimation value corresponding to the first reference signal, includes:
calculating the time delay estimated value by using a second formula; wherein the second formula comprises:
Ttao＝Topt×Ts
wherein, TtaoRepresenting a delay estimate; t isoptRepresenting a second time domain location; t issRepresenting the time domain sampling interval.
The embodiment of the invention provides a signal delay estimation device, which is used for signal receiving equipment and comprises:
the signal receiving module is used for receiving a first reference signal for time delay estimation;
a channel determining module, configured to determine a corresponding time domain estimation channel according to the first reference signal;
the position determining module is used for determining at least two first time domain positions meeting set conditions according to the time domain estimation channel;
the acquisition module is used for acquiring a second time domain position from each first time domain position according to a set rule;
and the time delay estimation module is used for determining a time delay estimation value corresponding to the first reference signal according to the second time domain position.
The embodiment of the invention provides a signal receiving device, which comprises a memory, a processor and a program which is stored on the memory and can be run on the processor, and is characterized in that the processor executes the program and realizes the following steps:
receiving a first reference signal for time delay estimation;
determining a corresponding time domain estimation channel according to the first reference signal;
determining at least two first time domain positions meeting set conditions according to the time domain estimation channel;
acquiring a second time domain position from each first time domain position according to a set rule;
and determining a time delay estimation value corresponding to the first reference signal according to the second time domain position.
Optionally, the signal receiving device is a base station, the time delay estimation is uplink time delay estimation, and the first reference signal is a reference signal used for uplink time delay estimation and sent by a terminal.
Optionally, the signal receiving device is a terminal, the time delay estimation is downlink time delay estimation, and the first reference signal is a reference signal sent by a base station and used for downlink time delay estimation.
Optionally, the determining a corresponding time domain estimation channel according to the first reference signal includes:
calculating to obtain a frequency domain estimation channel according to the first reference signal and the local reference signal;
and carrying out frequency domain to time domain conversion on the frequency domain estimation channel to obtain a corresponding time domain estimation channel.
Optionally, the calculating a frequency domain estimated channel according to the first reference signal and the local reference signal includes:
calculating by using a first formula to obtain the frequency domain estimation channel; wherein the first formula comprises:
h(i)＝r(i)×conj(s(i))
wherein h (i) denotes a frequency domain estimation channel; r (i) denotes a first reference signal; conj (s (i)) means taking the conjugate of s (i); s (i) denotes a local reference signal; i represents a subcarrier index, and the value range of i is 1 to NSC(ii) a Wherein N isSCIndicating the total number of subcarriers.
Optionally, the setting condition includes: and the channel power corresponding to the first time domain position is a maximum value.
Optionally, the determining, according to the time domain estimated channel, at least two first time domain positions that satisfy a set condition includes:
calculating the channel power of the time domain estimation channel;
and acquiring at least two maximum values from the channel power of the time domain estimation channel, wherein the time domain position corresponding to the maximum values is the first time domain position.
Optionally, the obtaining a second time domain position from each of the first time domain positions according to a set rule includes:
determining a minimum value in each of the first time domain positions, the minimum value being the second time domain position.
Optionally, the determining the time delay estimation value corresponding to the first reference signal according to the second time domain position includes:
and calculating the time length from the second time domain position to the starting point of the channel, wherein the time length is the time delay estimation value corresponding to the first reference signal.
Optionally, the calculating a time length from the second time domain position to a channel starting point, where the time length is a time delay estimation value corresponding to the first reference signal, includes:
calculating the time delay estimated value by using a second formula; wherein the second formula comprises:
Ttao＝Topt×Ts
wherein, TtaoRepresenting a delay estimate; t isoptRepresenting a second time domain location; t issRepresenting the time domain sampling interval.
An embodiment of the present invention provides a non-transitory computer-readable storage medium, on which a computer program is stored, where the computer program is executed by a processor to implement the steps of the signal delay estimation method provided in the embodiment of the present invention.
After receiving a first reference signal for time delay estimation, a method, an apparatus, a device, and a storage medium according to embodiments of the present invention may determine at least two first time domain positions that satisfy a set condition according to a time domain estimation channel corresponding to the first reference signal, obtain a second time domain position from each first time domain position according to a set rule, and determine a time delay estimation value corresponding to the first reference signal according to the second time domain position, thereby improving accuracy of signal time delay estimation.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
Fig. 1 is a flowchart of a signal delay estimation method according to an embodiment of the present invention;
fig. 2 is a block diagram of a signal delay estimation apparatus according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a signal receiving apparatus according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
For the convenience of clearly describing the technical solutions of the embodiments of the present invention, in each embodiment of the present invention, if words such as "first" and "second" are used to distinguish the same items or similar items with basically the same functions and actions, those skilled in the art can understand that the words such as "first" and "second" do not limit the quantity and execution order.
In a cellular communication system, there is a certain distance between the user and the base station, which results in the signal transmitted by the user arriving with a time lag behind that expected by the base station, i.e. there is a delay. If delay estimation and compensation are not performed on the delayed arrival signals, the estimated channel quality is affected, and then the multi-user pairing performance, the downlink forming gain performance, the uplink receiving performance, the related measurement and the like are affected, so that the uplink throughput and the downlink throughput are lost.
In view of the foregoing problems, embodiments of the present invention provide a method, an apparatus, a device, and a storage medium for estimating a signal delay, so as to improve accuracy of signal delay estimation.
The signal delay estimation method, the device, the equipment and the storage medium provided by the embodiment of the invention can be applied to a wireless communication system or a wireless and wired combined system. Including but not limited to 5G systems (e.g., NR systems), 6G systems, satellite systems, car networking systems, Long Term Evolution (LTE) systems, and subsequent Evolution communication systems of the above systems.
The base station provided by the embodiment of the present invention may include, but is not limited to, one or more of the following: generally used base stations, evolved node base (eNB), base stations in a 5G system (e.g., next generation base station (gNB), Transmission and Reception Point (TRP)), and other devices.
The terminal provided by the embodiment of the present invention may also be referred to as User Equipment (UE), etc. The terminal includes but is not limited to handheld devices and vehicle-mounted devices. For example, the Mobile phone may be a Mobile phone, a tablet pc, a notebook pc, an Ultra-Mobile Personal Computer (UMPC), a netbook, a Personal Digital Assistant (PDA), or the like.
The following description will be made by way of specific examples.
Fig. 1 is a flowchart of a signal delay estimation method according to an embodiment of the present invention, where the signal delay estimation method may be used in a signal receiving device, for example: a base station or a terminal. Moreover, the signal delay estimation method can be used for scenes containing direct paths and scenes not containing direct paths. As shown in fig. 1, the signal delay estimation method includes the following steps:
s101, receiving a first reference signal for time delay estimation.
Specifically, the first reference signal refers to a reference signal used for delay estimation, such as: SRS (Sounding Reference Signal), DMRS (Demodulation Reference Signal), and the like.
And S102, determining a corresponding time domain estimation channel according to the first reference signal.
Specifically, the corresponding frequency domain estimation channel may be determined according to the first reference signal, the corresponding time domain estimation channel may be determined according to the corresponding frequency domain estimation channel, and the delay estimation may be performed according to the time domain estimation channel.
S103, determining at least two first time domain positions meeting set conditions according to the time domain estimation channel.
Specifically, the setting condition may be a condition for determining the first time domain position, which is set in advance by the signal receiving apparatus according to the actual situation. Such as: channel power maximum condition.
And at least two first time domain positions meeting the set condition are obtained, so that the optimal second time domain position can be obtained from the plurality of first time domain positions, and the finally obtained time delay estimation value is more accurate.
Such as: determining the first m first time domain positions meeting set conditions from the time domain estimation channel, and selecting an optimal second time domain position from the m first time domain positions according to a certain rule. Wherein m is greater than 2.
And S104, acquiring a second time domain position from each first time domain position according to a set rule.
Specifically, the set rule may be a rule set in advance by the signal receiving device according to an actual situation and used for determining the second time domain position, and the purpose is to find an optimal second time domain position from the plurality of first time domain positions, so that the finally obtained time delay estimation value is more accurate.
And S105, determining a time delay estimation value corresponding to the first reference signal according to the second time domain position.
As can be seen from the foregoing embodiments, after receiving a first reference signal for time delay estimation, at least two first time domain positions meeting a set condition may be determined according to a time domain estimation channel corresponding to the first reference signal, a second time domain position may be obtained from each first time domain position according to a set rule, and a time delay estimation value corresponding to the first reference signal is determined according to the second time domain position, thereby improving accuracy of signal time delay estimation.
Further, based on the above method, the signal receiving device is a base station, the delay estimation is uplink delay estimation, and the first reference signal is a reference signal for uplink delay estimation sent by a terminal.
Specifically, the base station may execute the signal delay estimation method provided in the embodiment of the present invention, that is, the execution devices of S101 to S105 may be the base station. Such as: s101 is specifically a first reference signal for uplink delay estimation sent by a base station receiving terminal. The first reference signal may be an SRS, or may be a reference signal such as a DMRS.
Further, based on the method, the signal receiving device is a terminal, the time delay estimation is downlink time delay estimation, and the first reference signal is a reference signal sent by a base station and used for downlink time delay estimation.
Specifically, the terminal may execute the signal delay estimation method provided in the embodiment of the present invention, that is, the execution devices of S101 to S105 may be terminals. Such as: s101 is specifically a terminal receiving a first reference signal for downlink delay estimation sent by a base station.
Further, based on the above method, when determining the corresponding time domain estimation channel according to the first reference signal in S102, the following implementation manners may be included, but are not limited to:
and S1021, calculating to obtain a frequency domain estimation channel according to the first reference signal and the local reference signal.
In particular, the first reference signal and the local reference signal are corresponding. Such as: if the first reference signal is an SRS, the local reference signal is a reference signal locally corresponding to the SRS.
When the frequency domain estimated channel is obtained by calculation according to the first reference signal and the local reference signal in S1021, the frequency domain estimated channel may be obtained by calculation using a first formula. Wherein the first formula is shown in the following formula (1)
h (i) r (i) × conj (s (i)) … … … … … … … … … … … … … … … … … formula (1)
Wherein h (i) denotes a frequency domain estimation channel; r (i) denotes a first reference signal; conj (s (i)) means taking the conjugate of s (i); s (i) denotes a local reference signal; i represents a subcarrier index, and the value range of i is 1 to NSC(ii) a Wherein N isSCIndicating the total number of subcarriers.
And S1022, performing frequency domain to time domain conversion on the frequency domain estimation channel to obtain a corresponding time domain estimation channel.
Specifically, IDFT (Inverse Discrete Fourier Transform) may be performed on the frequency domain estimated channel h (i) to obtain a corresponding time domain estimated channel h (n). The specific implementation process is shown in the following formula (2):
h (n) ═ IDFT (h (i)) … … … … … … … … … … … … … … … … … … … formula (2)
Where n is the time domain index, h (n) is the time domain estimated channel, h (i) represents the frequency domain estimated channel, and IDFT represents the transformation of the signal from the frequency domain to the time domain.
It can be seen from the above embodiments that, when determining a corresponding time domain estimation channel according to a first reference signal, a frequency domain estimation channel can be obtained by calculation according to the first reference signal and a local reference signal, then frequency domain-to-time domain conversion is performed on the frequency domain estimation channel to obtain a corresponding time domain estimation channel, and delay estimation is performed according to the time domain estimation channel, thereby improving reliability of delay estimation.
Further, based on the method, the setting condition in S103 may include: the channel power corresponding to the first time domain position is a maximum (i.e., a channel power maximum condition).
Further, based on the above method, when determining at least two first time domain positions satisfying the set condition according to the time domain estimated channel in S103, the following implementation manners may be included, but are not limited to:
and S1031, calculating the channel power of the time domain estimation channel.
Specifically, the channel power p (n) of the time domain estimated channel h (n) may be calculated according to the time domain estimated channel h (n) and the conjugate value of the time domain estimated channel. The specific implementation process is shown in the following formula (3):
p (n) ═ h (n. times. conj (h (n))) … … … … … … … … … … … … … … … … … formula (3)
Wherein, conj (h (n)) represents the conjugate of h (n); denotes dot multiplication; p (n) represents the channel power.
And S1031, obtaining at least two maximum values from the channel power of the time domain estimation channel, wherein the time domain position corresponding to the maximum values is the first time domain position.
Specifically, the first m maximum values may be obtained from p (n), and the time domain positions corresponding to these maximum values are all the first time domain positions. Wherein m is greater than 2.
It can be seen from the above embodiments that, when at least two first time domain positions satisfying a set condition are determined according to a time domain estimation channel, channel power of the time domain estimation channel may be calculated, and at least two maximum values are obtained from the channel power of the time domain estimation channel, and the time domain position corresponding to the maximum value is the first time domain position, thereby determining a plurality of first time domain positions according to the channel power maximum condition, and being applicable to a scene including a direct path and a scene not including a direct path, and improving system performance.
Further, based on the above method, when the second time domain position is obtained from each first time domain position according to the set rule in S104, the following implementation manners may be included, but are not limited to:
s1041, determining a minimum value in each first time domain position, wherein the minimum value is the second time domain position.
Specifically, the rule may be set such that the minimum value of all the first time domain positions is the second time domain position, so that the minimum value of m first time domain positions may be determined first, and the minimum value may be determined as the second time domain position for calculating the delay estimation value. Wherein m is greater than 2.
Further, based on the above method, when determining the delay estimate corresponding to the first reference signal according to the second time domain position in S105 is performed, the following implementation manners may be included, but are not limited to:
as can be seen from the foregoing embodiments, when the second time domain position is obtained from each first time domain position according to the set rule, the minimum value in the first time domain position may be used as the second time domain position for calculating the time delay estimation value, thereby simplifying the process of finding the second time domain position and facilitating system implementation.
S1051, calculating the time length from the second time domain position to the channel starting point, wherein the time length is the time delay estimation value corresponding to the first reference signal.
Specifically, the second time domain position is the optimal time domain position found from the plurality of first time domain positions, and the time length from the second time domain position to the starting point of the channel can be used as a delay estimation value channel, so that the delay estimation precision is improved. Particularly, the time delay estimation is carried out under the scene without the direct path, so that the time delay estimation precision under the scene without the direct path is greatly improved.
In step S1051, when the time length from the second time domain position to the channel starting point is calculated, and the time length is the time delay estimation value corresponding to the first reference signal, the time delay estimation value may be calculated by using a second formula. Wherein the second formula is shown as the following formula (4):
Ttao＝Topt×Ts… … … … … … … … … … … … … … … … … … … formula (4)
Wherein, TtaoRepresenting a delay estimate; t isoptRepresenting a second time domain location; t issRepresenting the time domain sampling interval.
It can be seen from the foregoing embodiments that, when determining the time delay estimation value corresponding to the first reference signal according to the second time domain position, the time length from the second time domain position to the channel starting point may be determined as the final time delay estimation value, and since the second time domain position is an optimal second time domain position found from the plurality of first time domain positions, the time delay estimation accuracy is improved.
Fig. 2 is a block diagram of a signal delay estimation apparatus according to an embodiment of the present invention, where the signal delay estimation apparatus may be used in a signal receiving device, for example: a base station or a terminal. As shown in fig. 2, the signal delay estimation apparatus may include:
a signal receiving module 21, configured to receive a first reference signal for time delay estimation;
a channel determining module 22, configured to determine a corresponding time domain estimation channel according to the first reference signal;
a position determining module 23, configured to determine at least two first time domain positions meeting a set condition according to the time domain estimation channel;
an obtaining module 24, configured to obtain a second time domain position from each of the first time domain positions according to a set rule;
and a delay estimation module 25, configured to determine a delay estimation value corresponding to the first reference signal according to the second time domain position.
Further, based on the above apparatus, the remote interference detection apparatus may further include: the signal receiving equipment is a base station, the time delay estimation is uplink time delay estimation, and the first reference signal is a reference signal which is sent by a terminal and used for uplink time delay estimation.
Further, based on the above apparatus, the signal receiving device is a terminal, the delay estimation is downlink delay estimation, and the first reference signal is a reference signal sent by a base station and used for downlink delay estimation.
Further, based on the above apparatus, the channel determining module 22 may include:
the first calculation submodule is used for calculating to obtain a frequency domain estimation channel according to the first reference signal and the local reference signal;
and the channel transformation submodule is used for carrying out frequency domain to time domain transformation on the frequency domain estimation channel to obtain a corresponding time domain estimation channel.
Further, based on the above apparatus, the first computing submodule may include:
the first calculation unit is used for calculating the frequency domain estimation channel by using a first formula; wherein the first formula comprises:
h(i)＝r(i)×conj(s(i))
wherein h (i) denotes a frequency domain estimation channel; r (i) denotes a first reference signal; conj (s (i)) means taking the conjugate of s (i); s (i) denotes a local reference signal; i represents a subcarrier index, and the value range of i is 1 to NSC(ii) a Wherein N isSCIndicating the total number of subcarriers.
Further, based on the above device, the setting conditions include: and the channel power corresponding to the first time domain position is a maximum value.
Further, based on the above apparatus, the position determining module 23 may include:
the first calculating submodule is used for calculating the channel power of the time domain estimation channel;
and the maximum value obtaining submodule is used for obtaining at least two maximum values from the channel power of the time domain estimation channel, and the time domain position corresponding to the maximum values is the first time domain position.
Further, based on the above apparatus, the obtaining module 24 may include:
a determining submodule, configured to determine a minimum value in each of the first time domain positions, where the minimum value is the second time domain position.
Further, based on the foregoing apparatus, the delay estimation module 25 may include:
and the second calculating submodule is used for calculating the time length from the second time domain position to the starting point of the channel, and the time length is the time delay estimated value corresponding to the first reference signal.
Further, based on the above apparatus, the second computing submodule may include:
the second calculation unit is used for calculating the time delay estimation value by using a second formula; wherein the second formula comprises:
Ttao＝Topt×Ts
wherein, TtaoRepresenting a delay estimate; t isoptRepresenting a second time domain location; t issRepresenting the time domain sampling interval.
It should be noted that the apparatus provided in this embodiment can implement all the method steps that can be implemented by the above method embodiment, and can achieve the same beneficial effects, and the same contents and beneficial effects in this apparatus embodiment as those in the above method embodiment are not described again.
Fig. 3 is a schematic structural diagram of a signal receiving apparatus according to an embodiment of the present invention, and as shown in fig. 3, the signal receiving apparatus 300 may include at least one processor 301, a memory 302, at least one other user interface 303, and a transceiver 304. The various components in signal receiving apparatus 300 are coupled together by a bus system 305. It will be appreciated that the bus system 305 is used to enable communications among the components connected. The bus system 305 includes a power bus, a control bus, and a status signal bus in addition to a data bus. For clarity of illustration, however, the various buses are labeled in fig. 3 as bus system 305, which may include any number of interconnected buses and bridges, with one or more processors, represented by processor 301, and various circuits, represented by memory 302, being linked together. The bus system may also link together various other circuits such as peripherals, voltage regulators, power management circuits, and the like, which are well known in the art, and therefore, embodiments of the present invention will not be described any further. The bus interface provides an interface. The transceiver 304 may be a number of elements including a transmitter and a receiver that provide a means for communicating with various other apparatus over a transmission medium. For different user devices, the user interface 303 may also be an interface capable of interfacing with a desired device externally, including but not limited to a keypad, display, speaker, microphone, joystick, etc.
It will be appreciated that the memory 302 in embodiments of the invention may be either volatile memory or nonvolatile memory, or may include both volatile and nonvolatile memory. The non-volatile Memory may be a Read-Only Memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an Electrically Erasable PROM (EEPROM), or a flash Memory. Volatile Memory can be Random Access Memory (RAM), which acts as external cache Memory. By way of illustration and not limitation, many forms of RAM are available, such as Static random access memory (Static RAM, SRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic random access memory (Synchronous DRAM, SDRAM), Double Data Rate Synchronous Dynamic random access memory (ddr Data Rate SDRAM, ddr SDRAM), Enhanced Synchronous SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), and Direct Rambus RAM (DRRAM). The memory 302 of the systems and methods described in connection with the various embodiments of the invention is intended to comprise, without being limited to, these and any other suitable types of memory.
The processor 301 is responsible for managing the bus system and the general processing, and the memory 302 may store computer programs or instructions used by the processor 301 in performing the operations, in particular, the processor 301 may be configured to:
receiving a first reference signal for time delay estimation;
determining a corresponding time domain estimation channel according to the first reference signal;
determining at least two first time domain positions meeting set conditions according to the time domain estimation channel;
acquiring a second time domain position from each first time domain position according to a set rule;
and determining a time delay estimation value corresponding to the first reference signal according to the second time domain position.
The method disclosed in the above embodiments of the present invention may be applied to the processor 301, or implemented by the processor 301. The processor 301 may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuits of hardware or instructions in the form of software in the processor 301. The Processor 301 may be a general-purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic device, or discrete hardware components. The various methods, steps and logic blocks disclosed in the embodiments of the present invention may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in connection with the embodiments of the present invention may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software module may be located in ram, flash memory, rom, prom, or eprom, registers, etc. storage media as is well known in the art. The storage medium is located in the memory 302, and the processor 301 reads the information in the memory 302 and completes the steps of the method in combination with the hardware.
It is to be understood that the embodiments described herein may be implemented in hardware, software, firmware, middleware, microcode, or any combination thereof. For a hardware implementation, the Processing units may be implemented within one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), general purpose processors, controllers, micro-controllers, microprocessors, other electronic units configured to perform the functions described herein, or a combination thereof.
For a software implementation, the techniques described may be implemented with modules (e.g., procedures, functions, and so on) that perform the functions described in the embodiments of the invention. The software codes may be stored in a memory and executed by a processor. The memory may be implemented within the processor or external to the processor.
Optionally, as another embodiment, the processor 301 is further configured to:
the signal receiving equipment is a base station, the time delay estimation is uplink time delay estimation, and the first reference signal is a reference signal which is sent by a terminal and used for uplink time delay estimation.
Optionally, as another embodiment, the processor 301 is further configured to: the signal receiving equipment is a terminal, the time delay estimation is downlink time delay estimation, and the first reference signal is a reference signal which is sent by a base station and used for downlink time delay estimation.
Optionally, as another embodiment, the processor 301 is further configured to:
the determining a corresponding time domain estimation channel according to the first reference signal includes:
calculating to obtain a frequency domain estimation channel according to the first reference signal and the local reference signal;
and carrying out frequency domain to time domain conversion on the frequency domain estimation channel to obtain a corresponding time domain estimation channel.
Optionally, as another embodiment, the processor 301 is further configured to:
the calculating to obtain the frequency domain estimation channel according to the first reference signal and the local reference signal includes:
calculating by using a first formula to obtain the frequency domain estimation channel; wherein the first formula comprises:
h(i)＝r(i)×conj(s(i))
wherein h (i) denotes a frequency domain estimation channel; r (i) denotes a first reference signal; conj (s (i)) means taking the conjugate of s (i); s (i) denotes a local reference signal; i represents a subcarrier index, and the value range of i is 1 to NSC(ii) a Wherein N isSCIndicating the total number of subcarriers.
Optionally, as another embodiment, the processor 301 is further configured to:
the setting conditions include: and the channel power corresponding to the first time domain position is a maximum value.
Optionally, as another embodiment, the processor 301 is further configured to:
the determining at least two first time domain positions meeting set conditions according to the time domain estimation channel includes:
calculating the channel power of the time domain estimation channel;
and acquiring at least two maximum values from the channel power of the time domain estimation channel, wherein the time domain position corresponding to the maximum values is the first time domain position.
Optionally, as another embodiment, the processor 301 is further configured to:
the obtaining a second time domain position from each of the first time domain positions according to a set rule includes:
determining a minimum value in each of the first time domain positions, the minimum value being the second time domain position.
Optionally, as another embodiment, the processor 301 is further configured to:
the determining the time delay estimation value corresponding to the first reference signal according to the second time domain position includes:
and calculating the time length from the second time domain position to the starting point of the channel, wherein the time length is the time delay estimation value corresponding to the first reference signal.
Optionally, as another embodiment, the processor 301 is further configured to:
the calculating a time length from the second time domain position to a channel starting point, where the time length is a time delay estimation value corresponding to the first reference signal, includes:
calculating the time delay estimated value by using a second formula; wherein the second formula comprises:
Ttao＝Topt×Ts
wherein, TtaoRepresenting a delay estimate; t isoptRepresenting a second time domain location; t issRepresenting the time domain sampling interval.
As can be seen from the foregoing embodiments, after receiving a first reference signal for time delay estimation, at least two first time domain positions meeting a set condition may be determined according to a time domain estimation channel corresponding to the first reference signal, a second time domain position may be obtained from each first time domain position according to a set rule, and a time delay estimation value corresponding to the first reference signal is determined according to the second time domain position, thereby improving accuracy of signal time delay estimation.
The scheme provided by the embodiment of the invention is mainly described from the perspective of the signal receiving equipment. It is to be understood that the signal receiving apparatus provided by the embodiment of the present invention includes a hardware structure and/or a software module for performing the above functions. Those of skill in the art will readily appreciate that the present invention can be implemented in hardware or a combination of hardware and computer software for performing the exemplary elements and algorithm steps described in connection with the embodiments disclosed herein.
Whether a function is performed as hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The signal receiving device and the like in the embodiments of the present invention may be divided into functional modules according to the above method examples, for example, each functional module may be divided corresponding to each function, or two or more functions may be integrated into one processing module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode.
It should be noted that, the division of the modules in the embodiment of the present invention is schematic, and is only a logic function division, and there may be another division manner in actual implementation.
It will be clear to those skilled in the art that, for convenience and simplicity of description, the foregoing division of the functional modules is merely used as an example, and in practical applications, the above function distribution may be performed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to perform all or part of the above described functions. For the specific working processes of the system, the apparatus and the unit described above, reference may be made to the corresponding processes in the foregoing method embodiments, and details are not described here again.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the modules or units is only one logical division, and there may be other divisions when actually implemented, for example, a plurality of units or components may be combined or may be integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit may be implemented in the form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, all or part of the technical solution can be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) or a processor to execute all or part of the steps of the method according to the embodiments of the present invention. The computer storage medium is a non-transitory (English) medium, comprising: flash memory, removable hard drive, read only memory, random access memory, magnetic or optical disk, and the like.
In another aspect, an embodiment of the present invention further provides a non-transitory computer-readable storage medium, on which a computer program is stored, where the computer program is implemented by a processor to perform the method provided in the foregoing embodiments, and the method includes:
receiving a first reference signal for time delay estimation;
determining a corresponding time domain estimation channel according to the first reference signal;
determining at least two first time domain positions meeting set conditions according to the time domain estimation channel;
acquiring a second time domain position from each first time domain position according to a set rule;
and determining a time delay estimation value corresponding to the first reference signal according to the second time domain position.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (22)
1. A signal delay estimation method, wherein the signal delay estimation method is used for a signal receiving device, and comprises:
receiving a first reference signal for time delay estimation;
determining a corresponding time domain estimation channel according to the first reference signal;
determining at least two first time domain positions meeting set conditions according to the time domain estimation channel;
acquiring a second time domain position from each first time domain position according to a set rule;
and determining a time delay estimation value corresponding to the first reference signal according to the second time domain position.
2. The signal delay estimation method according to claim 1, wherein the signal receiving device is a base station, the delay estimation is uplink delay estimation, and the first reference signal is a reference signal used for uplink delay estimation and transmitted by a terminal.
3. The signal delay estimation method according to claim 1, wherein the signal receiving device is a terminal, the delay estimation is downlink delay estimation, and the first reference signal is a reference signal sent by a base station for downlink delay estimation.
4. The signal delay estimation method according to claim 1, wherein the determining a corresponding time domain estimation channel according to the first reference signal comprises:
calculating to obtain a frequency domain estimation channel according to the first reference signal and the local reference signal;
and carrying out frequency domain to time domain conversion on the frequency domain estimation channel to obtain a corresponding time domain estimation channel.
5. The method according to claim 4, wherein the calculating a frequency domain estimation channel according to the first reference signal and the local reference signal comprises:
calculating by using a first formula to obtain the frequency domain estimation channel; wherein the first formula comprises:
h(i)＝r(i)×conj(s(i))
wherein h (i) denotes a frequency domain estimation channel; r (i) denotes a first reference signal; conj (s (i)) means taking the conjugate of s (i); s (i) denotes a local reference signal; i represents a subcarrier index, and the value range of i is 1 to NSC(ii) a Wherein N isSCIndicating the total number of subcarriers.
6. The signal delay estimation method according to claim 1, wherein the setting condition includes: and the channel power corresponding to the first time domain position is a maximum value.
7. The method according to claim 1 or 6, wherein the determining at least two first time domain positions satisfying a predetermined condition according to the time domain estimation channel comprises:
calculating the channel power of the time domain estimation channel;
and acquiring at least two maximum values from the channel power of the time domain estimation channel, wherein the time domain position corresponding to the maximum values is the first time domain position.
8. The signal delay estimation method according to claim 1, wherein the obtaining a second time domain position from each of the first time domain positions according to a set rule comprises:
determining a minimum value in each of the first time domain positions, the minimum value being the second time domain position.
9. The method according to claim 1, wherein said determining the delay estimate corresponding to the first reference signal according to the second time domain position comprises:
and calculating the time length from the second time domain position to the starting point of the channel, wherein the time length is the time delay estimation value corresponding to the first reference signal.
10. The method of claim 9, wherein the calculating a time length from the second time domain position to a channel starting point, where the time length is a time delay estimation value corresponding to the first reference signal, comprises:
calculating the time delay estimated value by using a second formula; wherein the second formula comprises:
Ttao＝Topt×Ts
wherein, TtaoRepresenting a delay estimate; t isoptRepresenting a second time domain location; t issRepresenting the time domain sampling interval.
11. A signal delay estimation apparatus, wherein the signal delay estimation apparatus is used for a signal receiving device, and comprises:
the signal receiving module is used for receiving a first reference signal for time delay estimation;
a channel determining module, configured to determine a corresponding time domain estimation channel according to the first reference signal;
the position determining module is used for determining at least two first time domain positions meeting set conditions according to the time domain estimation channel;
the acquisition module is used for acquiring a second time domain position from each first time domain position according to a set rule;
and the time delay estimation module is used for determining a time delay estimation value corresponding to the first reference signal according to the second time domain position.
12. A signal receiving apparatus comprising a memory, a processor, and a program stored on the memory and executable on the processor, wherein the processor implements the following steps when executing the program:
receiving a first reference signal for time delay estimation;
determining a corresponding time domain estimation channel according to the first reference signal;
determining at least two first time domain positions meeting set conditions according to the time domain estimation channel;
acquiring a second time domain position from each first time domain position according to a set rule;
and determining a time delay estimation value corresponding to the first reference signal according to the second time domain position.
13. The signal receiving device according to claim 12, wherein the signal receiving device is a base station, the delay estimation is an uplink delay estimation, and the first reference signal is a reference signal used for uplink delay estimation and transmitted by a terminal.
14. The apparatus according to claim 12, wherein the apparatus is a terminal, the delay estimation is a downlink delay estimation, and the first reference signal is a reference signal sent by a base station for downlink delay estimation.
15. The signal receiving device of claim 12, wherein said determining a corresponding time domain estimated channel according to the first reference signal comprises:
calculating to obtain a frequency domain estimation channel according to the first reference signal and the local reference signal;
and carrying out frequency domain to time domain conversion on the frequency domain estimation channel to obtain a corresponding time domain estimation channel.
16. The signal receiving device of claim 15, wherein the calculating a frequency domain estimated channel according to the first reference signal and the local reference signal comprises:
calculating by using a first formula to obtain the frequency domain estimation channel; wherein the first formula comprises:
h(i)＝r(i)×conj(s(i))
wherein h (i) denotes a frequency domain estimation channel; r (i) denotes a first reference signal; conj (s (i)) means taking the conjugate of s (i); s (i) denotes a local reference signal; i represents a subcarrier index, and the value range of i is 1 to NSC(ii) a Wherein N isSCIndicating the total number of subcarriers.
17. The signal receiving apparatus according to claim 12, wherein the setting condition includes: and the channel power corresponding to the first time domain position is a maximum value.
18. The signal receiving device according to claim 12 or 17, wherein the determining at least two first time domain positions satisfying a set condition according to the time domain estimation channel comprises:
calculating the channel power of the time domain estimation channel;
and acquiring at least two maximum values from the channel power of the time domain estimation channel, wherein the time domain position corresponding to the maximum values is the first time domain position.
19. The signal receiving apparatus of claim 12, wherein said obtaining a second time domain position from each of the first time domain positions according to a set rule comprises:
determining a minimum value in each of the first time domain positions, the minimum value being the second time domain position.
20. The apparatus according to claim 12, wherein said determining the time delay estimation value corresponding to the first reference signal according to the second time domain position comprises:
and calculating the time length from the second time domain position to the starting point of the channel, wherein the time length is the time delay estimation value corresponding to the first reference signal.
21. The signal receiving apparatus of claim 20, wherein the calculating a time length from the second time domain position to a channel starting point, the time length being a time delay estimation value corresponding to the first reference signal, comprises:
calculating the time delay estimated value by using a second formula; wherein the second formula comprises:
Ttao＝Topt×Ts
wherein, TtaoRepresenting a delay estimate; t isoptRepresenting a second time domain location; t issRepresenting the time domain sampling interval.
22. A non-transitory computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the signal delay estimation method according to any one of claims 1 to 10.
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