CN113676143A - Channel amplifying circuit, display driving chip and driving method - Google Patents
Channel amplifying circuit, display driving chip and driving method Download PDFInfo
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- CN113676143A CN113676143A CN202110943482.4A CN202110943482A CN113676143A CN 113676143 A CN113676143 A CN 113676143A CN 202110943482 A CN202110943482 A CN 202110943482A CN 113676143 A CN113676143 A CN 113676143A
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- 238000000034 method Methods 0.000 title claims abstract description 28
- 230000010355 oscillation Effects 0.000 claims abstract description 12
- 230000003139 buffering effect Effects 0.000 claims description 7
- 238000006243 chemical reaction Methods 0.000 claims description 7
- 230000003321 amplification Effects 0.000 claims description 5
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 5
- 230000001939 inductive effect Effects 0.000 claims 2
- 230000000694 effects Effects 0.000 abstract description 5
- 238000004590 computer program Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 2
- 238000013500 data storage Methods 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
- H03F1/565—Modifications of input or output impedances, not otherwise provided for using inductive elements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Power Engineering (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
The application discloses a channel amplifying circuit, a display driving chip and a driving method. The output end of the channel amplifier is provided with at least two inductors and a switch which are connected in parallel, the switch is selectively communicated with the paths of the inductors with the preset number and disconnected with the paths of other inductors, the impedance of the output end of the channel amplifier is adjusted by adjusting the number of the communicated inductors, the more the communicated inductors are, the smaller the impedance of the output end is, the effect of increasing the current of the channel amplifier is achieved, the influence of RC oscillation signals is favorably eliminated or reduced, the stability of output analog signals of the channel amplifier is improved, and the power consumption is reduced.
Description
Technical Field
The application relates to the technical field of display, in particular to a channel amplifying circuit, a display driving chip and a driving method.
Background
The channel amplifier (channel amplifier) has the function of directly driving the display panel, and the stability thereof directly affects the display image quality of the display panel. The instability of the channel amplifier is caused by the influence of oscillation signals generated by parasitic capacitance and inductance in the display circuit, so that the output analog signal is unstable, and the flicker of the display screen is induced. In order to adjust the stability of the channel amplifier, the prior art generally adopts a way of increasing the standby current of the channel amplifier to eliminate or reduce the influence of the RC oscillation signal, but this increases the driving and display power consumption.
Disclosure of Invention
In view of the above technical problems, the present application provides a channel amplifying circuit, a display driving chip and a driving method, which improve the stability of the output analog signal of the channel amplifier and reduce power consumption.
In a first aspect, an embodiment of the present application provides a channel amplifying circuit, including:
a channel amplifier comprising an input and an output, the input for receiving an analog signal;
at least two inductors connected to the output end and connected in parallel;
and the switch is connected with the output end, is used for selectively connecting the paths passing through the inductors with preset quantity and disconnecting the paths passing through other inductors, and is used for outputting the analog signal of the electric potential required by the display panel.
Optionally, the switch includes a MOS transistor, a source of the MOS transistor is connected to the inductor, a drain of the MOS transistor is connected to the display panel, and a gate of the MOS transistor is used for receiving a control signal to communicate a path through the MOS transistor.
Optionally, each MOS transistor serves as a switch and an inductor, and a source of the MOS transistor is connected to the output terminal, a drain of the MOS transistor is connected to the display panel, and a gate of the MOS transistor is used for receiving a control signal to communicate a path through the MOS transistor.
Optionally, two or more inductors are connected to the drain of the same MOS transistor.
Optionally, the preset number of inductors are connected in parallel and have preset impedances, and the preset impedances are used for pulling the RC oscillation signal in the channel amplification circuit to a zero frequency.
In a second aspect, an embodiment of the present application provides a display driving chip, including a shift register, a latch, a decoder, and the channel amplifying circuit of any one of the above,
the shift register is used for converting serial data into parallel data and outputting the parallel data to the latch;
the latch is used for keeping the parallel data at a preset level for buffering;
the decoder is used for carrying out digital-to-analog conversion on the parallel data of the latch and outputting an analog signal to the channel amplifying circuit.
In a third aspect, an embodiment of the present application provides a display device, which includes a display panel and the above display driving chip, where the display driving chip is configured to output an analog signal of a desired potential to the display panel.
In a fourth aspect, an embodiment of the present application provides a driving method of a channel amplifier, based on the channel amplifier circuit described in any one of the above, the method including:
the channel amplifier receives an analog signal;
the paths passing through the inductors of the preset number are connected, and the paths passing through other inductors are disconnected, so that the analog signal of the electric potential required by the display panel is output.
Optionally, the switch includes a MOS transistor, the connection is disconnected via a path of a predetermined number of inductances and via a path of other inductances, including:
applying a control signal to the gates of the MOS transistors connected to the predetermined number of inductors, and not applying the control signal to the gates of the MOS transistors connected to the other inductors.
Optionally, the preset number of inductors are connected in parallel and have preset impedances, and outputting the analog signal of the potential required by the display panel includes:
and pulling the RC oscillation signal in the channel amplification circuit to zero frequency through the preset impedance.
Optionally, before the channel amplifier receives the analog signal, the method further includes:
the shift register converts serial data into parallel data and outputs the parallel data to the latch;
the latch keeps the parallel data at a preset level for buffering;
and the decoder performs digital-to-analog conversion on the parallel data of the latch and outputs an analog signal to the channel amplifier.
As described above, in the channel amplifying circuit, the display driving chip, and the driving method of the present application, at least two inductors and switches connected in parallel are disposed at the output end of the channel amplifier, the path via the predetermined number of inductors is selectively connected through the switches, and the path via the other inductors is disconnected, the impedance of the output end of the channel amplifier is adjusted by adjusting the number of connected inductors, and the more the connected inductors are, the smaller the impedance of the output end is, so as to achieve the effect of increasing the current of the channel amplifier, which is beneficial to eliminating or reducing the influence of the RC oscillation signal, improving the stability of the output analog signal of the channel amplifier, and reducing the power consumption.
Drawings
Fig. 1 is a schematic structural diagram of a display driver chip according to an embodiment of the present application;
fig. 2 is an equivalent schematic diagram of an inductor connected to a channel amplifying circuit according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram of a display driver chip according to another embodiment of the present application;
FIG. 4 is a flowchart illustrating a driving method according to an embodiment of the present application;
fig. 5 is a flowchart illustrating a driving method according to another embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the technical solutions of the present application will be described below in conjunction with specific embodiments and accompanying drawings. It is to be understood that the embodiments described below are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, the following respective embodiments and technical features thereof may be combined with each other without conflict.
Fig. 1 is a schematic structural diagram of a display driver chip according to an embodiment of the present application. The channel amplifying circuit 10 includes: a channel amplifier 104 and a control unit 105, the control unit 105 comprising at least two inductors R1 … Rn, and at least two switches.
The channel amplifier 104 includes an input for receiving an analog signal and an output.
In some embodiments, the analog signal is a parallel signal and is derived from the shift register 101, the latch 102 and the decoder 103 shown in fig. 3, the shift register 101 is used for converting serial data into parallel data and outputting the parallel data to the latch 102, the latch 102 holds the parallel data at a predetermined level for buffering, the decoder 103 performs digital-to-analog conversion on the parallel data of the latch 102 and outputs the analog signal to the input terminal, such as the positive terminal, of the channel amplifier 104, and the negative terminal of the channel amplifier 104 may be connected to the output terminal of the channel amplifier 104.
At least two inductors R1 … Rn are connected in parallel to the output of the channel amplifier 104.
The switch is connected between the output terminal of the channel amplifier 104 and the display panel, and is used for selectively connecting paths through a predetermined number of inductors and disconnecting paths through other inductors, so as to output an analog signal of a potential required by the display panel. It should be understood that the switch may be directly electrically connected to the output of the channel amplifier 104 or indirectly electrically connected thereto.
In some embodiments, the direct electrical connection may include: taking the example that the switch includes a MOS transistor, as shown in fig. 3, a source of the MOS transistor is connected to the inductor, a drain of the MOS transistor is connected to the display panel, and a gate of the MOS transistor is used for receiving a control signal to communicate a path through the MOS transistor. At this time, when the MOS transistor is turned on, the channel amplifier circuit is connected via an inductor in a path of the MOS transistor, and the connected inductor affects an analog signal output from the channel amplifier circuit.
Optionally, the drain of the same MOS transistor is connected with two or more inductors, but the number of the inductors connected with the same MOS transistor is smaller than the number of the inductors included in the channel amplifying circuit 10, that is, the drain of the same MOS transistor may be connected with a plurality of inductors, and the total impedance may be adjusted by controlling a plurality of paths through one switch, or by the number of the connected inductors.
In some embodiments, the indirect electrical connection may include: each MOS transistor serves as a switch and an inductor, the source of the MOS transistor is connected to the output terminal of the channel amplifier 104, the drain of the channel amplifier 104 is connected to the display panel, and the gate of the channel amplifier 104 is used for receiving a control signal to turn on the MOS transistor and communicate the path through the MOS transistor. In this scenario, the MOS transistor is both an inductor and a switch, the MOS transistor receiving the control signal is turned on, and at the same time, the MOS transistor is connected to the channel amplifying circuit as an inductor, and affects the analog signal output by the channel amplifying circuit. At this time, the control unit 105 may be regarded as including a plurality of MOS transistors connected in parallel.
At least two inductors and switches connected in parallel are disposed at the output end of the channel amplifier 104, please refer to fig. 1 and fig. 2, the paths passing through a predetermined number of inductors are selectively connected through the switches, and the paths passing through other inductors are disconnected, the impedance of the output end of the channel amplifier 104 is adjusted by adjusting the number of the connected inductors, and the more the connected inductors are, the smaller the impedance of the output end is, so as to achieve the effect of increasing the current of the channel amplifier 104, which is beneficial to eliminating or reducing the influence of the RC oscillation signal, improving the stability of the output analog signal of the channel amplifier 104, and reducing the power consumption.
In some scenarios, the predetermined number of inductors are connected in parallel to have a predetermined impedance, i.e., a total impedance of the channel amplifying circuit 10, where the total impedance is Re, and can be obtained by the following relation.
R1 and R2 … Rn are connected inductors, and n is an integer and is more than 2.
The total impedance Re is used to pull the parasitic RC oscillation signal in the channel amplifier circuit 10 to the zero frequency, where the parasitic RC oscillation signal is the smallest at the zero frequency, the influence on the output analog signal is the smallest, and the stability of the analog signal output by the channel amplifier circuit 10 to the display panel is the best.
It should be understood that fig. 2 shows a scenario in which n parallel inductors are all turned on, and in the embodiment of the present application, the channel amplifying circuit 10 may set the number of the turned-on inductors according to actual needs.
The embodiment of the present application further provides a display driving chip, as shown in fig. 1 and fig. 3, including a shift register 101, a latch 102, a decoder 103, and the channel amplifying circuit 10 described in any of the above embodiments. The shift register 102 is used to convert serial data into parallel data and output the data to latches. The latch 102 is used to hold the parallel data at a predetermined level for buffering. The decoder 103 is configured to perform digital-to-analog conversion on the parallel data of the latch 102 and output an analog signal to the channel amplifying circuit 10. The channel amplifying circuit 10 is selectively connected to the paths via the predetermined number of inductors and disconnected via the paths of the other inductors by the switch, and the impedance of the output end of the channel amplifier 104 is adjusted by adjusting the number of the connected inductors, and the more the connected inductors are, the smaller the impedance of the output end is, so that the effect of increasing the current of the channel amplifier 104 is achieved, the influence of the RC oscillation signal is favorably eliminated or reduced, the stability of the output analog signal of the channel amplifier 104 is improved, and the power consumption is reduced.
Embodiments of the present application further provide a display device, which includes a display panel and a display driving chip, wherein the display driving chip is configured to output an analog signal of a desired potential to the display panel. The display device can adopt the display driving core to output analog signals required by display, and achieves the beneficial effects.
Embodiments of the present application also provide a driving method of a channel amplifier, as shown in fig. 4, the driving method of a channel amplifier includes the following steps S11 to S12.
S11: the channel amplifier receives an analog signal.
S12: the paths passing through the inductors of the preset number are connected, and the paths passing through other inductors are disconnected, so that the analog signal of the electric potential required by the display panel is output.
The driving method of the channel amplifier is based on the channel amplifying circuit 10 described in any of the above embodiments, and therefore has the same advantageous effects. For example, optionally, the switch includes a MOS transistor, and in the step S12, the path via the predetermined number of inductors is connected and the path via the other inductors is disconnected, including: the control signal is applied to the gates of the MOS transistors connected to the predetermined number of inductances, and the control signal is not applied to the gates of the MOS transistors connected to the other inductances. For another example, optionally, the preset number of inductors are connected in parallel to have a preset impedance, and outputting the analog signal of the potential required by the display panel includes: and the RC oscillation signal in the channel amplification circuit is pulled to the zero frequency through a preset impedance.
For another example, before the channel amplifier receives the analog signal, as shown in fig. 5, the driving method of the channel amplifier further includes S111 to S113.
S111: the shift register converts serial data into parallel data and outputs the parallel data to the latch.
S112: the latch holds the parallel data at a predetermined level for buffering.
S113: the decoder performs digital-to-analog conversion on the parallel data of the latch and outputs an analog signal to the channel amplifier.
Although step numbers such as S11 and S12 are used herein, the purpose is to briefly describe the corresponding content more clearly, and not to constitute a substantial limitation on the sequence, and in the specific implementation, S12 may be performed first, and then S11 may be performed, which are all within the protection scope of the present application.
Embodiments of the present application also provide a readable storage medium storing a driver, and when the driver is executed by a processor, the driver may implement one or more steps of the driving method of any embodiment.
Embodiments of the present application also provide a computer program product, which includes computer program code, when running on a computer, causes the computer to execute the method in the above various possible embodiments.
The embodiment of the present application further provides a chip, which includes a memory and a processor, where the memory is used to store a computer program, and the processor is used to call and run the computer program from the memory, so that a device installed with the display driver chip executes the method in the above various possible embodiments.
In the embodiments of the terminal, the readable storage medium, the computer program product, and the chip provided in the present application, all technical features of the embodiments of the driving method are included, and the expanding and explaining contents of the specification are basically the same as those of the embodiments of the driving method, and are not described herein again.
The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored on a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wire (e.g., coaxial cable, fiber optics, digital subscriber line) or wirelessly (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that incorporates one or more of the available media. The usable medium may be a magnetic medium (e.g., floppy Disk, memory Disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., Solid State Disk (SSD)), among others.
It is to be understood that the foregoing scenarios are only examples, and do not constitute a limitation on application scenarios of the technical solutions provided in the embodiments of the present application, and the technical solutions of the present application may also be applied to other scenarios. For example, as can be known by those skilled in the art, with the evolution of system architecture and the emergence of new service scenarios, the technical solution provided in the embodiments of the present application is also applicable to similar technical problems.
Through the above description of the embodiments, those skilled in the art can clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but the former is a better implementation mode in many cases. Based on such understanding, the technical solutions of the present application may be embodied in the form of a software product, which is stored in a storage medium (e.g., ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a device (e.g., a mobile phone, a computer, a server, a controlled terminal, or a network device) to execute the method of each embodiment of the present application.
The above description is only a preferred embodiment of the present application, and not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes, which are made by the contents of the specification and the drawings of the present application, or which are directly or indirectly applied to other related technical fields, are included in the scope of the present application.
Claims (10)
1. A channel amplification circuit, comprising:
a channel amplifier comprising an input and an output, the input for receiving an analog signal;
at least two inductors connected to the output end and connected in parallel;
and the switch is connected with the output end, is used for selectively connecting the paths passing through the inductors with preset quantity and disconnecting the paths passing through other inductors, and is used for outputting the analog signal of the electric potential required by the display panel.
2. The channel amplifier circuit of claim 1, wherein the switch comprises a MOS transistor having a source connected to the inductor, a drain connected to the display panel, and a gate for receiving a control signal to communicate a path through the MOS transistor.
3. The channel amplifier circuit of claim 1, wherein each MOS transistor acts as a switch and an inductor, and the source of the MOS transistor is connected to the output terminal, the drain of the MOS transistor is connected to the display panel, and the gate of the MOS transistor is used for receiving a control signal to communicate the path through the MOS transistor.
4. The channel amplifier circuit according to claim 2, wherein two or more inductors are connected to a drain of the same MOS transistor.
5. The channel amplifier circuit according to claim 1, wherein the predetermined number of inductors are connected in parallel to have a predetermined impedance, and the predetermined impedance is used for pulling an RC oscillating signal in the channel amplifier circuit to a zero frequency.
6. A display driving chip comprising a shift register, a latch, a decoder, and the channel amplifying circuit of any one of claims 1 to 5,
the shift register is used for converting serial data into parallel data and outputting the parallel data to the latch;
the latch is used for keeping the parallel data at a preset level for buffering;
the decoder is used for carrying out digital-to-analog conversion on the parallel data of the latch and outputting an analog signal to the channel amplifying circuit.
7. A driving method of a channel amplifier, based on the channel amplifying circuit according to any one of claims 1 to 5, the method comprising:
the channel amplifier receives an analog signal;
the paths passing through the inductors of the preset number are connected, and the paths passing through other inductors are disconnected, so that the analog signal of the electric potential required by the display panel is output.
8. The method of claim 7, wherein the switch comprises a MOS transistor, and wherein the switching on is via a predetermined number of inductive paths and off via other inductive paths comprises:
applying a control signal to the gates of the MOS transistors connected to the predetermined number of inductors, and not applying the control signal to the gates of the MOS transistors connected to the other inductors.
9. The method according to claim 7, wherein the predetermined number of inductors are connected in parallel to have a predetermined impedance, and the outputting the analog signal of the desired potential of the display panel comprises:
and pulling the RC oscillation signal in the channel amplification circuit to zero frequency through the preset impedance.
10. The method of claim 7, wherein prior to receiving the analog signal, the channel amplifier further comprises:
the shift register converts serial data into parallel data and outputs the parallel data to the latch;
the latch keeps the parallel data at a preset level for buffering;
and the decoder performs digital-to-analog conversion on the parallel data of the latch and outputs an analog signal to the channel amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110943482.4A CN113676143A (en) | 2021-08-17 | 2021-08-17 | Channel amplifying circuit, display driving chip and driving method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202110943482.4A CN113676143A (en) | 2021-08-17 | 2021-08-17 | Channel amplifying circuit, display driving chip and driving method |
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| CN113676143A true CN113676143A (en) | 2021-11-19 |
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| CN202110943482.4A Pending CN113676143A (en) | 2021-08-17 | 2021-08-17 | Channel amplifying circuit, display driving chip and driving method |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| TWI824669B (en) * | 2022-08-17 | 2023-12-01 | 大陸商北京集創北方科技股份有限公司 | LED driver chip channel layout structure, LED driver chip and display device |
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