CN113672394A - Cooperative processing system based on multiple ARM processors - Google Patents
Cooperative processing system based on multiple ARM processors Download PDFInfo
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
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Abstract
The invention relates to a cooperative processing system based on a plurality of ARM processors, which comprises: the input module is used for inputting an instruction for executing the application; the information acquisition module is used for acquiring instructions; the IOCTL calling module is used for averagely distributing application tasks to the first ARM processor and the second ARM processor according to the instruction and simultaneously running and processing a plurality of application tasks; the first ARM processor is used for downloading DSP codes required by execution of the application tasks according to the application tasks distributed by the IOCTL calling module and sending the DSP codes to the DSP module for processing; the second ARM processor is used for downloading DSP codes required by the execution of the application tasks according to the application tasks distributed by the IOCTL calling module and sending the DSP codes to the DSP module for processing; and the DSP module is used for executing DSP codes sent by the first ARM processor and the second ARM processor. The invention can make the processing algorithm speed of the ARM processor processing system faster so as to meet the market demand.
Description
Technical Field
The invention relates to the technical field of computers, in particular to a multi-ARM processor-based cooperative processing system.
Background
Due to rapid development of science and technology, digital software application becomes more diversified and complex, a traditional single-core processor cannot meet the requirements of people on digital media, the requirements of application and media can be met only by performing diversified application development through a plurality of ARM processors, algorithm acceleration is performed by using a DSP (digital signal processor), particularly, the algorithm acceleration of coding and decoding of the media is performed, the flexibility of the algorithm can be maintained, and strong processing capability can be provided.
In the market, the algorithm processing of a single ARM processor is slow, and the operation requirements of application and media diversification cannot be met, so that the existing ARM processor processing system needs to be improved, and the processing algorithm is faster to meet the market requirements.
Disclosure of Invention
The invention aims to provide a multi-ARM processor based cooperative processing system, so that the processing algorithm speed of an ARM processor processing system is higher, and the market demand is met.
To achieve the above object, an embodiment of the present invention provides a cooperative processing system based on multiple ARM processors, including:
the input module is used for inputting an instruction for executing the application;
the information acquisition module is used for acquiring the instruction for executing the application input by the input module;
the IOCTL calling module is used for averagely distributing application tasks to the first ARM processor and the second ARM processor according to the application execution instructions acquired by the information acquisition module and simultaneously operating and processing a plurality of application tasks;
the first ARM processor is used for downloading DSP codes required by execution of the application tasks according to the application tasks distributed by the IOCTL calling module and sending the DSP codes to the DSP module for processing;
the second ARM processor is used for downloading DSP codes required by execution of the application tasks according to the application tasks distributed by the IOCTL calling module and sending the DSP codes to the DSP module for processing; and
and the DSP module is used for executing the DSP codes sent by the first ARM processor and the second ARM processor.
Preferably, when the DSP module is idle, the DSP module is in a reset state by default; the DSP can only run up after downloading the code and removing the reset via the ARM application. The DSP chip also comprises a clock circuit, and two methods are generally used for providing a clock for the DSP chip: one is to use a crystal oscillator circuit provided inside the DSP chip, and the other is to use an external oscillation source.
The first ARM processor and the second ARM processor are specifically configured to release the reset of the DSP module, so that the DSP module executes the DSP codes sent by the first ARM processor and the second ARM processor.
Preferably, the first ARM processor and the second ARM processor are specifically configured to download, from an application library, DSP codes required for executing application tasks by calling corresponding API interfaces.
Preferably, the first ARM processor and the second ARM processor are specifically configured to generate a series of sub-threads based on a main thread, map the application tasks allocated by the IOCTL call module to the series of sub-threads for parallel execution, and respectively call corresponding API interfaces to download DSP codes of parallel areas required for executing the application tasks from an application library.
Preferably, after the DSP module is reset, the first ARM processor, the second ARM processor and the DSP module operate simultaneously.
Preferably, the information acquisition module is provided with COM, USB and NAND interfaces.
Preferably, the first ARM processor is of the model ARM926EJ, and the second ARM processor is of the model ARM 956E.
Preferably, the IOCTL calling module is based on a Windows XP, Windows7, Windows8 or Windows10 system as a system framework.
The embodiment of the present invention further provides a cooperative processing method of a cooperative processing system based on multiple ARM processors as described in the above embodiments, including the following steps:
the input module inputs an instruction for executing the application;
the information acquisition module acquires an instruction for executing the application, which is input by the input module;
the IOCTL calling module averagely distributes application tasks to the first ARM processor and the second ARM processor according to the application execution instructions acquired by the information acquisition module and simultaneously runs and processes a plurality of application tasks;
the first ARM processor downloads DSP codes required by executing the application tasks according to the application tasks distributed by the IOCTL calling module and sends the DSP codes to the DSP module for processing;
the second ARM processor downloads DSP codes required by executing the application tasks according to the application tasks distributed by the IOCTL calling module and sends the DSP codes to the DSP module for processing;
and the DSP module executes DSP codes sent by the first ARM processor and the second ARM processor.
The embodiment of the invention at least has the following beneficial effects:
the processing system of the embodiment of the invention is convenient for simultaneously processing a plurality of applications, and the cooperative processing system based on the plurality of ARM processors downloads the codes of the applications through the first ARM processor and the second ARM processor, relieves the reset of the DSP module, enables the DSP module to simultaneously run, and can accelerate the data algorithm processing speed of the first ARM processor and the second ARM processor.
Additional features and advantages of embodiments of the invention will be set forth in the description which follows.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic diagram of a multi-ARM processor based cooperative processing system according to an embodiment of the present invention.
Fig. 2 is a flowchart of a multi-ARM processor based cooperative processing method according to another embodiment of the present invention.
Detailed Description
Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. In addition, in the following detailed description, numerous specific details are set forth in order to provide a better understanding of the present invention. It will be understood by those skilled in the art that the present invention may be practiced without some of these specific details. In some instances, well known means have not been described in detail so as not to obscure the present invention.
Referring to fig. 1, an embodiment of the present invention provides a multi-ARM processor based cooperative processing system, including:
the input module is used for inputting an instruction for executing the application;
the information acquisition module is used for acquiring the instruction for executing the application input by the input module;
the IOCTL calling module is used for averagely distributing application tasks to the first ARM processor and the second ARM processor according to the application execution instructions acquired by the information acquisition module and simultaneously operating and processing a plurality of application tasks;
the first ARM processor is used for downloading DSP codes required by execution of the application tasks according to the application tasks distributed by the IOCTL calling module and sending the DSP codes to the DSP module for processing;
the second ARM processor is used for downloading DSP codes required by execution of the application tasks according to the application tasks distributed by the IOCTL calling module and sending the DSP codes to the DSP module for processing; and
and the DSP module is used for executing the DSP codes sent by the first ARM processor and the second ARM processor.
When the DSP module is idle, the DSP module is in a reset state by default;
the first ARM processor and the second ARM processor are specifically configured to release the reset of the DSP module, so that the DSP module executes the DSP codes sent by the first ARM processor and the second ARM processor.
The first ARM processor and the second ARM processor are specifically used for downloading DSP codes required by execution of application tasks from an application library by calling corresponding API interfaces.
The first ARM processor and the second ARM processor are specifically used for generating a series of sub threads based on a main thread, mapping the application tasks distributed by the IOCTL calling module to the series of sub threads for parallel execution, and respectively calling the corresponding API (application programming interface) to download DSP (digital signal processor) codes of a parallel area required by execution of the application tasks from an application library.
When the DSP module is reset, the first ARM processor, the second ARM processor and the DSP module operate simultaneously.
The information acquisition module is provided with COM, USB and NAND interfaces.
The model of the first ARM processor is ARM926EJ, and the model of the second ARM processor is ARM 956E.
The IOCTL calling module is based on a Windows XP, Windows7, Windows8 or Windows10 system as a system frame, 220V residential electricity is used, so that the IOCTL calling module 3 is wider in application range and can be compatible with various devices.
Wherein the system further comprises a memory and a control module; the DSP module is connected with a memory, a TCP/IP protocol, a UDP protocol, a DMX protocol and a serial port protocol are stored in the memory, the memory is connected with the control module by adopting the TCP/IP protocol, the operation of applications and media in various formats can be met, and the control module is connected with the first ARM processor and the second ARM processor; the execution result of the DSP module is stored in the memory, the memory also sends the execution result to the control module, and the control module controls the first ARM processor and the second ARM processor to execute again or finish the task according to the execution result.
Referring to fig. 2, another embodiment of the present invention further provides a cooperative processing method of the cooperative processing system based on multiple ARM processors according to the above embodiment, including the following steps:
step S10, inputting an instruction for executing the application by the input module;
step S20, the information acquisition module acquires the instruction for executing the application input by the input module;
step S30, the IOCTL calling module distributes the application tasks to the first ARM processor and the second ARM processor evenly according to the application execution instructions collected by the information collection module and simultaneously runs and processes a plurality of application tasks;
step S40, the first ARM processor downloads DSP codes required by the execution of the application tasks according to the application tasks distributed by the IOCTL calling module and sends the DSP codes to the DSP module for processing;
step S50, the second ARM processor downloads DSP codes required by the execution of the application tasks according to the application tasks distributed by the IOCTL calling module and sends the DSP codes to the DSP module for processing;
and step S60, the DSP module executes DSP codes sent by the first ARM processor and the second ARM processor.
The system of this embodiment corresponds to the method of the above embodiment, and therefore, the content of the system of this embodiment that is not described in detail can be obtained by referring to the content of the method of the above embodiment, and is not described herein again.
Having described embodiments of the present invention, the foregoing description is intended to be exemplary, not exhaustive, and not limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen in order to best explain the principles of the embodiments, the practical application, or improvements made to the technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
Claims (9)
1. A multi-ARM processor based co-processing system, comprising:
the input module is used for inputting an instruction for executing the application;
the information acquisition module is used for acquiring the instruction for executing the application input by the input module;
the IOCTL calling module is used for averagely distributing application tasks to the first ARM processor and the second ARM processor according to the application execution instructions acquired by the information acquisition module and simultaneously operating and processing a plurality of application tasks;
the first ARM processor is used for downloading DSP codes required by execution of the application tasks according to the application tasks distributed by the IOCTL calling module and sending the DSP codes to the DSP module for processing;
the second ARM processor is used for downloading DSP codes required by execution of the application tasks according to the application tasks distributed by the IOCTL calling module and sending the DSP codes to the DSP module for processing; and
and the DSP module is used for executing the DSP codes sent by the first ARM processor and the second ARM processor.
2. The multi-ARM-processor-based co-processing system of claim 1, wherein when the DSP module is idle, it is in a reset state by default;
the first ARM processor and the second ARM processor are specifically configured to release the reset of the DSP module, so that the DSP module executes the DSP codes sent by the first ARM processor and the second ARM processor.
3. The multi-ARM processor based coprocessor system of claim 2, wherein the first ARM processor and the second ARM processor are specifically configured to download DSP code required for executing an application task from an application library by calling corresponding API interfaces.
4. The multi-ARM-processor-based cooperative processing system of claim 3, wherein the first ARM processor and the second ARM processor are specifically configured to generate a series of sub-threads based on a main thread, map the application task allocated by the IOCTL call module to the series of sub-threads for parallel execution, and respectively call corresponding API interfaces to download DSP codes of parallel regions required for executing the application task from an application library.
5. The multi-ARM processor based co-processing system of claim 4, wherein the first ARM processor, the second ARM processor and the DSP module operate simultaneously when the DSP module is de-reset.
6. The multi-ARM-processor-based cooperative processing system according to any one of claims 1 to 5, wherein the information acquisition module is provided with COM, USB and NAND interfaces.
7. The multi-ARM processor based co-processing system as claimed in any one of claims 1 to 5, wherein the first ARM processor is of the type ARM926EJ and the second ARM processor is of the type ARM 956E.
8. The multi-ARM-processor-based cooperative processing system of any one of claims 1 to 5, wherein the IOCTL calling module is based on a Windows XP, Windows7, Windows8 or Windows10 system as a system framework.
9. The cooperative processing method of the cooperative processing system based on multiple ARM processors as claimed in claims 1 to 8, comprising the steps of:
the input module inputs an instruction for executing the application;
the information acquisition module acquires an instruction for executing the application, which is input by the input module;
the IOCTL calling module averagely distributes application tasks to the first ARM processor and the second ARM processor according to the application execution instructions acquired by the information acquisition module and simultaneously runs and processes a plurality of application tasks;
the first ARM processor downloads DSP codes required by executing the application tasks according to the application tasks distributed by the IOCTL calling module and sends the DSP codes to the DSP module for processing;
the second ARM processor downloads DSP codes required by executing the application tasks according to the application tasks distributed by the IOCTL calling module and sends the DSP codes to the DSP module for processing;
and the DSP module executes DSP codes sent by the first ARM processor and the second ARM processor.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101697225A (en) * | 2009-09-24 | 2010-04-21 | 上海交通大学 | Image fusion system and method based on ARM and DSP heterogeneous dual-core processor |
| CN109542516A (en) * | 2018-11-13 | 2019-03-29 | 西安邮电大学 | A kind of acceleration arm processor concurrent working system and its working method |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101697225A (en) * | 2009-09-24 | 2010-04-21 | 上海交通大学 | Image fusion system and method based on ARM and DSP heterogeneous dual-core processor |
| CN109542516A (en) * | 2018-11-13 | 2019-03-29 | 西安邮电大学 | A kind of acceleration arm processor concurrent working system and its working method |
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