CN113644884A - Transimpedance amplifying circuit and photosensitive chip - Google Patents

Transimpedance amplifying circuit and photosensitive chip Download PDF

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Publication number
CN113644884A
CN113644884A CN202110848299.6A CN202110848299A CN113644884A CN 113644884 A CN113644884 A CN 113644884A CN 202110848299 A CN202110848299 A CN 202110848299A CN 113644884 A CN113644884 A CN 113644884A
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coupled
photodiode
transimpedance amplification
nmos transistor
load resistor
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顾汉玉
徐刚
季月芬
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Ningbo Qunzi Microelectronics Co ltd
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Ningbo Qunzi Microelectronics Co ltd
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/04—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
    • H03F3/08—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light
    • H03F3/082—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light with FET's
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45142—At least one diode being added at the input of a dif amp

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

A transimpedance amplifier circuit and photosensitive chip, transimpedance amplifier circuit include: first photosensitive diode, second photosensitive diode, first feedback resistance, second feedback resistance and transimpedance amplification unit, wherein: the anode of the first photosensitive diode is grounded, and the cathode of the first photosensitive diode is coupled with the first input end of the transimpedance amplification unit; the anode of the second photosensitive diode is grounded, and the cathode of the second photosensitive diode is coupled with the second input end of the transimpedance amplification unit; a first feedback resistor, a first end of which is coupled to the first input end of the transimpedance amplification unit, and a second end of which is coupled to the first output end of the transimpedance amplification unit; a first end of the second feedback resistor is coupled with the second input end of the transimpedance amplification unit, and a second end of the second feedback resistor is coupled with the second output end of the transimpedance amplification unit; the surface of the second photosensitive diode is covered with the light blocking layer, and the intrinsic current of the second photosensitive diode is used for compensating the intrinsic current of the first photosensitive diode. The scheme can improve the common-mode interference resistance of the transimpedance amplification circuit.

Description

Transimpedance amplifying circuit and photosensitive chip
Technical Field
The invention relates to the technical field of electronics, in particular to a transimpedance amplification circuit and a photosensitive chip.
Background
The transimpedance amplifier circuit is a key circuit for realizing photoelectric conversion. In a conventional transimpedance amplifier circuit, a current source is generally used as steady-state compensation of the transimpedance amplifier circuit. Referring to fig. 1, a schematic diagram of a conventional transimpedance amplifier circuit is shown.
In fig. 1, a photodiode PD generates a photosensitive current of μ a (microampere) level after receiving illumination, and amplifies and outputs the photosensitive current through a transimpedance amplification unit. The first input end "+" and the first output end V of the transimpedance amplification unitO1A load resistor R is connected between the twoFA second input terminal "-" and a second output terminal VO2A load resistor R is connected between the twoF. By means of a current source ITHAnd outputting current to compensate the intrinsic current of the photodiode PD.
However, due to the current source ITHIs usually predetermined and does not correspond to the intrinsic current of the photodiode PD. Furthermore, limited by process effects, the current source ITHThe output current itself will also have some ripple. In the prior art, is limited by a current source ITHThe transimpedance amplifier circuit has poor common mode interference resistance.
Disclosure of Invention
The embodiment of the invention solves the problem that the trans-impedance amplifying circuit has poor common-mode interference resistance.
To solve the above technical problem, an embodiment of the present invention provides a transimpedance amplifier circuit, including: first photosensitive diode, second photosensitive diode, first feedback resistance, second feedback resistance and transimpedance amplification unit, wherein: the anode of the first photodiode is grounded, and the cathode of the first photodiode is coupled with the first input end of the transimpedance amplification unit; the anode of the second photodiode is grounded, and the cathode of the second photodiode is coupled with the second input end of the transimpedance amplification unit; a first end of the first feedback resistor is coupled to the first input end of the transimpedance amplification unit, and a second end of the first feedback resistor is coupled to the first output end of the transimpedance amplification unit; a first end of the second feedback resistor is coupled to the second input end of the transimpedance amplification unit, and a second end of the second feedback resistor is coupled to the second output end of the transimpedance amplification unit; the surface of the second photosensitive diode is covered with a light blocking layer, and the intrinsic current of the second photosensitive diode is used for compensating the intrinsic current of the first photosensitive diode.
Optionally, the transimpedance amplification unit includes: the amplifier comprises a first-stage amplifying circuit, a second-stage amplifying circuit and a first current source.
Optionally, the first stage amplifying circuit includes: the load circuit comprises a first NMOS transistor, a third NMOS transistor, a first load resistor and a third load resistor; the second stage amplification circuit includes: second NMOS pipe, fourth NMOS pipe, second load resistance, and fourth load resistance, wherein: the grid electrode of the first NMOS tube is coupled with the cathode electrode of the first photosensitive diode, the drain electrode of the first NMOS tube is coupled with the first end of the first load resistor and the grid electrode of the second NMOS tube, and the source electrode of the first NMOS tube is coupled with the first end of the first current source; the second end of the first load resistor is coupled with the drain electrode of the second NMOS tube; the drain of the second NMOS transistor is coupled to the drain of the fourth NMOS transistor, and the source of the second NMOS transistor is coupled to the first end of the second load resistor; a first end of the second load resistor is coupled with the first output end of the transimpedance amplification unit, and a second end of the second load resistor is grounded; the grid electrode of the third NMOS tube is coupled with the cathode electrode of the second photosensitive diode, the drain electrode of the third NMOS tube is coupled with the first end of the third load resistor and the grid electrode of the fourth NMOS tube, and the source electrode of the third NMOS tube is coupled with the first end of the first current source; a second end of the third load resistor is coupled to the drain of the fourth NMOS transistor; the source electrode of the fourth NMOS tube is coupled with the first end of the fourth load resistor; a first end of the fourth load resistor is coupled to the second output end of the transimpedance amplification unit, and a second end of the fourth load resistor is grounded.
Optionally, the transimpedance amplification unit further includes: a third stage of amplification circuit and a second current source.
Optionally, the third stage of amplifying circuit includes: fifth NMOS pipe, fifth load resistance, third feedback resistance, sixth NMOS pipe, sixth load resistance and fourth feedback resistance, wherein: a gate of the fifth NMOS transistor is coupled to a source of the second NMOS transistor and the first end of the second load resistor, a drain of the fifth NMOS transistor is coupled to the first end of the fifth load resistor and the second output end of the transimpedance amplification unit, and a source of the fifth NMOS transistor is coupled to the first end of the third feedback resistor; a second end of the fifth load resistor is coupled to the drain of the second NMOS transistor; a second terminal of the third feedback resistor is coupled to the first terminal of the second current source; a gate of the sixth NMOS transistor is coupled to a source of the fourth NMOS transistor and the first end of the fourth load resistor, a drain of the sixth NMOS transistor is coupled to the first end of the sixth load resistor and the first output end of the transimpedance amplification unit, and a source of the sixth NMOS transistor is coupled to the first end of the fourth feedback resistor; a second end of the sixth load resistor is coupled to a second end of the fifth load resistor; a second terminal of the fourth feedback resistor is coupled to the first terminal of the second current source; and the second end of the second current source is grounded.
Optionally, a difference between the intrinsic current of the first photodiode and the intrinsic current of the second photodiode is smaller than a preset current value.
Optionally, the intrinsic current of the first photodiode is equal to the intrinsic current of the second photodiode.
Optionally, the area of the first photodiode is equal to the area of the second photodiode, and the first photodiode and the second photodiode are disposed adjacent to each other.
The embodiment of the invention also provides a photosensitive chip which comprises any one of the transimpedance amplification circuits.
Compared with the prior art, the technical scheme of the embodiment of the invention has the following beneficial effects:
and a second photodiode is arranged at the second input end of the transimpedance amplification unit, and the surface of the second photodiode covers the light-blocking layer. The intrinsic current of the second photodiode exists in the absence of illumination, and the intrinsic current of the first photodiode is compensated. The intrinsic current of the second photosensitive diode is close to the intrinsic current of the first photosensitive diode by arranging the second photosensitive diode with the same or similar optical characteristics with the first photosensitive diode, so that the intrinsic current of the first photosensitive diode can be accurately compensated, and the common-mode interference resistance of the transimpedance amplification circuit is improved.
In addition, the transimpedance amplification unit includes a three-stage amplification circuit, and the photoelectric conversion rate of the transimpedance amplification circuit can be improved.
Drawings
Fig. 1 is a schematic structural diagram of a transimpedance amplifier circuit of the related art;
fig. 2 is a schematic structural diagram of a transimpedance amplifier circuit according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another transimpedance amplifier circuit according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another transimpedance amplifier circuit according to an embodiment of the present invention.
Detailed Description
As mentioned above, due to the current source ITHIs usually predetermined and does not correspond to the intrinsic current of the photodiode PD. Furthermore, limited by process effects, the current source ITHThe output current itself will also have some ripple. In the prior art, is limited by a current source ITHThe intrinsic current of the photodiode PD cannot be matched, and therefore, the transimpedance amplifier circuit has poor common mode interference resistance.
In the embodiment of the invention, a second photodiode is arranged at the second input end of the transimpedance amplification unit, and the surface of the second photodiode is covered with the light-blocking layer. The intrinsic current of the second photodiode exists in the absence of illumination, and the intrinsic current of the first photodiode is compensated. The intrinsic current of the second photosensitive diode is close to the intrinsic current of the first photosensitive diode by arranging the second photosensitive diode with the same or similar optical characteristics with the first photosensitive diode, so that the intrinsic current of the first photosensitive diode can be accurately compensated, and the common-mode interference resistance of the transimpedance amplification circuit is improved.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
The transimpedance amplifier circuit provided by the embodiment of the present invention is described in detail below with reference to fig. 2.
In an embodiment of the present invention, the transimpedance amplification circuit may include a first photodiode PD1, a second photodiode PD2, a first feedback resistor R21, a second feedback resistor R22, and a transimpedance amplification unit.
In a specific implementation, an anode of the first photodiode PD1 is grounded, and a cathode of the first photodiode PD1 is coupled to the first input terminal of the transimpedance amplification unit.
The anode of the second photodiode PD2 is grounded, and the cathode of the second photodiode PD2 is coupled to the second input terminal of the transimpedance amplification unit.
A first terminal of the first feedback resistor R21 is coupled to the cathode of the first photodiode PD1 and the first input terminal of the transimpedance amplifier unit, and a second terminal of the first feedback resistor R21 is coupled to the first output terminal V of the transimpedance amplifier unitO1And (4) coupling. The first input end and the first output end V of the transimpedance amplification unit can be controlled through the first feedback resistor R21O1The magnitude of the current in between.
A first terminal of the second feedback resistor R22 is coupled to the cathode of the second photodiode PD2 and the second input terminal of the transimpedance amplifier unit, and a second terminal of the second feedback resistor R22 is coupled to the second output terminal V of the transimpedance amplifier unitO2And (4) coupling. The second input end and the second output end V of the transimpedance amplification unit can be controlled through the second feedback resistor R22O2The magnitude of the current in between.
In the embodiment of the present invention, the first input terminal of the transimpedance amplification unit is a "+" input terminal, and the second input terminal of the transimpedance amplification unit is a "-" input terminal.
In a specific implementation, the surface of the second photodiode PD2 may be covered with a light blocking layer. That is, since the surface of the second photodiode PD2 is covered with the light blocking layer, the second photodiode PD2 does not generate a corresponding photo-sensitive current even in the case of light irradiation.
In practical applications, it is known that in the absence of light, there is a very small saturation reverse leakage current, i.e., dark current, in the photodiode, and the photodiode is turned off. The dark current of the photodiode is also referred to as the intrinsic current of the photodiode. Therefore, when the surface of the second photodiode PD2 is covered with the light blocking layer, an intrinsic current still exists within the second photodiode PD 2.
In a specific implementation, the intrinsic current of the first photodiode PD1 may be compensated by the intrinsic current of the second photodiode PD 2. To accurately compensate for the intrinsic current of the first photodiode PD1, the optical characteristics of the second photodiode PD2 may be the same as or similar to the optical characteristics of the first photodiode PD1, such that the intrinsic current of the second photodiode PD2 is close to the intrinsic current of the first photodiode PD 1.
In the embodiment of the present invention, two photodiodes of the same batch and the same model can be selected as the first photodiode PD1 and the second photodiode PD2, respectively. Since the first photodiode PD1 and the second photodiode PD2 belong to the same batch and the same model, the intrinsic current of the first photodiode PD1 is extremely close to the optical characteristics of the second photodiode PD2, and the intrinsic current of the first photodiode PD1 is infinitely close to the intrinsic current of the second photodiode PD2, which is almost equal to the intrinsic current.
The first photodiode PD1 and the second photodiode PD2 may be both disposed on a photo-sensitive chip. The transimpedance amplification circuit provided in the embodiment of the invention is also arranged on the photosensitive chip. The first photodiode PD1 and the second photodiode PD2 may be disposed adjacent to each other on the photo chip, and a distance between the first photodiode PD1 and the second photodiode PD2 may be smaller than a predetermined value. For example, the preset value may be 100 μm.
In one implementation of the present invention, the distance between the first photodiode PD1 and the second photodiode PD2 may be about 50 μm. It is understood that the distance between the first photodiode PD1 and the second photodiode PD2 can have other values.
In a specific implementation, the first photodiode PD1 and the second photodiode PD2 may also be different batches and/or different models of photodiodes. The first photodiode PD1 and the second photodiode PD2 occupy the same or similar area on the photo-sensitive chip. At this time, the difference between the intrinsic current of the first photodiode PD1 and the intrinsic current of the second photodiode PD2 needs to be smaller than a preset current value, that is, the deviation between the intrinsic current of the first photodiode PD1 and the intrinsic current of the second photodiode PD2 is small.
Because the intrinsic current of the first photodiode PD1 is relatively similar to the intrinsic current of the second photodiode PD2, the intrinsic current of the first photodiode PD1 is compensated by the intrinsic current of the second photodiode PD2, and the common mode interference resistance of the light sensitive chip can be effectively improved.
In a specific implementation, the transimpedance amplification unit may include a two-stage amplification circuit or a three-stage amplification circuit. The transimpedance amplification unit provided by the embodiment of the present invention is explained in detail below.
Referring to fig. 3, a schematic structural diagram of another transimpedance amplifier circuit according to an embodiment of the present invention is shown. In fig. 3, the transimpedance amplification unit includes a two-stage amplification circuit, which is a first-stage amplification circuit and a second-stage amplification circuit in sequence, and a first current source I1.
In the embodiment of the present invention, the first-stage amplification circuit may include a first NMOS transistor MN1, a third NMOS transistor MN3, a first load resistor R11, and a third load resistor R13, and the second-stage amplification circuit may include a second NMOS transistor MN2, a fourth NMOS transistor MN4, a second load resistor R12, and a fourth load resistor R14, where:
a gate of the first NMOS transistor MN1 may be coupled to a cathode of the first photodiode PD1, a drain of the first NMOS transistor MN1 may be coupled to a first terminal of the first load resistor R11 and a gate of the second NMOS transistor MN2, and a source of the first NMOS transistor MN1 may be coupled to a first terminal of the first current source I1;
a second end of the first load resistor R11 is coupled to the drain of the second NMOS transistor MN 2;
the drain of the second NMOS transistor MN2 is coupled to the drain of the fourth NMOS transistor MN4, and the source of the second NMOS transistor MN2 is coupled to the first end of the second load resistor R12;
a second end of the second load resistor R12 is grounded; the first end of the second load resistor R12 is also connected with the first output end VO1Connecting and coupling;
a gate of the third NMOS transistor MN3 may be coupled to a cathode of the second photodiode PD2, a drain of the third NMOS transistor MN3 may be coupled to a first terminal of the third load resistor R13 and a gate of the fourth NMOS transistor MN4, and a source of the third NMOS transistor MN3 may be coupled to a first terminal of the first current source I1;
a second end of the third load resistor R13 is coupled to the drain of the fourth NMOS transistor MN 4;
the source of the fourth NMOS transistor MN4 is coupled to the first terminal of the fourth load resistor R14, and the second terminal of the fourth load resistor R14 is grounded; the first end of the fourth load resistor R14 is also connected with the second output end VO2Coupling;
the second end of the first load resistor R11, the drain of the second NMOS transistor MN2, the second end of the third NMOS transistor MN3, and the drain of the fourth NMOS transistor MN4 are connected.
In a specific implementation, the gate of the first NMOS transistor MN1 may be a first input terminal of the transimpedance amplification unit, and the gate of the third NMOS transistor MN3 may be a second input terminal of the transimpedance amplification unit.
In the embodiment of the invention, the transimpedance amplification unit may further include a third stage amplification circuit and a second current source I2. By adding the third stage of amplifying circuit, the photoelectric conversion rate of the transimpedance amplifying unit can be greatly increased. Compared with a transimpedance amplification unit only comprising a two-stage amplification circuit, the transimpedance amplification unit comprising a three-stage amplification circuit can theoretically improve the photoelectric conversion rate by one order of magnitude.
Referring to fig. 4, a schematic structural diagram of a transimpedance amplifier circuit according to another embodiment of the present invention is shown. Compared with fig. 3, the transimpedance amplification unit of the transimpedance amplification circuit provided in fig. 4 is added with a third-stage amplification circuit and a second current source I2.
In an embodiment of the present invention, the third stage amplification circuit may include: fifth NMOS transistor MN5, fifth load resistor R15, third feedback resistor R23, sixth NMOS transistor MN6, sixth load resistor R16, and fourth feedback resistor R24, wherein:
a gate of the fifth NMOS transistor MN5 is coupled to the gate of the second NMOS transistor MN2 and the first end of the second load resistor R12, a drain of the fifth NMOS transistor MN5 is coupled to the first end of the fifth load resistor R15 and the second output terminal V of the transimpedance amplification unitO2The source of the fifth NMOS transistor MN5 is coupled to the first end of the third feedback resistor R23;
a second end of the fifth load resistor R15 is coupled to the drain of the second NMOS transistor MN2, the drain of the fourth NMOS transistor MN4, and a second end of the sixth load resistor R16;
a second terminal of the third feedback resistor R23 is coupled to a first terminal of a second current source I2;
a gate of the sixth NMOS transistor MN6 is coupled to the gate of the fourth NMOS transistor MN4 and the first end of the fourth load resistor R14, a drain of the sixth NMOS transistor MN6 is coupled to the first end of the sixth load resistor R16 and the first output terminal V of the transimpedance amplification unitO1The source of the sixth NMOS transistor MN6 is coupled to the first end of the fourth feedback resistor R24;
a second end of the sixth load resistor R16 is coupled to the drain of the fourth NMOS transistor MN4 and a second end of the fifth load resistor R15;
a second terminal of the fourth feedback resistor R24 is coupled to a first terminal of a second current source I2;
the second terminal of the second current source I2 is connected to ground.
As can be seen from the above, in the embodiment of the present invention, a second photodiode is disposed at the second input end of the transimpedance amplification unit, and the surface of the second photodiode covers the light blocking layer. The intrinsic current of the second photodiode exists in the absence of illumination, and the intrinsic current of the first photodiode is compensated. The intrinsic current of the second photosensitive diode is close to the intrinsic current of the first photosensitive diode by arranging the second photosensitive diode with the same or similar optical characteristics with the first photosensitive diode, so that the intrinsic current of the first photosensitive diode can be accurately compensated, and the common-mode interference resistance of the transimpedance amplification circuit is improved.
The embodiment of the invention also provides a photosensitive chip which can comprise the transimpedance amplification circuit provided in the embodiment.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (9)

1. A transimpedance amplification circuit comprising: first photosensitive diode, second photosensitive diode, first feedback resistance, second feedback resistance and transimpedance amplification unit, wherein:
the anode of the first photodiode is grounded, and the cathode of the first photodiode is coupled with the first input end of the transimpedance amplification unit;
the anode of the second photodiode is grounded, and the cathode of the second photodiode is coupled with the second input end of the transimpedance amplification unit;
a first end of the first feedback resistor is coupled to the first input end of the transimpedance amplification unit, and a second end of the first feedback resistor is coupled to the first output end of the transimpedance amplification unit;
a first end of the second feedback resistor is coupled to the second input end of the transimpedance amplification unit, and a second end of the second feedback resistor is coupled to the second output end of the transimpedance amplification unit;
the surface of the second photosensitive diode is covered with a light blocking layer, and the intrinsic current of the second photosensitive diode is used for compensating the intrinsic current of the first photosensitive diode.
2. The transimpedance amplification circuit according to claim 1, wherein the transimpedance amplification unit comprises: the amplifier comprises a first-stage amplifying circuit, a second-stage amplifying circuit and a first current source.
3. The transimpedance amplification circuit according to claim 2, wherein the first stage amplification circuit comprises: the load circuit comprises a first NMOS transistor, a third NMOS transistor, a first load resistor and a third load resistor; the second stage amplification circuit includes: second NMOS pipe, fourth NMOS pipe, second load resistance, and fourth load resistance, wherein:
the grid electrode of the first NMOS tube is coupled with the cathode electrode of the first photosensitive diode, the drain electrode of the first NMOS tube is coupled with the first end of the first load resistor and the grid electrode of the second NMOS tube, and the source electrode of the first NMOS tube is coupled with the first end of the first current source;
the second end of the first load resistor is coupled with the drain electrode of the second NMOS tube;
the drain of the second NMOS transistor is coupled to the drain of the fourth NMOS transistor, and the source of the second NMOS transistor is coupled to the first end of the second load resistor;
a first end of the second load resistor is coupled with the first output end of the transimpedance amplification unit, and a second end of the second load resistor is grounded;
the grid electrode of the third NMOS tube is coupled with the cathode electrode of the second photosensitive diode, the drain electrode of the third NMOS tube is coupled with the first end of the third load resistor and the grid electrode of the fourth NMOS tube, and the source electrode of the third NMOS tube is coupled with the first end of the first current source;
a second end of the third load resistor is coupled to the drain of the fourth NMOS transistor;
the source electrode of the fourth NMOS tube is coupled with the first end of the fourth load resistor;
a first end of the fourth load resistor is coupled to the second output end of the transimpedance amplification unit, and a second end of the fourth load resistor is grounded.
4. The transimpedance amplification circuit according to claim 3, wherein the transimpedance amplification unit further comprises: a third stage of amplification circuit and a second current source.
5. The transimpedance amplification circuit according to claim 4, wherein the third stage amplification circuit comprises: fifth NMOS pipe, fifth load resistance, third feedback resistance, sixth NMOS pipe, sixth load resistance and fourth feedback resistance, wherein:
a gate of the fifth NMOS transistor is coupled to a source of the second NMOS transistor and the first end of the second load resistor, a drain of the fifth NMOS transistor is coupled to the first end of the fifth load resistor and the second output end of the transimpedance amplification unit, and a source of the fifth NMOS transistor is coupled to the first end of the third feedback resistor;
a second end of the fifth load resistor is coupled to the drain of the second NMOS transistor;
a second terminal of the third feedback resistor is coupled to the first terminal of the second current source;
a gate of the sixth NMOS transistor is coupled to a source of the fourth NMOS transistor and the first end of the fourth load resistor, a drain of the sixth NMOS transistor is coupled to the first end of the sixth load resistor and the first output end of the transimpedance amplification unit, and a source of the sixth NMOS transistor is coupled to the first end of the fourth feedback resistor;
a second end of the sixth load resistor is coupled to a second end of the fifth load resistor;
a second terminal of the fourth feedback resistor is coupled to the first terminal of the second current source;
and the second end of the second current source is grounded.
6. The transimpedance amplification circuit according to claim 1, wherein a difference between an intrinsic current of the first photodiode and an intrinsic current of the second photodiode is smaller than a predetermined current value.
7. The transimpedance amplification circuit according to claim 1, wherein an intrinsic current of the first photodiode is equal to an intrinsic current of the second photodiode.
8. The transimpedance amplification circuit according to claim 1, wherein an area of the first photodiode is equal to an area of the second photodiode, and wherein the first photodiode is disposed adjacent to the second photodiode.
9. A photosensitive chip, comprising: a transimpedance amplification circuit according to any one of claims 1 to 8.
CN202110848299.6A 2021-07-27 2021-07-27 Transimpedance amplifying circuit and photosensitive chip Pending CN113644884A (en)

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