CN113644158A - Up-light-entering infrared sensor element and manufacturing method thereof - Google Patents

Up-light-entering infrared sensor element and manufacturing method thereof Download PDF

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CN113644158A
CN113644158A CN202110914145.2A CN202110914145A CN113644158A CN 113644158 A CN113644158 A CN 113644158A CN 202110914145 A CN202110914145 A CN 202110914145A CN 113644158 A CN113644158 A CN 113644158A
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layer
type electrode
ohmic contact
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current conduction
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CN113644158B (en
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朱忻
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Suzhou Juzhen Photoelectric Co ltd
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    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
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    • H—ELECTRICITY
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    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/103—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PN homojunction type
    • H01L31/1035—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PN homojunction type the devices comprising active layers formed only by AIIIBV compounds
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    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/109—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PN heterojunction type
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Abstract

An embodiment of the present invention discloses a top-entry infrared sensor element and a method of manufacturing the same, the top-entry infrared sensor element including at least one compound semiconductor laminated layer capable of detecting infrared rays having a wavelength of 1 μm or more and outputting an electric signal indicating the detection; a substrate including an IC circuit that processes and operates an electric signal output from the at least one compound semiconductor laminated layer to obtain a detection result; an adhesive layer bonding at least one compound semiconductor laminate to a substrate containing an IC circuit. The electrode of the at least one compound semiconductor laminated layer is electrically connected to a lead terminal of the IC circuit. The invention belongs to the technical field of semiconductors. The upper light-entering infrared sensor element can work at room temperature, is not easily influenced by dark current, electromagnetic noise and thermal fluctuation, and has a compact structure.

Description

Up-light-entering infrared sensor element and manufacturing method thereof
Technical Field
The present disclosure relates to the field of semiconductor technologies, and in particular, to an upward-incident infrared sensor element and a manufacturing method thereof.
Background
Infrared sensors have been widely used in various fields, such as human body sensors for automatically turning on and off home appliances such as lighting, air conditioners, and televisions by detecting a person, and monitoring sensors for security, and the like. In addition, the infrared sensor can also be used for detecting the leakage of combustible explosive gases such as methane and the like.
One type of existing infrared sensor is a pyroelectric type infrared sensor that utilizes the pyroelectric effect. Since the thermoelectric elements therein have extremely high impedance, they are susceptible to electromagnetic noise and thermal fluctuations. Therefore, shielding using a metal can package or the like is required. Further, since a large resistance and a large capacitance are required in the I-V conversion circuit, miniaturization is difficult.
Another type of infrared sensor is the quantum type, the hgcdte (mct) and InSb series being commonly used materials. It is necessary to cool the sensor using liquid nitrogen, liquid helium, or electronic cooling using the peltier effect, or the like. In general, quantum-type infrared sensors can achieve 100 times or more sensitivity than pyroelectric sensors. In addition, the element resistance can be as small as tens to hundreds of ohms, and is less affected by electronic noise and thermal fluctuations. However, since the package must be cooled to a low temperature, a strong metal package is used.
For the InSb series, InAs was studied according to the wavelength to be detectedxSb1-xThe mixed crystal layer of (1). For example, an epitaxial growth method in which an InSb substrate is used to replace a part of InSb with As has been attempted.
Furthermore, a monolithic structure using partial growth of the infrared sensor over a substrate with integrated readout and signal processing circuitry is proposed. However, the technique of growing a compound semiconductor thin film as a core of an infrared sensor on a signal processing circuit is extremely difficult, and it is not easy to obtain a film that can be used as a practical device. The heat generated when the signal processing circuit operates becomes noise to thermal fluctuation of the infrared sensor portion monolithically formed thereon and a problem of generation of an error signal occurs. Therefore, in order to suppress the influence of this thermal fluctuation, the entire sensor must be cooled by liquid nitrogen or the like. Such cooling limits the use of infrared sensors.
Disclosure of Invention
In view of the above, an object of the present invention is to provide a compact upward-incidence infrared sensor element that can operate at room temperature and is less susceptible to dark current, electromagnetic noise, and thermal fluctuation, and a method for manufacturing the same.
The inventors of the present invention have found that the area defect density of an infrared photon absorption laminate is reduced to 100/cm by making the resistance of a compound semiconductor laminate small2The compound semiconductor stack and an integrated circuit that processes an electrical signal output from the compound semiconductor stack are integrated on the same substrate and packaged in the same package, and can be inspected at room temperature. In addition, in this way, the infrared sensor of the present invention can be made less susceptible to dark current, electromagnetic noise, and thermal fluctuations. In the present invention, the resistance of the compound semiconductor laminated layer in the infrared sensor circuit can be made small, and the resistance and the capacitance in the signal output circuit can be made small, thereby allowing the miniaturization of the upper-entry type infrared sensor element.
According to an aspect of the present invention, there is provided an upper light-entering infrared sensor element including:
at least one compound semiconductor laminated layer capable of detecting infrared rays having a wavelength of 1 μm or more and outputting an electric signal representing the detection;
a substrate including an IC circuit that processes and operates an electric signal output from the at least one compound semiconductor laminated layer to obtain a detection result;
an adhesive layer bonding at least one compound semiconductor laminate to a substrate containing an IC circuit;
wherein the electrode of the at least one compound semiconductor laminated layer is electrically connected to a lead terminal of the IC circuit.
In one example, one of the at least one compound semiconductor stacked layer includes, in order from top to bottom: the semiconductor device comprises an N-type electrode, an N-type electrode ohmic contact and current conduction layer, a P-N or P-i-N type photon absorption layer, a carrier blocking layer, a P-type electrode ohmic contact and current conduction layer and a P-type electrode positioned on one part of the P-type electrode ohmic contact and current conduction layer.
In one example, the P-type electrode ohmic contact and current conduction layer comprises a first P-type electrode ohmic contact and current conduction layer and a second P-type electrode ohmic contact and current conduction layer, the first P-type electrode ohmic contact and current conduction layer is positioned on the second P-type electrode ohmic contact and current conduction layer, the size of the second P-type electrode ohmic contact and current conduction layer is larger than that of the first P-type electrode ohmic contact and current conduction layer, and a P-type electrode is arranged on the part of the second P-type electrode ohmic contact and current conduction layer which is not in ohmic contact with the first P-type electrode and is not in contact with the current conduction layer;
the N-type electrode is electrically connected with the negative lead end of the IC circuit, and the P-type electrode is electrically connected with the positive lead end of the IC circuit through metal routing connection or multilayer metal interconnection lines formed through photoetching.
In one example, the P-type electrode includes a metal electrode formed of Au, Ge, Ni, Ti, Cr, Cu, or an alloy thereof;
the first P-type electrode ohmic contact and current conduction layer and the second P-type electrode ohmic contact and current conduction layer are P-type heavily doped compound semiconductor films;
the carrier blocking layer comprises a p-type doped compound semiconductor film containing Ga, Al, In, Sb or As or a compound semiconductor film containing Sb;
the P-N or P-i-N photon absorption layer comprises a P-N or P-i-N type lightly doped InSb, GaAs, InAs, InGaAs, GaAsSb or InGaP compound semiconductor film;
the N-type electrode ohmic contact and current conduction layer comprises an N-type heavily-doped InSb, GaAs, InAs, InGaAs, GaAsSb or InGaP compound semiconductor film;
the N-type electrode comprises a metal electrode formed by Au, Ge, Ni, Ti, Cr, Cu or alloy thereof.
In one example, the compound semiconductor stacked layer is manufactured by:
growing a plurality of compound semiconductor films on a semiconductor single crystal substrate in a heterogeneous sequential epitaxial manner, and respectively forming an N-type electrode ohmic contact and current conduction layer containing a crystal lattice buffer sacrificial layer, a P-N or P-i-N type photon absorption layer, a carrier barrier layer, a first P-type electrode ohmic contact and current conduction layer and a second P-type electrode ohmic contact and current conduction layer;
coating an adhesive layer on at least one of the second P-type electrode ohmic contact and current conducting layer and the substrate, and bonding them together face to face through the adhesive layer;
selectively removing the lattice buffer sacrificial layer in the semiconductor single crystal substrate and the N-type electrode ohmic contact and current conduction layer,
the semiconductor single crystal substrate is a GaAs, InP, GaN or Si single crystal substrate, the compound semiconductor film comprises InSb, GaAs, InAs, InGaAs, InAlSb, GaAsSb or InGaP, the bonding layer comprises any one of a silicon nitride film, a silicon oxide film, an aluminum oxide film, a silicon oxynitride film, epoxy resin, silica gel, silicon dioxide and a polyimide film, and the substrate comprises any one of a Si-based wafer containing an IC circuit, a quartz substrate, an aluminum oxide substrate, an aluminum nitride substrate and a polyimide flexible substrate.
In one example, the mobility of the N-type electrode ohmic contact and current conducting layer after only removing the semiconductor single crystal substrate is more than 40000cm2The thickness of the N-type electrode ohmic contact and the current conduction layer is 500nm-10 mu m;
simultaneously removing the lattice buffer sacrificial layer with poor lattice quality in the semiconductor single crystal substrate, the ohmic contact layer of the N-type electrode and the current conduction layer, wherein the mobility of the ohmic contact layer of the N-type electrode and the current conduction layer is more than 50000cm2Vs and less than 78000cm2Vs thickness of the N-type electrode ohmic contact and current conduction layerIs 100nm-9 μm;
the surface defect density of the P-N or P-i-N type photon absorption layer is less than or equal to 10-100/cm2。
In one example, the top-entry infrared sensor element further includes a protective layer for covering the compound semiconductor stacked layer, but exposing at least a part of the N-type electrode and the P-type electrode;
the protective layer includes any one of a silicon nitride film, a silicon oxide film, an aluminum oxide film, a silicon oxynitride film, an epoxy resin, a silica gel, a silicon dioxide, and a polyimide film.
In one example, the substrate containing the IC circuit is rigid or flexible;
and a reflecting film is arranged between the substrate and the bonding layer.
In one example, the at least one compound semiconductor stacked layer is arranged on the substrate in the form of a planar array, a linear array, or a four-quadrant.
According to another aspect of the present invention, there is provided a method of manufacturing a top-entry infrared sensor element, the method including:
manufacturing at least one compound semiconductor laminated layer capable of detecting infrared rays having a wavelength of 1 μm or more and outputting an electric signal indicative of the detection;
providing a substrate containing an IC circuit that processes and operates on an electrical signal output from the at least one compound semiconductor laminated layer to obtain a detection result;
providing an adhesive layer for bonding at least one compound semiconductor stack to a substrate containing an IC circuit;
wherein the electrode of the at least one compound semiconductor laminated layer is electrically connected to a lead terminal of the IC circuit.
Other objects and advantages of the present disclosure will become apparent from the following description of the embodiments of the present disclosure, which is made with reference to the accompanying drawings, and can assist in a comprehensive understanding of the present disclosure.
Drawings
These and/or other aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the preferred embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 is a schematic cross-sectional structure diagram of an upper-light-entering infrared sensor element according to an embodiment of the present invention;
fig. 2A shows a schematic cross-sectional structure of a compound semiconductor material stack heteroepitaxially grown with infrared sensing functionality on a semiconductor single crystal substrate;
FIG. 2B shows a schematic cross-sectional structure of a reflective film fabricated on a substrate with IC circuitry;
FIG. 2C shows a schematic cross-sectional structure of the structure of FIG. 2B after an adhesive layer has been applied to the structure;
FIG. 2D shows a schematic cross-sectional structure diagram of the structure shown in FIG. 2A bonded together with the structure shown in FIG. 2C;
FIG. 2E shows a schematic cross-sectional structure after selective removal of the semiconductor single-crystal substrate originally used for hetero-epitaxially growing the compound semiconductor stack on the basis of the structure of FIG. 2D and etching away part of the semiconductor stack;
FIG. 2F is a schematic cross-sectional view of an electrode fabricated on the basis of the structure of FIG. 2E;
fig. 2G shows a schematic cross-sectional structure after a protective layer is fabricated on the basis of the structure of fig. 2F and electrodes of the compound semiconductor underlying layer are electrically connected to lead terminals of an IC circuit.
Detailed Description
The technical scheme of the invention is further specifically described by the following embodiments and the accompanying drawings. In the specification, the same or similar reference numerals denote the same or similar components. The following description of the embodiments of the present invention with reference to the accompanying drawings is intended to explain the general inventive concept of the present invention and should not be construed as limiting the invention.
Fig. 1 is a schematic cross-sectional view illustrating an upper-light-entering infrared sensor element according to an embodiment of the present invention. The top-entry infrared sensor element 100 includes a substrate 10 including an IC circuit, and the IC circuit on the substrate 10 is not shown for simplicity, but a positive lead terminal 11 and a negative lead terminal 12 of the IC circuit are shown. A compound semiconductor laminate capable of detecting infrared rays having a wavelength of 1 μm or more and outputting an electric signal indicating the detection is provided on the substrate 10 via the adhesive layer 30. The IC circuit processes and operates an electric signal output from the compound semiconductor laminated layer to obtain a detection result.
In the example, the compound semiconductor stack is bonded to the substrate 10 containing the IC circuit through the adhesive layer 30. The bonding layer 30 is "transparent" to infrared photons in excess of a particular wavelength, depending on the particular application, and includes any of a silicon nitride film, a silicon oxide film, an aluminum oxide film, a silicon oxynitride film, an epoxy, a silicon gel, a silicon dioxide, and a polyimide film. The electrodes 13, 14 of the compound semiconductor laminate are electrically connected to the lead terminals 12, 11 of the IC circuit, respectively.
Alternatively, a protective layer 80 may be provided which covers the compound semiconductor stacked layer but exposes at least a part of the N-type electrode 13 and the P-type electrode 14. The protective layer 80 includes any one of a silicon nitride film, a silicon oxide film, an aluminum oxide film, a silicon oxynitride film, an epoxy resin, a silica gel, a silicon dioxide, and a polyimide film.
The compound semiconductor multilayer is a unit that detects incident infrared rays and outputs the detection result as an electric signal, that is, an infrared sensor. In the present invention, the substrate with the IC circuit is integrated, and thus the infrared sensor element is configured. The IC circuit is a circuit in which a plurality of circuit elements are formed on or in the substrate 10, and is a unit that processes a detection signal (electric signal) of infrared rays output from the compound semiconductor laminate and performs a predetermined operation. In the embodiment, the present invention interconnects and integrates an IC circuit and a compound semiconductor laminate or the like on the same substrate by providing the adhesive layer 30.
In one example, the substrate 10 may comprise any of a Si-based wafer of IC circuitry, other semiconductor substrate, a metal substrate, a quartz substrate, an alumina substrate, an aluminum nitride substrate, a polyimide flex substrate, and is "transparent" to infrared light above a particular wavelength depending on the particular application.
As shown in fig. 1, the compound semiconductor stack includes, in order from top to bottom: n-type electrode 13, N-type electrode ohmic contact and current conducting layer 70, photon absorption layer 60, carrier blocking layer (for suppressing dark current) 50, P-type electrode ohmic contact and current conducting layer (in this example, the P-type electrode ohmic contact and current conducting layer includes first P-type electrode ohmic contact and current conducting layer 41 and second P-type electrode ohmic contact and current conducting layer 42). The photon absorbing layer 60 is, for example, a P-N type or P-i-N type photon absorbing layer.
Since it is considered that the subsequent compound semiconductor stacked layer is attached on the substrate 10 in an inverted state from the originally grown substrate, the size of the second P-type electrode ohmic contact and current-conducting layer 42 is set larger than the first P-type electrode ohmic contact and current-conducting layer 41, and the P-type electrode 14 is provided on the portion of the second P-type electrode ohmic contact and current-conducting layer 42 not in ohmic contact with the first P-type electrode and current-conducting layer 41.
As will be understood from the following description, with such an arrangement, the compound semiconductor stacked layer can be formed by photolithography etching after the substrate on which the compound semiconductor stacked layer is grown is selectively removed, and the size of the second P-type electrode ohmic contact and the current conducting layer 42 can be set to be larger, so as to facilitate the arrangement of the P-type electrode 14.
It is understood that only one integrated P-type electrode ohmic contact and current conducting layer may be provided, so that it forms a step portion on which the P-type electrode 14 can be placed in the subsequent etching process, and the shape of the step portion is the same as or similar to the shape formed by stacking the first P-type electrode ohmic contact and current conducting layer 41 and the second P-type electrode ohmic contact and current conducting layer 42 together.
The N-type electrode 13 is electrically connected to the negative lead terminal 12 of the IC circuit by a metal wire, and similarly, the P-type electrode 14 is electrically connected to the positive lead terminal 11 of the IC circuit by a metal wire. Alternatively, the aforementioned electrical connection may be realized by a plurality of metal interconnection lines formed by photolithography, thereby improving the reliability of the connection and simplifying the process.
In one example, the P-type electrode 14 comprises a metal electrode formed of Au, Ge, Ni, Ti, Cr, Cu, or alloys thereof, preferably a Ti/Au metal electrode; the first P-type electrode ohmic contact and current conduction layer 41 and the second P-type electrode ohmic contact and current conduction layer 42 are P-type heavily doped compound semiconductor films, for example, P + InSb with a thickness of 0.5 μm; the carrier block layer 50 comprises a p-doped compound semiconductor film comprising Ga, Al, In, Sb or As, preferably InAlSb, for example p + Al with a thickness of 50nm0.17In0.83Sb or p + GaAsSb; the photon absorption layer 60 comprises a P-N or P-i-N type lightly doped InSb, GaAs, InAs, InGaAs, GaAsSb or InGaP compound semiconductor film, such as P-InSb with a thickness of 1 μm or P-InSb with a thickness of 1 μm plus N-InSb with a thickness of 1 μm; the N-electrode ohmic contact and current conducting layer 70 includes an N-type heavily doped InSb, GaAs, InAs, InGaAs, GaAsSb, or InGaP compound semiconductor film, for example, N + InSb with a thickness of 0.5 μm; the N-type electrode 13 comprises a metal electrode formed by Au, Ge, Ni, Ti, Cr, Cu or their alloy, preferably a Ti/Au metal electrode. In this example, the protective layer 80 may be Si3N4Passivation layer, SiO2Epoxy, silicone or polyimide.
It is to be understood that the material, thickness, and the like of each compound semiconductor film, the protective layer, and the like in the foregoing compound semiconductor stacked layer are provided here as an example only, and those skilled in the art can select any feasible material or appropriate thickness as needed, without being limited to the examples shown here.
The compound semiconductor laminated layer is manufactured by the following steps:
a plurality of compound semiconductor films are heterosequentially epitaxially grown on a semiconductor single crystal substrate, and an N-type electrode ohmic contact and current conduction layer 70 (including a lattice buffer sacrificial layer 71 having poor crystal quality for heteroepitaxial growth and a P-type electrode ohmic contact and current conduction layer 72 having excellent crystal quality on the lattice buffer sacrificial layer 71), a photon absorption layer 60, a carrier block layer, and a semiconductor layer are formed respectively50. A first P-type electrode ohmic contact and current conduction layer 41 and a second P-type electrode ohmic contact and current conduction layer 42; the surface defect density of the P-N or P-i-N type (InSb infrared) photon absorption layer 60 is less than or equal to 10-100/cm2。
Coating an adhesive layer 30 on at least one of the second P-type electrode ohmic contact and current conducting layer 42 and the substrate 10 and bonding them together face to face through the adhesive layer 30;
selectively removing a part of the semiconductor single crystal substrate and the N-type electrode ohmic contact and current conduction layer 70, that is, selectively removing the lattice buffer sacrifice layer 71 poor in crystal quality by means of etching;
the semiconductor single crystal substrate may be any suitable single crystal substrate such as GaAs, InP, GaN, Si, or the like, and the compound semiconductor film includes InSb, GaAs, InAs, InGaAs, InAlSb, GaAsSb, or InGaP. The adhesive layer 30 includes any one of a silicon nitride film, a silicon oxide film, an aluminum oxide film, a silicon oxynitride film, an epoxy resin, a silica gel, a silicon dioxide, and a polyimide film. In the present embodiment, the mobility of the N-type electrode ohmic contact and current conducting layer 72 from which only the semiconductor single crystal substrate is removed is more than 40000cm2The thickness of the N-type electrode ohmic contact and current conduction layer 72 is 500nm-10 μm, preferably 1 μm-3 μm. Simultaneously, the mobility of the N-type electrode ohmic contact and current conduction layer 72 is greatly improved and is more than 50000cm after the semiconductor single crystal substrate and the crystal lattice buffer sacrificial layer 71 of the N-type electrode ohmic contact and current conduction layer are removed2Vs and less than 78000cm2The thickness of the N-type electrode ohmic contact and current conduction layer 72 is 100nm-9 μm, preferably 300nm-2 μm.
The substrate 10 containing the IC circuit is rigid or flexible. The rigid substrate 10 can be a silicon-based substrate, a quartz substrate, an alumina substrate, or an aluminum nitride substrate; the flexible substrate is made of polyimide or polyester film as a base material.
A reflection film 20 may be further provided between the substrate 10 and the adhesive layer 30, and the reflection film 20 re-enters at least a part of incident light passing through the compound semiconductor laminated layer from above into the compound semiconductor laminated layer in the form of reflected light, thereby improving the detection efficiency of the infrared sensor. In one example, the reflective film 20 may include a metallic reflective film or a multi-layer dielectric reflective film. The metal reflective film 20 is located right under the incident light, and can be fabricated separately from the metal electrode by photolithography and plating without electrical connection therebetween. It is understood that if the substrate 10 itself is made of metal and has a good reflection function, the reflective film is not required to be provided.
GaAs, InSb, InAs and the like which can be used for manufacturing compound semiconductor lamination layers have absorptance with different infrared wavelengths at room temperature, wherein the InSb material can absorb infrared photons with the wavelength of more than or equal to 1 micrometer at room temperature, and the electron mobility is the highest and can reach 78000cm2Vs, and thus is one of the most suitable materials for embodiments of the present invention.
In one embodiment of the present invention, there are two manufacturing methods of a compound semiconductor film such as InSb, and one is to obtain a polycrystalline InSb film by depositing an InSb material on a mica sheet or a silicon oxide substrate by vapor deposition. The InSb film produced by this method is relatively low in production cost, but is inferior in quality, and generally has a mobility of only 15000cm2Vs to 30000cm2the/Vs, photoelectric performance, is poor and does not meet the expected requirements for infrared photon absorption and detection. The other manufacturing method is that the InSb monocrystal substrate is manufactured in a homoepitaxial growth mode, so that a high-quality InSb monocrystal film can be obtained, the manufactured InSb monocrystal film is high in quality, and the detection requirement of infrared photons is basically met. However, as the production process of the semi-insulating InSb single crystal substrate is very immature, no method is available for large-scale production.
Therefore, in the manufacture of the compound semiconductor laminated layer, other semiconductor single crystal substrates such as GaAs substrates or Si substrates are often selected. Although these alternative semiconductor single crystal substrates are relatively inexpensive, they have a large lattice mismatch with InSb, and therefore lead to a decrease in the quality of InSb single crystal films grown on such alternative semiconductor single crystal substrates, and a decrease in the mobility of InSb single crystal films obtained on InSb single crystal substratesThe single crystal film is greatly reduced, and is generally 30000cm2Vs to 50000cm2Vs. Even more fatal, the defect surface density of the InSb single crystal film is large and is generally 10000/cm2In the above way, the dark current of the infrared photon P-N or P-i-N junction is extremely large, and the signal-to-noise ratio required by infrared photon detection cannot be achieved.
Since there is a large lattice mismatch between the InSb film and the semiconductor single crystal substrate, the InSb film grown from the beginning is poor in quality, large in defect density, and very low in mobility. As the InSb film material thickness increases, the lattice quality will continue to improve, the defect density gradually decreases and the mobility increases.
In order to achieve a surface defect density of 10-100/cm or less2And is higher than 50000cm2The electron mobility of/Vs generally requires that the growth thickness of the InSb film exceeds 1-2 μm, but at this time, because the thickness of the InSb film is very thick, part of infrared photons are absorbed by the InSb film with poor crystal quality, and the quantum efficiency of the finally manufactured infrared photon detection device is remarkably reduced.
In general, crystal defects of the thin film caused by mismatch with the substrate are conspicuous near the interface of the substrate. Although the density of crystal defects is gradually reduced along with the growth of the thin film, the concentration of crystal defects is high and the electron mobility is lowered. If a thin film of several micrometers is formed, the influence of defects near the interface becomes very small, but when the device is manufactured, part of infrared photons are absorbed by the InSb film with poor crystal quality due to the thick InSb film thickness, and the quantum efficiency of the finally manufactured infrared photon detection device is remarkably reduced.
The following embodiments of the present invention provide a top-entry infrared sensor element and a manufacturing method in which a compound semiconductor stack, which has a small crystal defect density, high mobility, and at the same time, high photon absorption efficiency, and forms a device having a relatively small thickness, is integrated with a signal processing circuit board, as compared with the prior art.
In fig. 1, only one compound semiconductor stack is shown, and at least one compound semiconductor stack may also be arranged in the form of a planar array, a linear array, or a four-quadrant on the substrate 10, so that it is possible to realize detection of the position or two-dimensional image of the object to be measured. When at least one compound semiconductor stacked layer is arranged, they can be integrated with an IC circuit, enabling a single circuit chip to control a plurality of compound semiconductor stacked layers.
Referring to fig. 2A-2G, a flow chart of manufacturing an upper-incidence infrared sensor element according to an embodiment of the present invention is shown.
Specifically, as shown in fig. 2A, a compound semiconductor film 70 including a first portion (a lattice buffer sacrificial layer 71) of poor quality and a second portion (an N-type electrode ohmic contact and current conduction layer 72, a boundary line schematically shown by a broken line in the drawing) of better quality is grown on a semiconductor single crystal substrate 90 by an epitaxial means such as Metal Organic Chemical Vapor Deposition (MOCVD) or Molecular Beam Epitaxy (MBE). In one example, the semiconductor single crystal substrate may be any suitable single crystal substrate of GaAs, InP, GaN, Si, or the like. The compound semiconductor film may include binary, ternary, quaternary materials composed of In, Sb, As, Ga, P, and the like, such As GaAs, InAs, InSb, InGaAs, InGaP, InGaAsP, and the like, preferably an InSb film.
The following will exemplify InSb. In one example, a plurality of compound semiconductor films are formed by epitaxial growth, and an N-type electrode ohmic contact and current conduction layer 72, a photon absorption layer 60, a carrier block layer 50, a first P-type electrode ohmic contact and current conduction layer 41, and a second P-type electrode ohmic contact and current conduction layer 42 are formed, respectively.
As shown in fig. 2B, a reflective film 20 is formed on the substrate 10 including the IC circuit by coating, sputtering, or the like.
As shown in fig. 2C, an adhesive is coated on the second P-type electrode ohmic contact and current conducting layer 42 and/or the reflective film 20 to form an adhesive layer 30. In one example, a binder such as polyimide or epoxy is applied by coating or taping.
As shown in fig. 2D, the second P-type electrode ohmic contact and current conducting layer 42 is then bonded face-to-face with the reflective film 20 on the substrate 10 via the adhesive layer 30, wherein the substrate 10 comprises any kind of integrated circuit suitable for the specific application of the hall device, such as a silicon-based wafer containing suitable integrated circuits. Of course, it is also possible to apply an adhesive to the reflective film 20 of the substrate 10 or to apply an adhesive to both the second P-type electrode ohmic contact and current conducting layer 42 and the reflective film 20, and a person skilled in the art may select the material of the substrate 10 as needed, without being limited to the examples described herein.
As shown in fig. 2E, the semiconductor single-crystal substrate 90 is selectively removed to expose the N-type electrode ohmic contact and the back surface of the current-conducting layer 70. In one example, mechanical grinding or chemical etching may be used. The mechanical grinding can be traditional semiconductor grinding equipment, and the chemical corrosion solution can be a mixed solution of phosphoric acid and hydrogen peroxide or a hydrochloric acid solution. It will be appreciated by those skilled in the art that the mechanical grinding or chemical etching herein may take other alternative forms known in the art.
The first portion of the exposed N-type electrode ohmic contact and current-conducting layer 70 (i.e., the lattice buffer sacrificial layer 71) that is just grown to be of poor quality is removed to leave the second portion (the N-type electrode ohmic contact and current-conducting layer 72) of high quality. In one example, a first portion of the exposed N-type electrode ohmic contact and the current conducting layer 70, i.e., a first portion previously grown on the semiconductor single crystal substrate 60, which is inferior in quality due to lattice mismatch, may be removed by dry or wet etching, and thus a second portion of high quality (e.g., high mobility) may be retained. The dry etching described herein may be ion beam etching or the like, and the wet etching may be etching using any suitable solution.
It will be understood by those skilled in the art that the mobility and thickness of the compound semiconductor film can be selected according to the design requirements of the device by using the method of the present invention, thereby providing great flexibility in selecting the mobility and thickness of the compound semiconductor film, and thus, the compound semiconductor film with higher mobility and thinner thickness (higher sheet resistance) can be obtained at the same time.
The N-type electrode ohmic contact and current conducting layer 72, the photon absorption layer 60, the carrier blocking layer 50, and the right end portion of the first P-type electrode ohmic contact and current conducting layer 41 in the compound semiconductor stacked layer are etched away (e.g., etched away by a semiconductor mesa etching process) by means of patterned etching, so as to obtain a mesa structure as shown in the figure, wherein the size of the second P-type electrode ohmic contact and current conducting layer 42 is larger than that of the first P-type electrode ohmic contact and current conducting layer 41.
As shown in fig. 2F, the N-type electrode 13 and the P-type electrode 14 are fabricated on the N-type electrode ohmic contact and current conducting layer 70 and the second P-type electrode ohmic contact and current conducting layer 42 by photolithography and metal lift-off process, respectively or simultaneously.
In one example, a metal electrode layer is formed by deposition such as electron beam evaporation or magnetron sputtering, and the material of the metal electrode layer may include Au, Ge, Ni, Ti, Cr, Cu, or their alloys; then, forming the electrodes 13 and 14 by stripping or etching the metal electrode layer; the electrodes 13, 14 are optionally subjected to an annealing process to form a better ohmic contact between the electrodes and the compound semiconductor stack. Of course, the electrodes 13, 14 may be formed in any manner known to those skilled in the art, and the invention will not be described in detail herein.
As shown in fig. 2G, the N-type electrode 13 and the negative lead terminal 12, the P-type electrode 14 and the positive lead terminal 11 are electrically connected by metal bonding wires 15 and 16, respectively.
Further, a protective layer 80 is formed on at least a part (for example, the entire) of the surfaces of the compound semiconductor stacked layer and the electrodes 13 and 14.
The protective layer 80 can prevent the compound semiconductor stack from being damaged in a subsequent process while preventing moisture, impurity particles, and the like from entering. The protective layer 80 includes any one of a silicon nitride film, a silicon oxide film, an aluminum oxide film, a silicon oxynitride film, an epoxy resin, a silica gel, a silicon dioxide, and a polyimide film. The photoresist pattern may be formed by Plasma Enhanced Chemical Vapor Deposition (PECVD), sputtering, or other conventional film forming means, using the photoresist pattern as a mask.
The compound semiconductor stack fabricated using the embodiment of FIGS. 2A-2G of the present invention may have a mobility in excess of 60000cm if the compound semiconductor film is made of an InSb material2and/Vs, and the sheet resistance of the compound semiconductor film can be designed to a desired value, whereby an InSb compound semiconductor stack with high sensitivity and low power consumption can be finally obtained.
Alternatively, after the compound semiconductor film is grown on another semiconductor single crystal substrate, the compound semiconductor film is not epitaxially grown, but the compound semiconductor film is bonded to the substrate 10 through an adhesive layer (e.g., an adhesive layer 30 described below), and the another semiconductor single crystal substrate and the compound semiconductor film with poor quality which has just started to be grown are selectively removed, so that only a good-quality portion is left on the substrate 10 as the second P-type electrode ohmic contact and current conduction layer 42 having a mobility of more than 50000cm2Vs and less than 78000cm2and/Vs, the thickness of the P-type electrode ohmic contact and the current conduction layer is 100nm-9 μm. It is understood that continuing epitaxial growth of subsequent layers (e.g., the second P-type electrode ohmic contact and current conducting layer 41, the carrier blocking layer 50, the photon absorption layer 60, the N-type electrode ohmic contact and current conducting layer 72) on the good-quality P-type electrode ohmic contact and current conducting layer may result in a compound semiconductor film of similar quality to homoepitaxial growth, thereby further improving the quality of the resulting compound semiconductor stack. In this case, the bonding layer to be used needs to be a high-temperature-resistant material such as silicon dioxide or silicon nitride in order to satisfy the subsequent epitaxial growth of the compound semiconductor film.
In summary, the inventors of the present invention have found that by making the resistance of the compound semiconductor stack small, and integrating the compound semiconductor stack and an integrated circuit that processes an electric signal output from the compound semiconductor stack on the same substrate and packaging them in the same package, inspection at room temperature is possible. In addition, in this way, the infrared sensor element of the present invention can be made less susceptible to dark current, electromagnetic noise, and thermal fluctuation. In the present invention, the compound semiconductor stack resistance in the infrared sensor circuit can be made small, and the resistance and capacitance in the signal output circuit can be made small, thereby allowing the infrared sensor element to be miniaturized.
The invention also provides embodiments in accordance with the following aspects, in particular as follows:
aspect 1: a method of manufacturing a top-in-light infrared sensor element, the method comprising:
manufacturing at least one compound semiconductor laminated layer capable of detecting infrared rays having a wavelength of 1 μm or more and outputting an electric signal indicative of the detection;
providing a substrate containing an IC circuit that processes and operates on an electrical signal output from the at least one compound semiconductor laminated layer to obtain a detection result;
providing an adhesive layer for bonding at least one compound semiconductor stack to a substrate containing an IC circuit;
wherein the electrode of the at least one compound semiconductor laminated layer is electrically connected to a lead terminal of the IC circuit.
Aspect 2: the method according to aspect 1, wherein,
one compound semiconductor lamination in the at least one compound semiconductor lamination comprises the following components in sequence from top to bottom: the semiconductor device comprises an N-type electrode, an N-type electrode ohmic contact and current conduction layer, a P-N or P-i-N type photon absorption layer, a carrier blocking layer, a P-type electrode ohmic contact and current conduction layer and a P-type electrode positioned on one part of the P-type electrode ohmic contact and current conduction layer.
Aspect 3: the method according to aspect 2, wherein,
the P-type electrode ohmic contact and current conduction layer comprises a first P-type electrode ohmic contact and current conduction layer and a second P-type electrode ohmic contact and current conduction layer, the first P-type electrode ohmic contact and current conduction layer is positioned on the second P-type electrode ohmic contact and current conduction layer, the size of the second P-type electrode ohmic contact and current conduction layer is larger than that of the first P-type electrode ohmic contact and current conduction layer, and a P-type electrode is arranged on the part of the second P-type electrode ohmic contact and current conduction layer, which is not in ohmic contact with the first P-type electrode, and is not in contact with the current conduction layer;
the N-type electrode is electrically connected with the negative lead end of the IC circuit, and the P-type electrode is electrically connected with the positive lead end of the IC circuit through metal routing connection or multilayer metal interconnection lines formed through photoetching.
Aspect 4: the method according to aspect 2, wherein,
the P-type electrode comprises a metal electrode formed by Au, Ge, Ni, Ti, Cr, Cu or an alloy thereof, preferably a Ti/Au metal electrode;
the first P-type electrode ohmic contact and current conduction layer and the second P-type electrode ohmic contact and current conduction layer are P-type heavily doped compound semiconductor films;
the carrier barrier layer comprises a p-type heavily doped compound semiconductor film containing Ga, Al, In, Sb and As, and preferably an InAlSb compound semiconductor film;
the photon absorption layer comprises a P-N or P-i-N lightly doped InSb, GaAs, InAs, InGaAs, GaAsSb or InGaP compound semiconductor film, preferably an InSb compound semiconductor film;
the N-type electrode ohmic contact and current conduction layer comprises an N-type heavily-doped InSb, GaAs, InAs, InGaAs, GaAsSb or InGaP compound semiconductor film, and preferably adopts an InSb compound semiconductor film;
the N-type electrode comprises a metal electrode formed by Au, Ge, Ni, Ti, Cr, Cu or an alloy thereof, and a Ti/Au metal electrode is preferably adopted.
Aspect 5: the method of aspect 4, wherein,
the compound semiconductor laminated layer is manufactured by the following steps:
growing a plurality of compound semiconductor films on a semiconductor single crystal substrate in a heterogeneous and sequential epitaxial manner, and respectively forming an N-type electrode ohmic contact and current conduction layer, a P-i-N type photon absorption layer, a carrier barrier layer, a first P-type electrode ohmic contact and current conduction layer and a second P-type electrode ohmic contact and current conduction layer which contain a crystal lattice buffer sacrificial layer;
coating an adhesive layer on at least one of the second P-type electrode ohmic contact and current conducting layer and the substrate, and bonding them together face to face through the adhesive layer;
selectively removing the lattice buffer sacrificial layer in the semiconductor single crystal substrate and the N-type electrode ohmic contact and current conduction layer,
wherein the content of the first and second substances,
the semiconductor single crystal substrate is any suitable single crystal substrate of GaAs, InP, GaN, Si, or the like, the compound semiconductor film includes InSb, GaAs, InAs, InGaAs, or InGaP, InAlSb, GaAsSb, or InGaP, the adhesive layer includes any of a silicon nitride film, a silicon oxide film, an aluminum oxide film, a silicon oxynitride film, epoxy resin, silica gel, silicon dioxide, and a polyimide film, and the substrate includes any of a Si-based wafer containing an IC circuit, a quartz substrate, an aluminum oxide substrate, an aluminum nitride substrate, and a polyimide flexible substrate.
Aspect 6: the method of aspect 5, wherein,
the mobility of the N-type electrode ohmic contact and current conduction layer after only removing the semiconductor single crystal substrate is more than 40000cm2A thickness of the N-type electrode ohmic contact and current conduction layer is 500nm-10 μm, preferably 1 μm-3 μm;
simultaneously removing the crystal lattice buffer sacrificial layer with poor crystal quality in the ohmic contact and current conduction layer of the semiconductor single crystal substrate and the N-type electrode, greatly improving the mobility of the ohmic contact and current conduction layer of the N-type electrode, and enabling the mobility to be more than 50000cm2Vs and less than 78000cm2A thickness of the N-type electrode ohmic contact and current conducting layer is 100nm-9 μm, preferably 300nm-2 μm; the surface defect density of the P-N or P-i-N type (InSb infrared) photon absorption layer is less than or equal to 10-100/cm2。
Aspect 7: the method according to any one of aspects 1-6, wherein,
the top-entry infrared sensor element further includes a protective layer for covering the compound semiconductor laminated layer, but exposing at least a part of the N-type electrode and the P-type electrode;
the protective layer includes any one of a silicon nitride film, a silicon oxide film, an aluminum oxide film, a silicon oxynitride film, an epoxy resin, a silica gel, a silicon dioxide, and a polyimide film.
Aspect 8: the method according to any one of aspects 1-7, wherein,
the substrate containing the IC circuit is rigid or flexible;
and a reflecting film is arranged between the substrate and the bonding layer.
Aspect 9: the method according to any one of aspects 1-8, wherein,
the at least one compound semiconductor stacked layer is arranged on the substrate in the form of a planar array, a linear array, or a four-quadrant.
Although a few embodiments of the present general inventive concept have been shown and described, it will be appreciated by those skilled in the art that changes may be made in these embodiments without departing from the principles and spirit of the general inventive concept, the scope of which is defined in the appended claims and their equivalents.

Claims (10)

1. An upward-incident infrared sensor element, comprising:
at least one compound semiconductor laminated layer capable of detecting infrared rays having a wavelength of 1 μm or more and outputting an electric signal representing the detection;
a substrate including an IC circuit that processes and operates an electric signal output from the at least one compound semiconductor laminated layer to obtain a detection result;
an adhesive layer bonding at least one compound semiconductor laminate to a substrate containing an IC circuit;
wherein the electrode of the at least one compound semiconductor laminated layer is electrically connected to a lead terminal of the IC circuit.
2. The top-in light infrared sensor element of claim 1,
one compound semiconductor lamination in the at least one compound semiconductor lamination comprises the following components in sequence from top to bottom: the semiconductor device comprises an N-type electrode, an N-type electrode ohmic contact and current conduction layer, a P-N or P-i-N type photon absorption layer, a carrier blocking layer, a P-type electrode ohmic contact and current conduction layer and a P-type electrode positioned on one part of the P-type electrode ohmic contact and current conduction layer.
3. The top-in light infrared sensor element of claim 2,
the P-type electrode ohmic contact and current conduction layer comprises a first P-type electrode ohmic contact and current conduction layer and a second P-type electrode ohmic contact and current conduction layer, the first P-type electrode ohmic contact and current conduction layer is positioned on the second P-type electrode ohmic contact and current conduction layer, the size of the second P-type electrode ohmic contact and current conduction layer is larger than that of the first P-type electrode ohmic contact and current conduction layer, and a P-type electrode is arranged on the part of the second P-type electrode ohmic contact and current conduction layer, which is not in ohmic contact with the first P-type electrode, and is not in contact with the current conduction layer;
the N-type electrode is electrically connected with the negative lead end of the IC circuit, and the P-type electrode is electrically connected with the positive lead end of the IC circuit through metal routing connection or multilayer metal interconnection lines formed through photoetching.
4. The top-in light infrared sensor element of claim 3,
the P-type electrode comprises a metal electrode formed by Au, Ge, Ni, Ti, Cr, Cu or alloy thereof;
the first P-type electrode ohmic contact and current conduction layer and the second P-type electrode ohmic contact and current conduction layer are P-type heavily doped compound semiconductor films;
the carrier blocking layer comprises a p-type doped compound semiconductor film containing Ga, Al, In, Sb or As or a compound semiconductor film containing Sb;
the P-N or P-i-N photon absorption layer comprises a P-N or P-i-N type lightly doped InSb, GaAs, InAs, InGaAs, GaAsSb or InGaP compound semiconductor film;
the N-type electrode ohmic contact and current conduction layer comprises an N-type heavily-doped InSb, GaAs, InAs, InGaAs, GaAsSb or InGaP compound semiconductor film;
the N-type electrode comprises a metal electrode formed by Au, Ge, Ni, Ti, Cr, Cu or alloy thereof.
5. The top-in light infrared sensor element of claim 4,
the compound semiconductor laminated layer is manufactured by the following steps:
growing a plurality of compound semiconductor films on a semiconductor single crystal substrate in a heterogeneous sequential epitaxial manner, and respectively forming an N-type electrode ohmic contact and current conduction layer containing a crystal lattice buffer sacrificial layer, a P-N or P-i-N type photon absorption layer, a carrier barrier layer, a first P-type electrode ohmic contact and current conduction layer and a second P-type electrode ohmic contact and current conduction layer;
coating an adhesive layer on at least one of the second P-type electrode ohmic contact and current conducting layer and the substrate, and bonding them together face to face through the adhesive layer;
selectively removing the lattice buffer sacrificial layer in the semiconductor single crystal substrate and the N-type electrode ohmic contact and current conduction layer,
the semiconductor single crystal substrate is a GaAs, InP, GaN or Si single crystal substrate, the compound semiconductor film comprises InSb, GaAs, InAs, InGaAs, InAlSb, GaAsSb or InGaP, the bonding layer comprises any one of a silicon nitride film, a silicon oxide film, an aluminum oxide film, a silicon oxynitride film, epoxy resin, silica gel, silicon dioxide and a polyimide film, and the substrate comprises any one of a Si-based wafer containing an IC circuit, a quartz substrate, an aluminum oxide substrate, an aluminum nitride substrate and a polyimide flexible substrate.
6. The top-in light infrared sensor element of claim 5,
remove onlyThe mobility of the N-type electrode ohmic contact and current conduction layer of the semiconductor single crystal substrate is more than 40000cm2The thickness of the N-type electrode ohmic contact and the current conduction layer is 500nm-10 mu m;
simultaneously removing the lattice buffer sacrificial layer with poor lattice quality in the semiconductor single crystal substrate, the ohmic contact layer of the N-type electrode and the current conduction layer, wherein the mobility of the ohmic contact layer of the N-type electrode and the current conduction layer is more than 50000cm2Vs and less than 78000cm2The thickness of the N-type electrode ohmic contact and the current conduction layer is 100nm-9 mu m;
the surface defect density of the P-N or P-i-N type photon absorption layer is less than or equal to 10-100/cm2。
7. The drop-in-light infrared sensor element according to any one of claims 1 to 6,
the top-entry infrared sensor element further includes a protective layer for covering the compound semiconductor laminated layer, but exposing at least a part of the N-type electrode and the P-type electrode;
the protective layer includes any one of a silicon nitride film, a silicon oxide film, an aluminum oxide film, a silicon oxynitride film, an epoxy resin, a silica gel, a silicon dioxide, and a polyimide film.
8. The drop-in-light infrared sensor element according to any one of claims 1 to 6,
the substrate containing the IC circuit is rigid or flexible;
and a reflecting film is arranged between the substrate and the bonding layer.
9. The drop-in-light infrared sensor element according to any one of claims 1 to 6,
the at least one compound semiconductor stacked layer is arranged on the substrate in the form of a planar array, a linear array, or a four-quadrant.
10. A method of manufacturing a top-in light infrared sensor element according to any of claims 1-9, the method comprising:
manufacturing at least one compound semiconductor laminated layer capable of detecting infrared rays having a wavelength of 1 μm or more and outputting an electric signal indicative of the detection;
providing a substrate containing an IC circuit that processes and operates on an electrical signal output from the at least one compound semiconductor laminated layer to obtain a detection result;
providing an adhesive layer for bonding at least one compound semiconductor stack to a substrate containing an IC circuit;
wherein the electrode of the at least one compound semiconductor laminated layer is electrically connected to a lead terminal of the IC circuit.
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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020135034A1 (en) * 1998-09-01 2002-09-26 Keitaro Shigenaka Multi-wavelength semiconductor image sensor and method of manufacturing the same
CN1853281A (en) * 2003-09-09 2006-10-25 旭化成株式会社 Infrared sensor IC, infrared sensor and method for producing same
CN102332456A (en) * 2011-10-11 2012-01-25 清华大学 Photodetector integrated device and manufacturing method thereof
JP2012146806A (en) * 2011-01-12 2012-08-02 Irspec Corp Lattice mismatched infrared compound semiconductor photodetector
CN103843158A (en) * 2012-05-30 2014-06-04 住友电气工业株式会社 Light receiving element, semiconductor epitaxial wafer, detecting apparatus, and light receiving element manufacturing method
CN108022985A (en) * 2017-11-02 2018-05-11 天津大学 Extension wavelength mesa avalanche photodide and preparation method thereof
CN112038418A (en) * 2020-09-11 2020-12-04 南京大学 High-wavelength-selectivity ultraviolet detector and manufacturing method thereof
JP2021057365A (en) * 2019-09-26 2021-04-08 旭化成エレクトロニクス株式会社 Infrared sensor

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020135034A1 (en) * 1998-09-01 2002-09-26 Keitaro Shigenaka Multi-wavelength semiconductor image sensor and method of manufacturing the same
CN1853281A (en) * 2003-09-09 2006-10-25 旭化成株式会社 Infrared sensor IC, infrared sensor and method for producing same
CN101459203A (en) * 2003-09-09 2009-06-17 旭化成电子材料元件株式会社 Infrared sensor IC, infrared sensor and method for producing same
JP2012146806A (en) * 2011-01-12 2012-08-02 Irspec Corp Lattice mismatched infrared compound semiconductor photodetector
CN102332456A (en) * 2011-10-11 2012-01-25 清华大学 Photodetector integrated device and manufacturing method thereof
CN103843158A (en) * 2012-05-30 2014-06-04 住友电气工业株式会社 Light receiving element, semiconductor epitaxial wafer, detecting apparatus, and light receiving element manufacturing method
CN108022985A (en) * 2017-11-02 2018-05-11 天津大学 Extension wavelength mesa avalanche photodide and preparation method thereof
JP2021057365A (en) * 2019-09-26 2021-04-08 旭化成エレクトロニクス株式会社 Infrared sensor
CN112038418A (en) * 2020-09-11 2020-12-04 南京大学 High-wavelength-selectivity ultraviolet detector and manufacturing method thereof

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