CN113630119B - Offset mismatch calibration method and calibrator for time interleaved ADC (analog to digital converter) - Google Patents
Offset mismatch calibration method and calibrator for time interleaved ADC (analog to digital converter) Download PDFInfo
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Abstract
The embodiment of the application provides a time interleaving ADC offset mismatch calibration method and a time interleaving ADC offset mismatch calibrator, which are used for inputting a direct current signal to an ADC to be calibrated when offset mismatch calibration is carried out, and the ADC to be calibrated does not need to apply an extra standard alternating current signal from the outside, so that the design requirement of the whole system is low, and the calibration accuracy is not influenced. In addition, the ADC to be calibrated outputs a standard value under the action of a standard direct current signal, the standard value is used as a standard value of the ADC to be calibrated, a reference channel is not required to be selected, and the problem that the ADC calibration failure rate is high and the ADC yield is affected due to process deviation when the reference channel is selected is avoided.
Description
Technical Field
The present disclosure relates to the field of signal processing technologies, and in particular, to a method and a calibrator for offset mismatch calibration of a time-interleaved ADC.
Background
Analog-to-Digital (ADC) converters provide a channel of interaction between the Analog world and Digital systems, and with the continued development of Digital systems, the requirements for high-speed and high-precision Analog-to-Digital converters are increasing. The proposal of the multichannel time interleaving technology effectively solves the problem, and can ensure that the ADC has high speed while maintaining high precision, so that the speed of the ADC is increased by times. The basic principle of the time interleaving ADC is that M single-channel ADCs of X-bit Y MHZ are adopted to sample and convert input signals respectively in an alternating parallel mode, and an ADC of X-bit M multiplied by YMHZ can be obtained after data synthesis.
Due to delay of signals and process errors, offset mismatch of non-ideal factors exists among the ADCs, and the overall performance of the time interleaved ADC is affected. Therefore, it is necessary to calibrate for the offset mismatch, wherein the offset mismatch of the remaining ADCs is calibrated by selecting the channel of one of the ADCs as a reference channel when calibrating for the offset mismatch. When calibration is carried out, an additional standard alternating current signal is required to be applied to the ADC to be calibrated and the reference ADC from the outside, and a high-quality alternating current signal is required when the standard alternating current signal is applied to the outside, but the high-quality alternating current signal is inconvenient to achieve the inside of a chip, so that higher requirements are set for the design of the whole system, and the low-quality alternating current signal can influence the calibration accuracy. In addition, when the reference channel is selected, the reference channel is selected due to process deviation, the calibration range is possibly small, the calibration failure rate of the ADC is high, and the ADC yield is affected.
Disclosure of Invention
The embodiment of the application aims to provide a time-interleaved ADC offset mismatch calibration method and a calibrator, which are used for solving the problems of low calibration accuracy, high calibration failure rate and influence on ADC yield caused by externally applying additional standard alternating current signals.
In order to solve the above technical problems, embodiments of the present application are implemented as follows:
in a first aspect, an embodiment of the present application provides a method for offset mismatch calibration of a time-interleaved ADC, including:
respectively calculating a first average value CoDA of a first output signal of the ADC to be calibrated under the action of a first direct current signal and a second average value CoDB of a second output signal of the ADC to be calibrated under the action of a second direct current signal in a sampling period;
calculating the mean value of the first mean value CoDA and the second mean value CoDB as a third mean value;
calculating the difference value between the third average value and a standard value, namely a deregulation value deltaVO, wherein the standard value is an ideal value of the ADC to be calibrated under the action of a standard direct current signal;
and determining the offset calibration value of the ADC to be calibrated according to the offset value deltaVO.
In a second aspect, embodiments of the present application provide a calibrator comprising:
the first average module is used for respectively calculating a first average value CoDA of a first output signal of the ADC to be calibrated under the action of a first direct current signal and a second average value CoDB of a second output signal of the ADC to be calibrated under the action of a second direct current signal in a sampling period;
A second average module, configured to calculate an average of the first average CoDA and the second average CoDB as a third average;
the calculating module is used for calculating the difference value between the third average value and a standard value, namely a deregulation value deltaVO, wherein the standard value is an ideal value of the ADC to be calibrated under the action of a standard direct current signal;
and the determining module is used for determining the offset calibration value of the ADC to be calibrated according to the offset value deltaVO.
In a third aspect, embodiments of the present application provide a calibration device comprising a processor, a communication interface, a memory, and a communication bus; the processor, the communication interface and the memory complete communication with each other through a bus; the memory is used for storing a computer program; the processor is configured to execute a program stored in the memory, to implement the offset mismatch calibration method step of the time-interleaved ADC according to the first aspect.
As can be seen from the technical solutions provided in the embodiments of the present application, in a sampling period, a first average value CoDA of a first output signal of an ADC to be calibrated under the action of a first direct current signal and a second average value CoDB of a second output signal of the ADC to be calibrated under the action of a second direct current signal are calculated respectively. The average of the first average CoDA and the second average CoDB is obtained as a third average. And calculating the difference between the third average value and a standard value, wherein the difference is an offset value deltaVO, and the standard value is an ideal value of the ADC to be calibrated under the action of a standard direct current signal. And determining an offset calibration value of the ADC to be calibrated according to the offset value deltaVO. Therefore, when offset mismatch calibration is carried out, a direct current signal is input to the ADC to be calibrated, no extra standard alternating current signal is required to be applied to the ADC to be calibrated from the outside, the design requirement on the whole system is low, and the calibration accuracy is not influenced. In addition, the ADC to be calibrated outputs a standard value under the action of a standard direct current signal, the standard value is used as a standard value of the ADC to be calibrated, a reference channel is not required to be selected, and the problem that the ADC calibration failure rate is high and the ADC yield is affected due to process deviation when the reference channel is selected is avoided.
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In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments described in the present application, and that other drawings may be obtained according to these drawings without inventive effort to a person skilled in the art.
Fig. 1 is a first flowchart of a method for offset mismatch calibration of a time-interleaved ADC according to an embodiment of the application;
fig. 2 is a second flowchart of a method for offset mismatch calibration of a time-interleaved ADC according to an embodiment of the application;
fig. 3 is a third flowchart of a method for offset mismatch calibration of a time-interleaved ADC according to an embodiment of the application;
fig. 4 is a fourth flowchart of a method for offset mismatch calibration of a time-interleaved ADC according to an embodiment of the application;
fig. 5 is a schematic diagram of module composition of a calibrator according to an embodiment of the present application;
fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
The embodiment of the application provides a time interleaving ADC offset mismatch calibration method and a calibrator, which solve the problems of low calibration accuracy, high calibration failure rate and influence on ADC yield caused by externally applying additional standard alternating current signals.
In order to better understand the technical solutions in the present application, the following description will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, shall fall within the scope of the present application.
The embodiment of the application provides a method for calibrating offset mismatch of a time-interleaved ADC, and the technical scheme of the embodiment of the application is explained below with reference to the accompanying drawings.
As illustrated in fig. 1, an embodiment of the present Application provides a method for calibrating offset mismatch of a time-interleaved ADC, which may calibrate offset mismatch of each ADC in the time-interleaved ADC, and the method may be implemented by a digital Circuit, which may be an Application-Specific-Integrated-Circuit (ASIC), a Field-programmable gate array (Field-ProgrammableGateArray, FPGA), or the like, capable of performing offset mismatch calibration of the time-interleaved ADC.
The offset mismatch calibration method of the time interleaving ADC specifically comprises the following steps:
in S101, in a sampling period, a first average value CoDA of a first output signal of the ADC to be calibrated under the action of a first dc signal and a second average value CoDB of a second output signal of the ADC to be calibrated under the action of a second dc signal are calculated, respectively.
In one possible implementation, the first direct current signal and the second direct current signal are both output by a built-in DAC. The sampling direct current signal is used as the input of the ADC to be calibrated, so that the problem of low calibration accuracy caused by externally applying an additional standard alternating current signal is avoided.
In one possible implementation, S101 includes: and in the sampling period, collecting at least part of first output signals of the ADC to be calibrated under the action of the first direct current signals, and calculating the ratio of the sum of signal values of at least part of the first output signals to the number of at least part of the first output signals to be the first average value CoDA.
And in the sampling period, collecting at least part of second output signals of the ADC to be calibrated under the action of the second direct current signals, and calculating the ratio of the sum of signal values of at least part of the second output signals to the number of at least part of the second output signals to be the second average value CoDB.
In particular, for a time interleaved ADC, it consists of a single channel ADC of N X bits YMHZ. The first direct current signal and the second direct current signal are both digital signals, and the first direct current signal and the second direct current signal can be both direct current voltage signals. Two direct-current voltage signals are sequentially input into the time-interleaved ADC, N ADCs can output code words (a first output signal and a second output signal) under the action of the direct-current voltage signals, for example, the ADC to be calibrated is 1GHz, which represents that the ADC to be calibrated outputs data of the power of 10 per second, so that in one sampling period (for example, 1 second), the average value of the data of the output of the ADC to be calibrated in 1 second is required to be obtained. In addition, part of data in the data output by the ADC to be calibrated in 1 second can be intercepted to obtain the average value of the output signals of the ADC to be calibrated. For example, the cube of 2, i.e., eight data, is truncated. That is, each time an average is taken of the 8 data output from the ADC to be calibrated. The simplest average is to sum up all the data and divide them by their number. That is, 8 data, which is to be added 7 times, is divided by 8 to shift three bits right, which is one shift. Thus, an average value is obtained.
In one possible implementation, the first output signal and the second output signal are both signals calibrated by the initial offset calibration value.
Specifically, the initial offset calibration value is the offset calibration value stored in the register for which the last calibration was completed. Under the action of the first direct current signal and the second direct current signal, the ADC to be calibrated outputs a first output signal and a second output signal through the following formulas.
Wherein D is OUT D is the calibrated output value of the ADC to be calibrated IN For the output value of the ADC to be calibrated before calibration, offset may be the initial offset calibration value, G is the gain calibration value, 2 N The minimum resolution of the gain calibration of the ADC to be calibrated is the sampling period.
The calibrated first output signal and the second output signal are output under calibration of the initial offset calibration value.
In S102, the average of the first average CoDA and the second average CoDB is calculated as a third average.
Specifically, the first average CoDA and the second average CoDB are superimposed and then divided by 2, to obtain a third average. In S103, the difference between the third average value and the standard value is calculated, and the standard value is the offset deltaVO, and the standard value is the ideal value of the ADC to be calibrated under the action of the standard dc signal.
In one possible implementation, one of the first average CoDA or the second average CoDB may also be selected as the third average. For example, the internal DAC can select one of the first average value CoDA or the second average value CoDB as the third average value when the internal DAC is capable of giving the first voltage value of the standard dc signal.
In one possible implementation, the standard dc signal is a first voltage value, the first dc signal is a second voltage value, and the second dc signal is a third voltage value.
The first difference between the absolute value of the second voltage value and the absolute value of the first voltage value is equal to the second difference between the absolute value of the third voltage value and the absolute value of the first voltage value.
Specifically, the first dc signal and the second dc signal are symmetrical about a certain fixed voltage value, for example, the fixed voltage value is 0V, and the voltage value of the first dc signal and the voltage value of the second dc signal may be-1V and 1V, respectively. When the first voltage value of the standard direct current signal is 0V, the ideal codeword output by the ADC is 8192 (as a standard value).
In S104, an offset calibration value of the ADC to be calibrated is determined from the offset value deltaVO.
In one possible implementation, the first output signal and the second output signal are both signals calibrated by the initial offset calibration value, as shown in fig. 2, S104 includes:
In S201, when the absolute value of the offset value deltaVO exceeds the calibration threshold, the initial offset calibration value is corrected by the offset value deltaVO, and a corrected offset calibration value is obtained.
Specifically, the calibration threshold is a threshold that meets the calibration error requirement, which may be determined according to the ADC type, and embodiments of the present application are not limited herein.
In one possible implementation, S201 includes:
and converting the initial offset calibration value stored in the register in the first state into the initial offset calibration value in the second state, wherein the first state corresponds to the second state.
And (3) performing difference on the initial offset calibration value and the offset value deltaVO of the second state to obtain a difference value which is a corrected offset calibration value.
Alternatively, in another possible implementation, S201 includes:
converting the offset value deltaVO of the second state into the offset value deltaVO of the first state,
and performing difference on the initial offset calibration value stored in the register in the first state and the offset value deltaVO in the first state to obtain a difference value as a corrected offset calibration value.
For example, the initial offset calibration value in the register is stored at 126 (first state), and transitions to the second state and then to-2. Or when the offset deltaVO of the second state is converted into the first state, for example, when the offset deltaVO is 2, the offset deltaVO is converted into the first state and then is 125.
In S202, the offset value deltaVO is corrected according to the corrected offset calibration value until the offset value deltaVO does not exceed the calibration threshold, and the ADC to be calibrated completes calibration.
In one possible implementation, S202 includes:
the first direct current signal and the second direct current signal obtain a first output signal and a second output signal under the calibration action of a correction offset calibration value;
calculating the average value of the first average value CoDA of the first output signal and the second average value CoDB of the second output signal as a third average value;
and calculating the difference between the third average value and a standard value, wherein the difference is the corrected offset value deltaVO, and the standard value is an ideal value of the ADC to be calibrated under the action of a standard direct current signal.
In S203, in the case where the ADC to be calibrated completes the calibration, the corrected offset calibration value is taken as the offset calibration value of the ADC to be calibrated.
In S204, in the case where the absolute value of the offset value deltaVO does not exceed the calibration threshold, the initial offset calibration value is taken as the offset calibration value.
As can be seen from the technical solutions provided in the embodiments of the present application, in a sampling period, a first average value CoDA of a first output signal of an ADC to be calibrated under the action of a first direct current signal and a second average value CoDB of a second output signal of the ADC to be calibrated under the action of a second direct current signal are calculated respectively. The average of the first average CoDA and the second average CoDB is obtained as a third average. And calculating the difference between the third average value and a standard value, wherein the difference is an offset value deltaVO, and the standard value is an ideal value of the ADC to be calibrated under the action of a standard direct current signal. And determining an offset calibration value of the ADC to be calibrated according to the offset value deltaVO. Therefore, when offset mismatch calibration is carried out, a direct current signal is input to the ADC to be calibrated, no extra standard alternating current signal is required to be applied to the ADC to be calibrated from the outside, the design requirement on the whole system is low, and the calibration accuracy is not influenced. In addition, the ADC to be calibrated outputs a standard value under the action of a standard direct current signal, the standard value is used as a standard value of the ADC to be calibrated, a reference channel is not required to be selected, and the problem that the ADC calibration failure rate is high and the ADC yield is affected due to process deviation when the reference channel is selected is avoided.
As illustrated in fig. 3, the embodiment of the present application provides a method for calibrating offset mismatch of a time-interleaved ADC, which may calibrate offset mismatch of each ADC in the time-interleaved ADC, and the method may be implemented by a digital circuit, which may be a digital application specific integrated circuit (ApplicationSpecificIntegratedCircuit, ASIC) capable of performing offset mismatch calibration of the time-interleaved ADC, a Field-programmable gate array (Field-ProgrammableGateArray, FPGA), or the like.
In S301, in a sampling period, a first average value CoDA of a first output signal of the ADC to be calibrated under the action of a first dc signal and a second average value CoDB of a second output signal of the ADC to be calibrated under the action of a second dc signal are calculated, respectively.
In S302, the average of the first average CoDA and the second average CoDB is calculated as a third average.
In S303, the difference between the third average value and the standard value is calculated and is the offset deltaVO, and the standard value is the ideal value of the ADC to be calibrated under the action of the standard dc signal.
In S304, an offset calibration value of the ADC to be calibrated is determined from the offset value deltaVO.
It should be noted that S301 to S304 have the same or similar implementation manner as that of the above-mentioned embodiments S101 to S104, which may be referred to each other, and the embodiments of the present application are not repeated here.
In S305, the offset calibration value of the ADC to be calibrated, which is completed before the current ADC to be calibrated, is checked.
Specifically, N ADCs may be numbered by numbers, and if there are 3 ADCs, they are numbered 1, 2, and 3, respectively. Where the smaller the number, the higher the priority of the ADC, and when performing offset calibration, the priority of calibration may be given. For example, the ADC with number 1 is calibrated first, the ADC with number 2 is calibrated again, and the ADC with number 3 is calibrated last.
In one possible implementation, at S305 includes:
checking whether the offset calibration value of the ADC to be calibrated, which is completed before the current ADC to be calibrated, is valid. And under the condition that the offset calibration value of the ADC to be calibrated which is calibrated before the current ADC to be calibrated is invalid, carrying out offset mismatch calibration on the ADC to be calibrated with the invalid offset calibration value. And under the condition that the offset calibration value of the ADC to be calibrated which is calibrated before the current ADC to be calibrated is valid, performing offset mismatch calibration on the next ADC to be calibrated.
Specifically, after each calibration of one ADC is completed, the offset calibration value of the ADC calibrated before is checked again, and if there is an offset calibration value failure in the offset calibration values calibrated before (e.g., the offset calibration value after calibration is empty or an abnormal value), the calibration is performed again. For example, if the current ADC currently calibrated is number 3, after the offset calibration is completed for the ADC of number 3, it is checked whether the offset calibration values of the ADC of numbers 1 and 2 are valid (if the offset calibration values are within the error allowable range, the offset calibration values are valid, otherwise, the offset calibration values of the ADC corresponding to number 1 are invalid, if the offset calibration values of the ADC corresponding to number 2 are valid, the offset mismatch of the ADC corresponding to number 2 is calibrated again, and after the calibration is completed, the offset mismatch calibration of other ADCs is performed again.
Therefore, by calibrating the offset mismatch of the ADCs in sequence and checking the offset calibration value of the calibrated ADCs again, the method not only has the rapid convergence rate of single ADC calibration, but also can bring the influence of cores into the calibration iteration convergence range, thereby avoiding the influence of the post-calibrated ADCs on the calibration result of the prior calibrated ADCs caused by signal crosstalk between different ADCs, and further improving the success rate and the accuracy of the offset mismatch calibration of the ADCs.
In addition, when offset mismatch calibration is carried out, a direct current signal is input to the ADC to be calibrated, no additional standard alternating current signal is required to be applied to the ADC to be calibrated from the outside, the design requirement on the whole system is low, and the calibration accuracy is not influenced. In addition, the ADC to be calibrated outputs a standard value under the action of a standard direct current signal, the standard value is used as a standard value of the ADC to be calibrated, a reference channel is not required to be selected, and the problem that the ADC calibration failure rate is high and the ADC yield is affected due to process deviation when the reference channel is selected is avoided.
As illustrated in fig. 4, the embodiment of the present application provides a method for calibrating offset mismatch of a time-interleaved ADC, which may calibrate offset mismatch of each ADC in the time-interleaved ADC, and the method may be implemented by a digital circuit, which may be a digital application specific integrated circuit (ApplicationSpecificIntegratedCircuit, ASIC) capable of performing offset mismatch calibration of the time-interleaved ADC, a Field-programmable gate array (Field-ProgrammableGateArray, FPGA), or the like.
In S401, in a sampling period, a first average value CoDA of a first output signal of the ADC to be calibrated under the action of a first dc signal and a second average value CoDB of a second output signal of the ADC to be calibrated under the action of a second dc signal are calculated, respectively.
In S402, the average of the first average CoDA and the second average CoDB is calculated as a third average.
In S403, the difference between the third average value and the standard value is calculated, and the standard value is the ideal value of the ADC to be calibrated under the action of the standard dc signal.
In S404, an offset calibration value of the ADC to be calibrated is determined from the offset value deltaVO.
In S405, the offset calibration value of the ADC to be calibrated, which is completed before the current ADC to be calibrated, is checked.
It should be noted that, S401 to S305 have the same or similar implementation manner as that of S301 to S105 in the above embodiments, which may be referred to each other, and the embodiments of the present application are not repeated here.
In S406, the identifier of the state identifier register of the ADC to be calibrated after performing offset mismatch calibration is set as the target identifier.
Verifying whether the offset calibration value of the ADC to be calibrated, which is calibrated before the current ADC to be calibrated, is valid includes:
Checking whether the identification word of the state identification register of the ADC to be calibrated which is calibrated before the current ADC to be calibrated is a target identification, if not, invalidating the offset calibration value of the ADC to be calibrated which is calibrated before the current ADC to be calibrated, and if so, enabling the offset calibration value of the ADC to be calibrated which is calibrated before the current ADC to be calibrated to be effective.
Specifically, when the misalignment mismatch of the ADC to be calibrated is not calibrated, the flag of the state flag register of the ADC to be calibrated may be set to 0, and when the misalignment mismatch of the ADC to be calibrated is calibrated, the flag of the state flag register of the ADC to be calibrated may be set to 1 (target flag).
Therefore, by calibrating the offset mismatch of the ADCs in sequence and checking the offset calibration value of the calibrated ADCs again, the method not only has the rapid convergence rate of single ADC calibration, but also can bring the influence of cores into the calibration iteration convergence range, thereby avoiding the influence of the post-calibrated ADCs on the calibration result of the prior calibrated ADCs caused by signal crosstalk between different ADCs, and further improving the success rate and the accuracy of the offset mismatch calibration of the ADCs.
In addition, when offset mismatch calibration is carried out, a direct current signal is input to the ADC to be calibrated, no additional standard alternating current signal is required to be applied to the ADC to be calibrated from the outside, the design requirement on the whole system is low, and the calibration accuracy is not influenced. In addition, the ADC to be calibrated outputs a standard value under the action of a standard direct current signal, the standard value is used as a standard value of the ADC to be calibrated, a reference channel is not required to be selected, and the problem that the ADC calibration failure rate is high and the ADC yield is affected due to process deviation when the reference channel is selected is avoided.
According to the offset mismatch calibration method of the time-interleaved ADC provided by the foregoing embodiment, based on the same technical concept, the embodiment of the present application further provides a calibrator, and fig. 5 is a schematic diagram of module composition of the calibrator provided by the embodiment of the present application, where the calibrator is configured to perform the offset mismatch calibration method of the time-interleaved ADC described in fig. 1 to 4, as shown in fig. 5, and the calibrator includes: a first averaging module 501, a second averaging module 502, a calculation module 503 and a determination module 504.
The first averaging module 501 is configured to calculate, in a sampling period, a first average value CoDA of a first output signal of the ADC to be calibrated under the action of a first dc signal and a second average value CoDB of a second output signal of the ADC to be calibrated under the action of a second dc signal, respectively.
A second averaging module 502, configured to calculate an average of the first average CoDA and the second average CoDB as a third average.
The calculating module 503 is configured to calculate a difference between the third average value and a standard value, where the standard value is an ideal value of the ADC to be calibrated under the action of the standard dc signal.
A determining module 504, configured to determine an offset calibration value of the ADC to be calibrated according to the offset value deltaVO.
As can be seen from the technical solutions provided in the embodiments of the present application, in a sampling period, a first average value CoDA of a first output signal of an ADC to be calibrated under the action of a first direct current signal and a second average value CoDB of a second output signal of the ADC to be calibrated under the action of a second direct current signal are calculated respectively. The average of the first average CoDA and the second average CoDB is obtained as a third average. And calculating the difference between the third average value and a standard value, wherein the difference is an offset value deltaVO, and the standard value is an ideal value of the ADC to be calibrated under the action of a standard direct current signal. And determining an offset calibration value of the ADC to be calibrated according to the offset value deltaVO. Therefore, when offset mismatch calibration is carried out, a direct current signal is input to the ADC to be calibrated, no extra standard alternating current signal is required to be applied to the ADC to be calibrated from the outside, the design requirement on the whole system is low, and the calibration accuracy is not influenced. In addition, the ADC to be calibrated outputs a standard value under the action of a standard direct current signal, the standard value is used as a standard value of the ADC to be calibrated, a reference channel is not required to be selected, and the problem that the ADC calibration failure rate is high and the ADC yield is affected due to process deviation when the reference channel is selected is avoided.
Optionally, the first averaging module 501 includes: and the first average unit is used for collecting at least part of first output signals of the ADC to be calibrated under the action of the first direct current signals in the sampling period, and calculating the ratio of the sum of the signal values of the at least part of first output signals to the number of the at least part of first output signals to be the first average value CoDA.
And the second average unit is used for collecting at least part of second output signals of the ADC to be calibrated under the second direct current signals in the sampling period, and calculating the ratio of the sum of the signal values of the at least part of second output signals to the number of the at least part of second output signals to be the second average value CoDB.
Optionally, the calibrator further comprises:
a verification module (not shown in the figure) is used for verifying the offset calibration value of the ADC to be calibrated, which is calibrated before the current ADC to be calibrated.
Optionally, the verification module includes:
and the first verification unit is used for verifying whether the offset calibration value of the ADC to be calibrated, which is calibrated before the current ADC to be calibrated, is valid. And under the condition that the offset calibration value of the ADC to be calibrated which is calibrated before the current ADC to be calibrated is invalid, carrying out offset mismatch calibration on the ADC to be calibrated with the invalid offset calibration value. And under the condition that the offset calibration value of the ADC to be calibrated which is calibrated before the current ADC to be calibrated is valid, performing offset mismatch calibration on the next ADC to be calibrated.
Optionally, the calibrator further comprises:
a register module (not shown in the figure) is used for setting the identification word of the state identification register of the ADC to be calibrated after performing offset mismatch calibration as a target identification.
The verification module further comprises:
the second checking unit is configured to check whether the identifier of the status identifier register of the ADC to be calibrated, which is calibrated before the current ADC to be calibrated, is the target identifier, if not, the offset calibration value of the ADC to be calibrated, which is calibrated before the current ADC to be calibrated, is invalid, and if yes, the offset calibration value of the ADC to be calibrated, which is calibrated before the current ADC to be calibrated, is valid.
Optionally, the determining module 504 includes: and the first correction unit is used for correcting the initial offset calibration value by using the offset value deltaVO under the condition that the absolute value of the offset value deltaVO exceeds a calibration threshold value to obtain a corrected offset calibration value. And the second correction unit is used for correcting the offset value deltaVO according to the correction offset calibration value until the offset value deltaVO does not exceed the calibration threshold, and the ADC to be calibrated finishes calibration. And taking the corrected offset calibration value as the offset calibration value of the ADC to be calibrated under the condition that the ADC to be calibrated is calibrated, and taking the initial offset calibration value as the offset calibration value under the condition that the absolute value of the offset value deltaVO does not exceed a calibration threshold.
Optionally, the second correction unit includes: and the output unit is used for obtaining a first output signal and a second output signal under the calibration action of the correction offset calibration value of the first direct current signal and the second direct current signal. And an averaging unit for calculating an average value of a first average value CoDA of the first output signal and a second average value CoDB of the second output signal as a third average value. The correction unit is used for calculating the difference value between the third average value and the standard value, namely the corrected offset value deltaVO, and the standard value is an ideal value of the ADC to be calibrated under the action of a standard direct current signal.
Optionally, the first correction unit includes: and the conversion subunit is used for converting the initial offset calibration value stored in the register in the first state into the initial offset calibration value in the second state, and the first state corresponds to the second state.
And the correction subunit is used for carrying out difference on the initial offset calibration value of the second state and the offset value deltaVO to obtain a difference value as the correction offset calibration value.
Optionally, the first correction unit includes: and a conversion subunit for converting the offset value deltaVO in the second state into the offset value deltaVO in the first state.
And the correction subunit is used for making a difference between the initial offset calibration value stored in the register in the first state and the offset value deltaVO in the first state to obtain a difference value as the correction offset calibration value.
The calibrator provided in the embodiment of the present application can implement each process in the embodiment corresponding to the offset mismatch calibration method of the time-interleaved ADC, and in order to avoid repetition, the description is omitted here.
It should be noted that, the calibrator provided in the embodiment of the present application and the offset mismatch calibration method of the time-interleaved ADC provided in the embodiment of the present application are based on the same application concept, so the implementation of this embodiment may refer to the implementation of the foregoing offset mismatch calibration method of the time-interleaved ADC, and the repetition is omitted.
The embodiment of the present application further provides a calibration device, based on the same technical concept, for performing the above-mentioned offset mismatch calibration method of the time-interleaved ADC, and fig. 6 is a schematic structural diagram of a calibration device for implementing the embodiments of the present application, as shown in fig. 6. The calibration device may vary considerably in configuration or performance and may include one or more processors 601 and memory 602, where the memory 602 may store one or more stored applications or data. Wherein the memory 602 may be transient storage or persistent storage. The application programs stored in the memory 602 may include one or more modules (not shown), each of which may include a series of computer-executable instructions for use in an electronic device.
Still further, the processor 601 may be arranged to communicate with the memory 602 and execute a series of computer executable instructions in the memory 602 on an electronic device. The electronic device may also include one or more power supplies 603, one or more wired or wireless network interfaces 604, one or more input/output interfaces 605, and one or more keyboards 606.
In particular, in this embodiment, the calibration device includes a processor, a communication interface, a memory, and a communication bus. The processor, the communication interface and the memory complete communication with each other through the bus. And a memory for storing a computer program. The processor is used for executing the program stored in the memory and realizing the following method steps:
respectively calculating a first average value CoDA of a first output signal of the ADC to be calibrated under the action of a first direct current signal and a second average value CoDB of a second output signal of the ADC to be calibrated under the action of a second direct current signal in a sampling period;
calculating the mean value of the first mean value CoDA and the second mean value CoDB as a third mean value;
calculating the difference between the third average value and a standard value, wherein the difference is an offset value deltaVO, and the standard value is an ideal value of the ADC to be calibrated under the action of a standard direct current signal;
And determining an offset calibration value of the ADC to be calibrated according to the offset value deltaVO.
As can be seen from the technical solutions provided in the embodiments of the present application, a first average value CoDA of a first output signal of an ADC to be calibrated under the action of a first direct current signal and a second average value CoDB of a second output signal of the ADC to be calibrated under the action of a second direct current signal are calculated respectively. The average of the first average CoDA and the second average CoDB is obtained as a third average. And calculating the difference between the third average value and a standard value, wherein the difference is an offset value deltaVO, and the standard value is an ideal value of the ADC to be calibrated under the action of a standard direct current signal. And determining an offset calibration value of the ADC to be calibrated according to the offset value deltaVO. Therefore, when offset mismatch calibration is carried out, a direct current signal is input to the ADC to be calibrated, no extra standard alternating current signal is required to be applied to the ADC to be calibrated from the outside, the design requirement on the whole system is low, and the calibration accuracy is not influenced. In addition, the ADC to be calibrated outputs a standard value under the action of a standard direct current signal, the standard value is used as a standard value of the ADC to be calibrated, a reference channel is not required to be selected, and the problem that the ADC calibration failure rate is high and the ADC yield is affected due to process deviation when the reference channel is selected is avoided.
It will be apparent to those skilled in the art that embodiments of the present application may be provided as a method, apparatus, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
In one typical configuration, the electronic device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.
The memory may include volatile memory in a computer-readable medium, random Access Memory (RAM) and/or nonvolatile memory, etc., such as Read Only Memory (ROM) or flash memory (flashRAM). Memory is an example of computer-readable media.
Computer readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of storage media for a computer include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium, which can be used to store information that can be accessed by a computing device. Computer-readable media, as defined herein, does not include transitory computer-readable media (transshipment) such as modulated data signals and carrier waves.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises an element.
It will be apparent to those skilled in the art that embodiments of the present application may be provided as a method, apparatus, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The foregoing is merely exemplary of the present application and is not intended to limit the present application. Various modifications and changes may be made to the present application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc. which are within the spirit and principles of the present application are intended to be included within the scope of the claims of the present application.
Claims (18)
1. A method for offset mismatch calibration of a time interleaved ADC, the method comprising:
respectively calculating a first average value CoDA of a first output signal of the ADC to be calibrated under the action of a first direct current signal and a second average value CoDB of a second output signal of the ADC to be calibrated under the action of a second direct current signal in a sampling period;
Calculating the mean value of the first mean value CoDA and the second mean value CoDB as a third mean value;
calculating a difference value between the third average value and a standard value, wherein the standard value is an ideal value of the ADC to be calibrated under the action of a standard direct current signal, and the difference value is used as an offset value deltaVO;
determining an offset calibration value of the ADC to be calibrated according to the offset value deltaVO;
the first output signal and the second output signal are signals calibrated by an initial offset calibration value, and determining the offset calibration value of the ADC to be calibrated according to the offset value deltaVO includes:
when the absolute value of the offset value deltaVO exceeds a calibration threshold, correcting the initial offset calibration value by using the offset value deltaVO to obtain a corrected offset calibration value;
correcting the offset value deltaVO according to the corrected offset calibration value until the offset value deltaVO does not exceed the calibration threshold, and completing calibration of the ADC to be calibrated;
taking the corrected offset calibration value as the offset calibration value of the ADC to be calibrated under the condition that the ADC to be calibrated is calibrated;
and taking the initial offset calibration value as the offset calibration value in the case that the absolute value of the offset value deltaVO does not exceed a calibration threshold.
2. The method of claim 1, wherein the first direct current signal and the second direct current signal are each output by a built-in DAC.
3. The method of claim 2, wherein the standard dc signal is a first voltage value, the first dc signal is a second voltage value, and the second dc signal is a third voltage value;
a first difference between the absolute value of the second voltage value and the absolute value of the first voltage value is equal to a second difference between the absolute value of the third voltage value and the absolute value of the first voltage value.
4. The method according to claim 1, wherein calculating a first average CoDA of a first output signal of the ADC to be calibrated under the action of the first dc signal and a second average CoDB of a second output signal of the ADC to be calibrated under the action of the second dc signal, respectively, during the sampling period, comprises:
collecting at least part of first output signals of the ADC to be calibrated under the action of the first direct current signals in the sampling period, and calculating the ratio of the sum of signal values of the at least part of first output signals to the number of the at least part of first output signals to be the first average value CoDA;
And in the sampling period, collecting at least part of second output signals of the ADC to be calibrated under the second direct current signals, and calculating the ratio of the sum of signal values of the at least part of second output signals to the number of the at least part of second output signals to be the second average value CoDB.
5. The method of claim 1, wherein the number of ADCs to be calibrated is N, N being greater than or equal to 2, and wherein after the current ADC to be calibrated completes calibration, the method further comprises:
and checking the offset calibration value of the ADC to be calibrated which is calibrated before the current ADC to be calibrated.
6. The method of claim 5, wherein verifying the offset calibration value of the ADC to be calibrated that is calibrated before the current ADC to be calibrated comprises:
checking whether an offset calibration value of the ADC to be calibrated which is calibrated before the current ADC to be calibrated is valid;
under the condition that the offset calibration value of the ADC to be calibrated which is calibrated before the current ADC to be calibrated is invalid, carrying out offset mismatch calibration on the ADC to be calibrated with the invalid offset calibration value;
and under the condition that the offset calibration value of the ADC to be calibrated which is calibrated before the current ADC to be calibrated is valid, performing offset mismatch calibration on the next ADC to be calibrated.
7. The method of claim 6, wherein after the current ADC to be calibrated has completed calibration, the method further comprises:
setting an identification word of a state identification register of the ADC to be calibrated after performing offset mismatch calibration as a target identification;
the verifying whether the offset calibration value of the calibrated ADC completed before the current ADC to be calibrated is valid includes:
checking whether an identification word of a state identification register of the ADC to be calibrated which is calibrated before the current ADC to be calibrated is the target identification, if not, invalidating an offset calibration value of the ADC to be calibrated which is calibrated before the current ADC to be calibrated, and if so, enabling the offset calibration value of the ADC to be calibrated which is calibrated before the current ADC to be calibrated to be effective.
8. The method of claim 1, wherein said correcting said offset value deltaVO according to said corrected offset calibration value comprises:
the first direct current signal and the second direct current signal obtain a first output signal and a second output signal under the calibration action of the correction offset calibration value;
calculating the average value of a first average value CoDA of the first output signal and a second average value CoDB of the second output signal as a third average value;
And calculating the difference value between the third average value and the standard value, wherein the difference value is the corrected offset value deltaVO, and the standard value is an ideal value of the ADC to be calibrated under the action of a standard direct current signal.
9. The method of claim 1, wherein correcting the initial offset calibration value with the offset value deltaVO comprises:
converting an initial offset calibration value stored in a register in a first state into an initial offset calibration value in a second state, wherein the first state corresponds to the second state;
and performing difference on the initial offset calibration value of the second state and the offset value deltaVO to obtain a difference value as the corrected offset calibration value.
10. The method of claim 1, wherein correcting the initial offset calibration value with the offset value deltaVO comprises:
converting the offset value deltaVO of the second state into an offset value deltaVO of the first state,
and performing difference on the initial offset calibration value stored in the register in the first state and the offset value deltaVO in the first state to obtain a difference value as the corrected offset calibration value.
11. A calibrator, comprising:
the first average module is used for respectively calculating a first average value CoDA of a first output signal of the ADC to be calibrated under the action of a first direct current signal and a second average value CoDB of a second output signal of the ADC to be calibrated under the action of a second direct current signal in a sampling period;
a second average module, configured to calculate an average of the first average CoDA and the second average CoDB as a third average;
the calculating module is used for calculating the difference value between the third average value and a standard value, namely a deregulation value deltaVO, wherein the standard value is an ideal value of the ADC to be calibrated under the action of a standard direct current signal;
the determining module is used for determining the offset calibration value of the ADC to be calibrated according to the offset value deltaVO;
the determining module includes:
the first correction unit is used for correcting the initial offset calibration value by using the offset value deltaVO under the condition that the absolute value of the offset value deltaVO exceeds a calibration threshold value to obtain a corrected offset calibration value;
the second correcting unit is used for correcting the offset value deltaVO according to the correction offset calibration value until the offset value deltaVO does not exceed the calibration threshold, and the ADC to be calibrated finishes calibration;
Taking the corrected offset calibration value as the offset calibration value of the ADC to be calibrated under the condition that the ADC to be calibrated is calibrated;
and taking the initial offset calibration value as the offset calibration value in the case that the absolute value of the offset value deltaVO does not exceed a calibration threshold.
12. The calibrator of claim 11, wherein said first averaging module comprises:
the first average unit is used for collecting at least part of first output signals of the ADC to be calibrated under the action of the first direct current signals in the sampling period, and calculating the ratio of the sum of signal values of the at least part of first output signals to the number of the at least part of first output signals to be the first average value CoDA;
and the second average unit is used for collecting at least part of second output signals of the ADC to be calibrated under the second direct current signals in the sampling period, and calculating the ratio of the sum of the signal values of the at least part of second output signals to the number of the at least part of second output signals to be the second average value CoDB.
13. The calibrator according to claim 11, further comprising:
and the verification module is used for verifying the offset calibration value of the ADC to be calibrated which is calibrated before the current ADC to be calibrated.
14. The calibrator of claim 13, wherein the verification module comprises:
a first checking unit, configured to check whether an offset calibration value of the ADC to be calibrated, which is calibrated before the current ADC to be calibrated, is valid;
under the condition that the offset calibration value of the ADC to be calibrated which is calibrated before the current ADC to be calibrated is invalid, carrying out offset mismatch calibration on the ADC to be calibrated with the invalid offset calibration value;
and under the condition that the offset calibration value of the ADC to be calibrated which is calibrated before the current ADC to be calibrated is valid, performing offset mismatch calibration on the next ADC to be calibrated.
15. The calibrator according to claim 14, further comprising:
the register module is used for setting the identification word of the state identification register of the ADC to be calibrated after performing offset mismatch calibration as a target identification;
the verification module further comprises:
the second checking unit is configured to check whether the identifier of the status identifier register of the ADC to be calibrated, which is calibrated before the current ADC to be calibrated, is the target identifier, if not, the offset calibration value of the ADC to be calibrated, which is calibrated before the current ADC to be calibrated, is invalid, and if yes, the offset calibration value of the ADC to be calibrated, which is calibrated before the current ADC to be calibrated, is valid.
16. The calibrator according to claim 11, wherein the second correction unit comprises:
the output subunit is used for obtaining a first output signal and a second output signal under the calibration action of the correction offset calibration value of the first direct current signal and the second direct current signal;
an averaging subunit, configured to calculate, as a third average value, an average value of a first average value CoDA of the first output signal and a second average value CoDB of the second output signal;
and the correction subunit is used for calculating the difference value between the third average value and the standard value, namely the corrected offset value deltaVO, and the standard value is an ideal value of the ADC to be calibrated under the action of a standard direct current signal.
17. The calibrator of claim 11, wherein the first correction unit comprises:
a conversion subunit, configured to convert an initial offset calibration value stored in a register in a first state into an initial offset calibration value in a second state, where the first state corresponds to the second state;
and the correction subunit is used for carrying out difference on the initial offset calibration value of the second state and the offset value deltaVO to obtain a difference value as the correction offset calibration value.
18. The calibrator of claim 11, wherein the first correction unit comprises:
a conversion subunit, configured to convert the offset value deltaVO in the second state into an offset value deltaVO in the first state;
and the correction subunit is used for making a difference between the initial offset calibration value stored in the register in the first state and the offset value deltaVO in the first state to obtain a difference value as the correction offset calibration value.
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