CN113628574B - Display control method and device, display device and computer readable storage medium - Google Patents
Display control method and device, display device and computer readable storage medium Download PDFInfo
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0275—Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
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Abstract
The present disclosure relates to a display control method, apparatus, display apparatus, and computer-readable storage medium, the method including: determining the type of a picture to be displayed by the display panel; when the type is H2line, and the data signal chip of the display panel only outputs data signals to the ith row of pixels, and under the condition that the data signals of the (i+1) th row of pixels are obtained according to the data signals of the adjacent rows, the 1 st row and the 2 nd row of pixels in each 4 rows of pixels of the display panel are controlled to be simultaneously conducted to receive bright signals, and the 3 rd row and the 4 th row of pixels are simultaneously conducted to receive dark signals. According to the present disclosure, the 1 st and 2 nd row pixels are turned on simultaneously to receive a bright signal and the 3 rd and 4 th row pixels are turned on simultaneously to receive a dark signal in every 4 th row pixels of the display panel can be controlled. Therefore, in every 4 rows of pixels of the display panel, the 1 st row and the 2 nd row are bright, and the 3 rd row and the 4 th row are dark, so that the H2line picture is ensured to be displayed.
Description
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to a display control method, a display control apparatus, a display apparatus, and a computer-readable storage medium.
Background
In a display panel, particularly a large-sized display panel, the data lines need to extend a long distance, and as the data lines extend, the resistance from the data lines to the data signal chip increases gradually, and different resistances may cause the same data signal on one data line to generate different brightness. Since the data signal chip has limited capability, when transmitting data signals to a large number of data lines, it is difficult to adjust the data signals on each data line to cancel the influence of resistance change, which may cause a linear display abnormality in the screen, which may be called V-block.
To solve this problem, the data signal chip may be controlled to output data signals only to odd lines and not to even lines, the data signals of the even lines may be indirectly derived from the data signals of adjacent two odd lines, and the derived data signals may be input to the even lines through other elements. Accordingly, the data signal chip burden can be reduced so that part of the data signal chip capability can be used to adjust the output data signal to counteract the effects of the above-described resistance variations.
For a display panel, two types of pictures need to be displayed: an H1line screen and an H2line screen. When an H1line picture is displayed, a data signal chip is required to output a bright signal, on the basis, an odd line outputs a bright signal, and an even line outputs a dark signal; when the H2line picture is displayed, the data signal chip is required to circularly output bright and dark signals, and on the basis, the 1 st row and the 2 nd row in every 4 rows output bright signals, and the 3 rd row and the 4 th row output dark signals.
However, in the case of the above two pictures, there are some problems in reducing the chip load by adopting the foregoing method. For example, for an H1line screen, row 1 is turned on for a period of t1 to t2, and row 3 is turned on for a period of t2 to t3, and does not emit light. When the method is adopted, the signals of the first half period of the 2 nd row are determined according to the signals of the second half period of the 1 st row, the signals of the second half period are determined according to the signals of the first half period of the 3 rd row, however, the signals of the second half period of the 1 st row and the signals of the first half period of the 3 rd row are both bright signals, and dark signals cannot be obtained to be input into the 2 nd row on the basis of the bright signals.
To solve this problem, when the display panel is applied with the above method, if the H1line screen is detected to be displayed, the gate signals of the even lines are turned off, thereby ensuring that the even lines do not emit light. However, this adjustment is not suitable for H2line pictures because, in the case where the gate signals of even lines are turned off, neither line 2 nor line 4 emits light, which is inconsistent with the pictures required for H2line in which lines 1 and 2 emit light and lines 3 and 4 do not emit light.
Disclosure of Invention
The present disclosure provides a display control method, a display control apparatus, a display apparatus, and a computer-readable storage medium to solve the deficiencies in the related art.
According to a first aspect of an embodiment of the present disclosure, a display control method is provided, including: determining the type of a picture to be displayed by the display panel; when the type is H2line, and the data signal chip of the display panel only outputs data signals to the ith row of pixels, and under the condition that the data signals of the (i+1) th row of pixels are obtained according to the data signals of the adjacent rows, the 1 st row and the 2 nd row of pixels in each 4 rows of pixels of the display panel are controlled to be simultaneously conducted to receive bright signals, and the 3 rd row and the 4 th row of pixels are simultaneously conducted to receive dark signals.
In one embodiment, the determining the type of the display panel to display the picture includes: determining a pixel pattern of a picture to be displayed by the display panel; comparing a predetermined pixel arrangement list when the display panel displays an H2line picture with the pixel pattern; and determining the type as H2line when the similarity between the pixel list and the pixel pattern is greater than a similarity threshold.
In one embodiment, the determining the type of the display panel to display the picture further includes: collecting data input to a logic board; and determining the pixel pattern according to the data.
In one embodiment, the first period of pixel conduction for the 1 st and 2 nd rows is different from the second period of pixel conduction for the 3 rd and 4 th rows, the method further comprising: and controlling the data signal chip to output a bright signal in the first period and to output a dark signal in the second period.
In one embodiment, the bright signal is a data signal of gray level 255 and the dark signal is a data signal of gray level 0.
According to a second aspect of embodiments of the present disclosure, a display control apparatus is presented, comprising one or more processors configured to perform: determining the type of a picture to be displayed by the display panel; when the type is H2line, and the data signal chip of the display panel only outputs data signals to the ith row of pixels, and under the condition that the data signals of the (i+1) th row of pixels are obtained according to the data signals of the adjacent rows, the 1 st row and the 2 nd row of pixels in each 4 rows of pixels of the display panel are controlled to be simultaneously conducted to receive bright signals, and the 3 rd row and the 4 th row of pixels are simultaneously conducted to receive dark signals.
In one embodiment, the processor is configured to perform: determining a pixel pattern of a picture to be displayed by the display panel; comparing a predetermined pixel arrangement list when the display panel displays an H2line picture with the pixel pattern; and determining the type as H2line when the similarity between the pixel list and the pixel pattern is greater than a similarity threshold.
In one embodiment, the processor is further configured to perform: collecting data input to a logic board; and determining the pixel pattern according to the data.
In one embodiment, the first period of pixel conduction for the 1 st and 2 nd rows is different from the second period of pixel conduction for the 3 rd and 4 th rows, the processor is further configured to perform: and controlling the data signal chip to output a bright signal in the first period and to output a dark signal in the second period.
In one embodiment, the bright signal is a data signal of gray level 255 and the dark signal is a data signal of gray level 0.
According to a third aspect of the embodiments of the present disclosure, a display device is presented, comprising a display panel and a processor, and a memory for storing a computer program, wherein the above-mentioned method is implemented when the computer program is executed by the processor.
According to a fourth aspect of the embodiments of the present disclosure, a computer-readable storage medium is presented for storing a computer program, which, when executed by a processor, implements the steps of the above-described method.
According to the embodiment of the disclosure, in the case that the data signal chip outputs the data signal to only the ith row of pixels, and the data signal of the (i+1) th row of pixels is derived from the data signal of the adjacent row, the 1 st row and the 2 nd row of pixels are controlled to be simultaneously turned on to receive the light signal and the 3 rd row and the 4 th row of pixels are controlled to be simultaneously turned on to receive the dark signal in every 4 rows of pixels of the display panel.
And the data signal chip can be controlled to output signals, so that the bright signals are received when the 1 st row is conducted, and the dark signals are received when the 3 rd row is conducted. The signal of the 2 nd row is obtained from the signals of the 1 st and 3 rd rows, and the 2 nd row is conducted together with the 1 st row, so that the signal corresponding to the 2 nd row is obtained from the signal of the 1 st row only, is not affected by the signal of the 3 rd row, and is a bright signal. The signal of the 4 th row is derived from the signals of the 3 rd and 5 th rows, and since the 4 th row is turned on together with the 3 rd row, the signal corresponding to the 4 th row is derived from the signal of the 3 rd row only, is not affected by the signal of the 5 th row, and is also a dark signal. Therefore, in every 4 rows of pixels of the display panel, the 1 st row and the 2 nd row are bright, and the 3 rd row and the 4 th row are dark, so that the H2line picture is ensured to be displayed.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure.
Fig. 1 is a schematic flow chart of a display control method shown according to an embodiment of the present disclosure.
Fig. 2 is a diagram showing clock signals for displaying an H1line frame in the related art.
Fig. 3 is a schematic diagram of a clock signal displaying an H1line screen according to an embodiment of the present disclosure.
Fig. 4 is a schematic diagram of a clock signal displaying an H2line screen according to an embodiment of the present disclosure.
Fig. 5 is a schematic flow chart diagram illustrating another display control method according to an embodiment of the present disclosure.
Fig. 6 is a schematic flow chart diagram illustrating yet another display control method according to an embodiment of the present disclosure.
Fig. 7 is a schematic flow chart diagram illustrating yet another display control method according to an embodiment of the present disclosure.
Fig. 8 is a schematic block diagram of a display device shown according to an embodiment of the present disclosure.
Detailed Description
Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples are not representative of all implementations consistent with the present disclosure. Rather, they are merely examples of apparatus and methods consistent with some aspects of the present disclosure as detailed in the accompanying claims.
Fig. 1 is a schematic flow chart of a display control method shown according to an embodiment of the present disclosure. The display control method shown in the present embodiment may be applied to a display device in which a processor and a display panel may be provided, and the method may be executed by the processor. Wherein the display device includes, but is not limited to: electronic paper, mobile phone, tablet computer, television, notebook computer, digital photo frame, navigator and any other products or components with display function.
In one embodiment, one or more data signal chips may be disposed in the display panel, and each data signal chip may output data signals to a plurality of data lines. The display panel may further include one or more clock signal chips for outputting a clock signal to each row of pixels, wherein the clock signal may be used to control the gate in the pixels to turn on, for example, when the clock signal is high, the gate is turned on, and when the clock signal is low, the gate is turned off.
As shown in fig. 1, the display control method may include the steps of:
in step S101, the type of the screen to be displayed by the display panel is determined;
in step S102, when the type is H2line, and the data signal chip of the display panel outputs a data signal to only the ith row of pixels, and the data signal of the (i+1) th row of pixels is obtained according to the data signals of the adjacent rows, the 1 st row and the 2 nd row of pixels are controlled to be turned on simultaneously to receive a light signal, and the 3 rd row and the 4 th row of pixels are controlled to be turned on simultaneously to receive a dark signal in every 4 rows of pixels of the display panel.
It should be noted that, the display panel in the embodiment of the present disclosure may display either an H2line screen or an H1line screen, where H represents horizontal.
In one embodiment, the display panel may be a high resolution, high refresh rate display panel, for example, with a resolution of 8k and a refresh rate of 120Hz, where the panel has more pixels, a higher refresh rate, a higher number of output signals requiring a data signal chip, and a higher frequency of output signals, resulting in a heavier burden on the data signal chip.
In order to reduce the burden of the data signal chip, the data signal chip of the display panel outputs data signals only to the i-th row of pixels, and the data signals of the i+1-th row of pixels are obtained according to the data signals of the adjacent rows, wherein i is an integer greater than or equal to 1. Taking i as an odd number as an example, the data signal chip may output data signals only to odd lines, and the data signals of even lines may be derived from the data signals of adjacent odd lines. Since the display panel is generally displayed in a line scanning manner, the data signal chip does not need to output a corresponding data signal according to a picture to be displayed by the pixels of the even lines during the turn-on period of the even lines, so that the load of the data signal chip can be reduced, and the data signal output during the turn-on period of the odd lines can be adjusted by some algorithm through partial capability during the data signal output so as to offset the influence caused by the resistance change along with the extension of the data lines.
Fig. 2 is a diagram showing clock signals for displaying an H1line frame in the related art.
For example, as shown in fig. 2, when the data signal chip outputs the data signal in the above manner, the data signal chip always outputs a bright signal when displaying the H1line screen, for example, 255 in fig. 2 indicates a gray scale, and a signal of 255 gray scale can be always output.
In one embodiment, the bright signal is a data signal of gray level 255 and the dark signal is a data signal of gray level 0. Of course, signals with other gray scales may be output as bright signals, and signals with gray scales greater than the gray scale threshold (which may be set as required, for example, a value greater than 0) are optional.
Since the signal output by the clock signal is based on the line scan, the high level comes line by line. For example, as shown in fig. 2, for 4 rows of pixels, the 1 st row clock signal CLK1 goes high, the 2 nd row clock signal CLK2 goes high after a half period, the 3 rd row clock signal CLK3 goes high after a half period, and the 4 th row clock signal CLK4 goes high after a half period.
The data signal of the 2 nd row is obtained from the data signals of the 1 st row and the 3 rd row, for example, the data signal of the first half period of the 2 nd row is obtained from the signal of the second half period of the 1 st row, and the data signal of the second half period of the 2 nd row is obtained from the signal of the first half period of the 3 rd row.
Specifically, the manner of obtaining the 2 nd data signal may be set as needed, for example, a signal conversion function may be preset, and the 1 st and 3 rd data signals are input and output as the 2 nd data signal.
However, in general, when the 1 st line data signal and the 3 rd line data signal are both 255 gray scale signals, the 0 gray scale signal cannot be obtained from the 255 gray scale signals, that is, the 2 nd line signal cannot be made 0 gray scale dark signal.
Fig. 3 is a schematic diagram of a clock signal displaying an H1line screen according to an embodiment of the present disclosure.
As shown in fig. 3, in consideration of the problems existing in the related art, when it is determined that the display panel is to display the H1line picture, the gate signal of the i+1th row pixel may be turned off, in which case the clock signal of the i+1th row pixel is also turned off, for example, in the case where i is an odd number, the clock signal CLK2 of the 2 nd row and the clock signal CLK4 of the 4 th row are kept at low levels, that is, the 2 nd row and the 4 th row are not turned on, so that light is not emitted, and thus it is possible to ensure that the display panel is even dark when the odd number row is bright, and to ensure that the H1line picture is displayed.
Fig. 4 is a schematic diagram of a clock signal displaying an H2line screen according to an embodiment of the present disclosure.
In order to display the H2line screen, if the 2 nd line and the 4 th line are controlled to be non-conductive in the manner shown in fig. 3, the 2 nd line is not lighted, and thus the H2line screen cannot be displayed. As shown in fig. 4, in this embodiment, when the data signal chip outputs the data signal to the i-th row of pixels only, and the data signal of the i+1th row of pixels is derived from the data signal of the adjacent row, the 1 st row and the 2 nd row of pixels are controlled to be turned on simultaneously to receive the bright signal, and the 3 rd row and the 4 th row of pixels are controlled to be turned on simultaneously to receive the dark signal, in every 4 rows of pixels of the display panel.
In this case, the data signal output from the data signal chip may be different from that of fig. 3, for example, as shown in fig. 4, a 255-gradation signal is output when the 1 st row is on, and a 0-gradation signal is output when the 3 rd row is on.
Accordingly, the data signal chip can be controlled to output signals, so that the bright signals are received when the 1 st row is conducted, and the dark signals are received when the 3 rd row is conducted. The signal of the 2 nd row is obtained from the signals of the 1 st and 3 rd rows, and the 2 nd row is conducted together with the 1 st row, so that the signal corresponding to the 2 nd row is obtained only from the signal of the 1 st row, is not affected by the signal of the 3 rd row (because the 3 rd row is not conducted and has no signal), and is a bright signal. The signal of the 4 th row is derived from the signals of the 3 rd and 5 th rows, and since the 4 th row is turned on together with the 3 rd row, the signal corresponding to the 4 th row is derived from the signal of the 3 rd row only, is not affected by the signal of the 5 th row (since the 5 th row is not turned on without a signal), and is also a dark signal.
Therefore, in every 4 rows of pixels of the display panel, the 1 st row and the 2 nd row are bright, and the 3 rd row and the 4 th row are dark, so that the H2line picture is ensured to be displayed.
Fig. 5 is a schematic flow chart diagram illustrating another display control method according to an embodiment of the present disclosure. As shown in fig. 5, the determining the type of the display panel to display the picture includes:
in step S501, determining a pixel pattern of a picture to be displayed by the display panel;
in step S502, comparing a predetermined pixel arrangement list when the display panel displays an H2line screen with the pixel pattern;
in step S503, when the similarity between the pixel arrangement list and the pixel pattern is greater than a similarity threshold, the type is determined to be H2line.
In one embodiment, the detection unit may be set with a pixel as a minimum unit, for example, a pixel arrangement table when the display panel displays an H2line picture is predetermined as the detection unit, so as to determine whether the picture to be displayed by the subsequent real panel is H2line.
Before the display panel displays the picture, the pixel pattern of the picture to be displayed by the display panel can be determined first, and then compared with the pixel list, for example, gray scale can be compared, if the similarity between the pixel pattern and the pixel list is higher, for example, the similarity is greater than a similarity threshold (can be set according to the requirement, for example, the similarity is a percentage), and the picture to be displayed by the display panel can be determined to be an H2line picture.
The pixels corresponding to the pixel arrangement list may include all pixels in the display panel, or may include some pixels in the display panel, for example, pixels in a local area. In determining the pixel pattern, only the pixel pattern constituted by the pixels corresponding to the pixel arrangement table may be determined, for example, in the case where the pixels corresponding to the pixel arrangement table include all the pixels in the display panel, the pixel pattern constituted by all the pixels in the display panel may be determined, for example, in the case where the pixels corresponding to the pixel arrangement table include only the pixels in a certain region of the display panel, the pixel pattern constituted by the pixels in that region may be determined.
Fig. 6 is a schematic flow chart diagram illustrating yet another display control method according to an embodiment of the present disclosure. As shown in fig. 6, the determining the type of the display panel to display a picture further includes:
in step S601, data input to the logic board is collected;
in step S602, the pixel pattern is determined from the data.
In one embodiment, the logic board Tcon (may also be referred to as a timing controller) may receive a data signal from the digital signal chip and convert the data signal to a signal that may drive the display panel to display, for example, LVDS (Low-Voltage Differential Signaling, low voltage differential signaling).
Since the data input to the logic board can be equivalent to the data signal to a certain extent, by collecting the data input to the logic board, it can be determined how each pixel is to be controlled by the data signal chip to emit light according to the collected data, and for a plurality of pixels, a pixel pattern formed by a plurality of pixels can be determined.
Fig. 7 is a schematic flow chart diagram illustrating yet another display control method according to an embodiment of the present disclosure. As shown in fig. 7, the first period in which the 1 st and 2 nd rows of pixels are turned on is different from the second period in which the 3 rd and 4 th rows of pixels are turned on, and the method further includes:
in step S701, the data signal chip is controlled to output a bright signal in the first period and a dark signal in the second period.
In one embodiment, since the 1 st and 2 nd line pixels are simultaneously turned on in the first period and the 3 rd and 4 th line pixels are simultaneously turned on in the second period in every 4 th line pixels while H2line is displayed, and the 1 st and 2 nd line receiving light signals are required to emit light, the 3 rd and 4 th line receiving dark signals are required to output light signals to the 1 st and 2 nd lines in the first period and dark signals to the 3 rd and 4 th lines in the second period. If there is an overlapping period between the first period and the second period, the data signal chip will need to output both a bright signal and a dark signal during the overlapping period, and the implementation logic is relatively complex, which will increase the burden of the data signal chip.
The first period and the second period can be set to be different, on the basis of the first period and the second period, the data signal chip can be controlled to only output a light signal in the first period, only output a dark signal in the second period, on the basis of displaying an H2line picture, logic beneficial to simplifying the output signal is realized, and the burden of the data signal chip is reduced.
The present disclosure also provides an embodiment of a display control apparatus corresponding to the embodiment of the display control method described above.
The embodiment of the disclosure also provides a display control device. The display control apparatus in this embodiment may be applied to a display apparatus in which a processor and a display panel may be provided, and the method may be executed by the processor. Wherein the display device includes, but is not limited to: electronic paper, mobile phone, tablet computer, television, notebook computer, digital photo frame, navigator and any other products or components with display function.
In one embodiment, the display control apparatus includes one or more processors configured to perform: determining the type of a picture to be displayed by the display panel; when the type is H2line, and the data signal chip of the display panel only outputs data signals to the ith row of pixels, and under the condition that the data signals of the (i+1) th row of pixels are obtained according to the data signals of the adjacent rows, the 1 st row and the 2 nd row of pixels in each 4 rows of pixels of the display panel are controlled to be simultaneously conducted to receive bright signals, and the 3 rd row and the 4 th row of pixels are simultaneously conducted to receive dark signals.
In one embodiment, the processor is configured to perform: determining a pixel pattern of a picture to be displayed by the display panel; comparing a predetermined pixel arrangement list when the display panel displays an H2line picture with the pixel pattern; and determining the type as H2line when the similarity between the pixel list and the pixel pattern is greater than a similarity threshold.
In one embodiment, the processor is further configured to perform: collecting data input to a logic board; and determining the pixel pattern according to the data.
In one embodiment, the first period of pixel conduction for the 1 st and 2 nd rows is different from the second period of pixel conduction for the 3 rd and 4 th rows, the processor is further configured to perform: and controlling the data signal chip to output a bright signal in the first period and to output a dark signal in the second period.
In one embodiment, the bright signal is a data signal of gray level 255 and the dark signal is a data signal of gray level 0.
The embodiment of the disclosure also proposes a display device comprising a display panel and a processor, and a memory for storing a computer program, wherein the method of any of the embodiments described above is implemented when the computer program is executed by the processor.
Embodiments of the present disclosure also provide a computer readable storage medium storing a computer program which, when executed by a processor, implements the steps of the method of any of the embodiments described above.
Fig. 8 is a schematic block diagram of a display device 800, shown in accordance with an embodiment of the present disclosure. For example, the display apparatus 800 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, an exercise device, a personal digital assistant, or the like.
Referring to fig. 8, a display device 800 may include one or more of the following components: a processing component 802, a memory 804, a power component 806, a multimedia component 808, an audio component 810, an input/output (I/O) interface 812, a sensor component 814, and a communication component 816.
The processing component 802 generally controls overall operation of the display device 800, such as operations associated with display, telephone calls, data communications, camera operations, and recording operations. The processing component 802 may include one or more processors 820 to execute instructions to perform all or part of the steps of the methods described above. Further, the processing component 802 can include one or more modules that facilitate interactions between the processing component 802 and other components. For example, the processing component 802 can include a multimedia module to facilitate interaction between the multimedia component 808 and the processing component 802.
The memory 804 is configured to store various types of data to support operation at the display device 800. Examples of such data include instructions for any application or method operating on the display device 800, contact data, phonebook data, messages, pictures, video, and the like. The memory 804 may be implemented by any type or combination of volatile or nonvolatile memory devices such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disk.
The power supply component 806 provides power to the various components of the display device 800. The power supply components 806 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the display device 800.
The multimedia component 808 includes a screen between the display device 800 and the user that provides an output interface. In some embodiments, the screen may include a Liquid Crystal Display (LCD) and a Touch Panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from a user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensor may sense not only the boundary of a touch or slide action, but also the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 808 includes a front camera and/or a rear camera. When the display device 800 is in an operation mode, such as a photographing mode or a video mode, the front camera and/or the rear camera may receive external multimedia data. Each front camera and rear camera may be a fixed optical lens system or have focal length and optical zoom capabilities.
The audio component 810 is configured to output and/or input audio signals. For example, the audio component 810 includes a Microphone (MIC) configured to receive external audio signals when the display device 800 is in an operational mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signals may be further stored in the memory 804 or transmitted via the communication component 816. In some embodiments, audio component 810 further includes a speaker for outputting audio signals.
The I/O interface 812 provides an interface between the processing component 802 and peripheral interface modules, which may be a keyboard, click wheel, buttons, etc. These buttons may include, but are not limited to: homepage button, volume button, start button, and lock button.
The sensor assembly 814 includes one or more sensors for providing status assessment of various aspects of the display device 800. For example, the sensor assembly 814 may detect an on/off state of the display device 800, a relative positioning of the components, such as a display and keypad of the display device 800, the sensor assembly 814 may also detect a change in position of the display device 800 or a component of the display device 800, the presence or absence of a user's contact with the display device 800, an orientation or acceleration/deceleration of the display device 800, and a change in temperature of the display device 800. The sensor assembly 814 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor assembly 814 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 814 may also include an acceleration sensor, a gyroscopic sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.
The communication component 816 is configured to facilitate communication between the display apparatus 800 and other devices, either wired or wireless. The display device 800 may access a wireless network based on a communication standard, such as WiFi,2G or 3G,4G LTE, 5G NR, or a combination thereof. In one exemplary embodiment, the communication component 816 receives broadcast signals or broadcast related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, the communication component 816 further includes a Near Field Communication (NFC) module to facilitate short range communications. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID) technology, infrared data association (IrDA) technology, ultra Wideband (UWB) technology, bluetooth (BT) technology, and other technologies.
In an exemplary embodiment, the display apparatus 800 may be implemented by one or more Application Specific Integrated Circuits (ASICs), digital Signal Processors (DSPs), digital Signal Processing Devices (DSPDs), programmable Logic Devices (PLDs), field Programmable Gate Arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic elements for executing the methods described above.
In an exemplary embodiment, a non-transitory computer readable storage medium is also provided, such as memory 804 including instructions executable by processor 820 of display device 800 to perform the above-described method. For example, the non-transitory computer readable storage medium may be ROM, random Access Memory (RAM), CD-ROM, magnetic tape, floppy disk, optical data storage device, etc.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This disclosure is intended to cover any adaptations, uses, or adaptations of the disclosure following the general principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
It is to be understood that the present disclosure is not limited to the precise arrangements and instrumentalities shown in the drawings, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. The terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The foregoing has outlined the detailed description of the method and apparatus provided by the embodiments of the present disclosure, and the detailed description of the principles and embodiments of the present disclosure has been provided herein with the application of the specific examples, the above examples being provided only to facilitate the understanding of the method of the present disclosure and its core ideas; meanwhile, as one of ordinary skill in the art will have variations in the detailed description and the application scope in light of the ideas of the present disclosure, the present disclosure should not be construed as being limited to the above description.
Claims (8)
1. A display control method, characterized by comprising:
determining the type of a picture to be displayed by the display panel;
when the type is H2line, and the data signal chip of the display panel only outputs data signals to the ith row of pixels, and under the condition that the data signals of the (i+1) th row of pixels are obtained according to the data signals of the adjacent rows, controlling the 1 st row and the 2 nd row of pixels in each 4 rows of pixels of the display panel to be simultaneously conducted to receive bright signals, and enabling the 3 rd row and the 4 th row of pixels to be simultaneously conducted to receive dark signals; wherein,
the first period of pixel conduction for the 1 st and 2 nd rows is different from the second period of pixel conduction for the 3 rd and 4 th rows, the method further comprising:
controlling the data signal chip to output a bright signal in the first period and to output a dark signal in the second period;
wherein the determining the type of the display panel to display the picture comprises:
determining a pixel pattern of a picture to be displayed by the display panel;
comparing a predetermined pixel arrangement list when the display panel displays an H2line picture with the pixel pattern;
and determining the type as H2line when the similarity between the pixel list and the pixel pattern is greater than a similarity threshold.
2. The method of claim 1, wherein determining the type of display panel to display a picture further comprises:
collecting data input to a logic board;
and determining the pixel pattern according to the data.
3. The method according to any one of claims 1 to 2, wherein the bright signal is a data signal of gray level 255 and the dark signal is a data signal of gray level 0.
4. A display control apparatus comprising one or more processors configured to perform:
determining the type of a picture to be displayed by the display panel;
when the type is H2line, and the data signal chip of the display panel only outputs data signals to the ith row of pixels, and under the condition that the data signals of the (i+1) th row of pixels are obtained according to the data signals of the adjacent rows, controlling the 1 st row and the 2 nd row of pixels in each 4 rows of pixels of the display panel to be simultaneously conducted to receive bright signals, and enabling the 3 rd row and the 4 th row of pixels to be simultaneously conducted to receive dark signals; wherein,
the first period of row 1 and row 2 pixel conduction, unlike the second period of row 3 and row 4 pixel conduction, the processor is further configured to perform:
controlling the data signal chip to output a bright signal in the first period and to output a dark signal in the second period;
wherein the processor is configured to perform:
determining a pixel pattern of a picture to be displayed by the display panel;
comparing a predetermined pixel arrangement list when the display panel displays an H2line picture with the pixel pattern;
and determining the type as H2line when the similarity between the pixel list and the pixel pattern is greater than a similarity threshold.
5. The apparatus of claim 4, wherein the processor is further configured to perform:
collecting data input to a logic board;
and determining the pixel pattern according to the data.
6. The apparatus of any one of claims 4 to 5, wherein the bright signal is a data signal of gray level 255 and the dark signal is a data signal of gray level 0.
7. A display device comprising a display panel and a processor, and a memory for storing a computer program, wherein the computer program, when executed by the processor, implements the method of any of claims 1 to 3.
8. A computer readable storage medium storing a computer program, characterized in that the steps of the method of any one of claims 1 to 3 are implemented when the computer program is executed by a processor.
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