CN113613481A - Preparation method of low-trigger and low-capacitance value sheet type static suppressor - Google Patents
Preparation method of low-trigger and low-capacitance value sheet type static suppressor Download PDFInfo
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- CN113613481A CN113613481A CN202110899191.XA CN202110899191A CN113613481A CN 113613481 A CN113613481 A CN 113613481A CN 202110899191 A CN202110899191 A CN 202110899191A CN 113613481 A CN113613481 A CN 113613481A
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K9/00—Screening of apparatus or components against electric or magnetic fields
- H05K9/0067—Devices for protecting against damage from electrostatic discharge
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
Abstract
The invention discloses a preparation method of a low-trigger and low-capacitance value sheet type static suppressor, which comprises the following operation steps: the method is characterized in that a nano material preparation technology, a semiconductor material, a high polymer material and a PCB technology are combined, a functional material layer with a loose skeleton structure and semiconductor characteristics is printed at an electrode grooving part, a gap formed by a tip and the functional slurry for the loose skeleton structure exists in an electrode at the grooving part, the low-voltage characteristic is realized, and the electrode gap is prepared by laser precision cutting. According to the preparation method of the low-trigger low-capacitance value sheet type static suppressor, the electrode gap prepared by laser precision cutting is good in gap width consistency relative to an electrode prepared by a thick film printing process, the low capacitance value is realized by adopting a double-gap electrode design, the problem of ultra-small capacitance value is solved, and the higher density of an internal structure is realized by adopting a 3-layer laminated board design, so that the low-trigger low-capacitance value sheet type static suppressor has higher anti-seepage and moisture-resistant performances.
Description
Technical Field
The invention relates to the technical field of electrostatic protection, in particular to a preparation method of a low-trigger and low-capacitance value sheet type electrostatic suppressor.
Background
The static suppressor is a method for processing and manufacturing a sheet static suppressor, a static protector is suitable for resisting ESD and other voltage sudden change pulses, the device can protect 18 data channels at most and can resist 30kV peak pulses at most, the pin capacitance is only 10pF, and the device is very suitable for protecting high-speed or high-frequency (up to more than 200 MHz) data lines.
In the prior art, patent with publication number CN202011438369.2 discloses a static suppressor and a manufacturing method thereof, wherein a lower base layer with a pair of bottom electrodes and a pair of inner electrodes is obtained by etching a double-sided copper-clad plate according to a preset electrode pattern; the pair of inner electrodes are correspondingly connected and conducted with the pair of bottom electrodes through blind hole connecting layers respectively; an upper base layer; and an intermediate adhesive layer between the lower base layer and the upper base layer for adhering the lower base layer and the upper base layer; wherein: a groove with an opening facing the middle bonding layer is formed in the inner side of the upper base layer, a through hole is formed in the middle bonding layer, and the through hole is communicated with the groove to form a cavity in the static suppressor; firstly, in the ESD protection device, the interval deviation between the discharge electrodes is caused by directly printing the electrodes, and the ESD responsiveness is easy to change. In addition, although the ESD responsiveness needs to be adjusted by the area of the region where the discharge electrode faces, the adjustment is limited by the product size and the like, so that it is sometimes difficult to achieve the desired ESD responsiveness, which is not beneficial to people's use, and in the ESD protection device, because of thick film printing, each layer interface has certain defects, which affects the stability and reliability of the device, so that the requirement on material selection is high, a low trigger voltage is currently achieved through a narrow gap, which increases the risk of electric leakage, at present, high-speed data transmission has increasingly low requirements on the capacitance, the capacitance generated by the gap type electrode cannot meet the requirement of low capacitance, which brings certain adverse effects to people's use process, and therefore, we propose a method for preparing a low-trigger and low-capacitance sheet type electrostatic suppressor.
Disclosure of Invention
Technical problem to be solved
Aiming at the defects of the prior art, the invention provides a preparation method of a low-trigger low-capacitance value sheet type static suppressor, wherein electrode gaps prepared by laser precision cutting are good in gap width consistency relative to electrodes prepared by a thick film printing process, a double-gap electrode design is adopted, low capacitance value is realized, the problem of ultra-small capacitance value is solved, a 3-layer laminated board design is adopted, higher density of an internal structure is realized, higher anti-seepage and moisture-resistant performances are realized, and the problems in the background technology can be effectively solved.
(II) technical scheme
In order to achieve the purpose, the invention adopts the technical scheme that: a preparation method of a low-trigger and low-capacitance value sheet type static suppressor comprises the following operation steps:
s1: selecting slurry: the method is characterized in that a nano material preparation technology, a semiconductor material, a high polymer material and a PCB technology are combined, a functional material layer with a loose skeleton structure and semiconductor characteristics is printed at an electrode grooving part, and a gap formed by a tip and the functional slurry in the loose skeleton structure exists in an electrode at the grooving part, so that the low-voltage characteristic is realized;
s2: laser cutting: the electrode gap prepared by laser precision cutting is used for controlling the gap width, and the electrode prepared by the copper-clad plate is combined with the base material, so that the triggering performance of the device is ensured, and a convenient channel is provided for electronic transmission;
s3: double-slit design: the electrode is cut by adopting double slits, the cut slits are 12-15 mu m, the single slit process of the original product is replaced, the effective distance of the electrode is unchanged, the sum of the widths of the double slits is the width of the original single slit, and the capacitance is reduced by adopting the parallel capacitance design;
s4: and (3) a pressing process: the method comprises the steps of adopting a three-layer PCB laminating process, reserving a double-peak cutting electrode at the bottom, laminating a plate above a cutting part, reserving a through hole with the side length of 100-200 mu m at the middle layer part, adopting the laminating process to form a cavity above an electrode gap, printing slurry through a thick film printing process, filling the cavity under a vacuum condition, completely combining the cavity with the bottom electrode, drying at 150 ℃, evaporating a solvent to form a space at the top, wherein the reserved space part is used for buffering the static slurry under impact, then laminating a layer of PCB, adopting high-temperature laminating at 200 ℃ to increase the bonding force, discharging moisture in the PCB to improve the reliability of a device, realizing higher density of an internal structure, having higher anti-seepage and moisture-resistant performances, and simultaneously designing the middle layer cavity to provide a space for energy release for the anti-static slurry;
s5: electrode metallization: after the pressing is completed, the preset unit grids of the device are cut through a mechanical cutting or laser cutting mode to form small particles, end detection electrode metallization is achieved through end coating low-temperature curing slurry, then an electrode is formed through tin plating and nickel plating, the weight of the device is increased through an electroplating process, the risk of material throwing is reduced, a gap between the device body and a substrate is enlarged when the end electrode protrudes and is welded, the risk of electricity leakage is reduced, and the manufacturing is completed.
As a preferable technical solution, in the step S1, a method of combining a nanomaterial fabrication technology, a semiconductor material, a polymer material, and a PCB technology is adopted in the material preparation process.
As an optimal technical scheme, the width of the gap in the step S2 is controlled to be 12-15 um, and the sum of the widths of the double gaps is smaller than 30 um.
As an optimal technical scheme, the electrode is cut by adopting a double-slit design in the step S3, and the slit of the cutting is 12-15 um.
As a preferable technical solution, in the step S2, the device reduces the trigger voltage to the maximum extent to reduce the trigger voltage to 300V or less and the operating voltage to 2KV while ensuring no leakage of electricity, thereby achieving a good ESD responsiveness.
As a preferable technical scheme, a double-slit electrode design is adopted in the step S3 to achieve a low capacitance value, the problem of an ultra-small capacitance value is solved, and the capacitance value is reduced to 0.065-0.075 pf from the existing 0.15 pf.
As a preferred technical scheme, in the step S5, an end coating process is adopted for processing, an end electrode is metalized by using a low-temperature solidified silver paste, and an electroplating process is adopted for achieving end electrical polarization after the metallization.
As a preferable technical scheme, in the step S5, an electroplating process is adopted to realize electric polarization of the tip, so as to improve the material throwing rate, which is reduced from 7 per mill of the original material throwing rate to less than 3 per mill.
(III) advantageous effects
Compared with the prior art, the invention provides a preparation method of a low-trigger and low-capacitance value sheet type static suppressor, which has the following beneficial effects: the preparation method of the low-trigger low-capacitance value sheet type static suppressor comprises the steps of preparing electrode gaps by laser precision cutting, ensuring good gap width consistency relative to electrodes prepared by a thick film printing process, adopting a double-gap electrode design to realize low capacitance value, solving the problem of ultra-small capacitance value, adopting a 3-layer laminated board design to realize higher density of an internal structure and higher anti-seepage and moisture-proof performances, adopting a nano material preparation technology, combining a semiconductor material, a high polymer material and a PCB (printed circuit board) technology, printing a functional material layer with a loose skeleton structure and semiconductor characteristics at an electrode grooving part, enabling the electrode at the grooving part to have a gap formed by a tip and the functional slurry as a loose skeleton structure, realizing low voltage characteristics, preparing the electrode gaps by laser precision cutting, controlling the gap width, preparing the electrode by a copper-clad plate and combining the base material, the trigger performance of a device is ensured, a convenient channel is provided for electronic transmission, a double-slit cutting electrode is adopted, the cut slit is 12-15 mu m, the single slit process of the original product is replaced, the effective distance of the electrode is unchanged, the sum of the widths of the double slits is the original width of the single slit, the parallel capacitance design is adopted, the capacitance is reduced, a three-layer PCB pressing process is adopted, a double-slit cutting electrode is reserved at the bottom, a pressing plate above the cutting part is reserved at the middle layer part, a through hole with the side length of 100-200 mu m is reserved at the middle layer part, after a cavity is formed above the electrode slit by the pressing process, slurry is printed by a thick film printing process, the cavity is filled under the vacuum condition and is completely combined with the bottom electrode, drying is carried out at 150 ℃, a space is formed at the top after solvent is evaporated, the reserved space part is subjected to pressing impact by the electrostatic slurry to provide a buffer effect, then a layer of PCB is formed, the binding force is increased by adopting high-temperature pressing at 200 ℃, the moisture in the device is discharged, the reliability of the device is improved, the higher density of the internal structure is realized, the anti-seepage and moisture-resistant performances are higher, meanwhile, the design of the cavity of the middle layer provides a space for releasing energy for the antistatic slurry, after the pressing is finished, cutting preset unit grids of the device by a mechanical cutting or laser cutting mode to form small particles, realizing end measurement electrode metallization by end coating low-temperature curing slurry, and then, plating tin and nickel to form an electrode, increasing the weight of the device by an electroplating process, reducing the risk of material throwing, increasing a contact gap between the device body and a substrate when the terminal electrode is protruded and welded, reducing the risk of electric leakage, and completing the preparation.
Drawings
Fig. 1 is a schematic diagram of the overall structure of a method for manufacturing a low-trigger low-capacitance sheet-type electrostatic suppressor according to the present invention.
Detailed Description
The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings and the detailed description, but those skilled in the art will understand that the following described embodiments are some, not all, of the embodiments of the present invention, and are only used for illustrating the present invention, and should not be construed as limiting the scope of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention. The examples, in which specific conditions are not specified, were conducted under conventional conditions or conditions recommended by the manufacturer. The reagents or instruments used are not indicated by the manufacturer, and are all conventional products available commercially.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
As shown in fig. 1, a method for manufacturing a low-trigger low-capacitance sheet type electrostatic suppressor includes the following steps:
s1: selecting slurry: the method is characterized in that a nano material preparation technology, a semiconductor material, a high polymer material and a PCB technology are combined, a functional material layer with a loose skeleton structure and semiconductor characteristics is printed at an electrode grooving part, and a gap formed by a tip and the functional slurry in the loose skeleton structure exists in an electrode at the grooving part, so that the low-voltage characteristic is realized;
s2: laser cutting: the electrode gap prepared by laser precision cutting is used for controlling the gap width, and the electrode prepared by the copper-clad plate is combined with the base material, so that the triggering performance of the device is ensured, and a convenient channel is provided for electronic transmission;
s3: double-slit design: the electrode is cut by adopting double slits, the cut slits are 12-15 mu m, the single slit process of the original product is replaced, the effective distance of the electrode is unchanged, the sum of the widths of the double slits is the width of the original single slit, and the capacitance is reduced by adopting the parallel capacitance design;
s4: and (3) a pressing process: the method comprises the steps of adopting a three-layer PCB laminating process, reserving a double-peak cutting electrode at the bottom, laminating a plate above a cutting part, reserving a through hole with the side length of 100-200 mu m at the middle layer part, adopting the laminating process to form a cavity above an electrode gap, printing slurry through a thick film printing process, filling the cavity under a vacuum condition, completely combining the cavity with the bottom electrode, drying at 150 ℃, evaporating a solvent to form a space at the top, wherein the reserved space part is used for buffering the static slurry under impact, then laminating a layer of PCB, adopting high-temperature laminating at 200 ℃ to increase the bonding force, discharging moisture in the PCB to improve the reliability of a device, realizing higher density of an internal structure, having higher anti-seepage and moisture-resistant performances, and simultaneously designing the middle layer cavity to provide a space for energy release for the anti-static slurry;
s5: electrode metallization: after the pressing is completed, the preset unit grids of the device are cut through a mechanical cutting or laser cutting mode to form small particles, end detection electrode metallization is achieved through end coating low-temperature curing slurry, then an electrode is formed through tin plating and nickel plating, the weight of the device is increased through an electroplating process, the risk of material throwing is reduced, a gap between the device body and a substrate is enlarged when the end electrode protrudes and is welded, the risk of electricity leakage is reduced, and the manufacturing is completed.
Further, in the step S1, a method of combining a nano material preparation technology, a semiconductor material, a polymer material, and a PCB technology is adopted in the material preparation process.
Further, the width of the gap in the step S2 is controlled to be 12-15 um, and the sum of the width of the gap of the double gaps is less than 30 um.
Further, the electrode is cut by adopting a double-gap design in the step S3, and the gap of the cutting is 12-15 um.
Furthermore, in the step S2, on the basis of ensuring no leakage of electricity, the device reduces the trigger voltage to the maximum, so that the trigger voltage is reduced to 300V or less, and the operating voltage is reduced to 2KV, thereby achieving better ESD responsiveness.
Furthermore, a double-slit electrode design is adopted in the step S3 to realize a low capacitance value, the problem of an ultra-small capacitance value is solved, and the capacitance value is reduced to 0.065-0.075 pf from the existing 0.15 pf.
Further, in the step S5, an end coating process is adopted for processing, the end electrode is metalized by using a low-temperature solidified silver paste, and the end electrode is metalized by using an electroplating process after the metallization.
Furthermore, in the step S5, an electroplating process is adopted to realize electric polarization of the end, so that the material throwing rate is improved and is reduced to below 3 per mill from 7 per mill of the original material throwing rate.
The first embodiment is as follows:
the width of the slit in the step S2 is controlled to be 13um, and the sum of the slit widths of the double slits is 28 um.
And in the step S3, the electrode is cut by adopting a double-slit design, and the slit of the cutting is 13 um.
In the step S2, the device reduces the trigger voltage to the maximum extent on the basis of ensuring no electricity leakage, so that the trigger voltage is reduced to 280V, the action voltage is reduced to 2KV, and better ESD responsiveness is realized.
In the step S3, a double-slit electrode design is adopted to realize a low capacitance value, the problem of an ultra-small capacitance value is solved, and the capacitance value is reduced to 0.07pf from the existing 0.15 pf.
Example two:
the width of the slit in the step S2 is controlled to be 14um, and the sum of the slit widths of the double slits is 29 um.
And in the step S3, the electrode is cut by adopting a double-slit design, and the slit of the cutting is 14 um.
In the step S2, the device reduces the trigger voltage to the maximum extent on the basis of ensuring no electricity leakage, so that the trigger voltage is reduced to 290V, the action voltage is reduced to 2KV, and better ESD responsiveness is realized.
In the step S3, a double-slit electrode design is adopted to realize a low capacitance value, the problem of an ultra-small capacitance value is solved, and the capacitance value is reduced from the existing 0.15pf to 0.071 pf.
The working principle is as follows: the method is characterized in that a nano material preparation technology, a semiconductor material, a high polymer material and a PCB technology are combined, a functional material layer with a loose skeleton structure and semiconductor characteristics is printed at an electrode grooving part, a gap formed by a tip and a functional slurry in the loose skeleton structure exists in an electrode at the grooving part, low voltage characteristics are realized, the electrode gap prepared by laser precision cutting is used for controlling the gap width, the electrode prepared by a copper-clad plate is combined with a base material, the triggering performance of a device is ensured, a convenient channel is provided for electronic transmission, a double-gap cutting electrode is adopted, the cut gap is 12-15 mu m, the single-gap process of the original product is replaced, the effective distance of the electrode is unchanged, the sum of the double-gap widths is the original single-gap width, a parallel capacitor design is adopted, the capacitance is reduced, a three-layer PCB laminating process is adopted, and a double-peak cutting electrode is left at the bottom, the laminated board is arranged above a cutting part, a through hole with the side length of 100-200 mu m is reserved at the middle layer part, after a cavity is formed above an electrode gap by adopting a laminating process, slurry is printed by a thick film printing process, the cavity is filled under the vacuum condition and is completely combined with a bottom electrode, drying is carried out at 150 ℃, a space is formed at the top after a solvent is evaporated, the reserved space part is used for providing a buffer effect for the electrostatic slurry under impact, then a layer of PCB (printed circuit board) is laminated, the high-temperature laminating at 200 ℃ is adopted to increase the bonding force, the moisture in the device is discharged to improve the reliability of the device, the higher density of the internal structure is realized, the higher anti-seepage and moisture-resistant performances are realized, meanwhile, the design of the middle layer cavity is used for providing a space for energy release for the electrostatic slurry, and after the laminating is finished, the preset unit cells of the device are cut by a mechanical cutting or laser cutting mode, forming small particles, realizing end detection electrode metallization by end coating low-temperature curing slurry, then plating tin and nickel to form an electrode, increasing the weight of the device by an electroplating process, reducing the risk of material throwing, increasing the contact gap between the device body and the substrate when the end electrode is protruded and then welded, reducing the risk of electric leakage, and finishing the preparation.
It is noted that, herein, relational terms such as first and second (a, b, etc.) and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The foregoing shows and describes the general principles and broad features of the present invention and advantages thereof. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are described in the specification and illustrated only to illustrate the principle of the present invention, but that various changes and modifications may be made therein without departing from the spirit and scope of the present invention, which fall within the scope of the invention as claimed.
Claims (8)
1. A preparation method of a low-trigger and low-capacitance value sheet type static suppressor is characterized by comprising the following steps: the method comprises the following operation steps:
s1: selecting slurry: the method is characterized in that a nano material preparation technology, a semiconductor material, a high polymer material and a PCB technology are combined, a functional material layer with a loose skeleton structure and semiconductor characteristics is printed at an electrode grooving part, and a gap formed by a tip and the functional slurry in the loose skeleton structure exists in an electrode at the grooving part, so that the low-voltage characteristic is realized;
s2: laser cutting: the electrode gap prepared by laser precision cutting is used for controlling the gap width, and the electrode prepared by the copper-clad plate is combined with the base material, so that the triggering performance of the device is ensured, and a convenient channel is provided for electronic transmission;
s3: double-slit design: the electrode is cut by adopting double slits, the cut slits are 12-15 mu m, the single slit process of the original product is replaced, the effective distance of the electrode is unchanged, the sum of the widths of the double slits is the width of the original single slit, and the capacitance is reduced by adopting the parallel capacitance design;
s4: and (3) a pressing process: the method comprises the steps of adopting a three-layer PCB laminating process, reserving a double-peak cutting electrode at the bottom, laminating a plate above a cutting part, reserving a through hole with the side length of 100-200 mu m at the middle layer part, adopting the laminating process to form a cavity above an electrode gap, printing slurry through a thick film printing process, filling the cavity under a vacuum condition, completely combining the cavity with the bottom electrode, drying at 150 ℃, evaporating a solvent to form a space at the top, wherein the reserved space part is used for buffering the static slurry under impact, then laminating a layer of PCB, adopting high-temperature laminating at 200 ℃ to increase the bonding force, discharging moisture in the PCB to improve the reliability of a device, realizing higher density of an internal structure, having higher anti-seepage and moisture-resistant performances, and simultaneously designing the middle layer cavity to provide a space for energy release for the anti-static slurry;
s5: electrode metallization: after the pressing is completed, the preset unit grids of the device are cut through a mechanical cutting or laser cutting mode to form small particles, end detection electrode metallization is achieved through end coating low-temperature curing slurry, then an electrode is formed through tin plating and nickel plating, the weight of the device is increased through an electroplating process, the risk of material throwing is reduced, a gap between the device body and a substrate is enlarged when the end electrode protrudes and is welded, the risk of electricity leakage is reduced, and the manufacturing is completed.
2. The method for preparing a low trigger, low capacitance sheet static suppressor according to claim 1, wherein: in the step S1, a method of combining a nano material preparation technology, a semiconductor material, a polymer material, and a PCB technology is adopted in the material preparation process.
3. The method for preparing a low trigger, low capacitance sheet static suppressor according to claim 1, wherein: the width control of gap is 12~15um in the S2 step, and the gap width sum of two gaps is less than 30 um.
4. The method for preparing a low trigger, low capacitance sheet static suppressor according to claim 1, wherein: adopt the design of two gaps to cut the electrode in the S3 step, and the gap of cutting is 12~15 um.
5. The method for preparing a low trigger, low capacitance sheet static suppressor according to claim 1, wherein: and in the step S2, the device reduces the trigger voltage to the maximum extent on the basis of ensuring no electricity leakage, so that the trigger voltage is reduced to be less than 300V, the action voltage is reduced to be 2KV, and better ESD responsiveness is realized.
6. The method for preparing a low trigger, low capacitance sheet static suppressor according to claim 1, wherein: and in the step S3, a double-slit electrode design is adopted to realize a low capacitance value, the problem of an ultra-small capacitance value is solved, and the capacitance value is reduced to 0.065-0.075 pf from the existing 0.15 pf.
7. The method for preparing a low trigger, low capacitance sheet static suppressor according to claim 1, wherein: and in the step S5, an end coating process is adopted for processing, the end electrode is metalized by adopting low-temperature solidified silver paste, and the end electrode is metalized by adopting an electroplating process after the metallization.
8. The method for preparing a low trigger, low capacitance sheet static suppressor according to claim 1, wherein: and in the step S5, an electroplating process is adopted to realize electric polarization of the end, so that the material throwing rate is improved and is reduced to below 3 per mill from 7 per mill of the original material throwing rate.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5164880A (en) * | 1991-03-01 | 1992-11-17 | Polaroid Corporation | Electrostatic discharge protection device for a printed circuit board |
| US20080191834A1 (en) * | 2007-02-12 | 2008-08-14 | Sfi Electronics Technology Inc. | Ceramic material used for protection against electrical overstress and low-capacitance multilayer chip varistor using the same |
| CN102741948A (en) * | 2009-11-26 | 2012-10-17 | 釜屋电机株式会社 | Paste for electrostatic protection, electrostatic protection component, and method for producing same |
| US20150223369A1 (en) * | 2012-08-09 | 2015-08-06 | Tateyama Kagaku Industry Co., Ltd. | Electrostatic protection element and method for manufacturing same |
| CN112770614A (en) * | 2020-12-07 | 2021-05-07 | 深圳顺络电子股份有限公司 | Electrostatic suppressor and manufacturing method thereof |
-
2021
- 2021-08-06 CN CN202110899191.XA patent/CN113613481B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5164880A (en) * | 1991-03-01 | 1992-11-17 | Polaroid Corporation | Electrostatic discharge protection device for a printed circuit board |
| US20080191834A1 (en) * | 2007-02-12 | 2008-08-14 | Sfi Electronics Technology Inc. | Ceramic material used for protection against electrical overstress and low-capacitance multilayer chip varistor using the same |
| CN102741948A (en) * | 2009-11-26 | 2012-10-17 | 釜屋电机株式会社 | Paste for electrostatic protection, electrostatic protection component, and method for producing same |
| US20150223369A1 (en) * | 2012-08-09 | 2015-08-06 | Tateyama Kagaku Industry Co., Ltd. | Electrostatic protection element and method for manufacturing same |
| CN112770614A (en) * | 2020-12-07 | 2021-05-07 | 深圳顺络电子股份有限公司 | Electrostatic suppressor and manufacturing method thereof |
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