CN113613380B - Chip packaging structure, chip packaging method and optical computing equipment - Google Patents

Chip packaging structure, chip packaging method and optical computing equipment Download PDF

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Publication number
CN113613380B
CN113613380B CN202110713115.5A CN202110713115A CN113613380B CN 113613380 B CN113613380 B CN 113613380B CN 202110713115 A CN202110713115 A CN 202110713115A CN 113613380 B CN113613380 B CN 113613380B
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chip
photonic
circuit board
photonic chip
pressurizing
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CN113613380A (en
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薛志全
孟怀宇
沈亦晨
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Hangzhou Guangzhiyuan Technology Co ltd
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Hangzhou Guangzhiyuan Technology Co ltd
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0274Optical details, e.g. printed circuits comprising integral optical means
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06EOPTICAL COMPUTING DEVICES; COMPUTING DEVICES USING OTHER RADIATIONS WITH SIMILAR PROPERTIES
    • G06E3/00Devices not provided for in group G06E1/00, e.g. for processing analogue or hybrid data
    • G06E3/001Analogue devices in which mathematical operations are carried out with the aid of optical or electro-optical elements
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Mathematical Physics (AREA)
  • Nonlinear Science (AREA)
  • Optics & Photonics (AREA)
  • General Physics & Mathematics (AREA)
  • Led Device Packages (AREA)
  • Semiconductor Lasers (AREA)

Abstract

The embodiment of the application provides a chip packaging structure, a chip packaging method and optical computing equipment. Wherein, the structure includes: the photonic chip comprises a circuit board, a chip socket arranged on the circuit board and a photonic chip arranged on the chip socket; the chip socket comprises a plurality of elastic electric connectors, a first pressure piece and a second pressure piece; the first pressurizing piece and the second pressurizing piece are formed in a split mode; the elastic electric connecting pieces are positioned between the circuit board and the photonic chip which are oppositely arranged, and two ends of each elastic electric connecting piece are respectively in electric contact with the circuit board and the photonic chip; the first pressure piece is pressed on the edge area of the photonic chip, and the second pressure piece is pressed on the central area of the photonic chip, so that the elastic electric connection piece is in a compressed state. The technical scheme provided by the embodiment of the application can conveniently regulate and control favorable deformation conditions so as to achieve better optical coupling efficiency.

Description

Chip packaging structure, chip packaging method and optical computing equipment
Technical Field
The present disclosure relates to the field of semiconductor technologies, and in particular, to a chip package structure, a chip package method, and an optical computing device.
Background
Compared with a conventional electronic chip, the photonic chip is used for data transmission and processing by manipulating optical signals, and the photonic chip (or the optical chip) has advantages in high speed, low delay, low power consumption, and the like.
Typically, a photonic chip is packaged from a photonic bare chip and a light source (e.g., a compact laser) that provides an optical signal for the photonic bare chip. The coupling efficiency of coupling light emitted by a light source into a photonic die is a key factor that limits how much light enters the interior of the photonic die.
Disclosure of Invention
The embodiment of the application provides a chip packaging structure, a chip packaging method and optical computing equipment, which are used for solving the problem of low optical coupling efficiency caused by the deformation of a photonic chip caused by the pressing force of a chip socket on the photonic chip when the photonic chip is mounted on a circuit board by using the chip socket.
In one embodiment of the present application, a chip packaging structure is provided. The structure includes:
the photonic chip comprises a circuit board, a chip socket arranged on the circuit board and a photonic chip arranged on the chip socket;
the chip socket comprises a plurality of elastic electric connectors, a first pressure piece and a second pressure piece; the first pressurizing piece and the second pressurizing piece are formed in a split mode;
the elastic electric connecting pieces are positioned between the circuit board and the photonic chip which are oppositely arranged, and two ends of each elastic electric connecting piece are respectively in electric contact with the circuit board and the photonic chip;
the first pressure piece is pressed on the edge area of the photonic chip, and the second pressure piece is pressed on the central area of the photonic chip, so that the elastic electric connection piece is in a compressed state.
In another embodiment of the present application, a chip packaging method is provided. The method comprises the following steps:
electrically contacting a first end of each of a plurality of resilient electrical connectors of a chip socket to a circuit board;
disposing a photonic chip opposite the circuit board such that the plurality of elastic electrical connectors are positioned between the photonic chip and the circuit board and the photonic chip is in electrical contact with a second end of each of the plurality of elastic electrical connectors;
sequentially pressing the first pressing member on the edge region of the photonic chip and the second pressing member on the central region of the photonic chip so as to enable the elastic electric connection member to be in a compressed state;
wherein the first pressing member and the second pressing member are formed separately.
In yet another embodiment of the present application, a light computing device is provided. The light computing device includes: the above mentioned package structure.
According to the technical scheme provided by the embodiment of the application, the photonic chip is installed on the circuit board through the chip socket, and the photonic chip can be updated on the premise of not damaging the photonic chip and the circuit board. In addition, in order to solve the problem of low optical coupling efficiency caused by the deformation of the photonic chip caused by the pressing force of the chip socket on the photonic chip, the edge area and the central area of the photonic chip are respectively pressurized by adopting the first pressurizing part and the second pressurizing part which are formed in a split mode, so that the pressure of the first pressurizing part on the edge area of the photonic chip and the pressure of the second pressurizing part on the central area of the photonic chip can be respectively controlled, and the favorable deformation condition can be conveniently regulated and controlled, so that the better optical coupling efficiency can be achieved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
Fig. 1 is a schematic diagram of a chip package structure according to an embodiment of the present disclosure;
fig. 2 is a cross-sectional view of a portion of a chip package structure according to an embodiment of the present application;
fig. 3 is a schematic diagram of a first deformation of a photonic chip according to an embodiment of the present disclosure;
FIG. 4 is a second exemplary diagram of a photonic chip according to an embodiment of the present disclosure;
fig. 5 is a schematic diagram of a third deformation of a photonic chip according to an embodiment of the present application;
fig. 6 is a flowchart illustrating a chip packaging method according to another embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be described below clearly with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. "substantially" means within an acceptable error range, and a person skilled in the art can solve the technical problem within a certain error range to substantially achieve the technical effect.
Furthermore, the term "coupled" is intended to include any direct or indirect coupling. Thus, if a first device couples to a second device, that connection may be through a direct connection, or through an indirect connection via other devices.
It should be understood that the term "and/or" is used herein only to describe an association relationship of associated objects, and means that there may be three relationships, for example, a1 and/or B1, which may mean: a1 exists alone, A1 and B1 exist simultaneously, and B1 exists alone. In addition, the character "/" herein generally indicates that the former and latter associated objects are in an "or" relationship.
Some embodiments of the present application will be described in detail below with reference to the accompanying drawings. Various embodiments or examples and features of various embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
In a photonic chip, optical coupling efficiency is reduced due to micrometer-scale optical path displacement deviation.
In some cases, such as in a test scenario, it is desirable to use a chip socket to facilitate replacement of the chip without damaging the chip and the circuit board. Typically, photonic chips have many pins, often thousands of pins. If a socket is used to mount the photonic chip, elastic probes are required to contact the pins of the photonic chip under the photonic chip. In order to ensure that the elastic probes are in good contact, each elastic probe provides at least 20-25 g of force, and 1000 probes have 20-25 kg of force. That is, the chip socket may generate a large pressing force on the photonic chip, and under the pressing force, the photonic chip is likely to generate a deformation that causes a deviation of the optical path, thereby affecting the coupling efficiency.
For convenience of describing the inventive concept of the technical solution provided by the embodiment of the present application, a detailed description will be given below of a specific structure of a photonic chip according to the embodiment of the present application with reference to fig. 3. Generally, as shown in fig. 3, the photonic chip 200 includes a package substrate 5, and a photonic bare chip 6 and a light source assembly 20 mounted on the package substrate 5; the light source assembly 20 is used for providing an optical signal for the photonic bare chip 6.
The applicant finds out in the process of researching the technical scheme provided by the embodiment of the application that: if the chip socket only applies a pressing force (i.e., an edge pressure in fig. 3) to an edge region of the photonic chip, the photonic chip 200 will exhibit an upward-arching deformation, i.e., a convex deformation, as shown in fig. 3 under the elastic force of the elastic probes below the photonic chip. In this case, the light emitted from the light source assembly 20 in the photonic chip 200 is biased upward.
If the chip socket applies a pressing force to the edge area of the photonic chip 200 and then applies a pressing force to the central area of the photonic chip 200 (i.e., the central pressure in fig. 4 and 5), the convex-concave-convex-concave situation shown in fig. 4 and 5 occurs, and thus a wave shape with positive and negative curvature is generated.
Although fig. 3 appears to deform more or less than fig. 4 (or fig. 5), in practice the deformation of fig. 4 (or fig. 5) is much less than that of fig. 3.
The inventor finds out through research that: by adjusting the magnitude of the central pressure applied to the central region of the photonic chip 200 and the positions of the light source module 20 and the photonic bare chip 6 on the package substrate 5, the light beam upward deviation shown in fig. 4 and the light beam downward deviation shown in fig. 5 can occur. Note: the positions of the light source module 20 and the photonic bare chip 6 on the package substrate 5 in fig. 5 are on the left relative to the positions of the light source module 20 and the photonic bare chip 6 on the package substrate 5 in fig. 4. That is, the positions of the light source module 20 and the photonic bare chip 6 on the package substrate 5 and the central pressure corresponding to the critical points of the upward bias and the downward bias of the light can be found, so that the optical coupling efficiency can be ensured.
Fig. 1 shows a schematic diagram of a chip package structure according to an embodiment of the present application. Fig. 2 is a cross-sectional view illustrating a partial structure of a chip package structure according to an embodiment of the present application. As shown in fig. 1 and 2, the chip package structure includes: the circuit board 1, the chip socket 100 mounted on the circuit board 1 and the photonic chip 200 mounted on the chip socket 100; the chip socket 100 comprises a plurality of elastic electrical connectors 8, a first press member 3 and a second press member 2; the first pressure piece 3 and the second pressure piece 2 are formed in a split mode; the elastic electric connecting pieces 8 are positioned between the circuit board 1 and the photonic chip 200 which are oppositely arranged, and two ends of each elastic electric connecting piece 8 are respectively in electric contact with the circuit board 1 and the photonic chip 200; the first pressure member 3 presses the edge region of the photonic chip 200, and the second pressure member 2 presses the central region of the photonic chip 200, so that the elastic electrical connection members 8 are in a compressed state.
In practical applications, the Circuit board 1 may specifically include a printed Circuit board pcb (printed Circuit board).
In the present embodiment, the first pressing member 3 and the second pressing member 2 are not integrally molded but are separately molded. Thus, when the photonic chip 200 is packaged or mounted on the circuit board 1, the pressures of the first pressing member 3 on the edge area of the photonic chip 200 and the pressures of the second pressing member 2 on the center area of the photonic chip 200 can be respectively controlled, so that favorable deformation conditions can be conveniently regulated and controlled, and better optical coupling efficiency can be achieved.
Generally, as shown in fig. 3, the photonic chip 200 includes a package substrate 5, and a photonic bare chip 6 and a light source assembly 20 mounted on the package substrate 5; the light source assembly 20 is used for providing an optical signal for the photonic bare chip 6. Among them, the package substrate 5 can be a substrate with high rigidity and low thermal deformation rate, such as: a ceramic substrate.
In one example, light emitted by the light source module 20 can enter the photonic bare chip 6 directly.
In another example, the light emitted from the light source assembly 20 can be reflected by the turning mirror into the photonic bare chip 6, and specifically, as shown in fig. 3, the photonic chip 200 further includes the turning mirror 103; the turning mirror 103 is fixed on the photonic bare chip 6. In the present embodiment, the light emitted from the light source assembly 20 enters the photonic bare chip 6 after being reflected by the turning mirror 103.
In order to adjust the amount of the central pressure of the second pressing member 2 on the photonic chip 200, the above structure may further include a pressure adjusting member (not shown). The second pressurizing part 2 is connected with the circuit board 1 through the pressure adjusting part; the pressure adjusting part is used for adjusting the distance between the contact surface of the second pressurizing part 2, which is in contact with the central region of the photonic chip 200, and the circuit board 1; the smaller the distance between the contact surface and the circuit board 1 is, the greater the pressure of the second pressure member 2 on the central region of the photonic chip 200 is.
In specific implementation, the second pressurizing part 2 can be directly connected with the circuit board 1 through the pressure regulating part; alternatively, the second pressing member 2 may be indirectly connected to the circuit board 1 through a pressure adjusting member, as shown in fig. 1, the first pressing member 3 is connected to the circuit board 1, and the second pressing member 2 is connected to the first pressing member 3 through the pressure adjusting member.
In an embodiment, the pressure adjusting member may be a screw. Correspondingly, the second pressing member 2 may be provided with a screw hole 7 for matching with the screw; the first pressing member 3 is provided with a screw groove (not shown) for use with the screw; the screw is sequentially screwed into the screw hole 7 and the screw groove to realize the connection of the first pressurizing member 3 and the second pressurizing member 2.
In specific implementation, the top surface of the screw is provided with a rotating force application groove so as to apply force for rotating the screw around the axis of the screw to the screw. The relative feeding amount between the screw and the screw groove is adjusted by applying a force to the screw to rotate the screw about its axis, so that the adjustment of the distance between the contact surface of the second pressing member 2, which is in contact with the central region of the photonic chip 200, and the circuit board 1 is achieved.
The screw comprises a screw body and a screw cap arranged at one end of the screw body; the diameter of the screw hole is smaller than that of the screw cap and larger than that of the screw body, and the screw body can be in threaded connection with the screw groove after penetrating through the screw hole.
In consideration of the heat dissipation problem of the photonic bare chip 6, the second pressing member 2 may be pressed on the photonic bare chip 6 to dissipate the heat of the photonic bare chip 6. Specifically, the photonic bare chip 6 and the light source assembly 20 are located in the central region of the package substrate 5; the first pressurizing member 3 pressurizes the edge area of the package substrate 5; the second pressing member 2 presses the photonic bare chip 6. When the turning mirror 103 is disposed on the photonic bare chip 6, the second pressing member 2 avoids the turning mirror 103 and presses on the photonic bare chip 6, so as to avoid crushing the turning mirror 103.
In one example, as shown in fig. 1 and 2, the chip socket 100 further includes a mounting portion 9 in a ring-shaped configuration; a first opening end of the mounting portion 9 is fixed to the circuit board 1; the elastic electric connectors 8 are positioned in the hollow space surrounded by the mounting part 9; the first pressing member 3 is connected to a second opening end of the mounting part 9 to press an edge region of the photonic chip 200.
Wherein, the mounting part 9 can be fixedly connected on the circuit board through a second fastener. The second fastener may be a screw. The mounting portion 9 may serve as a positioning function when the photonic chip 200 is mounted.
Further, the first pressing member 3 has an annular structure; the first pressurizing part 3 comprises a pressurizing part and a fixing part which are integrally formed; the pressurizing part is positioned at the inner side of the fixing part; the fixing portion is connected to the mounting portion by a first fastening member (not shown) so that the pressing portion presses an edge region of the photonic chip 200. The first fastener may be a screw.
In one embodiment, the resilient electrical connector is a spring probe.
In one example, the circuit board 1 may be provided with a plurality of positioning conductive slots for fixing the spring probes, and the first ends of the plurality of spring probes may be inserted into the corresponding positioning conductive slots.
In another example, the chip socket may further include: a pinhole seat 4; a plurality of mounting holes are formed in the pinhole seat 4; the plurality of spring probes 8 are respectively mounted in the plurality of mounting holes.
In the technical scheme provided by the embodiment of the application, the pressing part of the socket is made into a split type, different forces are applied to the peripheral region and the central region of the photonic chip respectively, the deformation of the photonic chip can be adjusted to a certain degree, the photonic chip is adjusted to be in a proper deformation state, and better optical coupling efficiency is achieved. Force is independently applied to the central area, so that the controllability of the central pressure is improved, and the displacement of the light path is favorably adjusted; the middle area applies force to generate different concave-convex positions, so that different effects of upward deflection and downward deflection of the light path are generated, and therefore, the proper positions of the light source component and the photon bare chip on the packaging substrate can be found through experiments; the split type can compensate for tolerance problems due to the integrated type.
The packaging method of the chip package structure provided by the present application will be described with reference to fig. 6. As shown in fig. 6, the method includes:
601. and electrically contacting a first end of each of the plurality of resilient electrical connectors of the chip socket with the circuit board.
602. Disposing a photonic chip opposite the circuit board such that the plurality of elastic electrical connectors are positioned between the photonic chip and the circuit board and the photonic chip makes electrical contact with the second end of each of the plurality of elastic electrical connectors.
603. And sequentially pressing the first pressing member on the edge area of the photonic chip and pressing the second pressing member on the central area of the photonic chip so as to enable the elastic electric connector to be in a compressed state.
Wherein the first pressing member and the second pressing member are formed separately.
Optionally, in 603, "pressing the second pressing member on the central region of the photonic chip" may specifically be implemented by the following steps:
6031. and connecting the second pressurizing part with the circuit board by using a pressure regulating part.
6032. The distance between the contact surface of the second pressure piece, which is in contact with the central area of the photonic chip, and the circuit board is adjusted by adjusting the pressure adjusting piece.
The smaller the distance between the contact surface and the circuit board is, the greater the pressure of the second pressurizing piece on the central area of the photonic chip is.
In the 6032, in an example, the distance between the contact surface of the second pressing member, which is in contact with the central region of the photonic chip, and the circuit board may be adjusted to a preset distance by adjusting the pressure adjusting member. The preset distance may be determined according to a real or simulated experiment result in advance.
In another example, the pressure adjustment member can be adjusted gradually until the optical coupling efficiency of the photonic chip 200 reaches a predetermined requirement.
Optionally, in 603, "pressing the first pressing member on the edge region of the photonic chip" specifically includes:
and connecting the first pressure piece and the circuit board by using a first fastener so as to enable the first pressure piece to be pressed on the edge area of the photonic chip.
Optionally, the second pressurizing member and the circuit board are connected by a pressure adjusting member, including:
after the first pressurizing part is connected to the circuit board, the second pressurizing part and the first pressurizing part are connected by a pressure adjusting part.
Optionally, the chip socket further includes a mounting portion in an annular structure; the method further comprises the following steps:
604. and fixing the first opening end of the mounting part on the circuit board.
Correspondingly, in 601, "disposing the first end of each of the plurality of elastic electrical connectors of the chip socket on the circuit board" specifically includes:
6011. and in the hollow space surrounded by the mounting part, electrically contacting the first end of each elastic electric connecting piece in the plurality of elastic electric connecting pieces of the chip socket with the circuit board.
Optionally, the elastic electrical connector is a spring probe; the chip socket further includes: a pinhole seat; a plurality of mounting holes are formed in the pinhole seat;
the 6011 specifically comprises:
and S11, respectively installing a plurality of spring probes into the installation holes in the needle hole seat.
And S12, installing the pin hole seat provided with the spring probes in the hollowed-out space so as to enable the first end of each elastic electric connector in the elastic electric connectors to be in electric contact with the circuit board.
Optionally, the method further includes:
605. and installing the light source assembly and the photon bare chip at a preset position of the packaging substrate to obtain the photon chip.
The preset positions and the preset intervals in the above embodiments can be determined by the experimental results of real or simulation experiments.
It should be noted that: the specific structure of the chip package structure related to the package method provided in this embodiment may refer to the corresponding content in the above method embodiments, and is not described herein again.
The embodiment of the application also provides the optical computing equipment. The light computing device may include the chip package structure referred to in the embodiments described above.
Finally, it should be noted that: the above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.

Claims (12)

1. A chip package structure, comprising: the photonic chip comprises a circuit board, a chip socket arranged on the circuit board and a photonic chip arranged on the chip socket;
the chip socket comprises a plurality of elastic electric connectors, a first pressure piece and a second pressure piece; the first pressurizing piece and the second pressurizing piece are formed in a split mode;
the elastic electric connecting pieces are positioned between the circuit board and the photonic chip which are oppositely arranged, and two ends of each elastic electric connecting piece are respectively in electric contact with the circuit board and the photonic chip;
the first pressure piece is pressed on the edge area of the photonic chip, and the second pressure piece is pressed on the central area of the photonic chip, so that the elastic electric connection piece is in a compressed state.
2. The structure of claim 1, further comprising: a pressure regulating member;
the second pressurizing part is connected with the circuit board through the pressure adjusting part;
the pressure adjusting part is used for adjusting the distance between a contact surface of the second pressurizing part, which is in contact with the central region of the photonic chip, and the circuit board;
the smaller the distance between the contact surface and the circuit board is, the greater the pressure of the second pressure piece on the central area of the photonic chip is.
3. The structure of claim 2, wherein the first pressing member is attached to the circuit board;
the second pressurizing member is connected with the first pressurizing member through the pressure adjusting member.
4. A structure according to claim 3, wherein the second pressing member comprises a pressing plate; a bulge is arranged on one side, facing the photonic chip, of the pressing plate;
the end face of the bulge part far away from the pressing plate is in contact with the central area of the photonic chip;
the pressure regulating member connects the first pressing member and the pressing plate.
5. The structure of claim 3, wherein the pressure adjustment member comprises a screw;
the second pressurizing piece is provided with a screw hole used in cooperation with the screw;
the first pressurizing piece is provided with a screw groove used in cooperation with the screw;
the screw is sequentially screwed into the screw hole and the screw groove to realize the connection of the first pressurizing piece and the second pressurizing piece.
6. The structure of any one of claims 1 to 5, wherein the photonic chip comprises a package substrate and a photonic bare chip and a light source assembly mounted to the package substrate; the light source component is used for providing optical signals for the photon bare chip;
the photon bare chip and the light source assembly are positioned in the central area of the packaging substrate;
the first pressurizing member pressurizes the edge area of the packaging substrate;
the second pressurizing member pressurizes the photonic die.
7. The structure of any one of claims 1 to 5, wherein the chip socket further comprises a mounting portion in a ring-shaped configuration;
the first opening end of the mounting part is fixed on the circuit board;
the elastic electric connectors are positioned in a hollow space surrounded by the mounting part;
the first pressurizing piece is connected to the second opening end of the mounting portion so as to pressurize the edge area of the photonic chip.
8. The structure of claim 7, wherein the first press member is of annular configuration; the first pressurizing piece comprises a pressurizing part and a fixing part which are integrally formed; the pressurizing part is positioned at the inner side of the fixing part;
the fixing part is connected to the mounting part through a first fastener, so that the pressurizing part is pressurized at the edge area of the photonic chip.
9. A structure according to any one of claims 1 to 5, wherein the resilient electrical connection is a spring probe.
10. The structure of claim 9, wherein the chip socket further comprises: a pinhole seat;
a plurality of mounting holes are formed in the pinhole seat;
the spring probes are respectively installed in the installation holes.
11. A method of chip packaging, comprising:
electrically contacting a first end of each of a plurality of resilient electrical connectors of a chip socket to a circuit board;
disposing a photonic chip opposite the circuit board such that the plurality of elastic electrical connectors are positioned between the photonic chip and the circuit board and the photonic chip is in electrical contact with a second end of each of the plurality of elastic electrical connectors;
sequentially pressing a first pressing member on the edge area of the photonic chip and a second pressing member on the central area of the photonic chip so as to enable the elastic electric connection member to be in a compressed state;
wherein the first pressing member and the second pressing member are formed separately.
12. A light computing device comprising a chip packaging structure according to any one of claims 1 to 10.
CN202110713115.5A 2021-06-25 2021-06-25 Chip packaging structure, chip packaging method and optical computing equipment Active CN113613380B (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN207067461U (en) * 2017-07-25 2018-03-02 武汉福地科技有限公司 A kind of short pin active device for optical transport
CN209894923U (en) * 2019-04-12 2020-01-03 苏州联讯仪器有限公司 Reliability test system for laser chip
CN211826618U (en) * 2017-03-07 2020-10-30 康宁光电通信有限责任公司 Optical subassembly for converting data between optical and electrical formats

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN211826618U (en) * 2017-03-07 2020-10-30 康宁光电通信有限责任公司 Optical subassembly for converting data between optical and electrical formats
CN207067461U (en) * 2017-07-25 2018-03-02 武汉福地科技有限公司 A kind of short pin active device for optical transport
CN209894923U (en) * 2019-04-12 2020-01-03 苏州联讯仪器有限公司 Reliability test system for laser chip

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