CN113595946B - Compensation method and device for real pole of arbitrary left half plane - Google Patents
Compensation method and device for real pole of arbitrary left half plane Download PDFInfo
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Abstract
The invention provides a kind ofThe compensation method for the real pole of any left half plane comprises the following steps: acquiring an input signal; providing a forward equalizer having an input connected to the input signal, the forward equalizer having a frequency domain transfer function of H (ω) =e ‑jωτ ×[1+j2αsin(ωτ)]Where τ is the delay parameter, α is the gain parameter, ω is the angular frequency; adjusting parameters of the forward equalizer such that (2ατ) ‑1 ＝ω p ，ω p Angular frequency of real pole; outputting the balanced signal. The technical proposal uses the transmission function to the frequency domain as H (omega) =e ‑jωτ ×[1+j2αsin(ωτ)]Is provided with an input signal, and parameters of the forward equalizer are adjusted such that (2ατ) ‑1 ＝ω p And then the equalized signal is output through the output end of the forward equalizer, so that the real pole of any left half plane is compensated, the system has broadband characteristics, and meanwhile, the output signal is not distorted, and the high-speed and high-quality signal transmission can be supported.
Description
Technical Field
The invention relates to the field of high-speed digital signal communication, in particular to a compensation method and a device for an arbitrary left half plane real pole.
Background
The Non-Return-to-Zero (NRZ) encoded signal (Pulse Amplitude Modulation, PAM 4) corresponds to a single symbol duration of no more than 10ps and 20ps, respectively. So for an NRZ signal of 112Gbps, the channel response speed required to carry the signal is very fast when the single symbol duration is less than 10ps, so as to reach a transition time when the signal variation rises and falls of less than 5ps, and from the frequency domain point of view, the channel bandwidth is required to be at least 70GHz. Although PAM4 signals at the same rate have a wider single symbol duration than NRZ signals, since PAM4 is traded for a margin in time by a margin in amplitude, the signal level difference through PAM4 is reduced to one third of NRZ, but from a frequency domain point of view, the channel bandwidth required for PAM4 signals is not significantly lower than 70GHz. Accordingly, contemporary wired, or optoelectronic high-speed communication transmission channels are required to have broadband characteristics to support high-speed high-quality signal transmission.
Practical communication systems suffer from a variety of conditions that result in bandwidth reduction, with channel real poles due to resistance and capacitance being particularly common. Fig. 1 is a schematic diagram of the load resistance and parasitic capacitance of a signal amplifier in a prior art channel. As in figure 1A first terminal R1 of the resistor R is shown connected to the input terminal 1 and a second terminal R2 is connected to the circuit output terminal 2; the first terminal C1 of the capacitor C is connected to the second terminal R2 of the resistor R and to the circuit output terminal 2, and the second terminal C2 is connected to ground. The input voltage V of the input terminal 1 I The output voltage applied to the output terminal 2 via the resistor R and the capacitor C in the circuit is V O When the input voltage V I In the case of a sine wave of smaller frequency, the capacitor C is open, the input of the circuit is connected to the output via a resistor, the output voltage V O Is of an amplitude of approximately the input voltage V I When the amplitude of the input voltage V I When the sine wave with larger frequency is adopted, the capacitor C presents lower impedance, and the voltage division of the capacitor C is smaller, namely the output voltage V O The amplitude of (2) is small, the output voltage V of the circuit O Distortion. Fig. 2 is a schematic diagram of the amplitude-frequency characteristics of a prior art resistor-capacitor bandwidth limited channel. As shown in FIG. 2, the abscissa is the frequency f, and the ordinate is 20×log10|V O /V I The wideband channel 1 actually generates the RC bandwidth limited channel 2 under the influence of the resistance and capacitance in the circuit, and the bandwidth of the output channel is limited when the input signal is high frequency.
How to compensate for real poles to avoid bandwidth limitations in high speed communications is a technical problem that needs to be addressed.
Disclosure of Invention
The invention aims to solve the technical problem of providing a compensation method and a compensation device for an arbitrary left half plane real pole so as to avoid the problem of limited high-speed communication bandwidth.
In order to solve the above problems, the present invention provides a compensation method for an arbitrary left half-plane real pole, the method comprising: acquiring an input signal; providing a forward equalizer having an input connected to the input signal, the forward equalizer having a frequency domain transfer function of H (ω) =e -jωτ ×[1+j2αsin(ωτ)]Where τ is the delay parameter and α is the gain parameter; adjusting parameters of the forward equalizer such that (2ατ) -1 ＝ω p ，ω p Angular frequency of real pole; outputting the balanced signal.
Further, what is said isAngular frequency ω of the real pole p Omega is determined according to the resistance value of the load resistor and the capacitance value of the parasitic capacitor of the signal amplifier in the channel p =1/RC, where R is the resistance of the load resistor of the signal amplifier in the channel, and C is the capacitance of the parasitic capacitance of the signal amplifier in the channel.
Further, the forward equalizer includes: the input end of the first delay module is connected to the input end of the forward equalizer; the input end of the second delay module is connected to the output end of the first delay module; a first amplification/attenuation module having an input connected to the input of the forward equalizer; the input end of the second amplifying/attenuating module is connected to the output end of the second delay module; the signal adding operation module comprises: a first input connected to an output of the first amplification/attenuation module; the second input end is connected to the output end of the first delay module; a third input connected to the output of the second amplification/attenuation module; and an output end serving as an output end of the forward equalizer.
Further, the outputting the equalized signal includes adding the signals at the output ends of the first amplifying/attenuating module, the second amplifying/attenuating module, and the first delay module through the signal adding operation module, and outputting the equalized signal through the output end of the signal adding operation module.
Further, the forward equalizer further includes: and the input end of the third amplifying/attenuating module is connected to the output end of the first delay module, and the output end of the third amplifying/attenuating module is connected to the input end of the signal adding operation module.
In order to solve the above problems, the present invention provides a compensation device for an arbitrary left half plane real pole, the compensation device for an arbitrary left half plane real pole includes: a signal acquisition unit configured to acquire an input signal; a forward equalization unit with an input connected to the input signal and a frequency domain transfer function of H (ω) =e -jωτ ×[1+j2αsin(ωτ)]Where τ is the delay parameter and α is the gain parameter; an adjusting unit for adjusting the parameters of the forward balancing unit such that (2ατ) -1 ＝ω p The method comprises the steps of carrying out a first treatment on the surface of the And the output unit is used for outputting the balanced signal.
Further, the angular frequency omega of the real pole p Is determined according to the angular frequency of the input signal, the resistance value of the load resistor of the signal amplifier in the channel and the capacitance value of the parasitic capacitor, omega p =1/RC, where R is the resistance of the load resistor of the signal amplifier in the channel, and C is the capacitance of the parasitic capacitance of the signal amplifier in the channel.
Further, the forward balancing unit includes: the input end of the first delay module is connected to the input end of the forward balancing unit; the input end of the second delay module is connected to the output end of the first delay module; a first amplifying/attenuating module, the input end of which is connected to the input end of the forward balancing unit; the input end of the second amplifying/attenuating module is connected to the output end of the second delay module; the signal adding operation module comprises: a first input connected to an output of the first amplification/attenuation module; the second input end is connected to the output end of the first delay module; a third input connected to the output of the second amplification/attenuation module; and an output end serving as an output end of the forward equalizer.
Further, the outputting the equalized signal includes adding the signals at the output ends of the first amplifying/attenuating module, the second amplifying/attenuating module, and the first delay module through the signal adding operation module, and outputting the equalized signal through the output end of the signal adding operation module.
Further, the forward balancing unit further includes: the gain is 1, the input end of the first amplifying/attenuating module is connected to the output end of the first delay module, and the output end of the first amplifying/attenuating module is connected to the input end of the signal summation operation module.
The technical proposal utilizes the frequency domain transfer function as H (omega) =e -jωτ ×[1+j2αsin(ωτ)]Equalizing an input signal to a forward equalizer, adjusting parameters of the forward equalizer such that (2ατ) -1 ＝ω p And then the equalized signal is output through the output end of the forward equalizer, so that the real pole of any left half plane is compensated, the system has broadband characteristics, and meanwhile, the output signal is not distorted, and the high-speed and high-quality signal transmission can be supported.
Drawings
Fig. 1 is a schematic diagram of the load resistance and parasitic capacitance of a prior art signal amplifier in a channel.
FIG. 2 is a schematic diagram of the amplitude-frequency characteristics of a limited-bandwidth channel of a resistor-capacitor in the prior art.
Fig. 3 is a schematic diagram of a compensation method for an arbitrary left half-plane real pole according to an embodiment of the present invention.
Fig. 4 is a schematic structural diagram of a forward equalizer for arbitrary left half-plane real pole compensation according to an embodiment of the present invention.
Fig. 5 is a diagram illustrating a distortion signal eye of a resistor-capacitor circuit according to an embodiment of the present invention.
Fig. 6 is an eye diagram of a compensated recovered output signal according to an embodiment of the present invention.
Fig. 7 is a schematic structural diagram of a forward equalizer for arbitrary left half-plane real pole compensation according to an embodiment of the present invention.
Fig. 8 is a schematic diagram of a compensation device for an arbitrary left half-plane real pole according to an embodiment of the present invention.
Detailed Description
The following describes in detail the specific embodiments of the compensation method and the compensation device for the real pole of any left half plane provided by the invention with reference to the accompanying drawings.
Fig. 3 is a schematic diagram of a compensation method for an arbitrary left half-plane real pole according to an embodiment of the present invention. The compensation method for the real pole of any left half plane comprises the following steps: step S101, obtaining an input signal V I1 The method comprises the steps of carrying out a first treatment on the surface of the Step S102, a forward equalizer is provided, in this embodimentThe specific structure of the forward equalizer is shown in fig. 4, and will be described later, and the input terminal of the forward equalizer is connected to the input signal V I1 The frequency domain transfer function of the forward equalizer is H (ω) =e -jωτ ×[1+j2αsin(ωτ)]Where τ is the delay parameter, α is the gain parameter, ω is the angular frequency; step S103, adjusting parameters of the forward equalizer to make (2ατ) -1 ＝ω p The method comprises the steps of carrying out a first treatment on the surface of the Step S104, outputting the equalized signal V through the output end of the forward equalizer O1 。
Step S101, the input signal V is obtained I1 . In this embodiment the input signal V I1 Generated by a signal amplifier in the channel. The load resistor and the parasitic capacitance of the signal amplifier in the channel are shown in fig. 1, a first end R1 of the load resistor R is connected to the input end 1, and a second end R2 is connected to the circuit output end 2; the first terminal C1 of the parasitic capacitance C is connected to the second terminal R2 of the resistor R and to the circuit output terminal 2, and the second terminal C2 is connected to ground. The input voltage V of the input terminal 1 I The output voltage applied to the output terminal 2 via the load resistor R and parasitic capacitor C in the circuit is V O Output voltage V of load resistance and parasitic capacitance of signal amplifier in the channel O Input signal V as the compensation method for arbitrary left half-plane real pole I1 。
Step S102, providing a forward equalizer having an input terminal connected to the input signal V I1 The frequency domain transfer function of the forward equalizer is H (ω) =e -jωτ ×[1+j2αsin(ωτ)]Where τ is the delay parameter, α is the gain parameter, ω is the angular frequency. Fig. 4 is a schematic structural diagram of a forward equalizer for arbitrary left half-plane real pole compensation according to an embodiment of the present invention. As shown in fig. 4, the forward equalizer includes: the first delay module D1, the second delay module D2, the first amplifying/attenuating module A1, the second amplifying/attenuating module A2 and the signal adding operation module ADD. Setting the time delay of the first time delay module D1 and the second time delay module D2 as tau, setting the gain of the first amplifying/attenuating module A1 as alpha and setting the gain of the second amplifying/attenuating module A2 as alphaThe gain is-alpha. The input 11 of the first delay block D1 is connected to the input 1 of the forward equalizer for the input signal V I1 And performing delay operation with the delay amount of tau. An input end 21 of the second delay module D2 is connected to the output end 12 of the first delay module D1 to receive the delay signal V output by the first delay module D1 D1 And performing delay operation with delay amount of tau, and outputting signal V D2 . The input 31 of the first amplification/attenuation module A1 is connected to the input 1 of the forward equalizer for the input signal V I1 The amplitude of (2) is multiplied by a factor of alpha to produce an output signal V1. The input 41 of the second amplifying/attenuating module A2 is connected to the output 22 of the second delay module D2 for outputting the signal V to the second delay module D2 D2 And (3) performing signal processing operation of multiplying the amplitude of the signal by alpha times and reversing the signal positively and negatively, and outputting the output signal as V2. The signal addition operation module ADD includes: a first input 51, a second input 52, a third input 53, and an output 54. The first input 51 of the signal addition module ADD is connected to the output 32 of the first amplification/attenuation module A1. The second input 52 of the signal addition module ADD is connected to the output 12 of the first delay module D1. The third input 53 of the signal adding and operating module ADD is connected to the output 42 of the second amplifying/attenuating module A2, and the output 54 of the signal adding and operating module ADD serves as the output 2 of the forward equalizer.
Step S103, adjusting parameters of the forward equalizer to make (2ατ) -1 ＝ω p ，ω p Is the angular frequency of the real pole. Angular frequency of real pole omega p Omega is determined according to the resistance value of the load resistor and the capacitance value of the parasitic capacitor of the signal amplifier in the channel p =1/RC, where R is the resistance of the load resistor of the signal amplifier in the channel, and C is the capacitance of the parasitic capacitance of the signal amplifier in the channel. The reasoning process is as follows: when ωτ is much smaller than 1 in the frequency range of interest, the frequency domain transfer function of the forward equalizer is H (ω) =e -jωτ ×[1+j2αsin(ωτ)]Can be approximated as H (ω) ≡e -jωτ X (1+jω×2ατ), i.e. the real pole angular frequency ω p ＝(2ατ) -1 The ideal equalization system of the channel of (a) concatenates the transfer functions of a delay module with a delay tau. Therefore, in the frequency range meeting the condition that ωτ is far smaller than 1, one real pole angle frequency is (2ατ) -1 And the forward equalizer as described above, with a total effective time delay of tau.
The output balanced signal, in this embodiment, ADDs and processes the output signal V1 of the first amplifying/attenuating module A1, the output signal V2 of the second amplifying/attenuating module A2, and the output signal VD1 of the first delay module D1 by the signal adding and computing module ADD, and outputs the balanced output signal V O1 。
In the following, a simulation experiment is performed by taking a resistor r=35Ω, a capacitor c=1pf, an input signal period of 40ps, a delay τ=8ps, and a weight coefficient α=2.188 as examples. FIG. 5 is a diagram showing a distorted signal eye of a resistor-capacitor circuit according to an embodiment of the present invention, wherein the abscissa is time and the ordinate is output signal V O . FIG. 6 is an eye diagram of a compensated recovered output signal according to one embodiment of the present invention, with time on the abscissa and equalized output signal V on the ordinate O1 . The result of the simulation experiment can intuitively show that the eye pattern is clear due to the compensation effect.
The technical proposal adopts the technical proposal that the transmission function to the frequency domain is H (omega) =e -jωτ ×[1+j2αsin(ωτ)]Is provided with an input signal V having an angular frequency ω I1 Adjusting parameters of the forward equalizer so that (2ατ) -1 ＝ω p Namely 2ατ=rc, and the signal addition operation module ADD outputs the output signal V1 of the first amplifying/attenuating module A1, the output signal V2 of the second amplifying/attenuating module A2, and the output signal V of the first delay module D1 D1 Adding and processing, and outputting balanced output signal V O1 . According to the technical scheme, the parameters of the equalizer are adjusted after the resistance value R of the load resistor and the parasitic capacitance C are obtained, and any left half plane real pole can be compensated, so that a broadband system with the time delay of tau is achieved, the broadband system has broadband characteristics, meanwhile, output signals are not distorted, and high-speed and high-quality signal transmission can be supported.
Fig. 7 is a schematic structural diagram of a forward equalizer for arbitrary left half-plane real pole compensation according to an embodiment of the present invention. In this embodiment, the input of the forward equalizer is connected to the input signal V I1 The frequency domain transfer function of the forward equalizer is H (ω) =e -jωτ ×[1+j2αsin(ωτ)]Where τ is the delay parameter and α is the gain parameter. The forward equalizer includes: the first delay module D1, the second delay module D2, the first amplifying/attenuating module A1, the second amplifying/attenuating module A2, the third amplifying/attenuating module A3 and the signal adding operation module ADD. The time delay of the first time delay module D1 and the second time delay module D2 is set as tau, the gain of the first amplifying/attenuating module A1 is-alpha, and the gain of the second amplifying/attenuating module A2 is-alpha. The input 11 of the first delay block D1 is connected to the input 1 of the forward equalizer for the input signal V I1 And performing delay operation with the delay amount of tau. An input end 21 of the second delay module D2 is connected to the output end 12 of the first delay module D1 to receive the delay signal V output by the first delay module D1 D1 And performing delay operation with delay amount of tau, and outputting signal V D2 . The input terminal 31 of the first amplifying/attenuating module A1 is connected to the input terminal 1 of the forward equalizer, and performs a signal processing operation of multiplying the amplitude of the input signal VI1 by α, and the output signal is V1. The input end 41 of the second amplifying/attenuating module A2 is connected to the output end 22 of the second delay module D2, and performs a signal processing operation of multiplying the amplitude of the output signal VD2 of the second delay module D2 by α and inverting the amplitude of the output signal VD2 of the second delay module D2 to obtain an output signal V2. The input terminal 61 of the third amplifying/attenuating module A3 is connected to the output terminal 12 of the first delay module D1, and outputs the signal V to the first delay module D1 D1 The amplitude of the output signal is multiplied by 1 and subjected to signal processing operation of positive and negative inversion, and the output signal is V3. The signal addition operation module ADD includes: a first input 51, a second input 52, a third input 53, and an output 54. The first input 51 of the signal addition module ADD is connected to the output 32 of the first amplification/attenuation module A1. A second input 52 of the signal addition module ADD is connected toThe output 62 of the third amplification/attenuation module A3. The third input 53 of the signal adding and operating module ADD is connected to the output 42 of the second amplifying/attenuating module A2, and the output 54 of the signal adding and operating module ADD serves as the output 2 of the forward equalizer. The signal adding and calculating module ADD ADDs and processes the output signal V1 of the first amplifying/attenuating module A1, the output signal V2 of the second amplifying/attenuating module A2, and the output signal V3 of the third amplifying/attenuating module A3, and outputs the equalized output signal V O1 。
The technical proposal adopts the technical proposal that the transmission function to the frequency domain is H (omega) =e -jωτ ×[1+j2αsin(ωτ)]Is provided with an input signal V having an angular frequency ω I1 Adjusting parameters of the forward equalizer so that (2ατ) -1 ＝ω p Namely 2ωτ=rc, and the signal addition operation module ADD ADDs the output signal V1 of the first amplifying/attenuating module A1, the output signal V2 of the second amplifying/attenuating module A2, and the output signal V3 of the third amplifying/attenuating module A3 to output the equalized output signal V O1 . According to the technical scheme, the parameters of the equalizer are adjusted after the resistance value R of the load resistor and the parasitic capacitance C are obtained, and any left half plane real pole can be compensated, so that a broadband system with the time delay of tau is achieved, the broadband system has broadband characteristics, meanwhile, output signals are not distorted, and high-speed and high-quality signal transmission can be supported.
Fig. 8 is a schematic diagram of a compensation device for an arbitrary left half-plane real pole according to an embodiment of the present invention. The compensation device for the real pole of any left half plane comprises: a signal acquisition unit U1 for acquiring an input signal; a forward equalization unit U2, the input of which is connected to the input signal, the frequency domain transfer function of which is H (ω) =e -jωτ ×[1+j2αsin(ωτ)]Where τ is the delay parameter, α is the gain parameter, ω is the angular frequency; an adjusting unit U3 for adjusting the parameters of the forward balancing unit such that (2ατ) -1 ＝ω p ，ω p Angular frequency of real pole; and an output unit U4 for outputting the equalized signal.
The signal acquisition unit U1 is configured to acquire an input signal V I1 The input signal V I Is ω, in this embodiment the input signal V I1 Generated by a signal amplifier in the channel. The load resistor and parasitic capacitance of the signal amplifier in the channel are shown in fig. 1, a first end R1 of the load resistor R is connected to the input end 1, and a second end R2 is connected to the circuit output end 2; the first terminal C1 of the parasitic capacitance C is connected to the second terminal R2 of the resistor R and to the circuit output terminal 2, and the second terminal C2 is connected to ground. The input voltage V of the input terminal 1 I The output voltage applied to the output terminal 2 via the load resistor R and parasitic capacitor C in the circuit is V O Output voltage V of load resistance and parasitic capacitance of signal amplifier in the channel O Input signal V as the compensation method for arbitrary left half-plane real pole I1 。
Fig. 4 is a schematic structural diagram of a forward equalizer for arbitrary left half-plane real pole compensation according to an embodiment of the present invention. The input 1 of the forward equalizer is connected to an input signal V I1 The frequency domain transfer function of the forward equalizer is H (ω) =e -jωτ ×[1+j2αsin(ωτ)]Where τ is the delay parameter and α is the gain parameter. The forward equalizer includes: the first delay module D1, the second delay module D2, the first amplifying/attenuating module A1, the second amplifying/attenuating module A2 and the signal adding operation module ADD. The time delay of the first time delay module D1 and the second time delay module D2 is set as tau, the gain of the first amplifying/attenuating module A1 is-alpha, and the gain of the second amplifying/attenuating module A2 is-alpha. The input 11 of the first delay block D1 is connected to the input 1 of the forward equalizer for the input signal V I1 And performing delay operation with the delay amount of tau. An input end 21 of the second delay module D2 is connected to the output end 12 of the first delay module D1 to receive the delay signal V output by the first delay module D1 D1 And performing delay operation with delay amount of tau, and outputting signal V D2 . The input 31 of the first amplification/attenuation module A1 is connected to the input 1 of the forward equalizer, pair ofInput signal V I1 The amplitude of (2) is multiplied by a factor of alpha to produce an output signal V1. The input end 41 of the second amplifying/attenuating module A2 is connected to the output end 22 of the second delay module D2, and performs a signal processing operation of multiplying the amplitude of the output signal VD2 of the second delay module D2 by α and reversing the amplitude of the output signal VD2 to be V2. The signal addition operation module ADD includes: a first input 51, a second input 52, a third input 53, and an output 54. The first input 51 of the signal addition module ADD is connected to the output 32 of the first amplification/attenuation module A1. The second input 52 of the signal addition module ADD is connected to the output 12 of the first delay module D1. The third input 53 of the signal adding and operating module ADD is connected to the output 42 of the second amplifying/attenuating module A2, and the output 54 of the signal adding and operating module ADD serves as the output 2 of the forward equalizer.
An adjusting unit U3 adjusts the parameters of the forward equalizer such that (2ατ) -1 ＝ω p ，ω p Is the angular frequency of the real pole. Angular frequency of real pole omega p Omega is determined according to the resistance value of the load resistor and the capacitance value of the parasitic capacitor of the signal amplifier in the channel p =1/RC, where R is the resistance of the load resistor of the signal amplifier in the channel, and C is the capacitance of the parasitic capacitance of the signal amplifier in the channel. The reasoning process is as follows: when ωτ is much smaller than 1 in the frequency range of interest, the frequency domain transfer function of the forward equalizer is H (ω) =e -jωτ ×[1+j2αsin(ωτ)]Can be approximated as H (ω) ≡e -jωτ X (1+jω×2ατ), i.e. the real pole angular frequency is (2ατ) -1 The ideal equalization system of the channel of (a) concatenates the transfer functions of a delay module with a delay tau. Therefore, in the frequency range meeting the condition that ωτ is far smaller than 1, one real pole angle frequency is (2ατ) -1 The overall effect of the channel of (a) and the forward equalizer is a wideband system with a delay τ.
The output unit U4 outputs the equalized signal, and in this embodiment, the signal addition operation module ADD outputs the output signal V1 of the first amplifying/attenuating module A1 and the output signal V of the second amplifying/attenuating module A2 to the first amplifying/attenuating module A1Signal V2, output signal V of first delay module D1 D1 Adding and processing, and outputting balanced output signal V O1 。
In the following, a simulation experiment is performed by taking a resistor r=35Ω, a capacitor c=1pf, an input signal period of 40ps, a delay τ=8ps, and a weight coefficient α=2.188 as examples. FIG. 5 is a diagram showing a distorted signal eye of a resistor-capacitor circuit according to an embodiment of the present invention, wherein the abscissa is time and the ordinate is output signal V O . FIG. 6 is an eye diagram of a compensated recovered output signal according to one embodiment of the present invention, with time on the abscissa and equalized output signal V on the ordinate O1 . The result of the simulation experiment can intuitively show that the eye pattern is clear due to the compensation effect.
The technical proposal adopts the technical proposal that the transmission function to the frequency domain is H (omega) =e -jωτ ×[1+j2αsin(ωτ)]Is provided with an input signal V having an angular frequency ω I1 Adjusting parameters of the forward equalizer so that (2ατ) -1 By the signal addition operation module ADD, the output signal V1 of the first amplifying/attenuating module A1, the output signal V2 of the second amplifying/attenuating module A2, and the output signal V of the first delay module D1 are added to the signal of the second amplifying/attenuating module A1 D1 Adding and processing, and outputting balanced output signal V O1 . According to the technical scheme, the parameters of the equalizer are adjusted after the resistance value R of the load resistor and the parasitic capacitance C are obtained, and any left half plane real pole can be compensated, so that a broadband system with the time delay of tau is achieved, the broadband system has broadband characteristics, meanwhile, output signals are not distorted, and high-speed and high-quality signal transmission can be supported.
In other specific embodiments, the forward equalizer further includes a third amplifying/attenuating module, where a gain of the third amplifying/attenuating module is 1, an input end of the third amplifying/attenuating module is connected to an output end of the first delay module, and an output end of the third amplifying/attenuating module is connected to an input end of the signal adding operation module.
The foregoing is merely a preferred embodiment of the present invention and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present invention, which are intended to be comprehended within the scope of the present invention.
Claims (10)
1. A method of compensating for an arbitrary left half-plane real pole, comprising: acquiring an input signal;
providing a forward equalizer having an input connected to the input signal, the forward equalizer having a frequency domain transfer function of H (ω) =e -jωτ ×[1+j2αsin(ωτ)]Where τ is the delay parameter, α is the gain parameter, ω is the angular frequency;
adjusting parameters of the forward equalizer such that (2ατ) -1 ＝ω p ，ω p Angular frequency of real pole; outputting the balanced signal.
2. The method of compensating for an arbitrary left half-plane real pole as defined in claim 1, wherein the angular frequency ω of the real pole p Omega is determined according to the resistance value of the load resistor and the capacitance value of the parasitic capacitor of the signal amplifier in the channel p =1/RC, where R is the resistance of the load resistor of the signal amplifier in the channel, and C is the capacitance of the parasitic capacitance of the signal amplifier in the channel.
3. The method of compensating for any left half-plane real pole of claim 1 wherein the forward equalizer comprises:
the input end of the first delay module is connected to the input end of the forward equalizer;
the input end of the second delay module is connected to the output end of the first delay module;
a first amplification/attenuation module having an input connected to the input of the forward equalizer;
the input end of the second amplifying/attenuating module is connected to the output end of the second delay module;
a signal summation operation module comprising:
a first input connected to an output of the first amplification/attenuation module;
the second input end is connected to the output end of the first delay module;
a third input connected to the output of the second amplification/attenuation module;
and an output end serving as an output end of the forward equalizer.
4. The method for compensating for an arbitrary left half-plane real pole according to claim 3, wherein outputting the equalized signal includes adding signals at output ends of the first amplifying/attenuating module, the second amplifying/attenuating module, and the first delay module by the signal adding operation module, and outputting the equalized signal at an output end of the signal adding operation module.
5. The method of compensating for any left half-plane real pole of claim 3 wherein the forward equalizer further comprises: and the input end of the third amplifying/attenuating module is connected to the output end of the first delay module, and the output end of the third amplifying/attenuating module is connected to the input end of the signal adding operation module.
6. A compensation device for an arbitrary left half-plane real pole, comprising:
a signal acquisition unit configured to acquire an input signal;
a forward equalization unit with an input connected to the input signal and a frequency domain transfer function of H (ω) =e -jωτ ×[1+j2αsin(ωτ)]Where τ is the delay parameter, α is the gain parameter, ω is the angular frequency;
an adjusting unit for adjusting the parameters of the forward balancing unit such that (2ατ) -1 ＝ω p ，ω p Angular frequency of real pole;
and the output unit is used for outputting the balanced signal.
7. The compensation device for an arbitrary left half-plane real pole as claimed in claim 6, wherein the angular frequency ω of the real pole p Omega is determined according to the resistance value of the load resistor and the capacitance value of the parasitic capacitor of the signal amplifier in the channel p =1/RC, where R is the resistance of the load resistor of the signal amplifier in the channel, and C is the capacitance of the parasitic capacitance of the signal amplifier in the channel.
8. The compensation device for an arbitrary left half-plane real pole according to claim 6, characterized in that the forward balancing unit comprises:
the input end of the first delay module is connected to the input end of the forward balancing unit;
the input end of the second delay module is connected to the output end of the first delay module;
a first amplifying/attenuating module, the input end of which is connected to the input end of the forward balancing unit;
the input end of the second amplifying/attenuating module is connected to the output end of the second delay module;
a signal summation operation module comprising:
a first input connected to an output of the first amplification/attenuation module;
the second input end is connected to the output end of the first delay module;
a third input connected to the output of the second amplification/attenuation module;
and the output end is used as the output end of the forward balancing unit.
9. The compensation device for the real pole of any left half plane according to claim 8, wherein outputting the equalized signal comprises adding signals at the output ends of the first amplifying/attenuating module, the second amplifying/attenuating module, and the first delay module through the signal adding operation module, and outputting the equalized signal through the output end of the signal adding operation module.
10. The compensation device for an arbitrary left half-plane real pole of claim 8, wherein the forward balancing unit further comprises: and the input end of the third amplifying/attenuating module is connected to the output end of the first delay module, and the output end of the third amplifying/attenuating module is connected to the input end of the signal adding operation module.
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