CN113590202B

CN113590202B - Blood analyzer, data processing method thereof, and computer storage medium

Info

Publication number: CN113590202B
Application number: CN202010362639.XA
Authority: CN
Inventors: 李亮; 吴汶洋; 郑凯鹏
Original assignee: Shenzhen Dymind Biotechnology Co Ltd
Current assignee: Shenzhen Dymind Biotechnology Co Ltd
Priority date: 2020-04-30
Filing date: 2020-04-30
Publication date: 2022-10-14
Anticipated expiration: 2040-04-30
Also published as: CN113590202A

Abstract

The application discloses blood analyzer and data processing method, computer storage medium thereof, blood analyzer includes host computer, microcontroller and memory, and the memory is used for saving the time sequence package, and microcontroller is used for carrying out the time sequence file in the time sequence package to realize blood analysis, and the method includes: when the blood analyzer is started, the microcontroller receives a query instruction of the host based on the target identification information; the microcontroller acquires the current identification information of the memory based on the query instruction and sends the current identification information to the host computer so that the host computer judges whether the target identification information is the same as the current identification information; if not, the microcontroller receives the first time sequence packet sent by the host to update the second time sequence packet in the memory. By the mode, on one hand, the occupation of resources on the bus is reduced; on the other hand, the blood analyzer can execute a plurality of time sequence commands at the same time, a plurality of blood analysis items can be completed at the same time, and the running speed of the blood analyzer is increased.

Description

Blood analyzer, data processing method thereof, and computer storage medium

Technical Field

The present application relates to the field of medical equipment technology, and in particular, to a blood analyzer, a data processing method thereof, and a computer storage medium.

Background

The blood analyzer generally uses time sequence data to perform blood analysis, and generally, an MCU (micro controller Unit) in the blood analyzer issues specific driving instructions to components such as a syringe, a valve, and a pump according to the time sequence data, and the components such as the syringe, the valve, and the pump perform specific operations according to the driving instructions to complete the function of blood detection. The MCU cannot store a large amount of data due to limited storage resources, and therefore, only a small number of timing files can be stored when the timing files are stored.

The existing blood analyzer is developed rapidly, a plurality of detection channels are arranged on a common blood analyzer, a plurality of instructions may need to be operated at the same time to realize blood analysis of different channels, the MCU cannot meet the requirements, and a host needs to issue a plurality of time sequence files at the same time, so that a large number of bus resources are occupied, and the analysis efficiency is influenced.

Disclosure of Invention

In order to solve the above problems, the present application provides a blood analyzer, a data processing method thereof, and a computer storage medium, which on one hand reduce the resource occupation of a bus; on the other hand, the blood analyzer can execute a plurality of time sequence commands at the same time, complete the simultaneous execution of a plurality of blood analysis projects, improve the running speed of the blood analyzer and increase the working efficiency; and in the third aspect, the time sequence package updating is avoided when the computer is started every time, the data erasing times of the memory are effectively reduced, the service life of the memory is prolonged, and the operation efficiency is improved.

A technical solution adopted in the present application is to provide a data processing method of a blood analyzer, the blood analyzer includes a host, a microcontroller and a memory, the memory is used for storing a time sequence packet, the microcontroller is used for executing a time sequence file in the time sequence packet to realize blood analysis, the method includes: when the blood analyzer is started, the microcontroller receives a query instruction of the host based on the target identification information; the microcontroller acquires the current identification information of the memory based on the query instruction and sends the current identification information to the host computer so that the host computer judges whether the target identification information is the same as the current identification information; if not, the microcontroller receives the first timing packet sent by the host to update the second timing packet in the memory.

Wherein, microcontroller receives the first timing package that the host computer sent to carry out the renewal to the second timing package in the memory, includes: the method comprises the steps that a microcontroller receives a first time sequence packet sent by a host; the microcontroller stores the first time sequence packet to a memory; the microcontroller replaces the current identification information in the memory with the target identification information.

Before the microcontroller receives the first timing packet sent by the host, the method further includes: the microcontroller clears the second timing packet in memory.

Wherein, microcontroller receives the first timing package that the host computer sent to after carrying out the update to the second timing package in the memory, still includes: the microcontroller receives the query instruction of the host based on the target identification information again; the microcontroller acquires the current identification information of the memory based on the query instruction and sends the current identification information to the host computer so that the host computer judges whether the target identification information is the same as the current identification information of the memory; if not, the time sequence packet in the memory is updated again.

Wherein, when blood analysis appearance starts, microcontroller receives the inquiry instruction of host computer based on target identification information, still includes: when the blood analyzer is started, the microcontroller detects whether the blood analyzer is connected to the memory or not after being electrified; if yes, the microcontroller reads the time sequence packet information in the memory to determine whether the time sequence packet is stored in the memory; if yes, receiving a query instruction of the host based on the target identification information; if not, the information without the time sequence packet in the memory is sent to the host, so that the host sends the time sequence packet.

Wherein, the method also comprises: the microcontroller receives a calling instruction sent by a host; the microcontroller acquires a first time sequence from the memory based on the calling instruction; and executing the timing command in the first timing.

After the microcontroller acquires the first timing sequence from the memory based on the call instruction, the method further comprises the following steps: the microcontroller detects whether a second time sequence matched with the first time sequence is stored in the internal storage unit; if not, executing the time sequence command in the first time sequence; if yes, executing the timing command in the second timing.

Wherein, whether detect and store the second chronogenesis with first chronogenesis assorted in the internal memory cell, include: reading a first time sequence command and a first sequence number from a first time sequence and storing the first time sequence command and the first sequence number into an address space of an internal storage unit; reading a second timing command and a second sequence number from a second timing of the internal memory unit; judging whether the first sequence number is the same as the second sequence number; if the internal memory unit is the same as the first timing, a second timing sequence matched with the first timing sequence is confirmed in the internal memory unit, and a second timing sequence command is executed; if not, the internal storage unit is confirmed to have no second time sequence matched with the first time sequence, and then the first time sequence command is executed.

Another technical scheme adopted by the application is to provide a blood analyzer, which comprises a host, a microcontroller and a memory coupled with the microcontroller, wherein the memory is used for storing a time sequence packet, and the microcontroller is used for executing a time sequence file in the time sequence packet so as to realize blood analysis; wherein the host and/or the microcontroller comprises program data for implementing the method as provided in the above solution when executed by the host and/or the microcontroller.

Another technical solution adopted by the present application is to provide a computer storage medium for storing program data, which when executed by a host and/or a microcontroller, is used to implement the method provided in the above-mentioned solution.

The beneficial effect of this application is: in contrast to the prior art, the blood analyzer of the present application includes a host, a microcontroller and a memory, the memory is used for storing a timing packet, the microcontroller is used for executing a timing file in the timing packet to realize blood analysis, and the method includes: when the blood analyzer is started, the microcontroller receives a query instruction of the host based on the target identification information; the microcontroller acquires the current identification information of the memory based on the query instruction and sends the current identification information to the host computer so that the host computer judges whether the target identification information is the same as the current identification information; if not, the microcontroller receives the first time sequence packet sent by the host to update the second time sequence packet in the memory. Through the mode, on one hand, the time sequence packet is stored in the memory, the host does not need to send the time sequence file to the microcontroller, and only needs to send the calling instruction, so that the frequency of sending the time sequence file by the host is reduced, and the resource occupation of a bus is reduced; on the other hand, the time sequence packet is stored based on the memory, so that the microcontroller can call the commands in the time sequence files in the time sequence packet, the time sequence commands which need to be executed currently in the time sequence files can be stored and executed under the condition that the storage capacity of the microcontroller is limited, the blood analyzer can execute the time sequence commands at the same time, a plurality of blood analysis items are completed and executed at the same time, the running speed of the blood analyzer is improved, and the working efficiency is increased; in the third aspect, by the checking mode, the time sequence packet updating during each starting can be avoided, the data erasing frequency of the memory is effectively reduced, the service life of the memory is prolonged, and the operation efficiency is improved.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts. Wherein:

FIG. 1 is a schematic diagram of an embodiment of a blood analyzer provided herein;

FIG. 2 is a schematic flow chart diagram of a first embodiment of a data processing method provided in the present application;

FIG. 3 is a schematic flow chart diagram of a second embodiment of a data processing method provided in the present application;

FIG. 4 is a schematic flow chart diagram of a third embodiment of a data processing method provided by the present application;

FIG. 5 is a schematic flow chart diagram of a fourth embodiment of a data processing method provided in the present application;

FIG. 6 is a schematic flow chart diagram of a fifth embodiment of a data processing method provided by the present application;

FIG. 7 is a schematic flow chart diagram of a sixth embodiment of a data processing method provided by the present application;

FIG. 8 is a schematic flow chart diagram of a seventh embodiment of a data processing method according to the present application;

fig. 9 is a schematic flowchart of an eighth embodiment of a data processing method provided in the present application;

FIG. 10 is a schematic flow chart diagram of a ninth embodiment of a data processing method provided by the present application;

fig. 11 is a schematic flowchart of a fifth embodiment of a data processing method provided in the present application;

fig. 12 is a schematic flowchart of a tenth embodiment of a data processing method provided in the present application;

fig. 13 is a schematic flowchart of an eleventh embodiment of a data processing method provided in the present application;

FIG. 14 is a schematic flow chart diagram after step 137;

FIG. 15 is a schematic flow chart after step 138;

fig. 16 is a schematic flowchart of a twelfth embodiment of a data processing method provided in the present application;

fig. 17 is a schematic flow chart of a thirteenth embodiment of a data processing method provided in the present application;

FIG. 18 is a schematic diagram of an embodiment of a blood analyzer provided herein;

fig. 19 is a schematic structural diagram of a computer storage medium provided in the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the specific embodiments described herein are merely illustrative of the application and are not limiting of the application. It should be further noted that, for the convenience of description, only some of the structures associated with the present application are shown in the drawings, not all of them. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

The terms "first", "second", etc. in this application are used to distinguish between different objects and not to describe a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.

Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.

Referring to fig. 1, fig. 1 is a schematic structural diagram of an embodiment of a blood analyzer 10 provided in the present application, which includes a host 11, a microcontroller 12, and a memory 13.

The host 11 is connected to the microcontroller 12, and is configured to send a corresponding instruction to the microcontroller 12, so that the microcontroller 12 performs a relevant operation in response to the instruction.

The memory 13 is used for storing time-series contents.

The microcontroller 12 is connected to the memory 13 for invoking the corresponding timing sequence from the memory 13 based on the corresponding command when receiving the command sent by the host 11.

In some embodiments, the memory 13 may be an external memory, and may be connected to the micro control terminal in a pluggable manner; the memory 13 may be a built-in memory and electrically connected to the micro-control terminal. Wherein the memory 13 has a larger storage capacity than the internal memory unit of the microcontroller 12.

In some embodiments, after the start-up of the blood analyzer 10, the host 11 may issue control commands to the microcontroller 12 to cause the microcontroller 12 to invoke corresponding timing from the memory 13 in response to the control commands and to control various components of the blood analyzer, such as a syringe, a stirrer, etc., to perform the corresponding timing.

If the time sequence content in the memory 13 is divided into a time sequence block A, a time sequence block B and a time sequence block C, the host 11 issues a control command to the microcontroller 12 to execute the time sequence block A, the microcontroller 12 calls the time sequence block A from the memory 13 to find the time sequence block A and call the time sequence block A, and then corresponding parts are controlled to respond according to the content of the time sequence block A. If the content of the time sequence block a is "control the injector to inject 10 ml of reagent into the stirrer, control the stirrer to stir after the injector is reset, control the sampling to sample 5 ml of solution in the stirrer after the stirring is completed, and inject the solution into the reaction area", the microcontroller 12 controls the corresponding components to execute according to the content.

In some embodiments, the blood analyzer 10 generally adopts a scheme that the host issues a timing file to an MCU (micro controller Unit), and the MCU analyzes a timing command in the timing file to issue a specific driving command to components such as a syringe, a valve, and a pump, and the components such as the syringe, the valve, and the pump perform specific operations according to the driving command to complete the blood detection function. The blood analyzer is provided with a plurality of detection channels, and a plurality of instructions may need to be executed at the same time. If the existing communication mode is adopted, the host needs to issue a plurality of time sequences at the same time, a large amount of bus resources are occupied, and the speed is influenced. And when the components in the multiple groups of blood analyzers need to execute operation, the host needs to issue a plurality of time sequence files, because the storage space of the MCU is not enough. The plurality of time sequence files cannot be stored, other time sequence files exceeding the storage capacity are lost, normal detection cannot be carried out, and a host machine occupies a large amount of resources of a bus in the process of issuing the plurality of time sequence files to the MCU, so that the speed is influenced. The memory 13 is used to independently store the timing files, so that the number of times of issuing the timing files by the host is reduced, and the resource occupation of the bus is reduced.

Referring to fig. 2, fig. 2 is a schematic flowchart of a first embodiment of a data processing method provided in the present application, where the data processing method includes:

step 21: the microcontroller receives a query instruction of the host based on the target identification information.

When the blood analyzer is started, the host computer sends a query instruction to the microcontroller, and the microcontroller receives the query instruction of the host computer based on the target identification information.

Optionally, the host is connected to the microcontroller through a bus, and the host sends the query instruction to the bus. And the microcontroller confirms whether the data are matched after receiving the query instruction, so that corresponding data are acquired based on the query instruction.

Step 22: the microcontroller acquires the current identification information of the memory based on the query instruction and sends the current identification information to the host computer so that the host computer can judge whether the target identification information is the same as the current identification information.

And after receiving the query instruction, the microcontroller analyzes the query instruction to acquire key information in the query instruction, and performs the next operation according to the key information.

Optionally, the operation corresponding to the query instruction is to acquire current identification information of the memory.

Optionally, the identification information may be: a serial number of the memory, a version number of a timing packet in the memory, etc., without limitation.

In one embodiment, the identification information of the memory is an MD5 (Message Digest Algorithm MD 5) value calculated by a specific Algorithm from the time series file. After the host computer obtains the current identification information MD5 value of the memory, the current identification information MD5 value is compared with the target identification information MD5 value of the host computer, if the MD5 values are the same, the operations of other flows are performed, and if the MD5 values are not the same, step 23 is executed.

In particular, the MD5 value of a file is like a "digital fingerprint" of this file. The MD5 value of each file is different and if anyone makes any changes to the file, its MD5 value, i.e. the corresponding "digital fingerprint", changes. For example, the download server provides an MD5 value in advance for a file, and after the user finishes downloading the file, the MD5 value of the file is recalculated using a preset algorithm, and by comparing whether the two values are the same, it can be determined whether the downloaded file is erroneous, or whether the downloaded file is tampered.

In other embodiments, the identification information may be a value in other ways, but the identification information must be unique to ensure that the time series file of the memory is valid.

Step 23: the microcontroller receives a first timing packet sent by the host to update a second timing packet in the memory.

The first time sequence packet corresponds to the target identification information, and the second time sequence packet corresponds to the current identification information.

The timing package mentioned in the present embodiment includes a plurality of timing files, each of which includes a plurality of timing commands. Such as timing package, includes timing file A, B, C, D. The corresponding time sequence file A comprises time sequence commands a, B, C, D and the like, the corresponding time sequence file B comprises time sequence commands e, f, g, h and the like, the corresponding time sequence file C comprises time sequence commands i, j, k, l and the like, and the corresponding time sequence file D comprises time sequence commands m, n, o, p and the like.

In step 22, when the host determines that the target identification information is not the same as the current identification information of the memory, the host needs to perform a timing packet update operation. The microcontroller receives a first timing packet sent by the host to update a second timing packet in the memory.

After the updating is finished, the host can carry out time sequence calling, and the microcontroller responds to the calling instruction to obtain the time sequence command in the corresponding time sequence file from the memory, then executes the time sequence command and sequentially executes the time sequence command according to the sequence of the time sequence command in the time sequence file.

The memory is used for storing the time sequence packet, so that the microcontroller can call the commands in the plurality of time sequence files in the time sequence packet, the time sequence commands which need to be executed currently in the plurality of time sequence files can be stored under the condition that the storage capacity of the microcontroller is limited, and therefore the blood analyzer can execute the plurality of time sequence commands simultaneously. When the time sequence is executed, the host can also send a calling instruction according to specific requirements to enable the microcontroller to acquire and execute time sequence commands of other time sequence files in the time sequence packet.

Specifically, before the microcontroller starts to execute the timing command of the timing file in the timing packet and the execution of the timing command is not completed, the microcontroller may continue to acquire the timing command of another timing file in the timing packet from the memory in response to other call instructions of the host and start to execute, and so on, the timing commands of multiple timing files in the timing packet may be executed simultaneously.

Unlike the prior art, the blood analyzer of the present application includes a host, a microcontroller, and a memory, the memory is used for storing a timing packet, the microcontroller is used for executing a timing file in the timing packet to realize blood analysis, and the method includes: when the blood analyzer is started, the microcontroller receives a query instruction of the host based on the target identification information; the microcontroller acquires the current identification information of the memory based on the query instruction and sends the current identification information to the host computer so that the host computer judges whether the target identification information is the same as the current identification information; if not, the microcontroller receives the first time sequence packet sent by the host to update the second time sequence packet in the memory. Through the mode, on one hand, the time sequence packet is stored in the memory, the host does not need to send the time sequence file to the microcontroller, and only needs to send the calling instruction, so that the frequency of sending the time sequence file by the host is reduced, and the resource occupation of a bus is reduced; on the other hand, the time sequence packet is stored on the basis of the memory, so that the microcontroller can call the commands in the time sequence files in the time sequence packet, the time sequence commands which need to be executed currently in the time sequence files can be stored and executed under the condition that the storage capacity of the microcontroller is limited, the blood analyzer can execute the time sequence commands at the same time, a plurality of blood analysis projects can be completed and executed at the same time, the running speed of the blood analyzer is improved, and the working efficiency is increased; in the third aspect, by the checking mode, the time sequence package updating during each starting can be avoided, the data erasing frequency of the memory is effectively reduced, the service life of the memory is prolonged, and the operation efficiency is improved.

Referring to fig. 3, fig. 3 is a schematic flowchart of a second embodiment of a data processing method provided in the present application, where the data processing method includes:

step 31: the microcontroller receives a query instruction of the host based on the target identification information.

The receiving method is the same as or similar to that of the above embodiments, and is not described herein again.

Step 32: the microcontroller acquires the current identification information of the memory based on the query instruction and sends the current identification information to the host computer so that the host computer judges whether the target identification information is the same as the current identification information of the memory.

The determination method is the same or similar as that of the above embodiment, and is not described herein again.

When it is judged that the target identification information is not identical to the current identification information of the memory, step 33 is executed.

Step 33: the microcontroller receives a first timing packet sent by the host.

The microcontroller receives a first time sequence packet sent by the host, and the time sequence packet must be corresponding to the identification information, so that subsequent normal operation can be ensured.

Step 34: the microcontroller stores the first timing packet to a memory.

After the microcontroller receives the first time sequence packet, an address space is opened up in the memory, and the first time sequence packet is stored in the address space.

Step 35: the microcontroller replaces the current identification information in the memory with the target identification information.

After the microcontroller stores the first time sequence packet sent by the host in the memory, the current identification information of the memory is replaced by the identification information corresponding to the first time sequence packet sent by the host, namely the target identification information, so as to ensure the consistency of the files.

Step 36: the second timing packet in the memory is cleared.

After the memory stores the first time sequence packet and the target identification information, the second time sequence packet data needs to be cleared, and the memory space is released.

Referring to fig. 4, fig. 4 is a schematic flow chart of a third embodiment of a data processing method provided in the present application, where the method includes:

step 41: the microcontroller receives a query instruction of the host based on the target identification information.

Step 42: the microcontroller acquires the current identification information of the memory based on the query instruction and sends the current identification information to the host computer so that the host computer judges whether the target identification information is the same as the current identification information of the memory.

When it is judged that the target identification information is not identical to the current identification information of the memory, step 43 is performed.

Step 43: the microcontroller clears the second timing packet in memory.

When the host determines that the target identification information is not the same as the current identification information of the memory, the microcontroller needs to clear the second timing packet data, release the memory space, and then execute step 44.

And step 44: the microcontroller receives a first timing packet sent by the host.

The microcontroller receives a first time sequence packet sent by the host, wherein the first time sequence packet must correspond to the target identification information, so that subsequent normal operation can be ensured.

Step 45: the microcontroller stores the first timing packet to a memory.

Since the microcontroller has cleared the second timing packet from the memory before receiving the first timing packet, storing the first timing packet to the memory does not have to worry about the lack of storage space.

Step 46: the microcontroller replaces the current identification information in the memory with the target identification information.

Referring to fig. 5, fig. 5 is a schematic flow chart diagram of a fourth embodiment of a data processing method provided in the present application, where the method includes:

step 51: the microcontroller receives a query instruction of the host based on the target identification information.

Step 52: the microcontroller acquires the current identification information of the memory based on the query instruction and sends the current identification information to the host computer so that the host computer judges whether the target identification information is the same as the current identification information of the memory.

Steps 51-52 are the same or similar to the above embodiments and are not described herein.

Step 53: and if not, receiving the first time sequence packet sent by the host to update the second time sequence packet in the memory.

Step 53 may update the second timing packet by using the scheme of the foregoing embodiment, which is not described herein again.

When the update of the timing packet in the memory is completed, step 54 is performed.

Step 54: the microcontroller receives the query instruction of the host based on the target identification information again.

To verify whether the update is completed, the host sends again a query instruction based on the target identification information.

Step 55: the microcontroller acquires the current identification information of the memory based on the query instruction and sends the current identification information to the host computer so that the host computer judges whether the target identification information is the same as the current identification information of the memory.

If the determination result in step 55 is the same, go to step 57; if the determination result in step 55 is not the same, step 56 is executed.

Step 56: the timing packet in the memory is updated again.

The timing packet in the memory is updated again in the same manner as the updating manner in the above step, which is not described herein again. After the update, step 54 needs to be executed again, and the current identification information of the memory is obtained to perform the judgment based on the host query instruction.

And 57: other processes are performed.

And after the updating is finished and the verification is passed again, executing other processes to ensure normal operation.

In the embodiment, the updating accuracy of the time sequence packet is ensured by checking the time sequence packet and checking the time sequence packet after updating, so that the normal operation of the blood analyzer is ensured, on one hand, the time sequence packet is stored in the memory, the time sequence file is not required to be sent to the microcontroller by the host, and only the call instruction is required to be sent, so that the frequency of sending the time sequence file by the host is reduced, and the resource occupation of a bus is reduced; on the other hand, the time sequence packet is stored on the basis of the memory, so that the microcontroller can call the commands in the time sequence files in the time sequence packet, the time sequence commands which need to be executed currently in the time sequence files can be stored and executed under the condition that the storage capacity of the microcontroller is limited, the blood analyzer can execute the time sequence commands at the same time, a plurality of blood analysis projects can be completed and executed at the same time, the running speed of the blood analyzer is improved, and the working efficiency is increased; in the third aspect, by the checking mode, the time sequence packet updating during each starting can be avoided, the data erasing frequency of the memory is effectively reduced, the service life of the memory is prolonged, and the operation efficiency is improved.

Referring to fig. 6, fig. 6 is a schematic flow chart of a fifth embodiment of the data processing method provided in the present application, where the method includes:

step 61: and the microcontroller receives a calling instruction sent by the host.

The host computer is started up for self-checking, and after the host computer is normally started, a calling instruction is sent to the microcontroller.

Optionally, the host is connected to the microcontroller through a bus, and the host sends the call instruction to the bus. And the microcontroller confirms whether the data are matched or not after receiving the calling instruction, so that corresponding data are acquired based on the calling instruction.

Optionally, before the microcontroller receives the call instruction sent by the host, the timing packet in the memory passes the verification, so as to ensure the accuracy of the timing packet data, where the verification method is the same as or similar to that in the above embodiments, and is not described herein again.

Step 62: the microcontroller retrieves a timing file from memory based on the call instruction.

And after receiving the call instruction, the microcontroller analyzes the instruction, acquires key information in the instruction and performs the next operation according to the key information.

Optionally, the operation corresponding to the call instruction is to execute a timing command.

Timing refers to the set of control instructions that fix the flow of execution. The temporal correlation of these control commands is the timing of a Central Processing Unit (CPU). Alternatively, the timing packet data may be a series of pulse signals having a time sequence.

And step 63: the timing commands in the timing file are executed.

And after the microcontroller acquires the time sequence packet command, executing the time sequence command, and executing in sequence according to the content of the time sequence packet. Specifically, the microcontroller acquires a timing command in a timing file from a memory; the acquired time sequence command is a single command corresponding to the time sequence file, and the microcontroller stores the time sequence command to an internal storage unit of the microcontroller; and the microcontroller executes the time sequence command, continues to acquire the next time sequence command of the time sequence file from the memory after the current time sequence command is executed, and executes the next time sequence command according to the operation.

Specifically, before the microcontroller starts to execute the timing command of the timing file in the timing packet and the execution of the timing command is not completed, the microcontroller may continue to respond to other call instructions of the host to acquire the timing command of another timing file in the timing packet from the memory and start to execute, and so on, the timing commands of multiple timing files in the timing packet may be executed simultaneously.

Different from the prior art, the data processing method of the application comprises the following steps: the microcontroller receives a calling instruction sent by a host; the microcontroller acquires a time sequence file from a memory based on a calling instruction; the timing commands in the timing file are executed. Through the mode, on one hand, the time sequence packet is stored in the memory, the host does not need to send the time sequence file to the microcontroller, and only needs to send the calling instruction, so that the frequency of sending the time sequence file by the host is reduced, and the resource occupation of a bus is reduced; on the other hand, the time sequence packet is stored based on the memory, so that the microcontroller can call commands in a plurality of time sequence files in the time sequence packet, the time sequence commands which need to be executed currently in the plurality of time sequence files can be stored and executed under the condition that the storage capacity of the microcontroller is limited, the blood analyzer can execute the plurality of time sequence commands simultaneously, a plurality of blood analysis items are completed and executed simultaneously, the running speed of the blood analyzer is improved, and the working efficiency is increased.

Referring to fig. 7, fig. 7 is a schematic flowchart of a sixth embodiment of a data processing method provided in the present application, where the method includes:

step 71: the host sends a query instruction based on the target identification information to the microcontroller so that the microcontroller acquires the current identification information of the memory.

The blood analyzer carries out self-checking after being started, and after the blood analyzer is normally started, the host computer sends a query instruction to the microcontroller.

And after receiving the query instruction based on the target identification information, the microcontroller acquires the current identification information from the memory and provides the current identification information for the host.

Step 72: and acquiring current identification information sent by the microcontroller, and judging whether the target identification information is the same as the current identification information of the memory.

If the determination result in step 72 is not the same, step 73 is executed; if the results in step 72 are the same, other processes of the hematology analyzer are performed, such as calling the time series file in the time series package and commands in the time series file.

Step 73: the host sends the first timing packet to the microcontroller so that the microcontroller updates the second timing packet in the memory.

Optionally, after the second timing packet of the microcontroller is updated, the host sends the query instruction again, and determines whether the update is completed or not by determining the identification information, and if not, the update needs to be performed again.

After the update is confirmed, the remaining processes of the blood analyzer may be performed, such as calling the timing file in the timing package and the timing command in the timing file.

In contrast to the prior art, the data processing method of the present application includes: the host sends a query instruction based on the target identification information to the microcontroller so that the microcontroller acquires the current identification information of the memory; acquiring current identification information sent by a microcontroller, and judging whether target identification information is the same as the current identification information of a memory; if not, the host sends the first time sequence packet to the microcontroller so that the microcontroller updates the second time sequence packet in the memory. Compared with the prior art that the internal storage unit of the microcontroller can only store two time sequence files generally, through the mode, on one hand, the time sequence packet is stored in the memory, the time sequence file is not required to be sent to the microcontroller by the host, and only the call instruction is required to be sent, so that the frequency of sending the time sequence file by the host is reduced, and the resource occupation of a bus is reduced; on the other hand, the time sequence packet is stored based on the memory, so that the microcontroller can call the commands in the time sequence files in the time sequence packet, the time sequence commands which need to be executed currently in the time sequence files can be stored and executed under the condition that the storage capacity of the microcontroller is limited, the blood analyzer can execute the time sequence commands at the same time, a plurality of blood analysis items are completed and executed at the same time, the running speed of the blood analyzer is improved, and the working efficiency is increased; in the third aspect, by the checking mode, the time sequence packet updating during each starting can be avoided, the data erasing frequency of the memory is effectively reduced, the service life of the memory is prolonged, and the operation efficiency is improved.

Referring to fig. 8, fig. 8 is a schematic flowchart of a seventh embodiment of a data processing method provided in the present application, where the data processing method includes:

step 801: and starting the computer.

Step 802: the timing packet begins detection.

Step 803: the timing MD5 of the MCU is acquired.

MD5 is a unique value calculated by subjecting a time series file to a specific algorithm, and if the content of the time series file changes, MD5 changes accordingly.

The timing sequence MD5 of the MCU corresponds to the MD5 of the timing sequence packet in the memory.

Step 804: and judging whether the current time sequence MD5 of the host computer is consistent with the time sequence MD5 of the MCU.

If yes, go to step 812, and if not, go to step 805.

Step 805: and upgrading the time sequence package.

The upgrading of the timing package refers to upgrading of the timing package in the MCU memory.

Step 806: the transmission timing MD5.

And after the upgrade is finished, synchronously transmitting the time sequence MD5 of the host to the memory for storage, and clearing the original data in the memory.

Step 807: the MCU timing MD5 is queried.

And after the upgrading is finished, the host inquires the MCU time sequence MD5 again for judgment.

Step 808: whether the upgrade is successful.

If the upgrade is successful, go to step 812; if the upgrade is not successful, step 809 is performed.

Step 809: and reporting failure of time sequence updating by the fault.

And reporting the time sequence updating failure in a specific mode, such as ringing alarm and the like.

Step 810: the failure is resolved (the timing package is upgraded again).

The fault is cleared by upgrading the timing package again.

Step 811: whether the purge was successful.

If the update of the timing sequence packet is completed and the upgrade is judged to be successful, execute step 812; if the upgrade is judged to fail, step 809 is executed, and the fault is reported again.

Step 812: and starting other processes.

Referring to fig. 9, fig. 9 is a schematic flowchart of an eighth embodiment of a data processing method provided in the present application, where the data processing method includes:

step 91: and the microcontroller receives a calling instruction sent by the host.

It can be understood that the call instruction and the time sequence file are in a one-to-one correspondence relationship, and the host sends a plurality of call instructions to correspond to a plurality of time sequence files in the memory. The number of call instructions is not limited here.

And step 92: the microcontroller retrieves a first timing from memory based on the call instruction.

It is understood that a timing package is included in the memory, and the timing package includes a plurality of timing files, each of which includes a plurality of timing commands. The corresponding first timing is retrieved from the memory based on the different call instructions, and the first timing may include at least one timing command in the at least one timing file.

And after receiving the calling instruction, the microcontroller analyzes the instruction, acquires key information in the instruction and performs the next operation according to the key information. If the first calling instruction is 'start time sequence A', the microcontroller firstly acquires a time sequence command in the time sequence A from the memory based on the calling instruction; if the second call instruction is 'start time sequence B', the microcontroller firstly acquires a time sequence command in the time sequence B from the memory based on the call instruction; and the third calling instruction is 'starting the time sequence C', and the microcontroller firstly acquires the time sequence command in the time sequence C from the memory based on the calling instruction.

Alternatively, the timing command is fetched from the memory, and it is necessary to detect whether the timing command is valid.

Optionally, in an embodiment, whether the data is valid may be determined by correctness of the transmitted data, where taking Modbus communication protocol as an example, parity Check (Parity Check), LRC (Longitudinal Redundancy Check) detection or CRC (Cyclic Redundancy Check) detection may be performed to detect whether the timing packet data is valid.

Parity check is a method for checking the correctness of code transmission. The check is performed according to whether the number of "1" s in the bits of a set of binary codes being transmitted is odd or even. Odd parity is used, and even parity is used. What kind of check is adopted is specified in advance. Usually a parity bit is provided which is used to make the number of "1" s in the set of codes odd or even. If odd check is used, when the receiving end receives the group of codes, whether the number of 1 is odd or not is checked, and therefore the correctness of the transmitted codes is determined.

In which the LRC checks the ASCII (American Standard Code for Information exchange) mode for the ModBus protocol, which is simple and slow to use in the ASCII protocol, detects the contents of the message field except for the beginning colon and the ending carriage return line number. It is only to add each data byte to be transmitted and then add 1 to the inverse. For example, 5 bytes: 01H < 1 > 03H < 2 > H < 1 > 02H < 00H > +02H > =29H, and then 2 complement codes are taken to = D7H.

The CRC check is one of the most commonly used error checking codes in the field of data communication, and is characterized in that the lengths of the information field and the check field can be arbitrarily selected. CRC is a data transmission error detection function, performs polynomial calculation on data, attaches the obtained result to the back of a frame, and the receiving end also executes a similar algorithm to ensure the correctness and integrity of data transmission.

Step 93: the microcontroller executes a first timing sequence.

And after acquiring the first time sequence, the microcontroller executes the first time sequence and sequentially executes according to the time sequence command in the first time sequence.

Specifically, when the first timing includes at least one timing command in at least one timing file, and the microcontroller starts to execute the timing command of one timing file, the timing commands of other timing files can be simultaneously executed, so that the plurality of timing commands can be simultaneously executed.

When the host sends a plurality of calling instructions, the microcontroller responds to each calling instruction correspondingly according to the steps so as to execute the timing command.

In contrast to the prior art, the data processing method of the blood analyzer of the present application includes a host, a microcontroller and a memory, where the memory is used to store a timing packet, and the microcontroller is used to execute a timing file in the timing packet to implement blood analysis, and the method includes: the microcontroller receives a calling instruction sent by a host; the microcontroller acquires a first time sequence from the memory based on the calling instruction; and executing the first timing. Through the mode, on one hand, the time sequence packet is stored in the memory, the host does not need to send the time sequence file to the microcontroller, and only needs to send the calling instruction, so that the frequency of sending the time sequence file by the host is reduced, and the resource occupation of a bus is reduced; on the other hand, the storage of the time sequence packet is carried out based on the storage, so that the microcontroller can call the commands in the time sequence files in the time sequence packet, the time sequence commands which need to be executed currently in the time sequence files can be stored and executed under the condition that the storage capacity of the microcontroller is limited, the blood analyzer can execute the time sequence commands at the same time, a plurality of blood analysis items are completed and executed at the same time, the running speed of the blood analyzer is improved, and the working efficiency is increased.

Referring to fig. 10, fig. 10 is a schematic flowchart of a ninth embodiment of the data processing method provided in the present application, where the data processing method includes:

step 101: and the microcontroller receives a calling instruction sent by the host.

Step 102: after receiving a calling instruction based on the target time sequence, the microcontroller searches a storage address of the target time sequence in an address index area of the memory.

And when the microcontroller receives a calling instruction of the host based on the target time sequence, finding a memory for storing the time sequence packet. The Memory may be a storage device such as a usb disk, a hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic or optical disk, or a Flash Memory.

The memory comprises an address index area and a data storage area, wherein the address index area is used for storing storage addresses of target time sequences.

In some embodiments, if the number of the call instructions is multiple, the storage address of the corresponding target timing sequence is searched in the address index area of the memory according to the sequence of the multiple call instructions. If the first calling instruction is 'starting time sequence A', searching a storage address of the time sequence A from an address index area of a memory by the microcontroller based on the calling instruction; if the second call instruction is 'start time sequence B', the microcontroller searches a storage address of the time sequence B from an address index area of the memory based on the call instruction; and the third calling instruction is 'starting time sequence C', the microcontroller searches the storage address of the time sequence B from the address index area of the memory based on the calling instruction.

Specifically, since the timing file includes a plurality of timing commands, each timing command also has a corresponding storage address. And the storage address of each time sequence command and the storage addresses of other data in the time sequence file form the storage address of the time sequence file. It is understood that the storage address of the timing file is a directory, and the storage address of each timing command is a sub-directory under the directory.

Step 103: the microcontroller searches the target time sequence in the data storage area based on the storage address of the target time sequence.

The microcontroller searches the storage address of the target time sequence in the address index area of the memory, and searches the target time sequence in the data storage area based on the storage address of the target time sequence.

Step 104: the microcontroller receives a reading instruction sent by the host, and reads the timing command of the target timing from the memory based on the reading instruction.

And after the target time sequence is found, the microcontroller sends the search result to the host machine so that the host machine sends a reading instruction after judgment, receives the reading instruction sent by the host machine, reads the time sequence command of the target time sequence from the memory based on the reading instruction, stores the time sequence command in the internal storage unit, and then executes corresponding operation according to the content of the time sequence command. After the current timing command is executed, the microcontroller will continue to read the next timing command of the target timing.

Referring to fig. 11, taking the memory as a Flash memory as an example, the address index area of the Flash memory has 64K data, the data storage area has 0 xfeff 000 bytes, and the data verification area has 4K data. The address index area stores the start address, the end address, the number of commands, the time sequence checksum and other related data, wherein, the start address 4, the end address 4, the number of commands 4, the time sequence checksum 4 in fig. 11, and the empty 16 bytes form a time sequence index, wherein, the number of commands 4 indicates that there are 4 commands in the time sequence, so the address index area has a plurality of time sequence indexes,

the data storage area stores the start time, command number, control code, length, command code, parameter and other related data corresponding to the timing command, wherein the start time 2, command number 2, control code 1, length 1, command code 3 and parameter n in fig. 11 constitute the command in the timing. And finding out target time sequence data in the corresponding data storage area according to the starting address and the ending address of the address index area. The timing data is then read and executed.

The data check area stores the version number of the time sequence packet, a check file MD5, an upgrade flag and the like.

Different from the prior art, the time sequence packet is stored in the memory, and the data of the time sequence packet is divided into areas in the memory, so that the frequency of sending the time sequence file to the microcontroller by the host can be reduced, the data redundancy on the data bus is reduced, the loss of the time sequence file can be avoided, meanwhile, the microcontroller reads the time sequence command of the time sequence file in the memory according to the index, the problem of data redundancy on the data bus caused by reading the whole time sequence file in the prior art can be solved, and the reading speed can be improved.

Referring to fig. 12, fig. 12 is a schematic flowchart of a tenth embodiment of a data processing method provided in the present application, where the data processing method includes:

step 121: the microcontroller is powered up.

When the blood analyzer is started, the microcontroller is powered on to perform power-on self-detection, so that the normal operation of the blood analyzer is ensured, and meanwhile, the microcontroller is in communication connection with the host machine to provide guarantee for subsequent normal operation.

Step 122: it is detected whether a connection to the memory is made.

After the microcontroller is electrified, whether the microcontroller is connected to the memory is detected so as to ensure that time sequence data in the memory can be acquired during work.

When the detection result of step 122 is that the memory is connected, step 123 is executed; when the detection result of step 122 is that the memory is not connected, step 124 is executed.

Step 123: and reading the time sequence packet information in the memory, and sending the time sequence packet information to the host when acquiring the query instruction sent by the host.

In this embodiment, the time sequence packet in the memory includes information such as a corresponding version number and an upgrade flag, which are stored in the data verification area of the memory.

Specifically, the microcontroller acquires the version number of the stored time sequence packet from the data check area of the memory, sends the version number to the host, so that the host judges whether the version number is matched with the target version number, and sends the time sequence packet corresponding to the target version to the microcontroller when the version number is not matched with the target version number; the microcontroller clears the current time sequence packet in the memory; the microcontroller stores the time sequence packet which is sent by the host and corresponds to the target version into the memory so that the memory establishes a corresponding relation for the time sequence packet in the address index area, the data storage area and the data verification area. For example, the version number of the timing packet and the MD5 file sent by the host are stored in the data verification area, the timing file of the timing packet and the timing command in the timing file are stored in the data storage area, and a corresponding address index directory is established for the data in the data storage area in the address index area.

In some embodiments, when the chronological package is updated, the corresponding upgrade flag is also updated. If the upgrade flag is represented by a number, after the update of the corresponding time sequence packet is completed, the number of the upgrade flag is increased by one, if the number is 2, and the number is changed into 3 after the update of the time sequence packet.

In some embodiments, if the memory may have no timing packet, the timing packet information is empty, and the host sends the timing packet of the latest version to the microcontroller after receiving the information; the microcontroller stores the timing packet data into the memory.

Step 124: an error is prompted, not connected.

If the memory is not detected, the microcontroller prompts an error, alarms in a red light flashing and ringing mode of the indicator light, prompts a user that the memory is not connected and asks for processing.

Through the mode, on one hand, the connection state of the memory is detected, and the time sequence data can be read smoothly, on the other hand, whether the time sequence packet in the memory is consistent with the time sequence packet of the host computer is detected, and updating operation is carried out when the time sequence packet is inconsistent, so that the normal work of the blood analyzer is ensured.

Referring to fig. 13, fig. 13 is a schematic flowchart of an eleventh embodiment of a data processing method provided in the present application, where the data processing method includes:

step 131: and the microcontroller receives a calling instruction sent by the host.

Step 132: the microcontroller looks up in memory whether the first timing exists based on the call instruction.

It is understood that a timing packet is included in the memory, and the timing packet includes a plurality of timing files, each of which includes a plurality of timing commands. The first time sequence may include at least one time sequence command in at least one time sequence file.

If the first timing is found, step 133 is executed. If the content of the call instruction is "call timing a100", then it is searched in the address index area of the memory whether there is an index corresponding to timing a100, and if so, step 133 is executed. When there are multiple call instructions, the address indexes corresponding to the multiple call instructions are searched in the address index area of the memory, and if there are indexes, step 133 is executed. And if not, sending prompt information to the host.

Step 133: the microcontroller acquires the storage address of the address index area in the memory according to the first sequence, and establishes an address space in the internal storage unit.

In some embodiments, the address space is established in the microcontroller for subsequent storage of timing commands in the timing file after reading the timing commands.

Step 134: the first time sequence command and the first sequence number are read from the first time sequence and stored in an address space of the internal storage unit.

When only one time sequence file exists in the first time sequence, it can be understood that the time sequence file at least includes one time sequence command, and step 134 can be represented as obtaining the first time sequence command in the time sequence file and the corresponding sequence number from the data storage area based on the storage address, and storing the first time sequence command and the corresponding sequence number in the address space of the internal storage unit.

When there are multiple time sequence files in the first time sequence, step 134 may be indicated as obtaining a first time sequence command and a corresponding sequence number from the multiple time sequence files from the data storage area according to the calling sequence based on the storage address, and storing the first time sequence command and the corresponding sequence number in the address space of the internal storage unit.

Step 135: the second timing command and the second sequence number are read from the second timing of the internal memory cell.

In some embodiments, the microcontroller has a temporary timing file stored in its internal memory location that is sent by the host. If the current time of an operation needs to be modified, the corresponding time sequence command is modified to form a temporary time sequence file, and then the temporary time sequence file is sent to the microcontroller to be stored in the internal storage unit. At this time, if it is detected that the temporary timing file exists in the internal storage unit, if the temporary timing file is the second timing, the second timing command and the second sequence number are read from the second timing in the internal storage unit. In particular, the temporary timing file may be sent along when the host sends a call instruction to the microcontroller, or before the host sends a call instruction to the microcontroller.

Step 136: and judging whether the first sequence number is the same as the second sequence number.

If the internal memory unit has the second timing sequence matching the first timing sequence, step 138 is executed, if the internal memory unit has the second timing sequence matching the first timing sequence, step 137 is executed.

Step 137: the first timing command is executed.

Step 138: the second timing command is executed.

Specifically, referring to fig. 14, after step 137 is executed, the following steps are further included:

step 141: the storage address of the next sequence command of the first sequence in the memory is obtained.

It is understood that the first timing sequence includes a plurality of timing commands, and after the first timing command is executed, the storage address corresponding to the first timing command is overlapped with the upper address to obtain the storage address of the next timing command.

Step 142: and judging whether the storage address exceeds the end address.

In some embodiments, when the storage address does not exceed the ending address, indicating that there is a next timing command, the execution of the first timing command in the first timing sequence is performed according to steps 134-137, so as to complete the execution of the command in the first timing sequence.

When the storage address exceeds the end address, indicating that there is no next timing command, i.e. the timing command of the first timing has been executed, step 143 is executed.

Step 143: and finishing the execution of the time sequence operation, sending a first time sequence execution finishing message to the host, and clearing the address space in the internal storage unit.

And finishing executing the time sequence operation, sending a first time sequence execution finishing message to the host, and clearing the address space in the internal storage unit to release the space of the internal storage unit.

Specifically, referring to fig. 15, after step 138 is performed, the following steps are also included:

step 151: the next timing command of the second timing is obtained to store the address in the internal memory unit.

It can be understood that the second timing sequence includes a plurality of timing sequence commands, and after the second timing sequence command is executed, the storage address corresponding to the second timing sequence command is internally shifted in the internal memory unit, i.e. overlapped with the high address, so as to obtain the storage address of the next timing sequence command.

Step 152: and judging whether the storage address exceeds the end address.

In some embodiments, when the storage address does not exceed the end address, indicating that the next clock command exists, the execution of the second clock command in the second clock sequence is performed according to the execution manner of steps 134-137, so as to complete the execution of the clock command in the second clock sequence.

When the storage address exceeds the end address, indicating that there is no next timing command, i.e. the timing command of the second timing has been executed, step 153 is executed.

Step 153: and finishing the execution of the time sequence operation, sending a second time sequence execution finishing message to the host, and clearing the second time sequence.

And finishing executing the time sequence operation, sending a second time sequence execution finishing message to the host, and clearing the second time sequence in the internal storage unit so as to release the space of the internal storage unit.

It can be understood that the second time sequence is a temporary time sequence file which is suddenly modified, and the second time sequence is not necessary after the second time sequence is executed, so that the second time sequence is cleared, on one hand, the memory space of the microcontroller is released, and on the other hand, the subsequent storable space in which a plurality of time sequence commands need to be executed can be ensured, and the execution of work can be ensured.

In this embodiment, after receiving the timing sequence call instruction, the microcontroller determines whether the called timing sequence command needs to be directly executed by acquiring the timing sequence command from the memory and judging whether the sequence number of the timing sequence command is the same as that of the temporary timing sequence file in the internal storage unit of the microcontroller, and when the called timing sequence command needs to be executed, the microcontroller executes the timing sequence command; if the execution is not needed, the corresponding timing command in the internal memory unit is executed. By the method, the time sequence commands which need to be executed currently in different time sequence files are read to be executed under the condition that the storage resources of the microcontroller are limited, the number of the time sequence commands stored in the internal storage unit can be increased, the number of the time sequence commands which run simultaneously can be increased, the work requirement can be met, compared with the mode of reading the whole time sequence file, the data redundancy on a data bus can be effectively reduced, the reading speed is improved, the work efficiency is improved, the temporary time sequence files exist in the memory, the time sequence commands which need to be executed are determined, and the normal work of the blood analyzer is guaranteed.

Referring to fig. 16, fig. 16 is a schematic flowchart of a twelfth embodiment of the data processing method provided in the present application, where the data processing method includes:

step 161: the microcontroller is powered up.

The power-on mode of the microcontroller according to the above embodiment is the same or similar, and will not be described herein.

Step 162: it is detected whether a connection to the memory is made.

If a connection to memory is detected, step 163 is performed.

If no connection to memory is detected, step 165 is performed.

Step 163: and reading the timing packet information in the memory.

In some embodiments, the microcontroller reads the timing packet information in the memory to determine whether the timing packet is stored in the memory, if so, go to step 164; if not, step 166 is performed.

In some embodiments, the microcontroller reads timing packet information in the memory, such as version information, and sends the version information to the host, so that the host determines whether the version information matches the target version information, and if the version information matches, performs step 164; if the version information does not match, indicating that the timing packet in memory does not meet the requirements of the current job, step 166 is performed.

Step 164: and (5) starting normally.

After the normal starting, the microcontroller receives a query instruction of the host based on the target identification information so as to complete the execution of a subsequent time sequence command.

Step 165: interval 100MS detects a primary device and reverses the receipt of a secondary command at the error status indicator light.

Optionally, when the memory is not detected, the detection is continuously performed according to a time period, and the user is informed of the abnormal connection of the memory through prompt information such as an error state indicator lamp.

Step 166: and entering a dead loop to wait for time sequence upgrading.

And when the time sequence package is determined not to exist in the memory, sending the information of the time sequence package which does not exist in the memory to the host so that the host sends the time sequence package, and then storing the time sequence package into the memory to finish the time sequence upgrading.

When the version information of the time sequence packet is not matched, the host sends the time sequence packet corresponding to the target version to the microcontroller, and the microcontroller receives the time sequence packet sent by the host and replaces the original time sequence packet in the memory. The replacement is complete, the upgrade flag is retained, and step 164 is performed.

Referring to fig. 17, fig. 17 is a schematic flowchart of a thirteenth embodiment of a data processing method provided in the present application, where the data processing method includes:

step A: the host sends a start sequence B100.

And B: inquiring the header of the time sequence B100, verifying whether the time sequence is valid, acquiring the address Taddr of the time sequence B100 in the storage, entering an EVT (Engineering Verification Test) stage if the address Taddr is invalid, and performing a Verification Test on the time sequence B100 until the address Taddr is usable after the Test is finished.

And C: if the timing B100 is confirmed to be valid, the space of the execution structure corresponding to the timing B100 is obtained.

Step D: reading a command C, an execution time T and a sequence number N from the table of the timing sequence B100, judging whether the execution time T meets the standard, if not, waiting for 10ms, and acquiring the execution time T again, if so, executing the step E.

Step E: comparing the sequence number N of the command C with the sequence number N ' corresponding to the current command C ' of the temporary sequence B100' of the memory, if the sequence numbers are consistent, executing the command C ' of the sequence B100', and if the sequence numbers are inconsistent, executing the command C of the sequence B100 by + 1.

Step F: when executing the command, taddr is superimposed toward the high address.

Step G: and D, judging whether Taddr exceeds the end address end _ addr or not, if not, repeating the step H, continuing to execute the rest commands in the time sequence table, and if so, executing the step 8.

Step I: and ending the time sequence, recovering a time sequence ending signal, clearing the time sequence B100', and clearing the memory space generated by the execution time sequence.

Referring to fig. 18, fig. 18 is a schematic structural diagram of an embodiment of the blood analyzer provided in the present application, and the blood analyzer 180 includes a host 181, a microcontroller 182, and a memory 183. The host 181 is connected with the microcontroller 182, the microcontroller 182 is connected with the memory 183, the memory 183 is used for storing the timing packet, and the microcontroller 182 is used for executing the timing file in the timing packet to realize blood analysis; the host 181 and/or the microcontroller 182 include therein program data which, when executed by the host 181 and/or the microcontroller 182, is adapted to implement the following method: the microcontroller receives a query instruction of the host based on the target identification information; the microcontroller acquires the current identification information of the memory based on the query instruction and sends the current identification information to the host computer so that the host computer judges whether the target identification information is the same as the current identification information; the microcontroller receives a first timing packet sent by the host to update a second timing packet in the memory.

It can be understood that the host 181 and the microcontroller 182 in this embodiment may implement the method of any of the above embodiments, and specific implementation steps thereof may refer to the above embodiments, which are not described herein again.

Referring to fig. 19, fig. 19 is a schematic structural diagram of a computer storage medium 190 provided by the present application, the computer storage medium 190 being used for storing program data 191, the program data 191 being used for implementing the following method steps when being executed by a host and/or a microcontroller:

the microcontroller receives a query instruction of the host based on the target identification information; the microcontroller acquires the current identification information of the memory based on the query instruction and sends the current identification information to the host computer so that the host computer judges whether the target identification information is the same as the current identification information; the microcontroller receives a first timing packet sent by the host to update a second timing packet in the memory.

It can be understood that the computer storage medium 190 in this embodiment may be applied to a host and may also be applied to a microcontroller, and specific implementation steps thereof may refer to the foregoing embodiments, which are not described herein again.

In the several embodiments provided in the present application, it should be understood that the disclosed method and apparatus may be implemented in other manners. For example, the above-described device embodiments are merely illustrative, and for example, the division of the modules or units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units may be integrated into one unit. The integrated unit may be implemented in the form of hardware, or may also be implemented in the form of a software functional unit.

The integrated units in the other embodiments described above may be stored in a computer-readable storage medium if they are implemented in the form of software functional units and sold or used as separate products. Based on such understanding, the technical solution of the present application may be substantially implemented or contributed by the prior art, or all or part of the technical solution may be embodied in a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, a network device, or the like) or a processor (processor) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk, and various media capable of storing program codes.

The above description is only for the purpose of illustrating embodiments of the present application and is not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes, which are made by the contents of the specification and the drawings of the present application or are directly or indirectly applied to other related technical fields, are also included in the scope of the present application.

Claims

1. A data processing method of a blood analyzer, wherein the blood analyzer comprises a host, a microcontroller and a memory, the memory is used for storing a time sequence packet, the microcontroller is used for executing a time sequence file in the time sequence packet to realize blood analysis, the time sequence file comprises at least one time sequence command, and the method comprises:

when the blood analyzer is started, the microcontroller receives a query instruction of the host computer based on target identification information;

the microcontroller acquires the current identification information of the memory based on the query instruction and sends the current identification information to the host computer so that the host computer judges whether the target identification information is the same as the current identification information;

if not, the microcontroller receives a first time sequence packet sent by the host to update a second time sequence packet in the memory;

the microcontroller receives a calling instruction sent by the host;

the microcontroller acquires a first timing sequence from a memory based on the calling instruction; wherein the first time sequence comprises at least one time sequence command in at least one time sequence file;

the microcontroller detects whether a second time sequence matched with the first time sequence is stored in an internal storage unit; wherein the second time sequence is a time sequence file;

if not, executing the timing sequence command in the first timing sequence;

and if so, executing the timing command in the second timing sequence.

2. The method of claim 1,

the microcontroller receives a first timing packet sent by the host to update a second timing packet in the memory, and the method comprises the following steps:

the microcontroller receives a first time sequence packet sent by the host;

the microcontroller stores the first timing packet to the memory;

the microcontroller replaces the current identification information in the memory with the target identification information.

3. The method of claim 2,

before the microcontroller receives the first timing packet sent by the host, the method further includes:

the microcontroller clears the second timing packet in the memory.

4. The method of claim 1,

the microcontroller receives a first timing packet sent by the host to update a second timing packet in the memory, and the method further includes:

the microcontroller receives the query instruction of the host based on the target identification information again;

the microcontroller acquires current identification information of the memory based on a query instruction and sends the current identification information to the host computer so that the host computer judges whether the target identification information is the same as the current identification information of the memory;

and if the time sequence packets are not the same, updating the time sequence packets in the memory again.

5. The method of claim 1,

when the blood analyzer starts, the microcontroller receives a query instruction of the host based on the target identification information, and the method further comprises the following steps:

when the blood analyzer is started, the microcontroller is electrified and then detects whether the memory is connected or not;

if yes, the microcontroller reads the time sequence packet information in the memory to determine whether the time sequence packet is stored in the memory;

if yes, receiving a query instruction of the host based on the target identification information;

if not, sending the information without the time sequence packet in the memory to the host so that the host sends the time sequence packet.

6. The method of claim 1,

the detecting whether a second timing sequence matched with the first timing sequence is stored in the internal storage unit includes:

reading a first sequence command from the first sequence and storing a first sequence number corresponding to the first sequence command into an address space of the internal storage unit;

reading a second timing command and a second sequence number corresponding to the second timing command from a second timing of the internal memory unit;

judging whether the first sequence number is the same as the second sequence number;

if the internal storage unit is the same as the first timing sequence, a second timing sequence command is executed if the internal storage unit has the second timing sequence matched with the first timing sequence;

and if the internal storage unit is not the same as the first time sequence, confirming that no second time sequence matched with the first time sequence exists in the internal storage unit, and executing a first time sequence command.

7. A blood analyzer, comprising a host computer, a microcontroller, and a memory coupled to the microcontroller, the memory for storing a timing packet, the microcontroller for executing a timing file in the timing packet to perform a blood analysis;

wherein the host and/or microcontroller comprises program data for implementing the method according to any one of claims 1-6 when executed by the host and/or microcontroller.

8. Computer storage medium, characterized in that it is used for storing program data for implementing the method according to any of claims 1-6 when executed by a host and/or a microcontroller.