CN113589127A - Power tube fault detection method and cascade power tube fault detection method - Google Patents

Power tube fault detection method and cascade power tube fault detection method Download PDF

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Publication number
CN113589127A
CN113589127A CN202110881153.1A CN202110881153A CN113589127A CN 113589127 A CN113589127 A CN 113589127A CN 202110881153 A CN202110881153 A CN 202110881153A CN 113589127 A CN113589127 A CN 113589127A
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voltage
power tube
power
equal
side port
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陆文文
文鹏
唐瑭
刘亮
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Kedaduo Innovation Energy Technology Co ltd
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Kedaduo Innovation Energy Technology Co ltd
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    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
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    • G01R31/2608Circuits therefor for testing bipolar transistors

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Abstract

The embodiment of the application provides a power tube fault detection method and a cascade power tube fault detection method, wherein a full-bridge topology comprises a first side port and a second side port connected with an energy storage battery; the power tube fault detection method comprises the following steps: controlling each group of diagonal power tubes positioned on different bridge arms to be conducted in turn, and respectively detecting the voltage of a first side port when the corresponding group of diagonal power tubes are conducted; when the absolute value of the voltage of the first side port is not equal to the voltages of the two ends of the energy storage battery, controlling each group of the same-side power tubes to be conducted in turn, and respectively detecting the voltage of the first side port when the corresponding group of the same-side power tubes are conducted; and determining the position of the fault power tube according to the condition that the absolute value of the voltage of the first side port is equal to the voltage of the two ends every time and the condition that the voltage of the first side port is equal to zero every time. The method does not need to add extra hardware devices, greatly reduces the equipment cost, avoids error faults caused by hardware circuits, reduces the system fault rate and the like.

Description

Power tube fault detection method and cascade power tube fault detection method
Technical Field
The application relates to the technical field of power electronics, in particular to a power tube fault detection method and a cascade power tube fault detection method.
Background
With the continuous development of power electronic technology, the IGBT is widely used in the fields of new energy and the like as a key device for energy conversion, and meanwhile, with the continuous increase of the requirements of high-voltage and high-capacity application scenes, the number of the high-power tube IGBTs is greatly increased by the application of a cascade topology, the IGBTs are used as core devices for module conversion, and if a fault occurs, the output power stress of other modules is increased, so that the system is unstable.
Disclosure of Invention
The embodiment of the application provides a power tube fault detection method and a cascade power tube fault detection method, and the method does not need to add extra hardware devices, greatly reduces equipment cost, avoids error faults caused by hardware circuits, reduces system fault rate and the like.
The embodiment of the application provides a power tube fault detection method, which is applied to a full-bridge topology, wherein the full-bridge topology comprises a double-bridge arm formed by four power tubes, and the full-bridge topology comprises a first side port and a second side port connected with an energy storage battery; the power tube fault detection method comprises the following steps:
controlling each group of diagonal power tubes positioned on different bridge arms to be conducted in turn, and respectively detecting the voltage of the first side port when the corresponding group of diagonal power tubes are conducted;
when the absolute value of the voltage of the first side port is not equal to the voltages of the two ends of the energy storage battery at least once, each group of same-side power tubes located on different bridge arms are controlled to be conducted in turn, and the voltages of the first side port when the corresponding group of same-side power tubes are conducted are respectively detected;
and determining the position of the fault power tube according to the condition that the absolute value of the voltage of the first side port is equal to the voltages at the two ends every time and the condition that the voltage of the first side port is equal to zero every time.
In one embodiment, the double bridge arms of the full-bridge topology comprise one bridge arm formed by connecting a first power tube and a second power tube in series and the other bridge arm formed by connecting a third power tube and a fourth power tube in series;
the first power tube and the fourth power tube are a first group of diagonal power tubes, and the second power tube and the third power tube are a second group of diagonal power tubes;
the first power tube and the third power tube are a first group of same-side power tubes, and the second power tube and the fourth power tube are a second group of same-side power tubes.
In one embodiment, the determining the position of the failed power tube according to the equality of the absolute value of the voltage of the first side port and the two-terminal voltage and the equality of the voltage of the first side port and zero comprises:
if the voltage absolute value of the first side port when the first group of diagonal power tubes are conducted is not equal to the voltage at the two ends, the voltage absolute value when the second group of diagonal power tubes are conducted is equal to the voltage at the two ends, the voltage of the first side port when the first group of same-side power tubes are conducted is not equal to zero, and the voltage of the first side port when the second group of same-side power tubes are conducted is equal to zero, determining that the first power tube is in fault;
if the absolute voltage value of the first side port when the first group of diagonal power tubes are conducted is equal to the voltage at the two ends, the absolute voltage value of the first side port when the second group of diagonal power tubes are conducted is not equal to the voltage at the two ends, the voltage of the first side port when the first group of same-side power tubes are conducted is equal to zero, and the voltage of the first side port when the second group of same-side power tubes are conducted is not equal to zero, determining that the second power tube is in fault;
if the absolute value of the voltage of the first side port when the first group of diagonal power tubes are conducted is equal to the voltage at the two ends, the absolute value of the voltage of the first side port when the second group of diagonal power tubes are conducted is not equal to the voltage at the two ends, the voltage of the first side port when the first group of same-side power tubes are conducted is not equal to zero, and the voltage of the first side port when the second group of same-side power tubes are conducted is equal to zero, determining that the third power tube is in fault;
and if the absolute value of the voltage of the first side port when the first group of diagonal power tubes are conducted is not equal to the voltage at the two ends, the absolute value of the voltage of the first side port when the second group of diagonal power tubes are conducted is equal to the voltage at the two ends, the voltage of the first side port when the first group of same-side power tubes are conducted is equal to zero, and the voltage of the first side port when the second group of same-side power tubes are conducted is not equal to zero, determining that the fourth power tube has a fault.
The embodiment of the application also provides a fault detection method for the cascade power tube, which is applied to a cascade full-bridge topology, wherein the cascade full-bridge topology comprises N parallel branches and bus capacitors, all the branches are output through a direct current bus after being connected in parallel, and the bus capacitors are connected to two ends of the direct current bus; each branch comprises a switch and a plurality of full-bridge topologies which are sequentially connected in series, each full-bridge topology comprises a double-bridge arm formed by four power tubes, and each full-bridge topology further comprises a first side port and a second side port connected with an energy storage battery; the cascade power tube fault detection method comprises the following steps:
controlling the switch of the ith branch to be closed so that the ith branch is in an input state, wherein i ≦ N;
controlling two groups of diagonal power tubes in all full-bridge topologies in an ith branch in a switching-in state to be conducted in turn, and respectively detecting the voltage of the bus capacitor when each group of diagonal power tubes is conducted;
determining whether the ith branch has a fault according to the voltage of the bus capacitor each time;
when the fault of the ith branch is determined, controlling two groups of same-side power tubes located in different bridge arms in all full-bridge topologies in the ith branch to be conducted in turn, and respectively detecting the voltage of the first side port when each group of same-side power tubes are conducted;
and determining the position of the fault power tube in the ith branch according to the voltage of the bus capacitor and the voltage of the first side port each time.
In one embodiment, the cascade power tube fault detection method further includes:
and after determining that no fault exists in the ith branch or a fault power tube in the ith branch is detected, disconnecting the ith branch and controlling the (i + 1) th branch to be in a switching state for fault detection until all branches are detected.
In one embodiment, the double bridge arms in each full-bridge topology comprise one bridge arm formed by connecting a first power tube and a second power tube in series, and another bridge arm formed by connecting a third power tube and a fourth power tube in series, wherein the first power tube and the fourth power tube are a first group of diagonal power tubes, and the second power tube and the third power tube are a second group of diagonal power tubes;
the control is in two sets of diagonal angle power tube in all full-bridge topologies in the ith branch road of input state switches on in turn, detects respectively when each set switches on the diagonal angle power tube the voltage of bus capacitor, includes:
controlling the first group of diagonal power tubes in each full-bridge topology in the ith branch to be connected and the second group of diagonal power tubes to be disconnected, and detecting the positive voltage of the bus capacitor at the moment;
controlling the second group of diagonal power tubes in each full-bridge topology in the ith branch to be connected and the first group of diagonal power tubes to be disconnected, and detecting the absolute value of the negative voltage of the bus capacitor at the moment;
the determining whether the ith branch has a fault according to the voltage of the bus capacitor each time comprises the following steps:
and when the absolute value of the positive voltage and/or the negative voltage of the bus capacitor is not equal to the sum of the voltages of all the energy storage batteries in the ith branch, determining that the ith branch has a fault.
In one embodiment, the first power tube and the third power tube are a first group of same-side power tubes, and the second power tube and the fourth power tube are a second group of same-side power tubes;
the control is in all in the ith branch road in the full-bridge topology be located two sets of homonymy power tube of different bridge arms and is switched on in turn, detect respectively when every homonymy power tube of group switches on the voltage of first side port, include:
controlling the first group of same-side power tubes in each full-bridge topology in the ith branch circuit to be connected and the second group of same-side power tubes to be disconnected, and detecting the positive voltage of the first side port of each full-bridge topology;
controlling the second group of power tubes on the same side in each full-bridge topology in the ith branch circuit to be connected and the first group of power tubes on the same side to be disconnected, and detecting the negative voltage of the first side port of each full-bridge topology;
the determining the position of the fault power tube in the ith branch according to the voltage of the bus capacitor and the voltage of the first side port at each time comprises the following steps:
determining a full-bridge topology with the positive voltage and/or the negative voltage of the first side port not equal to zero as a fault full-bridge topology in the ith branch;
and determining a fault power tube in the fault full-bridge topology in a combined mode according to the condition that the absolute values of the positive voltage and the negative voltage of the bus capacitor in the ith branch are respectively equal to the sum of the voltages of all the energy storage batteries and the condition that the positive voltage and the negative voltage of the first side port of the fault full-bridge topology are respectively equal to zero.
In one embodiment, the determining of the failed power tube in the failed full bridge topology comprises:
if the positive voltage of the bus capacitor is not equal to the sum of the voltages of all the energy storage batteries, the absolute value of the negative voltage of the bus capacitor is equal to the sum of the voltages of all the energy storage batteries, the positive voltage of the first side port is not equal to zero, and the negative voltage of the first side port is equal to zero, determining that the first power tube of the fault full-bridge topology is in fault;
if the positive voltage of the bus capacitor is equal to the sum of the voltages of all the energy storage batteries, the absolute value of the negative voltage of the bus capacitor is not equal to the sum of the voltages of all the energy storage batteries, and the positive voltage of the first side port is equal to zero and the negative voltage of the first side port is not equal to zero, determining that the second power tube of the fault full-bridge topology is faulty;
if the positive voltage of the bus capacitor is equal to the sum of the voltages of all the energy storage batteries, the absolute value of the negative voltage is not equal to the sum of the voltages of all the energy storage batteries, the positive voltage of the first side port is not equal to zero, and the negative voltage of the first side port is equal to zero, determining that the third power tube of the fault full-bridge topology is in fault;
and if the positive voltage of the bus capacitor is not equal to the sum of the voltages of all the energy storage batteries, the absolute value of the negative voltage of the bus capacitor is equal to the sum of the voltages of all the energy storage batteries, and the positive voltage of the first side port is equal to zero and the negative voltage of the first side port is not equal to zero, determining that the fourth power tube of the failed full-bridge topology fails.
In one embodiment, the cascaded full-bridge topology comprises a main controller and N sub-controllers connected with the main controller, wherein each sub-controller is connected with one branch circuit;
when the fault detection of the cascade power tube is carried out, the main controller controls the switch of the ith branch circuit to be closed so as to enable the ith branch circuit to be in a switching-in state; controlling two groups of diagonal power tubes in all full-bridge topologies in an ith branch in a switching state to be conducted in turn, respectively detecting the voltage of the bus capacitor when each group of diagonal power tubes is conducted, and determining whether the ith branch has a fault according to the voltage of the bus capacitor each time;
when the main controller determines that the ith branch has a fault, the main controller controls two groups of same-side power tubes located in different bridge arms in all full-bridge topologies in the ith branch to be conducted in turn, and informs each sub-controller of the ith branch to detect the voltage of the port of the first side when each group of same-side power tubes are conducted respectively, so that each sub-controller determines the position of the fault power tube in the ith branch according to the voltage of the bus capacitor and the voltage of the port of the first side each time.
Embodiments of the present application further provide a readable storage medium, which stores a computer program, and when the computer program is executed on a processor, the computer program implements the above power tube fault detection method or the above cascaded power tube fault detection method.
The embodiment of the application has the following beneficial effects:
the power tube fault detection method provided by the embodiment of the application comprehensively determines the position of a power tube with a fault by switching on and switching off different power tube combinations and logically combining according to the port voltage condition detected at each time, compared with the conventional power tube fault detection scheme, the scheme does not need a hardware fault detection circuit and a large number of external sensing devices, and particularly aims at a cascade type power supply system.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained from the drawings without inventive effort.
Fig. 1 shows a schematic diagram of a full-bridge topology according to an embodiment of the present application;
FIG. 2 is a flow chart illustrating a power transistor fault detection method according to an embodiment of the present disclosure;
fig. 3A to fig. 3D respectively show a schematic diagram of conduction control for each power tube during fault detection in the power tube fault detection method according to the embodiment of the present application;
fig. 4 shows a schematic structure diagram of a cascaded full-bridge topology according to an embodiment of the present application;
fig. 5 shows a first flowchart of a fault detection method for a cascade power tube according to an embodiment of the present application;
fig. 6 shows a second flowchart of the cascade power tube fault detection method according to the embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments.
The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present application without making any creative effort, shall fall within the protection scope of the present application.
At present, the fault detection scheme of the existing IGBT power tube mainly includes two kinds, respectively:
(1) and hardware detection, wherein a current detection circuit, a voltage detection circuit, a temperature detection circuit and other hardware circuits are added in the IGBT driving circuit to detect the voltage change and the thermal resistance change of the IGBT packaging lead, and the hardware circuits are compared with an internal value according to the change rate to judge the IGBT fault type. The detection method is simple, but for the cascade topology structure containing considerable number of sub-modules, the cost of the detection circuit device is high, and when the detection circuit fails or is interfered, the IGBT can be misjudged, so that the system fault points are increased; meanwhile, the detection circuit needs to work in a dynamic operation state of the system, and when a part of the sub-modules have serious faults, the system can generate chain reaction, so that certain potential safety hazards are brought to maintenance work.
(2) And software detection, namely firstly assuming the position of a fault sub-module, calculating a predicted value of a certain circuit variable by a substitution method, if the difference value between the measured value and the predicted value is less than a threshold value, judging that the sub-module has a fault, and if not, assuming that another sub-module has a fault until the fault is located. The detection method does not need waiting time, but when the number of the sub-modules is large, the calculation amount needed by the fault positioning method is very large, and the positioning time is very long.
Therefore, the embodiment of the application provides a power tube fault detection method, for example, an IGBT, power tube devices of different combinations are turned on and off, and logic combination is performed according to the voltage of a corresponding output port during each test to comprehensively judge the position of the failed IGBT.
The full-bridge topology unit is used as a basic sub-module in the cascade system, and a fault detection method will be described below by taking a single full-bridge topology as an example, and then a fault detection method for the cascade power tube will be described based on the fault detection method.
Example 1
Referring to fig. 1 and 2, the present embodiment provides a power tube fault detection method applied to a full-bridge topology. Exemplarily, as shown in fig. 1, the full-bridge topology includes a dual-bridge arm composed of four power transistors, wherein the dual-bridge arm includes a first bridge arm composed of a first power transistor T1 and a second power transistor T2 connected in series, and a second bridge arm composed of a third power transistor T3 and a fourth power transistor T4 connected in series.
Exemplarily, the full-bridge topology includes a first side port and a second side port, and taking the high power transistor IGBT shown in fig. 1 as an example, the S pole of the first power transistor T1 and the D pole of the second power transistor T2 are connected and lead out one pin terminal, and the S pole of the third power transistor T3 and the D pole of the fourth power transistor T4 are connected and lead out the other pin terminal, which are the first side ports. The D pole of the first power transistor T1 is connected to the D pole of the third power transistor T3 and leads out one bus terminal, and the S pole of the second power transistor T2 is connected to the S pole of the fourth power transistor T4 and leads out the other bus terminal, which serve as the second side port.
The second side port is connected with an energy storage battery, and the first side port is used for accessing an external alternating current power supply or a load, for example, when the energy storage battery is charged, the first side port can access the external alternating current power supply; and when the energy storage battery discharges, the first side port can be connected with a load. Further, the full-bridge topology further includes a filter capacitor, which may be exemplarily disposed between the second side port and the energy storage battery, and may be used for filtering a voltage when the full-bridge topology charges the battery, and the like.
In this embodiment, the full-bridge topology includes a control unit, which may be composed of chips such as a DSP, an FPGA, or a CPLD, for example, and the control unit is mainly responsible for signal acquisition and processing, fault combinational logic operation, data uploading, receiving a control signal, sending a driving signal to drive the corresponding power tube to be turned on or off, and the like. When fault self-checking is carried out, the control unit is used for controlling the on and off of each power tube, detecting the voltage magnitude and direction of the ports on two sides and the like.
For convenience of subsequent differentiation, in one embodiment, the first power transistor T1 and the fourth power transistor T4 are referred to as a first set of diagonal power transistors in the full-bridge topology, and similarly, the second power transistor T2 and the third power transistor T3 are referred to as a second set of diagonal power transistors. It will be understood that one top tube of one leg and one bottom tube of the other leg are referred to herein as a set of diagonal power tubes.
And recording a first power tube T1 positioned in the first bridge arm and a third power tube T3 positioned in the second bridge arm as a first group of same-side power tubes in the full-bridge topology, and similarly, recording a second power tube T2 positioned in the first bridge arm and a fourth power tube T4 positioned in the second bridge arm as a second group of same-side power tubes. It is understood that the same pair of upper tubes or the same pair of lower tubes in different bridge arms are referred to herein as the same-side power tubes. In addition, the first to fourth power transistors T4 are used only for distinguishing power transistors in different installation positions.
How to perform the self-checking of the faults of the four power tubes in the full-bridge topology is described below.
Exemplarily, as shown in fig. 2, the power tube fault detection method includes:
and S110, controlling each group of diagonal power tubes positioned on different bridge arms to be conducted in turn, and respectively detecting the voltage of the first side port when the corresponding group of diagonal power tubes is conducted.
Exemplarily, the first group of diagonal power tubes is controlled to be switched on, and the second group of diagonal power tubes is controlled to be switched off at the same time; then, controlling the first group of diagonal power tubes to be turned off, and simultaneously, controlling the second group of diagonal power tubes to be turned on, namely, the two groups of diagonal power tubes are turned on in turn; and then detecting the voltage condition of the first side port when the corresponding group is conducted each time. It is understood that the turn-on sequence of the two diagonal power tubes is not limited. By switching on and off different power tube combinations and detecting the voltage condition of the corresponding port, whether a power tube fails or not can be quickly judged.
For example, as shown in fig. 3A, the first power transistor T1 and the fourth power transistor T4 may be controlled to be turned on, and the second power transistor T2 and the third power transistor T3 may be controlled to be turned off, at which time the energy storage battery will be in a discharge state; then detecting the voltage U of the first side port0. It can be understood that when it is defined that the voltage of the first side port is a positive voltage output when the first group of diagonal power tubes are turned on, the voltage of the first side port is a negative voltage output when the second group of diagonal power tubes are turned on. For the case that the output voltage is a positive value, the operation of taking the absolute value can be omitted and the absolute value can be directly compared with the voltage at the two ends of the energy storage battery.
Further, the voltage U is determined0Whether the voltage is equal to the voltage E at two ends of the energy storage power supply0. If voltage U is present0Is equal to E0If the current circuit connection is normal, the first power tube T1 and the fourth power tube T4 can be judged to be normal; otherwise, if the voltage U is0If the voltage is not equal to E0, it can be determined that at least one of the first power transistor T1 and the fourth power transistor T4 is damaged.
Then, as shown in fig. 3B, the second power transistor T2 and the third power transistor T3 are controlled to be turned on, and the first power transistor T1 and the fourth power transistor T4 are controlled to be turned off, at which time the energy storage battery is in a discharge state. Then, the voltage U of the first side port is detected0. Similarly, if there is U0Is equal to-E0I.e. the absolute value of the voltage is equal to E0If the current circuit connection is normal, the second power tube T2 and the third power tube T3 can be determined to be normal, otherwise, if the voltage U is normal0Is not equal to-E0I.e. absolute of voltageValue not equal to E0Then, it is determined that at least one of the second power transistor T2 and the third power transistor T3 is damaged.
Then, it is determined whether the absolute value of the voltage of the first side port detected twice is equal to the voltage across the energy storage battery, and if there is a case that the absolute value is not equal to the voltage across the energy storage battery, it indicates that there is a faulty power tube in the corresponding group, and step S120 is performed. Optionally, if both of the two conditions are equal to the voltages at the two ends of the energy storage battery, it indicates that the whole circuit is normal, and the fault detection process may be ended.
And step S120, when the absolute value of the voltage of the first side port is not equal to the voltages at two ends of the energy storage battery at least once, controlling each group of same-side power tubes positioned on different bridge arms to be conducted in turn, and respectively detecting the voltage of the first side port when the corresponding group of same-side power tubes are conducted.
Exemplarily, the first group of power tubes on the same side are controlled to be switched on, and the second group of power tubes on the same side are switched off at the same time; and then, controlling the first group of power tubes on the same side to be switched off, and simultaneously controlling the second group of power tubes on the same side to be switched on, namely, the two groups of power tubes on the same side are switched on in turn, and then detecting the voltage condition of the port on the first side when the corresponding group is switched on each time. It is understood that the conducting sequence of the two groups of power tubes on the same side is not limited.
For example, as shown in fig. 3C, the first power transistor T1 and the third power transistor T3 may be controlled to be turned on, and the second power transistor T2 and the fourth power transistor T4 may be controlled to be turned off, at which time the energy storage battery will be in a bypass state; then detecting the voltage U of the first side port0. Further, based on the short-circuit principle, the voltage U of the first side port at this time is determined0Whether or not it is equal to 0. Exemplarily, if present, the voltage U0If the current circuit connection is normal, the first power tube T1 and the third power tube T3 can be judged to be normal; otherwise, if the voltage U is0If the voltage is not equal to 0, it can be determined that at least one of the first power transistor T1 and the third power transistor T3 is damaged.
Then, as shown in fig. 3D, the second power transistor T2 and the fourth power transistor T4 are controlled to be turned on, and the first power transistor T1 and the third power transistor T3 are controlled to be turned off, at this time, the energy storage battery is in a bypass stateA state; then detecting the voltage U of the first side port0. Similarly, if the voltage U exists at the moment0If the current circuit connection is normal, it can be determined that the second power tube T2 and the fourth power tube T4 are normal, otherwise, if the current circuit connection is normal, the voltage U is equal to 00If the voltage is not equal to 0, it can be determined that at least one of the second power transistor T2 and the fourth power transistor T4 is damaged.
And step S130, determining the position of the fault power tube according to the condition that the absolute value of the voltage of the first side port is equal to the voltage of the two ends every time and the condition that the voltage of the first side port is equal to zero every time.
Exemplarily, when it is determined that a power tube fails, the position of the failed power tube may be determined comprehensively by further combining the output voltage conditions of the first side port corresponding to the two sets of diagonal power tubes and the two sets of same-side power tubes respectively conducting.
In one embodiment, the voltage U of the first side port when the first set of diagonal power transistors is turned on0Not equal to the two-terminal voltage E0And the absolute value | U of the voltage of the first side port when the second group of diagonal power tubes are conducted0| is equal to the two-terminal voltage E0That is, it indicates that there is a fault in the first power transistor T1 or the fourth power transistor T4, and at the same time, the voltage U of the first side port when the first group of same-side power transistors is conducted0Is not equal to 0, and the voltage U of the first side port when the second group of same-side power tubes are conducted0Equal to 0, indicating that the first power transistor T1 or the third power transistor T3 has a fault, and thus, according to the fault logical combination result, it may be determined that the first power transistor T1 has a fault.
Voltage U of first side port if first group diagonal power tube is conducted0Equal to the two-terminal voltage E0And the absolute value | U of the voltage of the first side port when the second group of diagonal power tubes are conducted0L is not equal to the voltage E across0Namely, the second power tube T2 or the third power tube T3 has a fault; meanwhile, if the voltage U of the first side port when the first group of power tubes on the same side are conducted0Equal to 0, voltage U of the first side port when the second group of same-side power tubes are conducted0Not equal to 0, i.e. indicatingThe second power tube T2 or the fourth power tube T4 has a fault. Similarly, a failure of the second power transistor T2 may be determined.
If the voltage absolute value of the first side port when the first group of diagonal power tubes are conducted is equal to the voltage E at the two ends0And the voltage absolute value of the first side port when the second group of diagonal power tubes are conducted is not equal to the voltage E at the two ends0That is, it indicates that there is a fault in the second power transistor T2 or the third power transistor T3; meanwhile, the voltage of the first side port when the first group of same-side power tubes are conducted is not equal to 0, and the voltage of the first side port when the second group of same-side power tubes are conducted is equal to 0, which indicates that the first power tube T1 or the third power tube T3 has a fault. Similarly, a failure of the third power transistor T3 may be determined.
If the voltage absolute value of the first side port when the first group of diagonal power tubes are conducted is not equal to the voltage E at the two ends0And the voltage absolute value of the first side port when the second group of diagonal power tubes are conducted is equal to the voltage E at the two ends0That is, it indicates that the first power transistor T1 or the fourth power transistor T4 has a fault; meanwhile, the voltage of the first side port when the first group of same-side power tubes are conducted is equal to 0, and the voltage of the first side port when the second group of same-side power tubes are conducted is not equal to 0, which indicates that the second power tube T2 or the fourth power tube T4 has a fault. Similarly, a failure of the fourth power transistor T4 may be determined.
According to the power tube fault detection method provided by the embodiment, when the full-bridge topology is detected, the position of a fault power tube can be positioned only by controlling the connection/disconnection of different power tube combinations and according to the detected condition of the port voltage, and the method is high in overhaul safety; moreover, the method realizes fault detection in a fault combinational logic mode, and particularly for a power supply system cascaded with a large number of full-bridge topologies, an additional hardware fault detection circuit, a large number of external sensing devices and the like are not needed, so that the equipment cost is greatly reduced; meanwhile, the error fault caused by a hardware circuit is avoided, and the fault rate of the system is reduced.
Example 2
Referring to fig. 4 and 5, based on the method of embodiment 1, this embodiment provides a method for detecting a fault of a cascaded power transistor, which is applied to a cascaded full-bridge topology.
Exemplarily, as shown in fig. 4, the cascaded full-bridge topology includes N branches and a bus capacitor connected in parallel, where i ≦ N, i is a natural number, all the branches are connected in parallel and then output through a dc bus, and the bus capacitor is connected to two ends of the dc bus. The bus capacitor can be used for restraining the fluctuation of the bus voltage. Further optionally, the cascaded full-bridge topology may further include a switching unit connected to the bus capacitor, where the switching unit may be configured to implement energy exchange between the system and the outside, and a corresponding series switch, where the series switch may be configured to disconnect each branch from the switching unit, and the like.
In this embodiment, each branch includes a switch and multiple full-bridge topologies connected in series, for example, the ith branch includes M cascaded full-bridge topologies, and j ≦ M. It can be understood that each full-bridge topology is a sub-module in fig. 4, the full-bridge topologies in each branch may be equal or different, and may be designed according to actual requirements. Each switch is used for disconnecting the corresponding branch circuit from other branch circuits respectively, and disconnection or parallel connection of the branch circuits from the system can be achieved.
In one embodiment, as shown in fig. 1, each of the cascaded full-bridge topologies includes a double arm formed by four power tubes, and includes a first side port and a second side port to which an energy storage battery is connected. Regarding the structure of the single full-bridge topology, reference can be made to the related contents in the above embodiment 1, and the description is not repeated here.
The method for detecting the fault of the cascade power tube is explained below. Exemplarily, as shown in fig. 5, the cascade power tube fault detection method includes:
and step S210, controlling the switch of the ith branch to be closed so as to enable the ith branch to be in a switching-in state.
Exemplarily, fault detection may be performed on each branch in turn, wherein, when a branch is detected, a switch of the branch may be controlled to be closed to access the branch.
Step S220, controlling two sets of diagonal power tubes in all full-bridge topologies in the ith branch in the input state to be conducted in turn, and respectively detecting the voltage of the bus capacitor when each set of diagonal power tubes is conducted.
With reference to the full-bridge topology shown in fig. 1, if the first power transistor and the fourth power transistor are the first set of diagonal power transistors, the second power transistor and the third power transistor are the second set of diagonal power transistors. In one embodiment, the step S220 includes:
controlling a first group of diagonal power tubes in each full-bridge topology in the ith branch to be completely switched on and a second group of diagonal power tubes in each full-bridge topology in the ith branch to be completely switched off, and detecting the positive voltage of the bus capacitor at the moment; and controlling the second group of diagonal power tubes in each full-bridge topology in the ith branch to be completely switched on and the first group of diagonal power tubes to be completely switched off, and detecting the negative voltage of the bus capacitor at the moment.
And step S220, determining whether the ith branch has a fault according to the voltage of the bus capacitor each time.
Exemplarily, when the absolute value of the positive voltage and/or the negative voltage of the bus capacitor is judged to be not equal to the sum of the voltages of all energy storage batteries in the ith branch, it is determined that a fault full-bridge topology exists in the ith branch. Therefore, it is further determined which full-bridge topology is faulty.
Step S230, when it is determined that the ith branch has a fault, controlling two groups of same-side power tubes located in different bridge arms in all full-bridge topologies in the ith branch to be conducted in turn, and respectively detecting a voltage of a first side port when each group of same-side power tubes is conducted.
Still taking the full-bridge topology shown in fig. 1 as an example, the first power tube and the third power tube are the first group of same-side power tubes, and the second power tube and the fourth power tube are the second group of same-side power tubes.
In one embodiment, the step S230 includes:
controlling a first group of power tubes on the same side in each full-bridge topology in the ith branch circuit to be connected and a second group of power tubes on the same side to be disconnected, and detecting the positive voltage of a first side port of each full-bridge topology; and controlling a second group of same-side power tubes in each full-bridge topology in the ith branch to be connected and a first group of same-side power tubes in each full-bridge topology to be disconnected, and detecting the negative voltage of the first side port of each full-bridge topology.
And step S240, determining the position of the fault power tube in the ith branch according to the voltage of the bus capacitor and the voltage of the first side port each time.
Exemplarily, the position of the failed power tube can be divided into two parts, and the failed power tube in the failed full-bridge topology can be determined first, and then the failed power tube in the failed full-bridge topology can be further determined.
In one embodiment, it may be determined whether the current full-bridge topology is faulty according to whether the positive and/or negative voltage of the first side port is equal to zero. For example, a full-bridge topology in which the positive and/or negative voltage of the first side port is not equal to zero is determined as a faulty full-bridge topology in the ith branch. Further optionally, if the positive voltage and the negative voltage at the first side port of the current full-bridge topology are both equal to zero, it is determined that the full-bridge topology is a normal full-bridge topology, and the fault determination of the next full-bridge topology can be continued until all the full-bridge topologies in the current branch are detected.
For determining the faulty power tube in the faulty full-bridge topology, in one embodiment, exemplarily, the faulty power tube in the faulty full-bridge topology may be determined in combination according to the case that the absolute values of the positive voltage and the negative voltage of the bus capacitor in the ith branch are respectively equal to the sum of the voltages of all the energy storage batteries, and the case that the positive voltage and the negative voltage of the first side port of the faulty full-bridge topology are respectively equal to zero.
For example, still in a certain failed full-bridge topology of the ith branch, if the positive voltage of the bus capacitor in the ith branch is not equal to the sum of the voltages of all the energy storage batteries and the absolute value of the negative voltage of the bus capacitor is equal to the sum of the voltages of all the energy storage batteries, it indicates that the first power tube or the fourth power tube of the submodule in the ith branch is damaged; meanwhile, the positive voltage of the first side port of the fault full-bridge topology is not equal to zero, and the negative voltage of the first side port is equal to zero, which indicates that the first power tube or the third power tube in the fault full-bridge topology is damaged; in conclusion, the failure of the first power tube of the failed full-bridge topology can be determined;
similarly, if the positive voltage of the bus capacitor in the ith branch circuit is equal to the sum of the voltages of all the energy storage batteries and the absolute value of the negative voltage of the bus capacitor is not equal to the sum of the voltages of all the energy storage batteries, it indicates that the second power tube or the third power tube of the submodule in the ith branch circuit is damaged; meanwhile, the positive voltage of the first side port is equal to zero, and the negative voltage of the first side port is not equal to zero, which indicates that the second power tube or the fourth power tube in the fault full-bridge topology is damaged; in summary, it can be determined that the second power tube of the failed full bridge topology fails.
If the positive voltage of the bus capacitor in the ith branch circuit is equal to the sum of the voltages of all the energy storage batteries and the absolute value of the negative voltage of the bus capacitor is not equal to the sum of the voltages of all the energy storage batteries, it is indicated that the second power tube or the third power tube of the submodule in the ith branch circuit is damaged; meanwhile, the positive voltage of the first side port is not equal to zero, and the negative voltage of the first side port is equal to zero, which indicates that the first power tube or the third power tube in the fault full-bridge topology is damaged; in summary, it can be determined that the third power tube of the failed full bridge topology fails.
If the positive voltage of the bus capacitor in the ith branch is not equal to the sum of the voltages of all the energy storage batteries and the absolute value of the negative voltage of the bus capacitor is equal to the sum of the voltages of all the energy storage batteries, it is indicated that the first power tube or the fourth power tube of the submodule in the ith branch is damaged; meanwhile, the positive voltage of the first side port is equal to zero, and the negative voltage of the first side port is not equal to zero, which indicates that the second power tube or the fourth power tube in the fault full-bridge topology is damaged; in summary, it can be determined that the fourth power tube of the failed full-bridge topology fails.
Further, as shown in fig. 6, the method for detecting the fault of the cascade power tube further includes:
step S250, after it is determined that the ith branch has no fault or a faulty power tube in the ith branch has been detected, the ith branch may be disconnected, and the (i + 1) th branch is controlled to be in the input state for fault detection until all branches are detected.
It can be understood that branch circuit faults are located through the voltage of the bus capacitor detected at each time, and then the power tube of the faults is comprehensively located according to the voltage of the output port of each submodule without adding an additional hardware detection circuit and the like.
In addition, in this embodiment, the cascaded full-bridge topology includes a main controller and N sub-controllers connected to the main controller, and each sub-controller is connected to one branch. Exemplarily, the main controller is mainly responsible for data acquisition and processing of the whole system, working state control of the branch switch, generation and transmission of control signals of each sub-module, switching on or off control of the switching unit, and the like.
In an alternative embodiment, exemplarily, when the cascade power tube fault detection is performed, the main controller controls the switch of the ith branch to be closed, so that the ith branch is in a switching state; and controlling two groups of diagonal power tubes in all full-bridge topologies in the ith branch in the input state to be conducted in turn, respectively detecting the voltage of the bus capacitor when each group of diagonal power tubes is conducted, and determining whether the ith branch has a fault according to the voltage of the bus capacitor every time.
And then when the main controller determines that the ith branch has a fault, controlling two groups of same-side power tubes located on different bridge arms in all full-bridge topologies in the ith branch to be conducted in turn, and informing each sub-controller of the ith branch to detect the voltage of a first side port when each group of same-side power tubes are conducted respectively, so that each sub-controller determines the position of the fault power tube in the ith branch according to the voltage of the bus capacitor and the voltage of the first side port every time.
By using the main controller and each sub-controller to carry out hierarchical management, i.e. the main controller is according to the bus capacitor voltage UCTo locate which branch circuit is faulty, and then the master controller will correct the faultThe branch circuit of the barrier sequentially issues the control instructions of the figure 3C and the figure 3D, so that each sub-controller can control the sub-modules according to the output port voltage U of the sub-module0The method is combined with positioning of the fault power tube, so that hierarchical management is realized, the algorithm is simple, the calculation speed is high, and the positioning of the fault power tube can be accelerated.
The embodiment of the present application further provides a readable storage medium, which exemplarily stores a computer program, where the computer program, when executed on a processor, implements the power tube fault detection method of the above embodiment 1 or the cascaded power tube fault detection method of the above embodiment 2.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application.

Claims (10)

1. The power tube fault detection method is characterized by being applied to a full-bridge topology, wherein the full-bridge topology comprises a double-bridge arm formed by four power tubes, and the full-bridge topology comprises a first side port and a second side port connected with an energy storage battery; the power tube fault detection method comprises the following steps:
controlling each group of diagonal power tubes positioned on different bridge arms to be conducted in turn, and respectively detecting the voltage of the first side port when the corresponding group of diagonal power tubes are conducted;
when the absolute value of the voltage of the first side port is not equal to the voltages of the two ends of the energy storage battery at least once, each group of same-side power tubes located on different bridge arms are controlled to be conducted in turn, and the voltages of the first side port when the corresponding group of same-side power tubes are conducted are respectively detected;
and determining the position of the fault power tube according to the condition that the absolute value of the voltage of the first side port is equal to the voltages at the two ends every time and the condition that the voltage of the first side port is equal to zero every time.
2. The power tube fault detection method according to claim 1, wherein the double arms of the full-bridge topology include one arm formed by connecting a first power tube and a second power tube in series, and another arm formed by connecting a third power tube and a fourth power tube in series;
the first power tube and the fourth power tube are a first group of diagonal power tubes, and the second power tube and the third power tube are a second group of diagonal power tubes;
the first power tube and the third power tube are a first group of same-side power tubes, and the second power tube and the fourth power tube are a second group of same-side power tubes.
3. The method for detecting the fault of the power tube according to claim 2, wherein the determining the position of the fault power tube according to the condition that the absolute value of the voltage of the first side port is equal to the voltage at the two ends and the condition that the voltage of the first side port is equal to zero comprises the following steps:
if the voltage absolute value of the first side port when the first group of diagonal power tubes are conducted is not equal to the voltage at the two ends, the voltage absolute value when the second group of diagonal power tubes are conducted is equal to the voltage at the two ends, the voltage of the first side port when the first group of same-side power tubes are conducted is not equal to zero, and the voltage of the first side port when the second group of same-side power tubes are conducted is equal to zero, determining that the first power tube is in fault;
if the absolute voltage value of the first side port when the first group of diagonal power tubes are conducted is equal to the voltage at the two ends, the absolute voltage value of the first side port when the second group of diagonal power tubes are conducted is not equal to the voltage at the two ends, the voltage of the first side port when the first group of same-side power tubes are conducted is equal to zero, and the voltage of the first side port when the second group of same-side power tubes are conducted is not equal to zero, determining that the second power tube is in fault;
if the absolute value of the voltage of the first side port when the first group of diagonal power tubes are conducted is equal to the voltage at the two ends, the absolute value of the voltage of the first side port when the second group of diagonal power tubes are conducted is not equal to the voltage at the two ends, the voltage of the first side port when the first group of same-side power tubes are conducted is not equal to zero, and the voltage of the first side port when the second group of same-side power tubes are conducted is equal to zero, determining that the third power tube is in fault;
and if the absolute value of the voltage of the first side port when the first group of diagonal power tubes are conducted is not equal to the voltage at the two ends, the absolute value of the voltage of the first side port when the second group of diagonal power tubes are conducted is equal to the voltage at the two ends, the voltage of the first side port when the first group of same-side power tubes are conducted is equal to zero, and the voltage of the first side port when the second group of same-side power tubes are conducted is not equal to zero, determining that the fourth power tube has a fault.
4. A fault detection method of a cascade power tube is characterized by being applied to a cascade full-bridge topology, wherein the cascade full-bridge topology comprises N parallel branches and bus capacitors, all the branches are output through a direct current bus after being connected in parallel, and the bus capacitors are connected to two ends of the direct current bus; each branch comprises a switch and a plurality of full-bridge topologies which are sequentially connected in series, each full-bridge topology comprises a double-bridge arm formed by four power tubes, and each full-bridge topology further comprises a first side port and a second side port connected with an energy storage battery; the cascade power tube fault detection method comprises the following steps:
controlling the switch of the ith branch to be closed so that the ith branch is in an input state, wherein i ≦ N;
controlling two groups of diagonal power tubes in all full-bridge topologies in an ith branch in a switching-in state to be conducted in turn, and respectively detecting the voltage of the bus capacitor when each group of diagonal power tubes is conducted;
determining whether the ith branch has a fault according to the voltage of the bus capacitor each time;
when the fault of the ith branch is determined, controlling two groups of same-side power tubes located in different bridge arms in all full-bridge topologies in the ith branch to be conducted in turn, and respectively detecting the voltage of the first side port when each group of same-side power tubes are conducted;
and determining the position of the fault power tube in the ith branch according to the voltage of the bus capacitor and the voltage of the first side port each time.
5. The cascade power tube fault detection method of claim 4, further comprising:
and after determining that no fault exists in the ith branch or a fault power tube in the ith branch is detected, disconnecting the ith branch and controlling the (i + 1) th branch to be in a switching state for fault detection until all branches are detected.
6. The method according to claim 4, wherein the double bridge legs in each full-bridge topology include one bridge leg formed by connecting a first power tube and a second power tube in series, and another bridge leg formed by connecting a third power tube and a fourth power tube in series, wherein the first power tube and the fourth power tube are a first set of diagonal power tubes, and the second power tube and the third power tube are a second set of diagonal power tubes;
the control is in two sets of diagonal angle power tube in all full-bridge topologies in the ith branch road of input state switches on in turn, detects respectively when each set switches on the diagonal angle power tube the voltage of bus capacitor, includes:
controlling the first group of diagonal power tubes in each full-bridge topology in the ith branch to be connected and the second group of diagonal power tubes to be disconnected, and detecting the positive voltage of the bus capacitor at the moment;
controlling the second group of diagonal power tubes in each full-bridge topology in the ith branch to be connected and the first group of diagonal power tubes to be disconnected, and detecting the negative voltage of the bus capacitor at the moment;
the determining whether the ith branch has a fault according to the voltage of the bus capacitor each time comprises the following steps:
and when the absolute value of the positive voltage and/or the negative voltage of the bus capacitor is not equal to the sum of the voltages of all the energy storage batteries in the ith branch, determining that the ith branch has a fault.
7. The method for detecting the fault of the cascade power tube according to claim 6, wherein the first power tube and the third power tube are a first group of same-side power tubes, and the second power tube and the fourth power tube are a second group of same-side power tubes;
the control is in all in the ith branch road in the full-bridge topology be located two sets of homonymy power tube of different bridge arms and is switched on in turn, detect respectively when every homonymy power tube of group switches on the voltage of first side port, include:
controlling the first group of same-side power tubes in each full-bridge topology in the ith branch circuit to be connected and the second group of same-side power tubes to be disconnected, and detecting the positive voltage of the first side port of each full-bridge topology;
controlling the second group of power tubes on the same side in each full-bridge topology in the ith branch circuit to be connected and the first group of power tubes on the same side to be disconnected, and detecting the negative voltage of the first side port of each full-bridge topology;
the determining the position of the fault power tube in the ith branch according to the voltage of the bus capacitor and the voltage of the first side port at each time comprises the following steps:
determining a full-bridge topology with the positive voltage and/or the negative voltage of the first side port not equal to zero as a fault full-bridge topology in the ith branch;
and determining a fault power tube in the fault full-bridge topology in a combined mode according to the condition that the absolute values of the positive voltage and the negative voltage of the bus capacitor in the ith branch are respectively equal to the sum of the voltages of all the energy storage batteries and the condition that the positive voltage and the negative voltage of the first side port of the fault full-bridge topology are respectively equal to zero.
8. The method according to claim 7, wherein the determining of the failed power tube in the failed full-bridge topology comprises:
if the positive voltage of the bus capacitor is not equal to the sum of the voltages of all the energy storage batteries, the absolute value of the negative voltage of the bus capacitor is equal to the sum of the voltages of all the energy storage batteries, the positive voltage of the first side port is not equal to zero, and the negative voltage of the first side port is equal to zero, determining that the first power tube of the fault full-bridge topology is in fault;
if the positive voltage of the bus capacitor is equal to the sum of the voltages of all the energy storage batteries, the absolute value of the negative voltage of the bus capacitor is not equal to the sum of the voltages of all the energy storage batteries, and the positive voltage of the first side port is equal to zero and the negative voltage of the first side port is not equal to zero, determining that the second power tube of the fault full-bridge topology is faulty;
if the positive voltage of the bus capacitor is equal to the sum of the voltages of all the energy storage batteries, the absolute value of the negative voltage is not equal to the sum of the voltages of all the energy storage batteries, the positive voltage of the first side port is not equal to zero, and the negative voltage of the first side port is equal to zero, determining that the third power tube of the fault full-bridge topology is in fault;
and if the positive voltage of the bus capacitor is not equal to the sum of the voltages of all the energy storage batteries, the absolute value of the negative voltage of the bus capacitor is equal to the sum of the voltages of all the energy storage batteries, and the positive voltage of the first side port is equal to zero and the negative voltage of the first side port is not equal to zero, determining that the fourth power tube of the failed full-bridge topology fails.
9. The cascaded power tube fault detection method according to claim 4, wherein the cascaded full-bridge topology comprises a main controller and N sub-controllers connected with the main controller, and each sub-controller is connected with one branch;
when the fault detection of the cascade power tube is carried out, the main controller controls the switch of the ith branch circuit to be closed so as to enable the ith branch circuit to be in a switching-in state; controlling two groups of diagonal power tubes in all full-bridge topologies in an ith branch in a switching state to be conducted in turn, respectively detecting the voltage of the bus capacitor when each group of diagonal power tubes is conducted, and determining whether the ith branch has a fault according to the voltage of the bus capacitor each time;
when the main controller determines that the ith branch has a fault, the main controller controls two groups of same-side power tubes located in different bridge arms in all full-bridge topologies in the ith branch to be conducted in turn, and informs each sub-controller of the ith branch to detect the voltage of the port of the first side when each group of same-side power tubes are conducted respectively, so that each sub-controller determines the position of the fault power tube in the ith branch according to the voltage of the bus capacitor and the voltage of the port of the first side each time.
10. A readable storage medium, characterized in that it stores a computer program which, when executed on a processor, implements the power tube fault detection method of any one of claims 1 to 3 or the cascaded power tube fault detection method of claims 4 to 9.
CN202110881153.1A 2021-08-02 2021-08-02 Power tube fault detection method and cascade power tube fault detection method Pending CN113589127A (en)

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