CN113571115B - Method for programming memory and memory - Google Patents
Method for programming memory and memory Download PDFInfo
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- CN113571115B CN113571115B CN202110737525.3A CN202110737525A CN113571115B CN 113571115 B CN113571115 B CN 113571115B CN 202110737525 A CN202110737525 A CN 202110737525A CN 113571115 B CN113571115 B CN 113571115B
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- 230000015654 memory Effects 0.000 title claims abstract description 127
- 238000000034 method Methods 0.000 title claims abstract description 32
- 230000008672 reprogramming Effects 0.000 claims description 17
- 238000004904 shortening Methods 0.000 abstract 1
- 238000012795 verification Methods 0.000 description 12
- 238000010586 diagram Methods 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
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Abstract
The invention provides a method for programming a memory, comprising the following steps: performing first programming on the memory at a first programming voltage; verifying a first programming result; counting the number of first programming failure bits, and performing second programming on the memory by using a second programming voltage, wherein the second programming voltage is larger than the first programming voltage; judging whether the failure bit number of the first programming is smaller than a first preset value, if not, verifying the second programming result; counting the number of failed bits of the second programming, judging whether the number of failed bits of the second programming is smaller than a second preset value, if not, programming again until the number of failed bits is smaller than the second preset value, wherein the second preset value is smaller than the first preset value. The invention sets the first preset value as a larger capacity value, judges whether programming is successful according to whether the failure bit number of the first programming is smaller than the first preset value, and if so, does not need to verify the second programming result, thereby greatly shortening the programming time and ensuring the reliability of the memory.
Description
Technical Field
The present invention relates to the field of semiconductors, and more particularly, to a method for programming a memory and a memory.
Background
For three-dimensional memory, memory programming time is a key performance indicator. If the number of pulses employed for the overall programming can be reduced, the overall programming time can be reduced. For a three-dimensional memory in any one mode of SLC/MLC/TLC/QLC (single level cell, multi-level cell, tri-level cell, tetra-level cell) etc., very high programming voltages can be used, programming is done with one/more pulses, but this can lead to fast cell over programming, resulting in reliability degradation.
To ensure reliability, the programming and verification process may be accomplished in a two/multiple pulse programming setup. But this increases the total programming time. Therefore, how to reduce the programming time is a problem that needs to be solved by the prior art.
Disclosure of Invention
The invention aims to provide a method for programming a memory and the memory, which can greatly reduce the programming time of the memory.
In order to solve the above problems, the present invention provides a method of programming a memory, comprising the steps of:
performing first programming on the memory with a first programming voltage;
Verifying a first programming result;
counting the number of failed bits of the first programming, and performing the second programming on the memory with a second programming voltage, wherein the second programming voltage is larger than the first programming voltage;
judging whether the failure bit number of the first programming is smaller than a first preset value, if not, verifying a second programming result;
counting the number of failed bits of the second programming, judging whether the number of failed bits of the second programming is smaller than a second preset value, if not, programming again until the number of failed bits is smaller than the second preset value, wherein the second preset value is smaller than the first preset value.
Further, in the step of counting the number of failed bits of the first programming, a part of pages in the memory are selected for counting.
Further, the step of counting the number of failed bits of the first programming is performed in the same programming pulse as the step of performing the second programming of the memory with the second programming voltage.
Further, counting the number of failed bits of the second programming, judging whether the number of failed bits of the second programming is smaller than a second preset value, if not, the step of programming again further comprises the following steps:
(a) Judging whether the programming times are smaller than the set programming times, if so, adjusting programming voltage, and programming again;
(b) Verifying the result of reprogramming;
(c) Counting the number of failed reprogramming, and judging whether the number of failed reprogramming is smaller than a second preset value or not;
If not, repeating the steps (a) - (c) until the number of failed bits is smaller than the second preset value.
Further, the programming voltage increases as the number of programming times increases.
Further, in the step of determining whether the number of failed bits of the first programming is smaller than a first preset value, if the number of failed bits of the first programming is smaller than the first preset value, ending programming.
Further, counting the number of failed bits of the second programming, and judging whether the number of failed bits of the second programming is smaller than a second preset value, if so, ending programming.
Further, the memory is a non-volatile memory.
The present invention also provides a memory including a program control unit that performs the following method to program the memory:
performing first programming on the memory with a first programming voltage;
Verifying a first programming result;
counting the number of failed bits of the first programming, and performing the second programming on the memory with a second programming voltage, wherein the second programming voltage is larger than the first programming voltage;
judging whether the failure bit number of the first programming is smaller than a first preset value, if not, verifying a second programming result;
counting the number of failed bits of the second programming, judging whether the number of failed bits of the second programming is smaller than a second preset value, if not, programming again until the number of failed bits is smaller than the second preset value, wherein the second preset value is smaller than the first preset value.
Further, the memory includes a memory chip and a controller connected to the memory chip, the memory chip further including:
a storage unit;
A row decoder and a column decoder connected to the memory cells;
A read/write circuit connected to the memory cell; and
The control circuit is connected with the read/write circuit, the control circuit comprises the programming control unit, and the memory unit is read or programmed through the read/write circuit.
The invention has the advantages that the first preset value is set to be a larger fault tolerance value, whether programming is successful is judged according to whether the number of failed bits of the first programming is smaller than the first preset value, if the first programming is successful, verification of a second programming result is not needed, programming is directly ended, programming time is greatly shortened, reliability of the memory can be ensured, and if the first programming is unsuccessful, subsequent conventional programming is performed, so that reliability of the memory is improved. In some embodiments of the present invention, the programming time of the nonvolatile memory can be shortened by about 10% by adopting the programming method of the present invention, the running speed of the memory is greatly improved, and the reliability of the memory can be ensured.
Drawings
FIG. 1 illustrates a method for programming a memory according to an embodiment of the present invention.
Fig. 2 is a schematic diagram of a memory according to an embodiment of the invention.
Detailed Description
The following describes a method for programming a memory and a specific embodiment of the memory in detail with reference to the drawings.
FIG. 1 is a method of programming a memory according to one embodiment of the present invention. Referring to fig. 1, in this embodiment, a method for programming a memory begins in a cell programming state, the method comprising the steps of:
step S101, performing a first programming on the memory with a first programming voltage.
In this embodiment, a nonvolatile memory and a single-level cell mode are described as examples. In other embodiments, the type of memory is not limited to non-volatile memory, nor to single level cell mode.
In this step, the first program voltage is a normal voltage for programming the memory, and the first program voltage is different in magnitude according to the type of the memory.
Referring to step S102, the first programming result is verified.
In this step, the memory after the first programming is performed is read with the program verify voltage as the read voltage. Under the program verification voltage, if a certain bit of the memory is in a conducting state, indicating that the bit is not successfully programmed, the bit is a failed bit; if a bit of the memory is in a non-conductive state, indicating that the bit programming was successful, the bit is a successful bit. Further, in this embodiment, if the bit is a failed bit, the bit is marked as "0", and if the bit is a successful bit, the bit is marked as "1", so that the failed bit is counted later. The labels "0" or "1" are merely for identification purposes, and in other embodiments of the present invention, the fail bit may be labeled "1" and the success bit may be labeled "0", as the invention is not limited in this regard.
In this embodiment, for the memory, voltages of all bits after the first programming thereof are normally distributed in the intervals of V (Min) and V (Max), when a read operation is performed on the memory with a program verification voltage Vpv as a read voltage, bits having bit voltages between V (Min) and Vpv are failed bits, and bits having bit voltages between Vpv and V (Max) are successful bits, and are marked as "1".
Further, in this embodiment, the verification of the first programming result is performed on all the data of the programming page, and in other embodiments of the present invention, in order to further save the programming time, the verification of the first programming result may be performed on part of the data of the programming page, that is, part of the data is selected as a sample from all the data of the programming page.
Referring to step S103, the number of failed bits of the first programming is counted, and the memory is programmed a second time with a second programming voltage, which is greater than the first programming voltage.
In this step, the number of failed bits in step S102 is counted. Specifically, in this embodiment, the number of bits identified as "0" is counted, and the number of bits is the failure number. To further save programming time, in some embodiments of the invention, selecting a partial program page in the memory counts the number of failed bits for the first program.
In this step, to further save programming time, the memory is programmed a second time with a second programming voltage within the same programming pulse. That is, after verifying the first programming result, counting the number of failed bits of the first programming is performed in synchronization with the operation of performing the second programming of the memory at the second programming voltage.
The second programming voltage is greater than the first programming voltage, i.e., in this step, the programming voltage is raised and the memory is programmed a second time with a second programming voltage greater than the first programming voltage. For example, for a certain type of memory, its second programming voltage is increased by 1V on the basis of the first programming voltage. For the memory, if a certain bit fails to perform the first programming, in the second programming, if the programming is performed at a voltage less than or equal to the first programming voltage, the programming still fails, so in this step, the programming voltage is increased, the second programming is performed at a voltage greater than the first programming voltage, the programming success rate is increased, and the programming failure caused by the too low programming voltage is avoided.
Referring to step S104, it is determined whether the number of failed bits of the first programming is smaller than a first preset value. The first preset value is a fault tolerance value allowed by the memory. The first preset value is greater than a conventional fault tolerance value of the memory. For example, for some types of memories, the conventional fault tolerance value is 100 bits, and the first preset value may be set to 800 bits, 1000 bits, etc., it is understood that these values are only examples and not actual values. The value of the first preset value depends on the type of the memory, and different memories, and thus, the specific value of the first preset value can be determined according to the type of the memory. In this embodiment, the first preset value is a specific value, and in some embodiments of the present invention, the first preset value may be a range of values.
If the number of failed bits of the first programming is smaller than the first preset value, the programming is successful, and the programming is directly ended. If the number of failed bits of the first programming is greater than a first preset value, indicating that the programming fails, verifying a second programming result.
The method for verifying the second programming result is the same as the method for verifying the first programming result, and is to apply the program verification voltage as the read voltage to the memory to execute the read operation, judge whether the bit is successfully programmed according to whether the bit is conducted or not, and perform the identification.
Further, in this embodiment, the verification of the second programming result is performed on all the data of the programming page, and in other embodiments of the present invention, in order to further save the programming time, the verification of the second programming result may be performed on part of the data of the programming page, that is, part of the data is selected as a sample from all the data of the programming page. Optionally, if all data of the programming page is adopted for verification in the step of verifying the first programming result, all data of the programming page is adopted for verification in the step, and if part of data of the programming page is adopted for verification in the step of verifying the first programming result, part of data of the programming page is adopted for verification in the step, so that consistency of two verifications is maintained.
Referring to step S105, the number of failed bits of the second programming is counted.
In this step, the number of failed bits in the second programming result is counted. Specifically, in this embodiment, the number of bits of the second programming result, i.e., the number of failed bits of the second programming, is counted as "0".
Please refer to step S106, and determine whether the number of failed bits of the second programming is smaller than a second preset value, wherein the second preset value is smaller than the first preset value.
The second preset value is a conventional fault tolerance value allowed by the memory. For example, for some type of memory, where the normal fault tolerance value is 100 bits, the second preset value is 100 bits, it will be appreciated that this value is merely an example and not an actual value. The value of the second preset value depends on the type of memory, different memories, and thus, a specific value of the second preset value may be determined according to the type of memory. In this embodiment, the second preset value is a specific value, and in some embodiments of the present invention, the second preset value may be a range of values.
If the number of failed bits of the second programming is smaller than the second preset value, the programming is successful, and the programming is directly ended. If the number of failed bits of the second programming is greater than a second preset value, indicating that the programming fails, programming is performed again until the number of failed bits is less than the second preset value.
Further, in this step, if the number of failed bits of the second programming is greater than a second preset value, the method further includes the steps of:
referring to step S107, it is determined whether the programming times are less than the set programming times.
Typically, a set number of programming times is stored in the memory, the set number of programming times being the maximum number of programming times allowed by the memory.
If the programming times are larger than the set programming times, directly ending programming and failing to program. If the programming times are less than or equal to the set programming times, adjusting the programming voltage to perform reprogramming. The adjusting the programming voltage is specifically to increase the programming voltage based on the second programming voltage, and reprogram the program with the increased programming voltage as the programming voltage.
Referring to step S108, the result of the reprogramming is verified.
Referring to step S109, the number of failed bits for reprogramming is counted.
The method for verifying the re-programmed result and counting the number of failed bits in the re-programmed result is the same as the method for verifying the result of the first programming and counting the number of failed bits of the first programming, and will not be described again.
Referring to step S110, it is determined whether the number of failed bits of the reprogramming is smaller than a second preset value.
If the number of failed bits of reprogramming is smaller than a second preset value, indicating that the reprogramming is successful, directly ending programming; if the number of failed bits of the reprogramming is greater than or equal to the second preset value, indicating that the reprogramming fails, repeating the steps S107 to S110 until the number of failed bits is less than the second preset value. Further, the programming voltage is increased with the increase of the programming times, so as to improve the success rate of programming.
The method for programming the memory sets the first preset value as a larger fault tolerance value, judges whether programming is successful according to whether the number of failed bits of the first programming is smaller than the first preset value, if so, the verification of a second programming result is not needed, programming is directly ended, programming time is greatly shortened, reliability of the memory can be ensured, and if not, the subsequent conventional programming is performed to improve the reliability of the memory. In some embodiments of the present invention, the programming time of the nonvolatile memory can be shortened by about 10% by adopting the programming method of the present invention, the running speed of the memory is greatly improved, and the reliability of the memory can be ensured.
The invention also provides a memory programmed by adopting the method. Fig. 2 is a schematic diagram of a memory according to an embodiment of the invention. The memory 20 includes a program control unit. The program control unit performs the following method to program the memory: performing first programming on the memory with a first programming voltage; verifying a first programming result; counting the number of failed bits of the first programming, and performing the second programming on the memory with a second programming voltage, wherein the second programming voltage is larger than the first programming voltage; judging whether the failure bit number of the first programming is smaller than a first preset value, if not, verifying a second programming result; counting the number of failed bits of the second programming, judging whether the number of failed bits of the second programming is smaller than a second preset value, if not, programming again until the number of failed bits is smaller than the second preset value, wherein the second preset value is smaller than the first preset value.
The memory of the invention sets the first preset value as a larger fault tolerance value, judges whether programming is successful according to whether the number of failed bits of the first programming is smaller than the first preset value, and if so, the second programming result is not required to be verified, programming is directly ended, programming time is greatly shortened, and reliability of the memory can be ensured.
Further, the memory 20 includes a memory chip 21 and a controller 22 connected to the memory chip 21.
The memory chip 21 further includes: a storage unit 201; row decoders 204A and 204B and column decoders 205A and 205B connected to the memory cell 201; read/write circuits 203A and 203B connected to the memory cell 201; and a control circuit 202 connected to the read/write circuits 203A and 203B.
The control circuit 202 includes a program control unit that reads or programs the memory cell 201 through read/write circuits 203A and 203B. In one embodiment, the memory cell 201 is addressable by word lines via row decoders 204A and 204B and by bit lines via column decoders 205A and 205B. In one embodiment, commands and data are transferred between the host 23 and the controller 22, and between the controller 22 and the memory chip 21 via signal lines.
The foregoing is merely a preferred embodiment of the present invention and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present invention, which are intended to be comprehended within the scope of the present invention.
Claims (17)
1. A method of programming a memory, comprising the steps of:
performing first programming on the memory with a first programming voltage;
Verifying a first programming result;
counting the number of failed bits of the first programming, and performing the second programming on the memory with a second programming voltage, wherein the second programming voltage is larger than the first programming voltage;
judging whether the failure bit number of the first programming is smaller than a first preset value, if not, verifying a second programming result, and if so, ending programming; wherein the first preset value is greater than a conventional fault tolerance value of the memory;
counting the number of failed bits of the second programming, judging whether the number of failed bits of the second programming is smaller than a second preset value, if not, programming again until the number of failed bits is smaller than the second preset value, wherein the second preset value is smaller than the first preset value.
2. The method of programming a memory according to claim 1, wherein in the step of counting the number of failed bits of the first programming, a portion of pages in the memory is selected for counting.
3. The method of programming a memory of claim 1, wherein the step of counting the number of failed bits of the first programming is performed in the same programming pulse as the step of programming the memory a second time with a second programming voltage.
4. The method of programming a memory of claim 1, wherein counting a number of failed bits of the second programming, determining whether the number of failed bits of the second programming is less than a second predetermined value, and if not, the step of programming again further comprises:
(a) Judging whether the programming times are smaller than the set programming times, if so, adjusting programming voltage, and programming again;
(b) Verifying the result of reprogramming;
(c) Counting the number of failed reprogramming, and judging whether the number of failed reprogramming is smaller than a second preset value or not;
If not, repeating the steps (a) - (c) until the number of failed bits is smaller than the second preset value.
5. The method of programming a memory of claim 4, wherein the programming voltage is incremented as the number of programming increases.
6. The method of programming a memory according to claim 1, wherein in the step of determining whether the number of failed bits of the first programming is less than a first predetermined value, if the number of failed bits of the first programming is less than the first predetermined value, ending programming.
7. The method of claim 1, wherein in the step of counting the number of failed bits of the second programming and determining whether the number of failed bits of the second programming is less than a second predetermined value, ending programming if the number of failed bits of the second programming is less than the second predetermined value.
8. The method of claim 1, wherein the memory is a non-volatile memory.
9. A memory comprising a programming control unit, wherein the programming control unit performs the following method to program the memory:
performing first programming on the memory with a first programming voltage;
Verifying a first programming result;
counting the number of failed bits of the first programming, and performing the second programming on the memory with a second programming voltage, wherein the second programming voltage is larger than the first programming voltage;
judging whether the failure bit number of the first programming is smaller than a first preset value, if not, verifying a second programming result, and if so, ending programming; wherein the first preset value is greater than a conventional fault tolerance value of the memory;
counting the number of failed bits of the second programming, judging whether the number of failed bits of the second programming is smaller than a second preset value, if not, programming again until the number of failed bits is smaller than the second preset value, wherein the second preset value is smaller than the first preset value.
10. The memory of claim 9 wherein in the step of counting the number of failed bits of the first program, a portion of the pages in the memory are selected for counting.
11. The memory of claim 9 wherein the step of counting the number of failed bits of the first program is performed in the same programming pulse as the step of programming the memory a second time at a second programming voltage.
12. The memory of claim 9, wherein counting a number of failed bits of the second programming, determining whether the number of failed bits of the second programming is less than a second predetermined value, and if not, the step of re-programming further comprises:
(a) Judging whether the programming times are smaller than the set programming times, if so, adjusting programming voltage, and programming again;
(b) Verifying the result of reprogramming;
(c) Counting the number of failed reprogramming, and judging whether the number of failed reprogramming is smaller than a second preset value or not;
If not, repeating the steps (a) - (c) until the number of failed bits is smaller than the second preset value.
13. The memory of claim 12, wherein the programming voltage increases as the number of programming increases.
14. The memory according to claim 9, wherein in the step of determining whether the number of failed bits of the first programming is less than a first preset value, if the number of failed bits of the first programming is less than the first preset value, programming is ended.
15. The memory according to claim 9, wherein in the step of counting the number of failed bits of the second programming and determining whether the number of failed bits of the second programming is less than a second predetermined value, if the number of failed bits of the second programming is less than the second predetermined value, the programming is ended.
16. The memory of claim 9, wherein the memory is a non-volatile memory.
17. The memory of claim 9, wherein the memory comprises a memory chip and a controller coupled to the memory chip, the memory chip further comprising:
a storage unit;
A row decoder and a column decoder connected to the memory cells;
A read/write circuit connected to the memory cell; and
The control circuit is connected with the read/write circuit, the control circuit comprises the programming control unit, and the memory unit is read or programmed through the read/write circuit.
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| CN102347069B (en) * | 2011-05-26 | 2013-04-03 | 忆正存储技术（武汉）有限公司 | Programming method for multi-layered flash memory array and switching control method thereof |
| KR20150059498A (en) * | 2013-11-22 | 2015-06-01 | 에스케이하이닉스 주식회사 | Semicondcutor memory apparatus |
| US10290360B2 (en) * | 2015-11-02 | 2019-05-14 | Gigadevice Semiconductor (Shanghai) Inc. | Methods, systems, and media for programming a storage device |
| CN106920571A (en) * | 2015-12-25 | 2017-07-04 | 北京兆易创新科技股份有限公司 | A kind of programmed method of Nand Flash |
| US10445173B2 (en) * | 2017-06-26 | 2019-10-15 | Macronix International Co., Ltd. | Method and device for programming non-volatile memory |
| US11049578B1 (en) * | 2020-02-19 | 2021-06-29 | Sandisk Technologies Llc | Non-volatile memory with program verify skip |
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