CN113541707A - Filtering method, communication device, chip and module equipment thereof - Google Patents
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Abstract
The application discloses a filtering method, a communication device, a chip and module equipment thereof. The method comprises the following steps: receiving a signal from a target subchannel in a downlink channel; the downlink channel comprises a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels; and filtering the signals according to the frequency domain filtering coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel. By implementing the method provided by the embodiment of the application, the receiving performance is favorably improved.
Description
Technical Field
The present application relates to the field of communications technologies, and in particular, to a filtering method, a communication device, a chip, and a module device thereof.
Background
In wireless communication, interference signals (e.g., noise) may exist in the received signals due to factors of the signals themselves (e.g., reflection or refraction), environmental factors (e.g., physical obstacles, weather), and the like. At this time, the received signal needs to be processed, such as filtered, to filter the interference signal and obtain a useful signal. However, the filtering error may cause the receiving performance to be poor, and may even cause the signal not to be restored, which may affect the transmission quality of the signal. Therefore, how to reduce the error of the filtering result and obtain more accurate frequency domain channel estimation to improve the receiving performance becomes a problem to be solved at present.
Disclosure of Invention
The application discloses a filtering method, a communication device, a chip and module equipment thereof, which are beneficial to improving the receiving performance.
In a first aspect, the present application provides a filtering method, including: receiving a signal from a target subchannel in a downlink channel; the downlink channel comprises a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels; and filtering the signals according to the frequency domain filtering coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel.
In one implementation, the signal includes one or more sub-signals, the number of sub-signals included in the signal is the same as the number of target sub-channels, and the number of target sub-channels is one or more; the filtering the signal according to the frequency domain filter coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel includes: for each target sub-channel in the one or more target sub-channels, determining an original channel matrix of the target sub-channel according to the sub-signals received from the target sub-channel; multiplying the frequency domain filter coefficient corresponding to the target sub-channel with the original channel matrix of the target sub-channel to obtain a channel estimation matrix of the target sub-channel; and obtaining a channel estimation matrix of the downlink channel according to the channel estimation matrix of each target sub-channel.
In an implementation manner, the obtaining a channel estimation matrix of a downlink channel according to a channel estimation matrix of each target subchannel includes: and when the number of the target sub-channels is multiple, cascading channel estimation matrixes corresponding to each target sub-channel in the multiple target sub-channels to obtain a channel estimation matrix of the downlink channel.
In one implementation, a bandwidth of each of the plurality of sub-channels is a preset bandwidth.
In one implementation, the frequency domain filter coefficients of the target sub-channel are a filter coefficient matrix.
In a second aspect, the present application provides a communication device for implementing the units of the method in the first aspect and any possible implementation manner thereof.
In a third aspect, the present application provides a communication device comprising a transceiver and a processor configured to perform the method of the first aspect and any possible implementation manner thereof.
In a fourth aspect, the present application provides a communications apparatus comprising a transceiver, a processor, and a memory for storing computer-executable instructions; the processor is configured to invoke the program code from the memory to perform the method of the first aspect and any possible implementation thereof.
In a fifth aspect, the present application provides a chip, configured to receive a signal from a target subchannel in a downlink channel; the downlink channel comprises a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels; and filtering the signals according to the frequency domain filtering coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel.
In a sixth aspect, the present application provides a module device, which includes a communication module, a power module, a storage module, and a chip module, wherein: the power module is used for providing electric energy for the module equipment; the storage module is used for storing data and instructions; the communication module is used for carrying out internal communication of the module equipment or is used for carrying out communication between the module equipment and external equipment; this chip module is used for: receiving a signal from a target subchannel in a downlink channel; the downlink channel comprises a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels; and filtering the signals according to the frequency domain filtering coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is an architecture diagram of a communication system according to an embodiment of the present application;
fig. 2 is a flowchart of a filtering method according to an embodiment of the present application;
fig. 3 is a flowchart of another filtering method provided in an embodiment of the present application;
fig. 4 is a schematic structural diagram of a communication device according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of another communication device according to an embodiment of the present application;
fig. 6 is a schematic structural diagram of a module apparatus according to an embodiment of the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, fig. 1 is an architecture diagram of a communication system according to an embodiment of the present disclosure. As shown in fig. 1, a communication system may include a receiving device 101 and a transmitting device 102. The receiving device 101 may be configured to receive signals transmitted by the transmitting device 102. The method provided by the embodiment of the application mainly relates to the receiving device 101. The receiving device 101 may be disposed inside the terminal device or the network device, or may be disposed outside the terminal device or the network device. Optionally, the receiving device 101 may also be a terminal device, which is not limited in this application.
The terminal device is an entity, such as a mobile phone, on the user side for receiving or transmitting signals. A terminal device may also be referred to as a terminal (terminal), a User Equipment (UE), a Mobile Station (MS), a Mobile Terminal (MT), etc. The terminal device may be a mobile phone (mobile phone), a wearable device, a tablet computer (Pad), a computer with a wireless transceiving function, or the like. A network device is an entity on the network side for transmitting or receiving signals. For example, the network device may be an evolved NodeB (eNB), a transmission point (TRP), a next generation base station (gNB) in the NR system, a base station in other future mobile communication systems, or an access node in a wireless fidelity (WiFi) system. The embodiments of the present application do not limit the specific technologies and the specific device forms used by the terminal device and the network device.
It should be noted that the technical solutions of the embodiments of the present application can be applied to various communication systems. For example: a Long Term Evolution (LTE) system, a 5th generation (5G) mobile communication system, and a 5G New Radio (NR) system. Optionally, the method of the embodiment of the present application is also applicable to various future communication systems, such as a 6G system or other communication networks.
Referring to fig. 2, fig. 2 is a flowchart illustrating a filtering method according to an embodiment of the present disclosure. The filtering method may be implemented by the receiving device, or may be implemented by a chip in the receiving device. As shown in fig. 2, the filtering method includes, but is not limited to, the following steps S201 to S202.
Step S201, receiving equipment receives signals from a target sub-channel in a downlink channel; the downlink channel includes a plurality of subchannels, and the target subchannel is included in the plurality of subchannels.
In the method provided in this embodiment of the present application, the downlink channel may be divided into a plurality of sub-channels, and the receiving device may monitor the plurality of sub-channels to determine which sub-channel or sub-channels of the plurality of sub-channels the signal actually transmits through. The target sub-channel is a sub-channel for actually transmitting the signal. Wherein, the number of the target sub-channels may be one or more.
Illustratively, the downlink channel may be divided into 4 subchannels. Wherein, there may be 2 target subchannels in the 4 subchannels, and signals are received through the 2 target subchannels. Optionally, there may also be 4 target subchannels in the 4 subchannels, and signals are received through the 4 target subchannels. In other words, the number of target subchannels is less than or equal to the number of subchannels included in the downlink channel.
In one implementation, a bandwidth of each of the plurality of sub-channels may be a preset bandwidth. Illustratively, the preset bandwidth may be 25M. It should be noted that the downlink channel may be equally divided into a plurality of subchannels, and thus, the bandwidth of each subchannel may be the same value. For example: under the condition that the bandwidth of a downlink channel is 100M, the downlink channel can be divided into 4 sub-channels, and the bandwidth of each sub-channel is 25M; under the condition that the bandwidth of the downlink channel is 200M, the downlink channel may be divided into 8 sub-channels, and the bandwidth of each sub-channel is 25M.
It should be noted that, in a case that the bandwidth of the downlink channel cannot be evenly divided into a preset bandwidth (e.g. 25M), the bandwidth of the sub-channel may be as close to 25M as possible to meet the requirement of the preset bandwidth. For example: in the case that the bandwidth of the downlink channel is 55M, the downlink channel may be equally divided into 2 sub-channels, and the bandwidth of each sub-channel is 27.5M. The bandwidth of the downlink channel is only used for example and does not limit the present application. It should be noted that the above-mentioned manner of equally dividing the downlink channel into a plurality of sub-channels is used for example, and is not limited. Optionally, the downlink channel may also be divided into a plurality of subchannels with different bandwidths.
In one implementation, the signal includes one or more sub-signals. Optionally, the number of sub-signals included in the signal may be the same as the number of target sub-channels, and in this case, different sub-signals may be transmitted on different target sub-channels. In other words, the receiving device may receive the corresponding sub-signals through different target sub-channels, respectively. For example, taking 2 target subchannels as an example, the receiving device may receive sub-signal 1 through target subchannel 1 and sub-signal 2 through target subchannel 2. It is understood that if 2 target sub-channels receive a signal, the signal can be considered to be divided into 2 sub-signals.
By the method provided by the embodiment, the downlink channel is divided into a plurality of sub-channels, and the signal can be received through the target sub-channel, so that the signal can be divided into one or more sub-channels, so as to process the one or more sub-channels respectively, and further reduce the filtering error.
Step S202, filtering the signals according to the frequency domain filter coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel.
Since the signal may experience different frequency-domain selection channels during transmission. If the same filter coefficient is used for filtering after the signal is received in the downlink channel, a large error may be generated in the filtering result, thereby causing deterioration of the receiving performance. Therefore, in the method provided by the embodiment of the present application, the sub-signals may be filtered respectively through the frequency domain filter coefficients corresponding to the target sub-channels, so as to reduce errors generated by filtering.
The frequency domain filter coefficient corresponding to the target sub-channel can be obtained through a reference signal associated with a Quasi-Co-Location-type a (QCL-type a). The QCL-type a includes four channel attributes: doppler shift, doppler spread, average delay, and delay spread, wherein the doppler spread and delay spread are useful for calculating frequency domain filter coefficients of the target subchannel. It should be noted that, before receiving a signal through a target subchannel, the target subchannel may receive a reference signal first, and may determine which reference signal the target subchannel uses the corresponding frequency-domain filter coefficient according to a position of the target subchannel where the reference signal is located. For example: if the reference signal 1 is received through the target subchannel 1, the frequency domain filter coefficient of the target subchannel 1 may be obtained through the reference signal 1.
It will be appreciated that different subchannels may correspond to different frequency domain filter coefficients. For example: if the downlink channel is divided into 2 sub-channels, there may be 2 corresponding frequency domain filter coefficients for the 2 sub-channels, that is, the frequency domain filter coefficient f1 for sub-channel 1 and the frequency coefficient f2 for sub-channel 2.
In an implementation manner, the filtering the signal according to the frequency domain filter coefficient corresponding to the target subchannel to obtain a channel estimation matrix of the downlink channel includes: for each target sub-channel in one or more target sub-channels, determining an original channel matrix of the target sub-channel according to the sub-signals received from the target sub-channel; multiplying the frequency domain filter coefficient corresponding to the target sub-channel with the original channel matrix of the target sub-channel to obtain a channel estimation matrix of the target sub-channel; and obtaining a channel estimation matrix of the downlink channel according to the channel estimation matrix of each target sub-channel. The frequency domain filter coefficient of the target sub-channel may be a filter coefficient matrix.
The channel matrix is a matrix form of transmission probability of a common discrete single-symbol channel, and can reflect state information of the channel. The original channel matrix may be an original channel matrix obtained by descrambling a signal after the signal is received by the channel. It will be appreciated that the original channel matrix may be a channel matrix that has not been processed by the filter coefficients.
If the downlink channel includes a subchannel i, the channel estimation matrix of the subchannel i can be obtained by equation 1:
Hsbi_flt＝fi*Hsbi ①
the Hsbi _ flt may be a channel estimation matrix of the subchannel i, fi may be a frequency domain filter coefficient of the subchannel i, and Hsbi may be an original channel matrix of the subchannel i. If the number of the sub-channels included in the downlink channel is N, i is greater than or equal to 0 and less than or equal to N-1 (or i is greater than or equal to 1 and less than or equal to N). Wherein N and i are integers.
In an implementation manner, the obtaining a channel estimation matrix of a downlink channel according to a channel estimation matrix of each target subchannel includes: and under the condition that the number of the target sub-channels is multiple, cascading channel estimation matrixes corresponding to each target sub-channel in the multiple target sub-channels to obtain a channel estimation matrix of the downlink channel.
Optionally, the cascade connection may be performed in a sequence from a low number to a high number of the sub-channels, so as to obtain a channel estimation matrix of the downlink channel. For example, i in subchannel i is the number of the subchannel. Taking the downlink signal divided into 4 sub-channels (sub-channel 0, sub-channel 1, sub-channel 2, and sub-channel 3) as an example, the channel estimation matrix of the downlink channel can be obtained by equation 2:
Hab_flt＝[Hsb0_fltHsb1_fltHsb2_fltHsb3_flt] ②
the Hab _ flt may be a channel estimation matrix of the downlink channel. As can be seen from the foregoing, Hsb0_ flt, Hsb1_ flt, Hsb2_ flt, and Hsb3_ flt may correspond to channel estimation matrices for subchannel 0, subchannel 1, subchannel 2, and subchannel 3, respectively. It can be seen that the serial connection is performed in the order of the numbers of the sub-channels from low to high in formula 2.
It is understood that if the target sub-channels are sub-channel 0, sub-channel 2 and sub-channel 3, they are also concatenated in order from low to high, i.e.: the concatenation is performed in the order of subchannel 0, subchannel 2, and subchannel 3. Since the target subchannel may be one or more of the subchannels, the number of the target subchannel may be discontinuous, which is not limited in this application.
For example, assuming that the downlink channel is divided into 2 subchannels, subchannel 1 and subchannel 2, if the channel estimation matrix of subchannel 1 is:
and the channel estimation matrix for subchannel 2 is:
the channel estimation matrix of the downlink channel can be obtained from the above equation 2, i.e. the following matrix:
wherein, a0、a1、a2And b0、b1、b2And may be a matrix of rows and columns, which is not limited in this application. It should be noted that the column matrix may be a channel estimation matrix of the downlink channel, and may also be a sub-channel matrix in a channel matrix of a port (e.g., port0, i.e., port 0).
As shown in fig. 3, fig. 3 is a flowchart of another filtering method provided in the embodiment of the present application. Fig. 3 illustrates an example of 4 target subchannels being present, which does not limit the present application. As can be seen from fig. 3, the original channel matrix of the sub-channel and the frequency domain filter coefficient of the corresponding sub-channel are filtered by a filter, so as to obtain the channel estimation matrix of each sub-channel, and thus the channel estimation matrices of each sub-channel can be concatenated to obtain the channel estimation matrix of the downlink channel.
By the method provided by the embodiment, the sub-signals can respectively pass through the corresponding target sub-channels, so that the frequency domain filter coefficients of each target sub-channel are utilized to respectively process the sub-signals, the filter error of each sub-signal is reduced, more accurate frequency domain channel estimation is obtained, and the receiving performance is provided.
Referring to fig. 4, fig. 4 is a schematic structural diagram of a communication device according to an embodiment of the present disclosure. The device may be a terminal device, or a device in the terminal device, or a device capable of being used in cooperation with the terminal device. The communication apparatus shown in fig. 4 may comprise a receiving unit 401 and a processing unit 402. The processing unit 402 is configured to perform data processing. Wherein:
the receiving unit 401 is configured to receive a signal from a target subchannel in a downlink channel; the downlink channel comprises a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels;
the processing unit 402 is configured to filter the signal according to the frequency domain filter coefficient corresponding to the target subchannel, so as to obtain a channel estimation matrix of the downlink channel.
In one implementation, the signal includes one or more sub-signals, the number of sub-signals included in the signal is the same as the number of target sub-channels, and the number of target sub-channels is one or more; the filtering the signal according to the frequency domain filter coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel includes: the processing unit 402 is further configured to, for each target subchannel of the one or more target subchannels, determine an original channel matrix of the target subchannel according to a received subchannel from the target subchannel; the processing unit 402 is further configured to multiply a frequency domain filtering coefficient corresponding to a target subchannel by an original channel matrix of the target subchannel to obtain a channel estimation matrix of the target subchannel; the processing unit 402 is further configured to obtain a channel estimation matrix of the downlink channel according to the channel estimation matrix of each target subchannel.
In an implementation manner, the obtaining a channel estimation matrix of a downlink channel according to a channel estimation matrix of each target subchannel includes: when the number of the target subchannels is multiple, the processing unit 402 is further configured to concatenate the channel estimation matrices corresponding to each of the multiple target subchannels to obtain a channel estimation matrix of the downlink channel.
In one implementation, a bandwidth of each of the plurality of sub-channels is a preset bandwidth.
In one implementation, the frequency domain filter coefficients of the target sub-channel are a filter coefficient matrix.
According to the embodiment of the present application, the units in the communication apparatus shown in fig. 4 may be respectively or entirely combined into one or several other units to form the unit, or some unit(s) therein may be further split into multiple units with smaller functions to form the unit(s), which may achieve the same operation without affecting the achievement of the technical effect of the embodiment of the present application. The units are divided based on logic functions, and in practical application, the functions of one unit can be realized by a plurality of units, or the functions of a plurality of units can be realized by one unit. In other embodiments of the present application, the communication device may also include other units, and in practical applications, the functions may also be implemented by being assisted by other units, and may be implemented by cooperation of a plurality of units.
The communication device may be, for example: a chip, or a chip module. Each module included in each apparatus and product described in the above embodiments may be a software module, a hardware module, or a part of the software module and a part of the hardware module. For example, for each device or product applied to or integrated in a chip, each module included in the device or product may be implemented by hardware such as a circuit, or at least a part of the modules may be implemented by a software program running on a processor integrated in the chip, and the rest (if any) part of the modules may be implemented by hardware such as a circuit; for each device and product applied to or integrated with the chip module, each module included in the device and product may be implemented in a hardware manner such as a circuit, and different modules may be located in the same component (e.g., a chip, a circuit module, etc.) or different components of the chip module, or at least a part of the modules may be implemented in a software program running on a processor integrated within the chip module, and the rest (if any) part of the modules may be implemented in a hardware manner such as a circuit; for each device and product applied to or integrated in the terminal, each module included in the device and product may be implemented by using hardware such as a circuit, different modules may be located in the same component (e.g., a chip, a circuit module, etc.) or different components in the terminal, or at least a part of the modules may be implemented by using a software program running on a processor integrated in the terminal, and the rest (if any) part of the modules may be implemented by using hardware such as a circuit.
The embodiments of the present application and the embodiments of the foregoing method are based on the same concept, and the technical effects thereof are also the same, and for the specific principle, reference is made to the description of the foregoing embodiments, which is not repeated herein.
Referring to fig. 5, fig. 5 is a communication device 50 according to an embodiment of the present disclosure. As shown in fig. 5, the communication device 50 may include a transceiver 501 and a processor 502. Optionally, the communication device may further comprise a memory 503. The transceiver 501, the processor 502, and the memory 503 may be connected by a bus 504 or other means. The bus lines are shown in fig. 5 as thick lines, and the connection between other components is merely illustrative and not intended to be limiting. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown in FIG. 5, but this is not intended to represent only one bus or type of bus.
The coupling in the embodiments of the present application is an indirect coupling or a communication connection between devices, units or modules, and may be an electrical, mechanical or other form for information interaction between the devices, units or modules. The specific connection medium among the transceiver 501, the processor 502 and the memory 503 is not limited in the embodiments of the present application.
The Processor 502 may be a Central Processing Unit (CPU), and the Processor 502 may also be other general purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor, and optionally, the processor 502 may be any conventional processor or the like. Wherein:
a memory 503 for storing program instructions.
A processor 502 for invoking program instructions stored in memory 503 for:
the transceiver 501 receives a signal from a target subchannel in the downlink channel; the downlink channel comprises a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels;
the processor 502 is further configured to filter the signal according to the frequency domain filter coefficient corresponding to the target sub-channel, so as to obtain a channel estimation matrix of the downlink channel.
In one implementation, the signal includes one or more sub-signals, the number of sub-signals included in the signal is the same as the number of target sub-channels, and the number of target sub-channels is one or more; the filtering the signal according to the frequency domain filter coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel includes: the processor 502 is further configured to determine, for each target subchannel of the one or more target subchannels, an original channel matrix of the target subchannel according to a received subchannel from the target subchannel; the processor 502 is further configured to multiply a frequency domain filtering coefficient corresponding to a target subchannel by an original channel matrix of the target subchannel to obtain a channel estimation matrix of the target subchannel; the processor 502 is further configured to obtain a channel estimation matrix of the downlink channel according to the channel estimation matrix of each target subchannel.
In an implementation manner, the obtaining a channel estimation matrix of a downlink channel according to a channel estimation matrix of each target subchannel includes: when the number of the target subchannels is multiple, the processor 502 is further configured to concatenate the channel estimation matrices corresponding to each of the multiple target subchannels to obtain a channel estimation matrix of the downlink channel.
In one implementation, a bandwidth of each of the plurality of sub-channels is a preset bandwidth.
In one implementation, the frequency domain filter coefficients of the target sub-channel are a filter coefficient matrix.
In the embodiment of the present application, the method provided by the embodiment of the present application may be implemented by running a computer program (including program codes) capable of executing the steps involved in the corresponding method as shown in fig. 2 on a general-purpose computing device such as a computer including a Central Processing Unit (CPU), a random access storage medium (RAM), a read-only storage medium (ROM), and the like as well as a storage element. The computer program may be recorded on a computer-readable recording medium, for example, and loaded and executed in the above-described computing apparatus via the computer-readable recording medium.
Based on the same inventive concept, the principle and the advantageous effect of the communication apparatus to solve the problem provided in the embodiment of the present application are similar to the principle and the advantageous effect of the communication apparatus to solve the problem in the embodiment of the method of the present application, and for brevity, the principle and the advantageous effect of the implementation of the method may be referred to, and are not described herein again.
The embodiment of the present application further provides a chip, where the chip may perform relevant steps of the terminal device in the foregoing method embodiment. The chip is used for: receiving a signal from a target subchannel in a downlink channel; the downlink channel comprises a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels; and filtering the signals according to the frequency domain filtering coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel.
In one implementation, the signal includes one or more sub-signals, the number of sub-signals included in the signal is the same as the number of target sub-channels, and the number of target sub-channels is one or more; the filtering the signal according to the frequency domain filter coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel includes: the chip is also used for determining an original channel matrix of the target sub-channel according to the sub-signals received from the target sub-channel aiming at each target sub-channel in the one or more target sub-channels; the chip is also used for multiplying the frequency domain filter coefficient corresponding to the target sub-channel with the original channel matrix of the target sub-channel to obtain a channel estimation matrix of the target sub-channel; the chip is also used for obtaining a channel estimation matrix of the downlink channel according to the channel estimation matrix of each target sub-channel.
In an implementation manner, the obtaining a channel estimation matrix of a downlink channel according to a channel estimation matrix of each target subchannel includes: and when the number of the target sub-channels is multiple, the chip is further configured to concatenate channel estimation matrices corresponding to each of the multiple target sub-channels to obtain a channel estimation matrix of the downlink channel.
In one implementation, a bandwidth of each of the plurality of sub-channels is a preset bandwidth.
In one implementation, the frequency domain filter coefficients of the target sub-channel are a filter coefficient matrix.
In one implementation, the chip includes at least one processor, at least one first memory, and at least one second memory; the at least one first memory and the at least one processor are interconnected through a line, and instructions are stored in the first memory; the at least one second memory and the at least one processor are interconnected through a line, and the second memory stores the data required to be stored in the method embodiment.
For each device or product applied to or integrated in the chip, each module included in the device or product may be implemented by hardware such as a circuit, or at least a part of the modules may be implemented by a software program running on a processor integrated in the chip, and the rest (if any) part of the modules may be implemented by hardware such as a circuit.
Referring to fig. 6, fig. 6 is a schematic structural diagram of a module apparatus according to an embodiment of the present disclosure. The module device 60 can perform the steps related to the terminal device in the foregoing method embodiments, and the module device 60 includes: a communication module 601, a power module 602, a memory module 603 and a chip module 604.
The power module 602 is configured to provide power for a module device; the storage module 603 is used for storing data and instructions; the communication module 601 is used for performing internal communication of module equipment or for performing communication between the module equipment and external equipment; the chip module 604 is configured to:
receiving a signal from a target subchannel in a downlink channel; the downlink channel comprises a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels;
and filtering the signals according to the frequency domain filtering coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel.
In one implementation, the signal includes one or more sub-signals, the number of sub-signals included in the signal is the same as the number of target sub-channels, and the number of target sub-channels is one or more; the filtering the signal according to the frequency domain filter coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel includes: the chip module 604 is further configured to, for each target subchannel of the one or more target subchannels, determine an original channel matrix of the target subchannel according to a received subchannel from the target subchannel; the chip module 604 is further configured to multiply a frequency domain filtering coefficient corresponding to a target sub-channel with an original channel matrix of the target sub-channel to obtain a channel estimation matrix of the target sub-channel; the chip module 604 is further configured to obtain a channel estimation matrix of the downlink channel according to the channel estimation matrix of each target subchannel.
In an implementation manner, the obtaining a channel estimation matrix of a downlink channel according to a channel estimation matrix of each target subchannel includes: in the case that the number of the target sub-channels is multiple, the chip module 604 is further configured to concatenate the channel estimation matrices corresponding to each of the multiple target sub-channels to obtain a channel estimation matrix of the downlink channel.
In one implementation, a bandwidth of each of the plurality of sub-channels is a preset bandwidth.
In one implementation, the frequency domain filter coefficients of the target sub-channel are a filter coefficient matrix.
For each device and product applied to or integrated in the chip module, each module included in the device and product may be implemented by using hardware such as a circuit, and different modules may be located in the same component (e.g., a chip, a circuit module, etc.) or different components of the chip module, or at least some of the modules may be implemented by using a software program running on a processor integrated in the chip module, and the rest (if any) of the modules may be implemented by using hardware such as a circuit.
The embodiment of the present application further provides a computer-readable storage medium, in which one or more instructions are stored, and the one or more instructions are adapted to be loaded by a processor and execute the method provided by the foregoing method embodiment.
Embodiments of the present application also provide a computer program product containing instructions, which when run on a computer, cause the computer to perform the method provided by the above method embodiments.
It should be noted that, for simplicity of description, the above-mentioned embodiments of the method are described as a series of acts or combinations, but those skilled in the art should understand that the present application is not limited by the order of acts described, as some steps may be performed in other orders or simultaneously according to the present application. Further, those skilled in the art should also appreciate that the embodiments described in the specification are preferred embodiments and that the acts and modules referred to are not necessarily required in this application.
The steps in the method of the embodiment of the application can be sequentially adjusted, combined and deleted according to actual needs.
The modules in the device can be merged, divided and deleted according to actual needs.
Those skilled in the art will appreciate that all or part of the steps in the methods of the above embodiments may be implemented by hardware related to instructions of a program, which may be stored in a computer readable storage medium, which may include: flash disks, Read-Only memories (ROMs), Random Access Memories (RAMs), magnetic or optical disks, and the like.
The above disclosure is only one preferred embodiment of the present invention, which is only a part of the present invention, and certainly not intended to limit the scope of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Claims (10)
1. A method of filtering, the method comprising:
receiving a signal from a target subchannel in a downlink channel; the downlink channel comprises a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels;
and filtering the signal according to the frequency domain filtering coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel.
2. The method of claim 1, wherein the signal comprises one or more sub-signals, and wherein the signal comprises the same number of sub-signals as the number of target sub-channels, and wherein the number of target sub-channels is one or more;
the filtering the signal according to the frequency domain filter coefficient corresponding to the target sub-channel to obtain the channel estimation matrix of the downlink channel includes:
for each target subchannel of the one or more target subchannels, determining an original channel matrix of the target subchannel from the received subchannel;
multiplying the frequency domain filter coefficient corresponding to the target sub-channel with the original channel matrix of the target sub-channel to obtain a channel estimation matrix of the target sub-channel;
and obtaining a channel estimation matrix of the downlink channel according to the channel estimation matrix of each target sub-channel.
3. The method according to claim 2, wherein said obtaining a channel estimation matrix of the downlink channel according to the channel estimation matrix of each target sub-channel comprises:
and when the number of the target sub-channels is multiple, cascading channel estimation matrixes corresponding to each target sub-channel in the multiple target sub-channels to obtain a channel estimation matrix of the downlink channel.
4. The method according to any one of claims 1 to 3, wherein the bandwidth of each of the plurality of sub-channels is a preset bandwidth.
5. The method according to any one of claims 1 to 3, wherein the frequency domain filter coefficients of the target sub-channel are a filter coefficient matrix.
6. A communication apparatus comprising means for performing the method of any of claims 1-5.
7. A communications apparatus, comprising a processor;
the processor is used for executing the method of any one of claims 1-5.
8. The communications apparatus of claim 7, the communications apparatus further comprising a memory:
the memory for storing a computer program;
the processor, in particular for calling the computer program from the memory, to execute the method according to any of claims 1 to 5.
9. A chip, characterized in that,
the chip is used for receiving signals from a target sub-channel in a downlink channel; the downlink channel comprises a plurality of sub-channels, and the target sub-channel is included in the plurality of sub-channels;
and filtering the signal according to the frequency domain filtering coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel.
10. The utility model provides a module equipment, its characterized in that, module equipment includes communication module, power module, storage module and chip module, wherein:
the power supply module is used for providing electric energy for the module equipment;
the storage module is used for storing data and instructions;
the communication module is used for carrying out internal communication of module equipment or is used for carrying out communication between the module equipment and external equipment;
the chip module is used for:
receiving a signal from a target subchannel in a downlink channel, the downlink channel comprising a plurality of subchannels, the target subchannel being comprised in the plurality of subchannels;
and filtering the signal according to the frequency domain filtering coefficient corresponding to the target sub-channel to obtain a channel estimation matrix of the downlink channel.
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