CN113541569A - Motor driving apparatus, motor driving method, air conditioner, and computer-readable storage medium - Google Patents
Motor driving apparatus, motor driving method, air conditioner, and computer-readable storage medium Download PDFInfo
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- CN113541569A CN113541569A CN202110767225.XA CN202110767225A CN113541569A CN 113541569 A CN113541569 A CN 113541569A CN 202110767225 A CN202110767225 A CN 202110767225A CN 113541569 A CN113541569 A CN 113541569A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
- H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
- H02P27/06—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters
- H02P27/08—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation
- H02P27/085—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation wherein the PWM mode is adapted on the running conditions of the motor, e.g. the switching frequency
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F24—HEATING; RANGES; VENTILATING
- F24F—AIR-CONDITIONING; AIR-HUMIDIFICATION; VENTILATION; USE OF AIR CURRENTS FOR SCREENING
- F24F11/00—Control or safety arrangements
- F24F11/88—Electrical aspects, e.g. circuits
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Abstract
The invention provides a motor driving device, a method, an air conditioner and a computer readable storage medium, wherein the motor driving device comprises a preceding stage processing circuit and a three-phase inverter circuit, the preceding stage processing circuit is used for inputting alternating current output by a power supply into the three-phase inverter circuit, the connection point of an upper bridge arm switching element and a lower bridge arm switching element of each phase of the three-phase inverter circuit is connected with a motor, and the motor driving device also comprises a control device which is used for counteracting conduction interference and leakage current caused by the change of phase voltage of another phase by using the change of the phase voltage of one phase of the motor. The invention changes the switching timing and pulse width of the upper and lower bridge arm switching elements of each phase according to the current direction detected by the current detection device by arranging the current detection device in the driving loop, controls the waveform of one-phase voltage applied to the motor, can effectively compensate the voltage deviation caused by dead time, eliminates current distortion, and simultaneously reduces conduction interference and leakage current generated in the switching process of the other phase by using the change of the one-phase voltage.
Description
Technical Field
The invention relates to the field of switching power supplies, in particular to a motor driving device, a motor driving method, an air conditioner and a computer readable storage medium.
Background
Conventionally, a high-frequency leakage current, which flows from a capacitor to a ground due to a rapid change in voltage or current generated when a converter and an inverter provided in a motor drive device perform a switching operation, may occur, and strong conduction disturbances may occur at input and output terminals of a switching power supply, and the leakage current and the conduction disturbances may cause a device failure or erroneous judgment in an air conditioner.
Japanese patent laid-open No. 10-094244 discloses a common mode interference canceller, which detects a common mode voltage generated by a semiconductor element of a voltage type PWM inverter during a switching operation by using a star-connected capacitor, performs power conversion by switching a power semiconductor element, generates a voltage having the same magnitude as the common mode voltage and opposite polarity from the detected common mode voltage by a control voltage source, and superimposes the voltage generated by the control voltage source on an output terminal of the inverter by using a common mode transformer to cancel the common mode voltage.
Japanese patent laying-open No. 9-233837 discloses an inverter device for driving a load by an inverter, which is provided with an impedance equivalent to a leakage impedance of a main load, a switch unit for supplying a voltage to the impedance, a driving unit for driving the switch unit, the switch unit using an output terminal of a main converter as a power supply, and a switching means for applying a voltage between a ground voltage and a reverse phase voltage of each phase generated by a switching operation of the inverter to an equivalent impedance equivalent to the leakage impedance of the load, thereby eliminating the leakage current generated by the switching operation of a power conversion device.
In addition, an inverter in a motor drive device is generally composed of switching elements in parallel with a circulating diode, a series circuit composed of a switching element on the upper arm side and a switching element on the lower arm side is divided into three phases, the interconnection points of the upper and lower bridge arms in these series circuits are connected to the load, since the switching elements of the upper and lower bridge arms are connected in series, if two switching elements are simultaneously turned on for a short time, a short circuit will occur to destroy the switching elements, and therefore, dead time is set during the driving of the motor, so that delay occurs when each switching element is turned on, in this case, when the phase current has a positive polarity, the diode connected to the negative side of the power supply is turned on, and the output voltage of the inverter becomes a negative polarity during the dead time, and the time during which the output voltage has a positive polarity becomes short, resulting in variations in the output voltage.
Japanese patent laid-open No. 3-117369 discloses an inverter voltage control apparatus including an dead time compensation circuit that compares an output voltage of an inverter with a PWM control voltage, corrects a PWM control signal to compensate for a dead time of an inverter bridge, and a circuit for load current compensation that detects an output current of the inverter and corrects the PWM control signal to compensate for a voltage drop of a main circuit caused by the load current, in which although a current distortion caused by a dead time of the inverter can be compensated, since a pulse timing of the output voltage is not synchronized, an interference accompanying a switch occurs largely, and an interference or a leakage current from the inverter cannot be reduced.
In view of the above, the present invention is particularly proposed.
Disclosure of Invention
The invention solves the problems that in the prior art, in order to solve the conduction interference or leakage current during the motor driving, an additional loop needs to be arranged, the cost is increased, and the dead time in the motor driving causes the deviation of the output voltage.
In order to solve the above problems, the present invention provides a motor driving apparatus for driving a motor, the motor being a three-phase motor, the device is characterized by comprising a pre-stage processing circuit and a three-phase inverter circuit, wherein the pre-stage processing circuit is used for inputting alternating current output by a power supply into the three-phase inverter circuit, the three-phase inverter circuit comprises an upper bridge arm power supply line and a lower bridge arm power supply line, and an upper arm switching element and a lower arm switching element connected in series between the upper arm power supply line and the lower arm power supply line in each phase, the upper arm switching element and the lower arm switching element of each phase being connected to the motor at their connection points, and a control device, the control device is used for controlling the switching timing of the upper arm switching element and the lower arm switching element of each phase, and counteracting conduction interference and leakage current caused by phase voltage change of another phase by using the change of the phase voltage of one phase of the motor.
The technical scheme can remarkably reduce the conduction interference and the leakage current of the motor generated in the switching process of the switching elements, and is irrelevant to the direction of current and only relevant to the switching timing of the switching elements of the upper bridge arm and the lower bridge arm.
Further, a current detection device is arranged between the lower bridge arm power supply line and the preceding stage processing circuit, the current detection device is used for detecting the current output by each phase, and the control device controls the pulse width and time of the upper bridge arm switching element and the lower bridge arm switching element of each phase according to the current direction detected by the current detection device, so as to compensate the voltage deviation generated due to the dead time of the upper bridge arm switching element and/or the lower bridge arm switching element of each phase.
The pulse width and time of the upper arm switching element and the lower arm switching element of each phase are adjusted to change the voltage output condition when the current flow direction of each phase is different, when the current direction is negative, the output voltage in the dead time is the voltage on the high voltage side, when the current direction is positive, the output voltage in the dead time is the voltage on the low voltage side, the average voltage of the output of each phase does not change according to the change of the current direction, namely, the arrangement compensates the voltage offset generated by the dead time, and eliminates the current distortion caused by the dead time in the prior art.
Further, the control device includes:
the three-phase output voltage instruction generating module is used for generating a three-phase voltage instruction; the three-phase voltage command comprises a U-phase voltage command, a V-phase voltage command and a W-phase voltage command;
the current direction detection module is used for judging the current direction according to the current detected by the current detection device and inputting the current direction judgment result into the carrier selection module;
the saw wave generating module is used for generating a plurality of groups of saw-shaped carrier waves, and the plurality of groups of saw waves are carrier waves output by pulses;
the carrier selection module is used for selecting and inputting carriers of each phase from a plurality of groups of saw waves output by the saw wave generation module according to the judgment result of the current direction detection module;
the comparator module is used for comparing the three-phase voltage command with the carrier wave and outputting a driving pulse of the switching element according to a comparison result;
and the switching element driving module is used for driving and controlling the switching element to be switched on or switched off according to the driving pulse output by the comparator module.
By the arrangement, the switching elements between two phases in the same bridge arm can perform opposite actions at the same moment, the conduction interference and the leakage current generated during the switching action are mutually offset, the whole conduction interference and the leakage current are reduced by about half, the remarkable effect is achieved, meanwhile, the voltage offset generated due to the dead time can be compensated, the current distortion caused by the dead time in the prior art is eliminated, and the output voltage which is not influenced by the dead time generated by the switches of the upper and lower bridge arms of each phase can be output no matter the direction of the current flowing in the motor.
The invention also discloses a motor driving method, which is used for driving the motor, wherein the motor is a three-phase motor, and the driving method is characterized by comprising the following steps: the switching timing of the upper bridge arm switching elements and the lower bridge arm switching elements of each phase of the motor is controlled, and the upper bridge arm switching elements or the lower bridge arm switching elements between different two phases in the motor perform opposite switching actions at the same time at least at one moment in one carrier cycle Tc.
The technical scheme can remarkably reduce the conduction interference generated by the switching element in the switching process and the leakage current of the motor.
Furthermore, the current direction of each phase of the motor is detected, the pulse width and time of the upper arm switching element and the lower arm switching element of each phase are controlled according to the current direction, and voltage deviation generated due to dead time of the upper arm switching element and/or the lower arm switching element of each phase is compensated.
The pulse width and time of the upper bridge arm switching element and the lower bridge arm switching element of each phase are adjusted, so that the voltage output condition when the current directions of each phase of current are different is changed, when the current directions of the U-phase and the V-phase are both negative, the output voltage in the dead time is the voltage on the high voltage side, when the current directions of the U-phase and the V-phase are both positive, the output voltage in the dead time is the voltage on the low voltage side, the average voltage of the output of each phase does not change according to the change of the current direction, namely, the setting compensates the voltage offset generated due to the dead time, and the current distortion caused by the dead time in the prior art is eliminated.
Further, the switching timing of the upper arm switching element and the lower arm switching element of each phase is controlled according to the change of the carrier, or the carrier required by the driving pulse of the upper arm switching element and the lower arm switching element of each phase is selected according to the current direction, and the pulse width and the pulse time of the upper arm switching element and the lower arm switching element of each phase are controlled according to the carrier.
Controlling the switching timing and/or pulse width according to the carrier is simple and effective, and has limited impact on cost.
Further, the carrier is a saw-shaped carrier, including:
a 1 st carrier wave, the 1 st carrier wave being a sawtooth wave having a positive slope with respect to time in one carrier period Tc;
a 2 nd carrier wave, the 2 nd carrier wave being a sawtooth wave having a negative slope with respect to time in one carrier period Tc;
a 3 rd carrier wave, the 3 rd carrier wave being a sawtooth wave that advances time by a dead time relative to a 1 st carrier wave;
a 4 th carrier, the 4 th carrier being a sawtooth wave that advances a dead time only at the dead time relative to a 2 nd carrier;
a 5 th carrier wave, the 5 th carrier wave being a sawtooth wave that delays dead time only at the dead time with respect to the 1 st carrier wave;
a 6 th carrier wave, the 6 th carrier wave being a sawtooth wave delayed in time by a dead time with respect to the 2 nd carrier wave.
By changing a plurality of carriers, the pulse width and/or the switching timing of each phase of the motor can be controlled, the conduction interference and the leakage current when the switching element performs the switching operation can be effectively reduced, the output voltage deviation generated by the dead time can be reduced, and the current distortion can be eliminated.
Further, the motor comprises a U phase, a V phase and a W phase, wherein the upper bridge arm of the U phase, the V phase and the W phase is sequentially provided with a switch 4a, a switch 6a and a switch 8a, the lower bridge arm is sequentially provided with a switch 5a, a switch 7a and a switch 9a, and the 6 th carrier wave is selected as a driving pulse carrier wave of the switch 4a, and the 2 nd carrier wave is selected as a driving pulse carrier wave of the switch 5 a; the 3 rd carrier wave is selected as the drive pulse carrier wave of the switch 6a, and the 1 st carrier wave is selected as the drive pulse carrier wave of the switch 7 a.
The arrangement realizes that the switching elements between two phases in the same bridge arm do opposite switching actions at the same moment, and mutually offsets the conduction interference and the leakage current generated during the switching actions.
Further, the motor comprises a U phase, a V phase and a W phase, wherein the U phase, the V phase and the W phase are sequentially provided with a switch 4a, a switch 6a and a switch 8a on an upper bridge arm, and are sequentially provided with a switch 5a, a switch 7a and a switch 9a on a lower bridge arm, when the current directions of the U phase and the V phase are positive, a 2 nd carrier wave is selected as a driving pulse carrier wave of the switch 4a, a 4 th carrier wave is selected as a driving pulse carrier wave of the switch 5a, a 1 st carrier wave is selected as a driving pulse carrier wave of the switch 6a, and a 5 th carrier wave is selected as a driving pulse carrier wave of the switch 7 a; when the U-phase and V-phase current directions are both negative, the 6 th carrier is selected as the drive pulse carrier of the switch 4a, the 2 nd carrier is selected as the drive pulse carrier of the switch 5a, the 3 rd carrier is selected as the drive pulse carrier of the switch 6a, and the 1 st carrier is selected as the drive pulse carrier of the switch 7 a.
The arrangement compensates for voltage offset due to dead time, eliminating current distortion caused by dead time in the prior art.
The invention also discloses an air conditioner, which comprises a computer readable storage medium and a processor, wherein the computer readable storage medium is used for storing a computer program, and the computer program is read by the processor and runs to realize the motor driving method.
Compared with the prior art, the air conditioner has the same advantages as the motor driving method, and the description is omitted.
The invention also discloses a computer readable storage medium, which stores a computer program, and when the computer program is read and executed by a processor, the motor driving method is realized.
Compared with the prior art, the motor driving device, the motor driving method, the air conditioner and the computer readable storage medium have the following advantages:
the invention changes the switch timing of the upper and lower bridge arm switch elements of each phase according to the current direction detected by the current detection device by arranging the current detection device in the driving loop, reduces the conduction interference and the leakage current generated in the switching process of another phase by using the change of the voltage of one phase, and changes the switch timing and the pulse width of the upper and lower bridge arm switch elements of each phase according to the current direction detected by the current detection device, thereby effectively compensating the voltage deviation caused by dead time and eliminating current distortion. The cost is less influenced.
Drawings
Fig. 1 is a schematic structural diagram of a motor driving device according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a switching control device for upper and lower bridge arm switching elements of an inverter circuit of a motor driving device in the prior art;
FIG. 3 is a timing diagram of the switching of the upper and lower bridge arm switching elements of the inverter circuit of the motor driving apparatus in the prior art;
FIG. 4 is a timing chart of the transition of the U-phase and V-phase terminal voltages with respect to the current direction in the prior art motor driving device;
FIG. 5 is a schematic structural diagram of a switching control device for controlling switching elements of upper and lower bridge arms of an inverter circuit of a motor driving device according to the present invention;
FIG. 6 is a timing diagram of the switching of the upper and lower bridge arm switching elements of the inverter circuit of the motor driving apparatus according to the present invention;
fig. 7 is a schematic diagram of three-phase switching waveforms and waveforms of conducted interference and leakage current detection results of a motor driving apparatus in the prior art;
fig. 8 is a waveform diagram illustrating a three-phase switching waveform and detection results of conduction interference and leakage current of the motor driving apparatus according to the present invention;
FIG. 9 is a timing diagram of the switching of the upper and lower bridge arm switching elements of the inverter circuit of the motor driving apparatus when the U-phase current and the V-phase current are negative, respectively;
fig. 10 is a timing chart showing switching of the switching elements of the upper and lower arms of the inverter circuit of the motor driving device when the U-phase current is positive and the V-phase current is positive in accordance with the present invention.
Description of reference numerals:
1-an alternating current power supply; 2-a rectifying loop; 3-smoothing capacitance; 4 a-switch; 4 b-a reflux diode; 5 a-a switch; 5 b-a reflux diode; 6 a-switch; 6 b-a reflux diode; 7 a-switch; 7 b-a reflux diode; 8 a-switch; 8 b-a reflux diode; 9 a-switch; 9 b-a reflux diode; 10-a motor; 11-a control device; 12-current detection means; 20-a triangular carrier generation module; 21-a three-phase voltage instruction generation module; 22 a-a comparator; 22 b-a comparator; 22 c-a comparator; 22 d-comparator; 22 e-a comparator; 22 f-comparator; 23 a-a driver; 23 b-a driver; 23 c-a driver; 23 d-a driver; 23 e-a driver; 23 f-driver; 30-a saw wave generating module; 31-a carrier selection module; 32-a current direction detection module; 33-a three-phase output voltage instruction generating module; 34 a-a comparator; 34 b-a comparator; 34 c-a comparator; 34 d-a comparator; 34 e-a comparator; 34 f-a comparator; 35 a-a driver; 35 b-a driver; 35 c-driver; 35 d-driver; 35 e-a driver; 35 f-driver.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be further described in detail with reference to the accompanying drawings and embodiments. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. The specific embodiments described herein are merely illustrative of the invention and do not delimit the invention. It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict.
In the prior art, the switching elements of the upper and lower bridge arms of the three-phase inverter circuit comprise a switch 4a, a reflux diode 4b arranged in parallel with the switch 4a, a switch 5a, a reflux diode 5b arranged in parallel with the switch 5a, a switch 6a, a reflux diode 6b arranged in parallel with the switch 6a, a switch 7a, a reflux diode 7b arranged in parallel with the switch 7a, a switch 8a, a reflux diode 8b arranged in parallel with the switch 8a, a switch 9a and a reflux diode 9b arranged in parallel with the switch 9 a; the inverter circuit includes an upper arm switch element formed by a switch 4a, a reflux diode 4b, a switch 6a, a reflux diode 6b, a switch 8a and a reflux diode 8b, a lower arm switch element formed by a switch 5a, a reflux diode 5b, a switch 7a, a reflux diode 7b, a switch 9a and a reflux diode 9b, a serial connection point of the switch 4a and the switch 5a is connected with a U of a motor 10, a serial connection point of the switch 6a and the switch 7a is connected with a V of the motor 10, a serial connection point of the switch 8a and the switch 9a is connected with a W of the motor 10, and a control device structure of the upper and lower arm switch elements in the inverter circuit is shown in fig. 2 and includes:
a three-phase voltage command generation module 21 configured to generate a three-phase ac voltage command; the three-phase voltage command comprises a U-phase voltage command, a V-phase voltage command and a W-phase voltage command;
a triangular carrier generation module 20, configured to generate a triangular wave, where the triangular wave is a carrier of pulse output;
the comparator module is used for comparing the three-phase voltage command with the carrier wave and outputting a driving pulse of the switching element according to a comparison result;
the switching element driving module is used for driving and controlling the switching element to be switched on or switched off according to the driving pulse output by the comparator module;
the comparator module comprises a comparator 22a, a comparator 22b, a comparator 22c, a comparator 22d, a comparator 22e and a comparator 22 f; the switching element driving module includes a driver 23a, a driver 23b, a driver 23c, a driver 23d, a driver 23e, and a driver 23 f; the comparator 22a, the driver 23a and the switch 4a are connected in sequence; the comparator 22b, the driver 23b and the switch 5a are connected in sequence, and the comparator 22c, the driver 23c and the switch 6a are connected in sequence; the comparator 22d, the driver 23d and the switch 7a are connected in sequence; the comparator 22e, the driver 23e and the switch 8a are connected in sequence; the comparator 22f, the driver 23f and the switch 9a are connected in sequence;
in order to reduce leakage current and conducted interference generated when a switching element in an inverter circuit is turned on or off, the triangular carrier generation module 20 generates two corresponding carriers, I and II, respectively, the II carrier is advanced by a dead time relative to the I carrier, as shown in fig. 2, the I carrier is connected to an anode of a comparator corresponding to a lower bridge arm switching element, the II carrier is connected to a cathode of a comparator corresponding to an upper bridge arm related switching element, the three-phase voltage instruction generation module 21 is respectively connected to an anode of a comparator corresponding to an upper bridge arm related switching element and a cathode of a comparator corresponding to a lower bridge arm switching element, and accordingly, a switching timing diagram of the upper and lower bridge arm switching elements of the inverter circuit of the motor driving apparatus in the prior art shown in fig. 3 can be obtained, the upper half of fig. 3 shows a time transition situation of a carrier and an output voltage instruction value in PWM modulation, the lower half represents the switching times of the switches 4 a-9 a corresponding to three-phase alternating current, it being understood that the switches 4 a-9 a represent switches including switch 4a, switch 5a, switch 6a, switch 7a, switch 8a, switch 9a, and so on.
As can be seen from fig. 3, for the voltage command of the U-phase, the corresponding switches 4a and 5a are turned on during the time t3 to t6 in accordance with the comparison result of the U-phase voltage command with the comparators of the I-th carrier and the II-th carrier, whereas the switch 4a is controlled by the driver so as to be turned on with a pulse width provided with a dead time for avoiding simultaneous conduction. Similarly, for the output voltage of the V phase, the corresponding switches 6a and 7a are turned on at time t4 to t5 based on the comparison result of the V phase voltage command and the comparators of the I carrier and the II carrier, and on the other hand, the switch 6a is controlled by the driver so as to be turned on with a pulse width provided with a dead time for avoiding simultaneous conduction; the W phase is fixed to a voltage of 0 in this section, and the three-phase ac becomes an ac voltage for driving the motor 10 by a voltage difference between the U phase and the V phase, and is used to drive the motor 10.
The upper half of fig. 4 shows the switching time of the switches 4a to 9a corresponding to the lower half of fig. 3, and the lower half of fig. 4 shows the change of the output voltage corresponding to the direction of each phase current, in which the current direction is positive when the current flows from the inverter circuit to the motor 10, the current direction is negative when the current flows from the motor 10 to the inverter circuit, and the output voltage of each phase changes between the positive side voltage (set to + Vdc) and the negative side voltage (set to 0) of the dc part in fig. 1, and as can be seen from fig. 4, in the dead time zone, when the current is positive, the output voltage is negative 0, when the current is negative, the output voltage is positive + Vdc, and when the output voltage of the U-direction is positive, the output voltage is 0 during t1 to t8, but when the current is negative, the output voltage during t3 to t6 is 0, and therefore, the setting of the dead time causes the average voltage of the output of each phase to vary according to the change of the current direction, resulting in the deviation of the output voltage at the dead time, the motor 10 cannot apply the desired voltage, the current deviation is generated, and the current distortion is caused.
The upper half of fig. 7 is a waveform of a switching state of U, V, W three-phase upper arm switching elements in the prior art, and the lower half of fig. 7 is conducted interference generated in a switching process of the switching elements and leakage current of the motor detected by LISN (Line Impedance Stabilization Network) in the prior art.
A motor driving apparatus, a motor driving method, an air conditioner, and a computer-readable storage medium according to embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Example 1
The present embodiment provides a motor driving apparatus for driving a motor 10, the motor 10 being a three-phase motor, as shown in fig. 1, the system comprises a pre-processing circuit and a three-phase inverter circuit, wherein the pre-processing circuit is used for inputting the alternating current output by the power supply into the three-phase inverter circuit, the three-phase inverter circuit comprises an upper bridge arm power supply line and a lower bridge arm power supply line, and an upper arm switching element and a lower arm switching element connected in series between the upper arm power supply line and the lower arm power supply line in each phase, the connection point of the upper arm switching element and the lower arm switching element in each phase being connected to the motor 10, and a control device 11, the control device 11 is configured to control the switching timings of the upper arm switching elements and the lower arm switching elements of the respective phases, the voltage variation of one phase of the motor 10 is used to counteract the conduction interference and leakage current caused by the voltage variation of the other phase. Specifically, in this embodiment, the pre-stage processing circuit includes an ac power supply 1, a rectifying circuit 2, and a smoothing capacitor 3, and is configured to temporarily convert ac power output by the ac power supply 1 into smooth dc power, and the structures and connection manners of the upper arm switching element and the lower arm switching element are the same as those in the prior art, and are not described herein again. Specifically, in a carrier cycle Tc, at least at one time, the upper arm switching element or the lower arm switching element between two different phases performs opposite switching actions at the same time, where the opposite switching actions refer to that the switching element of one phase is turned on and the switching element of the other phase is turned off in the upper arm or the lower arm, specifically, as shown in fig. 6, at time t10, the switch 5a of the U-phase lower arm is turned on and the switch 7a of the V-phase lower arm is turned off, and through the synchronous turning-on and turning-off operations between the two phases, the common mode interference generated when the switching elements are turned on and off and the leakage current of the motor 10 are reduced, and the detection result is shown in fig. 8, in comparison with fig. 7, the technical scheme provided in this embodiment can significantly reduce the conduction interference generated when the switching elements are turned on and off and the leakage current of the motor 10, the technical scheme is irrelevant to the direction of current and only relevant to the switching timing of the upper bridge arm switching element and the lower bridge arm switching element.
Preferably, a current detection device 12 is disposed between the lower arm power line and the pre-stage processing circuit, the current detection device 12 is configured to detect a current output by each phase, and the control device 11 controls pulse widths and time of the upper arm switching element and the lower arm switching element of each phase according to a current direction detected by the current detection device 12, so as to compensate for a voltage offset generated due to a dead time of the upper arm switching element and/or the lower arm switching element of each phase. Specifically, as shown in fig. 9 and 10, by adjusting the pulse widths and the times of the upper arm switching elements and the lower arm switching elements of the respective phases, the voltage output situation when the current flows in the respective phases are different is changed, when the current direction is negative, the output voltage in the dead time is a voltage on the high voltage side, and when the current direction is positive, the output voltage in the dead time is a voltage on the low voltage side, and the average voltage of the output of the respective phases does not change according to the change in the current direction, that is, this arrangement compensates for the voltage offset caused by the dead time, and eliminates the current distortion caused by the dead time in the related art.
Specifically, the control device 11 includes:
a three-phase output voltage command generation module 33, configured to generate a three-phase voltage command; the three-phase voltage command comprises a U-phase voltage command, a V-phase voltage command and a W-phase voltage command;
a current direction detection module 32, configured to determine a current direction according to the current detected by the current detection device 12, and input a current direction determination result to the carrier selection module 31;
the saw wave generation module 30 is used for generating a plurality of groups of saw waves, and the groups of saw waves are carrier waves output by pulses;
a carrier selecting module 31, configured to select and input carriers of each phase from a plurality of groups of saw waves output by the saw wave generating module 30 according to the determination result of the current direction detecting module 32;
the comparator module is used for comparing the three-phase voltage command with the carrier wave and outputting a driving pulse of the switching element according to a comparison result;
and the switching element driving module is used for driving and controlling the switching element to be switched on or switched off according to the driving pulse output by the comparator module.
Specifically, in this embodiment, the comparator module includes a comparator 34a, a comparator 34b, a comparator 34c, a comparator 34d, a comparator 34e, and a comparator 34 f; the switching element driving module comprises a driver 35a, a driver 35b, a driver 35c, a driver 35d, a driver 35e and a driver 35 f; the comparator 34a, the driver 35a and the switch 4a are connected in sequence; the comparator 34b, the driver 35b and the switch 5a are connected in sequence, and the comparator 34c, the driver 35c and the switch 6a are connected in sequence; the comparator 34d, the driver 35d and the switch 7a are connected in sequence; the comparator 34e, the driver 35e and the switch 8a are connected in sequence; the comparator 34f, the driver 35f and the switch 9a are connected in sequence;
in some of these embodiments, the saw wave generation module 30 is configured to generate 6 sets of carriers, respectively:
a 1 st carrier wave, the 1 st carrier wave being a sawtooth wave having a positive slope with respect to time in one carrier period Tc;
a 2 nd carrier wave, the 2 nd carrier wave being a sawtooth wave having a negative slope with respect to time in one carrier period Tc;
a 3 rd carrier wave, the 3 rd carrier wave being a sawtooth wave that advances time by a dead time relative to a 1 st carrier wave;
a 4 th carrier, the 4 th carrier being a sawtooth wave that advances a dead time only at the dead time relative to a 2 nd carrier;
a 5 th carrier wave, the 5 th carrier wave being a sawtooth wave that delays dead time only at the dead time with respect to the 1 st carrier wave;
a 6 th carrier wave, the 6 th carrier wave being a sawtooth wave delayed in time by a dead time with respect to a 2 nd carrier wave;
as shown in fig. 6, the carrier selection module 31 selects the 6 th carrier, the 2 nd carrier and the U-phase voltage command to generate the driving pulses of the switches 4a and 5a, and selects the 3 rd carrier, the 1 st carrier and the V-phase voltage command to generate the driving pulses of the switches 6a and 7a, as shown in fig. 6, in the U-phase, the switching element 5a is turned on during the period from t0 to t1, the switching element 4a is turned on during the period from t2 to t4 after delaying the dead time, and then the switching element 5a is turned on at the time t10 after delaying the dead time; the same plurality of dead time exist in the V phase, at the time t10, the switching element 7a is turned off, the switching elements between two phases in the same bridge arm at the same time perform opposite actions, and the conducted interference and the leakage current generated during the switching action are mutually cancelled out, the specific detection result is shown in fig. 8, and it can be seen from comparing fig. 7 that the opposite switching actions of the U phase and the V phase at the same time reduce the whole conducted interference and the leakage current by about half, which has a significant effect.
In another embodiment, when the U-phase current direction is positive, the 2 nd carrier wave and the 4 th carrier wave are selected to be combined with the U-phase voltage command to generate the driving pulses of the switches 4a and 5a, and when the U-phase current direction is negative, the 6 th carrier wave and the 2 nd carrier wave are selected to be combined with the U-phase voltage command to generate the driving pulses of the switches 4a and 5 a; when the V-phase current direction is positive, the 1 st carrier, the 5 th carrier and the V-phase voltage command are selected to be combined with the V-phase voltage command to generate the driving pulses of the switches 6a and 7a, and when the V-phase current direction is negative, the 3 rd carrier, the 1 st carrier and the V-phase voltage command are selected to be combined with the driving pulses of the switches 6a and 7a, in this case, as shown in fig. 9 and 10, corresponding to the output voltage situation, it can be seen that when the U-phase current direction and the V-phase current direction are both negative, the output voltage in the dead time is the voltage on the high voltage side, and when the U-phase current direction and the V-phase current direction are both positive, the output voltage in the dead time is the voltage on the low voltage side, the average voltage of the output of each phase does not change according to the change of the current direction, that is, the setting compensates for the voltage offset due to the dead time, and eliminates the current distortion caused by the dead time in the prior art, it can be seen that the output voltage that is not affected by the dead time generated by the switching of the upper and lower arm of each phase can be output regardless of the direction of the current flowing in the motor 10, and at the same time, the reverse switching operation of the upper arm switching element or the lower arm switching element occurs at time t10, so that the transmission interference and the leakage current generated by the switching operation are effectively reduced.
With the above configuration, the motor driving device of the present invention can reduce the conduction interference and the leakage current with a simple configuration, and can compensate the voltage offset caused by the dead time, and the current offset does not occur when the motor 10 is driven.
Example 2
This embodiment discloses a motor driving method that employs the motor driving device as described in embodiment 1.
The motor driving method is used for driving a motor 10, the motor 10 is a three-phase motor, and the driving method comprises the following steps: controlling the switching timing of the upper arm switching elements and the lower arm switching elements of each phase of the motor 10, at least one time within one carrier cycle Tc, the upper arm switching elements or the lower arm switching elements between two different phases of the motor 10 perform opposite switching actions simultaneously, where the opposite switching actions refer to that the switching elements of one phase are turned on and the switching elements of the other phase are turned off in the upper arm or the lower arm, and the voltage variation of one phase of the motor 10 counteracts the conduction interference and the leakage current caused by the phase voltage variation of the other phase, specifically as shown in fig. 6, at time t10, the switch 5a of the U-phase lower arm is turned on and the switch 7a of the V-phase lower arm is turned off, and the common mode interference generated by the switching elements during switching and the leakage current of the motor 10 are reduced by the synchronous turning on and off operations between the two phases, and the detection result is shown in fig. 8, compared with fig. 7, the technical solution provided by this embodiment can significantly reduce the conduction interference generated by the switching elements during the switching process and the leakage current of the motor 10, and the technical solution is independent of the direction of the current and only related to the switching timings of the upper arm switching elements and the lower arm switching elements.
As a preferred embodiment, the driving method further includes: the current directions of the respective phases of the motor 10 are detected, and the pulse widths and the times of the upper arm switching elements and the lower arm switching elements of the respective phases are controlled according to the current directions, thereby compensating for the voltage deviation caused by the dead time of the upper arm switching elements and/or the lower arm switching elements of the respective phases. Specifically, as shown in fig. 9 and 10, by adjusting the pulse widths and the times of the upper arm switching elements and the lower arm switching elements of the respective phases, the voltage output situation when the current flows in the respective phases are different is changed, when the U-phase and V-phase current directions are both negative, the output voltage in the dead time is a voltage on the high voltage side, when the U-phase and V-phase current directions are both positive, the output voltage in the dead time is a voltage on the low voltage side, and the average voltage of the output of the respective phases does not change according to the change of the current direction, that is, this setting compensates for the voltage offset caused by the dead time, thereby eliminating the current distortion caused by the dead time in the prior art.
Specifically, in this embodiment, the switching timings of the upper arm switching elements and the lower arm switching elements of each phase are controlled according to the change of the carrier, or the carrier necessary for the driving pulses of the upper arm switching elements and the lower arm switching elements of each phase is selected according to the current direction, and the pulse widths and the pulse times of the upper arm switching elements and the lower arm switching elements of each phase are controlled according to the carrier. Controlling the switching timing and/or pulse width according to the carrier is simple and effective, and has limited impact on cost.
As an embodiment of the present invention, the carrier is a saw-shaped carrier, including:
a 1 st carrier wave, the 1 st carrier wave being a sawtooth wave having a positive slope with respect to time in one carrier period Tc;
a 2 nd carrier wave, the 2 nd carrier wave being a sawtooth wave having a negative slope with respect to time in one carrier period Tc;
a 3 rd carrier wave, the 3 rd carrier wave being a sawtooth wave that advances time by a dead time relative to a 1 st carrier wave;
a 4 th carrier, the 4 th carrier being a sawtooth wave that advances a dead time only at the dead time relative to a 2 nd carrier;
a 5 th carrier wave, the 5 th carrier wave being a sawtooth wave that delays dead time only at the dead time with respect to the 1 st carrier wave;
a 6 th carrier wave, the 6 th carrier wave being a sawtooth wave delayed in time by a dead time with respect to the 2 nd carrier wave.
In this embodiment, a sawtooth wave having a period Tc and an amplitude Vc is used as a carrier of a PWM drive pulse for controlling the switches, and the switching time of the switches 4a to 9a is determined by comparing the carrier with the three-phase voltage to be output, and the pulse width and/or the switching timing of each phase of the motor 10 can be controlled by changing the plurality of carriers, so that the conduction disturbance and the leakage current when the switching elements perform the switching operation can be effectively reduced, and the output voltage deviation caused by the dead time can be reduced to eliminate the current distortion.
In a specific embodiment, the motor 10 includes a U-phase, a V-phase, and a W-phase, where an upper bridge arm of the U-phase, the V-phase, and the W-phase is sequentially provided with a switch 4a, a switch 6a, and a switch 8a, a lower bridge arm is sequentially provided with a switch 5a, a switch 7a, and a switch 9a, and a 6 th carrier is selected as a driving pulse carrier of the switch 4a, and a 2 nd carrier is selected as a driving pulse carrier of the switch 5 a; selecting the 3 rd carrier as a driving pulse carrier of the switch 6a and the 1 st carrier as a driving pulse carrier of the switch 7 a; as can be seen from fig. 6, in the U phase, the switching element 5a is turned on during t0 to t1, the switching element 4a is turned on during t2 to t4 with a delay of the dead time, and the switching element 5a is turned on at time t10 with a delay of the dead time; there are also a plurality of dead time periods in the V phase, and at time t10, the switching element 7a is turned off, and at the same time, the switching elements between two phases in the same arm perform opposite operations, which cancel each other out the conduction interference and the leakage current generated during the switching operation. The specific detection result is shown in fig. 8, and it can be seen from comparing fig. 7 that the U-phase and V-phase opposite switching actions at the same time reduce the overall conducted interference and leakage current by about half, which has a significant effect, and when it needs to be explained, the effect is achieved regardless of the current direction.
In another embodiment, the motor 10 includes a U-phase, a V-phase, and a W-phase, where the U-phase, the V-phase, and the W-phase upper arm are sequentially provided with a switch 4a, a switch 6a, and a switch 8a, and the lower arm is sequentially provided with a switch 5a, a switch 7a, and a switch 9a, when the U-phase and V-phase current directions are both positive, the 2 nd carrier is selected as a driving pulse carrier of the switch 4a, the 4 th carrier is selected as a driving pulse carrier of the switch 5a, the 1 st carrier is selected as a driving pulse carrier of the switch 6a, and the 5 th carrier is selected as a driving pulse carrier of the switch 7 a; when the current directions of the U-phase and the V-phase are both negative, selecting a 6 th carrier as a driving pulse carrier of the switch 4a, a 2 nd carrier as a driving pulse carrier of the switch 5a, and selecting a 3 rd carrier as a driving pulse carrier of the switch 6a and a 1 st carrier as a driving pulse carrier of the switch 7 a; in this case, as shown in fig. 9 and 10, it can be seen that when the U-phase and V-phase current directions are both negative, the output voltage in the dead time is a voltage on the high voltage side, and when the U-phase and V-phase current directions are both positive, the output voltage in the dead time is a voltage on the low voltage side, and the average voltage of the output of each phase does not change according to the change of the current direction, that is, this arrangement compensates for the voltage offset caused by the dead time, and eliminates the current distortion caused by the dead time in the prior art, and the output voltage is always 0 in the process of the W-phase, which is not particularly limited. It can be seen that the output voltage that is not affected by the dead time generated by the switching of the upper and lower arm of each phase can be output regardless of the direction of the current flowing in the motor 10, and at the same time, the reverse switching operation of the upper arm switching element or the lower arm switching element occurs at time t10, so that the transmission interference and the leakage current generated by the switching operation are effectively reduced.
In the present embodiment, one of the selectable carrier selection schemes is shown in table 1 and table 2,
table 1U-phase switching element driving pulse carrier selection table
| Current direction of | |
Switch | 5a |
| Is just | 2 nd carrier wave | 4 th carrier wave | |
| Negative pole | 6 |
2 nd carrier wave |
Table 2V-phase switching element driving pulse carrier selection table
| V-phase | |
Switch | 7a |
| Is just | 1 st carrier wave | 5 th carrier | |
| Negative pole | |||
| 3 |
1 st carrier wave |
As can be seen from fig. 10, when the U-phase and V-phase current directions are positive, the output voltage is a low-voltage side voltage in the dead time of switching the switching elements of the upper arm and the lower arm, and when the U-phase and V-phase current directions are negative, the output voltage is a high-voltage side voltage in the dead time of switching the switching elements of the upper arm and the lower arm, and at the same time, at times t0 and t10 of fig. 9 and 10, the switches of the U-phase and the V-phase perform mutually opposite switching operations, thereby effectively reducing the conduction interference and the leakage current generated in the switching process.
Example 3
The embodiment discloses an air conditioner, which comprises the motor driving device in the embodiment 2.
The air conditioner disclosed in the present embodiment includes a computer-readable storage medium storing a computer program and a processor, and the computer program is read and executed by the processor to implement the motor driving method according to embodiment 2.
The advantages of the air conditioner and the motor driving method described in embodiment 1 are the same as those of the prior art, and are not described herein again.
Example 4
The present embodiment discloses a computer-readable storage medium storing a computer program which, when read and executed by a processor, implements the motor driving method according to embodiment 2.
Although the present invention is disclosed above, the present invention is not limited thereto. In the description herein, references to the description of the term "one embodiment," "some embodiments," "an illustrative embodiment," "an example," "a specific example," or "some examples" or the like mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (11)
1. A motor driving device is used for driving a motor (10), the motor (10) is a three-phase motor, the device is characterized by comprising a pre-stage processing circuit and a three-phase inverter circuit, wherein the pre-stage processing circuit is used for inputting alternating current output by a power supply into the three-phase inverter circuit after being directly fluidized, the three-phase inverter circuit comprises an upper bridge arm power line and a lower bridge arm power line, and an upper arm switching element and a lower arm switching element connected in series between the upper arm power supply line and the lower arm power supply line in each phase, a connection point of the upper arm switching element and the lower arm switching element in each phase is connected with a motor (10), and a control device (11), the control device (11) is used for controlling the switching timing of the upper arm switching elements and the lower arm switching elements of each phase, the voltage change of one phase of the motor (10) is used for counteracting conduction interference and leakage current caused by the voltage change of the other phase.
2. The motor drive device according to claim 1, wherein a current detection device (12) is provided between the lower arm power supply line and the pre-processing circuit, the current detection device (12) detects a current output from each phase, and the control device (11) controls a pulse width and a time of the upper arm switching element and the lower arm switching element of each phase according to a current direction detected by the current detection device (12) to compensate for a voltage deviation caused by a dead time of the upper arm switching element and/or the lower arm switching element of each phase.
3. A motor drive as claimed in claim 2, characterized in that said control means (11) comprise:
the three-phase output voltage instruction generating module (33) is used for generating three-phase voltage instructions; the three-phase voltage command comprises a U-phase voltage command, a V-phase voltage command and a W-phase voltage command;
a current direction detection module (32) for judging the current flow direction according to the current detected by the current detection device (12) and inputting the current flow direction judgment result into the carrier selection module (31);
the saw wave generating module (30) is used for generating a plurality of groups of saw-shaped carrier waves, and the saw waves are pulse output carrier waves;
the carrier selection module (31) is used for selecting and inputting carriers of each phase from a plurality of groups of saw waves output by the saw wave generation module (30) according to the judgment result of the current direction detection module (32);
the comparator module is used for comparing the three-phase voltage command with the carrier wave and outputting a driving pulse of the switching element according to a comparison result;
and the switching element driving module is used for driving and controlling the switching element to be switched on or switched off according to the driving pulse output by the comparator module.
4. A motor driving method for driving a motor (10), the motor (10) being a three-phase motor, characterized in that the driving method comprises: the switching timing of the upper arm switching elements and the lower arm switching elements of each phase of the motor (10) is controlled, and at least one moment in a carrier cycle Tc, the upper arm switching elements or the lower arm switching elements between different two phases in the motor (10) simultaneously perform opposite switching actions.
5. The motor driving method according to claim 4, wherein the current direction of each phase of the motor (10) is detected, and the pulse widths and the times of the upper arm switching elements and the lower arm switching elements of each phase are controlled according to the current direction to compensate for a voltage deviation due to a dead time of the upper arm switching elements and/or the lower arm switching elements of each phase.
6. The motor driving method according to claim 4 or 5, wherein switching timings of the upper arm switching elements and the lower arm switching elements of each phase are controlled according to a change in a carrier, or a carrier required for driving pulses of the upper arm switching elements and the lower arm switching elements of each phase is selected according to a current direction, and pulse widths and times of the upper arm switching elements and the lower arm switching elements of each phase are controlled according to the carrier.
7. The motor driving method of claim 6, wherein the carrier is a saw-shaped carrier comprising:
a 1 st carrier wave, the 1 st carrier wave being a sawtooth wave having a positive slope with respect to time in one carrier period Tc;
a 2 nd carrier wave, the 2 nd carrier wave being a sawtooth wave having a negative slope with respect to time in one carrier period Tc;
a 3 rd carrier wave, the 3 rd carrier wave being a sawtooth wave that advances time by a dead time relative to a 1 st carrier wave;
a 4 th carrier, the 4 th carrier being a sawtooth wave that advances a dead time only at the dead time relative to a 2 nd carrier;
a 5 th carrier wave, the 5 th carrier wave being a sawtooth wave that delays dead time only at the dead time with respect to the 1 st carrier wave;
a 6 th carrier wave, the 6 th carrier wave being a sawtooth wave delayed in time by a dead time with respect to the 2 nd carrier wave.
8. The motor driving method according to claim 7, wherein the motor (10) includes a U-phase, a V-phase, and a W-phase, and the U-phase, the V-phase, and the W-phase upper arm are sequentially provided with a switch (4a), a switch (6a), and a switch (8a), and the lower arm is sequentially provided with a switch (5a), a switch (7a), and a switch (9a), and the 6 th carrier is selected as a driving pulse carrier of the switch (4a), and the 2 nd carrier is selected as a driving pulse carrier of the switch (5 a); the 3 rd carrier wave is selected as the drive pulse carrier wave of the switch (6a), and the 1 st carrier wave is selected as the drive pulse carrier wave of the switch (7 a).
9. The motor driving method according to claim 7, wherein the motor (10) includes a U-phase, a V-phase, and a W-phase, the U-phase, the V-phase, and the W-phase upper arm are sequentially provided with a switch (4a), a switch (6a), and a switch (8a), the lower arm is sequentially provided with a switch (5a), a switch (7a), and a switch (9a), and when the U-phase and the V-phase current directions are both positive, the 2 nd carrier is selected as a driving pulse carrier of the switch (4a), the 4 th carrier is selected as a driving pulse carrier of the switch (5a), the 1 st carrier is selected as a driving pulse carrier of the switch (6a), and the 5 th carrier is selected as a driving pulse carrier of the switch (7 a); when the current directions of the U-phase and the V-phase are both negative, the 6 th carrier wave is selected as the driving pulse carrier wave of the switch (4a), the 2 nd carrier wave is selected as the driving pulse carrier wave of the switch (5a), the 3 rd carrier wave is selected as the driving pulse carrier wave of the switch (6a), and the 1 st carrier wave is selected as the driving pulse carrier wave of the switch (7 a).
10. An air conditioner comprising a computer-readable storage medium storing a computer program and a processor, the computer program being read and executed by the processor to implement the motor driving method according to claims 4 to 9.
11. A computer-readable storage medium, characterized in that it stores a computer program which, when read and executed by a processor, implements the motor driving method according to claims 4-9.
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