CN113539472A - Biological signal processor - Google Patents
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Abstract
The embodiment of the invention relates to the technical field of semiconductor integrated circuits and computers, and discloses a biological signal processor, which comprises: the reconfigurable core array, the signal interface and the controller; the signal interface is used for receiving a bioelectrical signal; the controller is used for gating a reconfigurable core with a first preset proportion in the reconfigurable core array, operating the low-power-consumption neural network to monitor the bioelectricity signals, gating a reconfigurable core with a second preset proportion in the reconfigurable core array when the probability of the occurrence of a preset result is greater than a preset threshold value according to the monitoring of the bioelectricity signals, and operating the high-precision neural network to detect the bioelectricity signals, wherein the first preset proportion is smaller than the second preset proportion. The biological signal processor provided by the embodiment of the invention can be directly applied to epileptics, and realizes the timely detection of epileptics.
Description
Technical Field
The present invention relates to the field of semiconductor integrated circuits and computer technologies, and in particular, to a bio-signal processor.
Background
Epilepsy is a common brain disease, and about 1% of the world population is affected by the disease and cannot live normally. When epileptic seizure occurs, the epileptic has unconsciousness, dyskinesia, vegetative nerve and mental disorder, and needs to be cured effectively in time; if the treatment is improper or the treatment means is improper, the life of the epileptic patient is often endangered, so that the epileptic seizure needs to be diagnosed in time, intervened in advance and treated actively.
Fig. 1(a) is a schematic diagram of epileptic treatment, and fig. 1(b) is a schematic diagram showing neural signals during epileptic seizures. As can be seen from fig. 1(b), seizures are generally divided into three phases: between seizures (from normal imminent to seizures), before seizures and seizures. Although it is possible to determine whether epilepsy occurs by detecting the segments of the convulsive team, the detection has serious hysteresis and cannot prevent the epilepsy from occurring in advance. Although the neural network can be used for predicting epilepsy to prevent epilepsy, the parameter amount of the neural network is huge and the calculation is complex, so that the power consumption of the prediction device is high, the probability of the epilepsy attack is low, and the prediction device needs to be monitored for a long time, namely the prediction device needs to be kept at a low power consumption for a long time so as to be directly applied to the epileptic patient.
Disclosure of Invention
The embodiment of the invention aims to provide a biological signal processor which can be directly applied to epileptics to realize timely detection of epilepsy.
To solve the above technical problem, an embodiment of the present invention provides a bio-signal processor, including: the reconfigurable core array, the signal interface and the controller; the signal interface is used for receiving a bioelectrical signal; the controller is used for gating a reconfigurable core with a first preset proportion in the reconfigurable core array, operating the low-power-consumption neural network to monitor the bioelectricity signals, gating a reconfigurable core with a second preset proportion in the reconfigurable core array when the probability of the occurrence of a preset result is greater than a preset threshold value according to the monitoring of the bioelectricity signals, and operating the high-precision neural network to detect the bioelectricity signals, wherein the first preset proportion is smaller than the second preset proportion.
Compared with the related art, the bio-signal processor provided by the embodiment of the invention monitors the bio-electric signals by gating the reconfigurable core with the first preset proportion (less) to operate the low-power-consumption neural network during monitoring, and when the probability of the occurrence of the preset result according to the monitoring of the bio-electric signals is greater than the preset threshold value, gates the reconfigurable core with the second preset proportion (more) to operate the high-precision neural network to detect the bio-electric signals. The biological signal processor can be in a mode with lower power consumption when the low-power neural network runs, so that the epilepsy can be monitored for a long time; when the probability of the occurrence of epilepsy (preset result) monitored according to the bioelectricity signals is larger than a preset threshold value, the epilepsy is predicted by using a high-precision neural network, false alarm can be eliminated, and the prediction precision is improved; and because the high-precision neural network only operates when monitoring that the epilepsy is likely to occur, the average power consumption of the biological signal processor can be maintained at a lower level, so that the biological signal processor can be directly applied to the epilepsy patient, and the timely detection of the epilepsy is realized.
In addition, each reconfigurable core in the reconfigurable core array comprises a plurality of reconfigurable processing units which are arranged in one dimension or two dimensions.
In addition, the reconfigurable processing unit includes two N-bit ALUs, several multiplexers, and registers.
In addition, the controller is further configured to gate the reconfigurable processing unit by different numbers through the multiplexer. Through gating the multiplexer, different numbers of reconfigurable processing units can be gated, and therefore the requirements of different computational powers can be met according to actual needs.
In addition, adjacent reconfigurable processing units can be combined into 4N bit wide ALUs to realize multiplication and accumulation of different data bit widths.
In addition, the controller is further configured to convert the multiplication of the N-bit width multiplier and the M-bit width multiplicand into N/2 addition accumulations of M +1 bits in a booth encoding manner, where N and M are both positive integers. Through the Booth coding mode, multiplication can be converted into addition accumulation, and further the arithmetic required by different neural networks is realized through ALU, other circuits do not need to be additionally designed, and the chip area of the biological signal processor can be effectively reduced.
In addition, the biological signal processor further comprises a program data memory, the program data memory is used for storing the low-power-consumption neural network and the high-precision neural network, and the controller is further used for obtaining the low-power-consumption neural network or the high-precision neural network from the program data memory and then running in the reconfigurable core array.
In addition, each reconfigurable core runs the high-precision neural network through the working mode of the pipeline. Since the pipeline mode of operation can apportion the output of multiple computation results over several cycles, rather than occurring within one cycle, the memory bandwidth requirements in the bio-signal processor can be reduced.
In addition, when the high-precision neural network is trained, parameters with the calculation frequency lower than the preset frequency are removed. By removing the parameters with the reference calculation frequency lower than the preset frequency, the parameters and the calculation amount of the high-precision neural network can be further reduced, thereby further reducing the power consumption of the processor 100.
In addition, the low-power-consumption neural network is a binary neural network or a pulse neural network, and the high-precision neural network is a convolutional neural network.
Drawings
One or more embodiments are illustrated by the corresponding figures in the drawings, which are not meant to be limiting.
FIG. 1(a) is a schematic diagram of epilepsy diagnosis and treatment;
FIG. 1(b) is a schematic diagram of a neural signal during a seizure;
FIG. 2 is a schematic diagram of a biological signal processor according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of another structure of a bio-signal processor according to an embodiment of the present invention;
FIG. 4 is a diagram showing an exemplary structure of a bio-signal processor according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of different neuron features of a binary neural network, an impulse neural network and a convolutional neural network involved in a biological signal processor and convolution parameter compression provided by an embodiment of the invention;
FIG. 6(a) is a schematic diagram of data paths of a reconfigurable processing unit in a biological signal processor during multiplication and accumulation;
FIG. 6(b) is a schematic diagram of a data path of a reconfigurable processing unit in a biological signal processor when pulse integration and binary calculation are processed;
FIG. 7(a) is an exemplary diagram of a bio-signal processor processing multiplication provided by an embodiment of the present invention;
FIG. 7(b) is an exemplary graph of the bio-signal processor processing pulse integration provided by an embodiment of the present invention;
FIG. 7(c) is an exemplary diagram of the addition of XOR and "1" by the bio-signal processor according to the embodiment of the present invention;
FIG. 7(d) is an exemplary diagram of a bio-signal processor provided by an embodiment of the present invention for processing matrix multiplication in a pipeline technique;
FIG. 8(a) is a diagram of an exemplary architecture of a bio-signal processor running different neural networks according to an embodiment of the present invention;
fig. 8(b) is a schematic diagram of power consumption variation of the bio-signal processor provided by the embodiment of the invention in operation of different neural networks.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail below with reference to the accompanying drawings. However, it will be appreciated by those of ordinary skill in the art that numerous technical details are set forth in order to provide a better understanding of the present application in various embodiments of the present invention. However, the technical solution claimed in the present application can be implemented without these technical details and various changes and modifications based on the following embodiments.
The present invention relates to a biological signal processor 100, as shown in fig. 2, including a signal interface 101, a controller 102, and a Reconfigurable Core (RC) array 103, where the Reconfigurable Core array 103 includes several Reconfigurable cores.
The signal interface 101 is configured to receive a bio-electrical signal, wherein the bio-electrical signal is, for example, an electrocardiogram, an electroencephalogram, an electromyogram, a stomach-electrical, or a retina-electrical signal, and when the bio-signal processor 100 is applied to an epileptic scene, the bio-electrical signal refers to an electrical signal of a brain (i.e., an electroencephalogram). Alternatively, the signal interface 101 may receive the bioelectrical signal by means of implantation or wearing.
The controller 102 is configured to gate a reconfigurable core in the reconfigurable core array 103 at a first preset ratio, operate the low-power-consumption neural network to monitor a bioelectric signal, gate a reconfigurable core in the reconfigurable core array 103 at a second preset ratio when a probability of a preset result is greater than a preset threshold value according to the monitoring of the bioelectric signal, and operate the high-precision neural network to detect the bioelectric signal, where the first preset ratio is smaller than the second preset ratio.
Alternatively, the preset result and the preset threshold may be set according to different kinds of bioelectric signals and/or different kinds of diseases, which is not particularly limited herein. For example, when the biological signal processor 100 is applied to an epileptic scene, the preset result is an epileptic, and the preset threshold may be 0.6, then the biological signal processor 100 operates the high-precision neural network to detect the biological electrical signal when the probability that the epileptic appears according to the electroencephalogram is greater than 0.6, so as to further confirm the probability that the preset result of the epileptic appears.
The first preset proportion and the second preset proportion can be set according to actual needs. Optionally, the first preset proportion may be set according to an actual computational effort required by the running low-power-consumption neural network, so that the computational effort when the reconfigurable core of the first preset proportion is switched on is greater than or equal to the actual computational effort required by the running low-power-consumption neural network; similarly, the second predetermined ratio may be set according to the actual computational effort required to operate the high-precision neural network, such that the computational effort when gating the second predetermined ratio is greater than or equal to the actual computational effort required to operate the high-precision neural network. Optionally, the second preset proportion is 100%, and the maximum computational effort of the reconfigurable core array 103 is just equal to the actual computational effort required by the high-precision neural network, so that the computational effort waste can be avoided, and the chip area of the biological signal processor 100 can be reduced. Alternatively, the low-power neural network and the high-precision neural network are stored in the bio-signal processor 100, and since the low-power neural network and the high-precision neural network are previously set in the bio-signal processor 100, the calculation power actually required by the low-power neural network and the high-precision neural network is known, and thus the first preset ratio and the second preset ratio may be previously set according to the calculation power actually required by the running neural network.
In a specific example, please refer to fig. 3, which is another schematic architecture diagram of the biological signal processor 100 according to the embodiment of the present invention, the biological signal processor 100 further includes a program data memory 104, the program data memory 104 is configured to store the low power consumption neural network and the high precision neural network, and the controller 102 is further configured to retrieve the low power consumption neural network or the high precision neural network from the program data memory 104 and then operate in the reconfigurable core array 103. Alternatively, when a low power consumption neural network or a high precision neural network is operated, the calculation results of the reconfigurable core array 103 are stored in the program data memory 104.
Optionally, the low-power-consumption neural network is a binary neural network or a pulse neural network, and the high-precision neural network is a convolutional neural network. Since the binary neural network or the impulse neural network requires less computation power, the bio-signal processor 100 can be maintained in a low power consumption state when operating in the bio-signal processor 100, thereby ensuring long-term monitoring. When applied to an epileptic scenario, since the probability of epileptic seizures is low, the bio-signal processor 100 is required to be in a monitoring state for a long time, and the binary neural network or the impulse neural network can keep the bio-signal processor 100 working in a low power consumption state, so as to ensure that the bio-signal processor 100 is in the monitoring state for a long time. However, the detection accuracy of the binary neural network or the impulse neural network is deficient, and if the binary neural network or the impulse neural network is simply adopted, a false alarm can occur, so that when the occurrence of epilepsy (a preset result) is detected to be greater than a preset threshold value according to the bioelectricity signals, the bioelectricity signals are detected by switching to the high-accuracy neural network, whether the epilepsy (a seizure) has a false alarm can be eliminated, and an accurate detection result can be obtained. Because the precision of the convolutional neural network is higher, the convolutional neural network is operated to detect the bioelectricity signals, so that false alarm can be avoided, and an accurate detection result is obtained.
It should be understood that the low power neural network is not limited to a binary neural network or a pulse neural network, but may include other neural networks that can operate at low power consumption; the high-precision neural network is not limited to the convolutional neural network, and may also include other neural networks capable of realizing high-precision detection.
Optionally, each Reconfigurable core in the Reconfigurable core array 103 includes a plurality of Reconfigurable Processing Elements (RPEs) arranged one-dimensionally. Please refer to fig. 4, which is a diagram illustrating a structure of a bio-signal processor 100 according to an embodiment of the present invention. As shown in fig. 4, the neural signal interface is a signal interface 101, the system microcontroller is a controller 102, and the RC array is a reconfigurable core array 103, where the reconfigurable core array 103 includes gated (or clock-gated) reconfigurable processing units (i.e., Active RCs in the figure) and ungated reconfigurable processing units (i.e., Inactive RCs in the figure), and each reconfigurable core includes a plurality of reconfigurable processing units (RPEs) arranged in one or two dimensions. Optionally, each reconfigurable core runs a high-precision neural network through the pipeline's mode of operation. The pipelined mode of operation can split the output of multiple computation results over several cycles, rather than occurring within one cycle, as compared to Single Instruction Multiple Data (SIMD) mode of computation, thus reducing memory bandwidth requirements in the bio-signal processor 100; and the control logic and the pipeline can be fixed by keeping the multiplier or the weight unchanged, so that the aim of further reducing the power consumption is fulfilled.
Alternatively, when training the high-precision neural network, the parameter with the reference calculation frequency lower than the preset frequency may be removed. The preset frequency can be set according to actual needs. By removing the parameter whose reference calculation frequency is lower than the preset frequency, the parameter amount and the calculation amount of the high-precision neural network can be further reduced, thereby further reducing the power consumption of the bio-signal processor 100. Please refer to fig. 5, which is a schematic diagram illustrating different neuron characteristics and convolution parameter compression of a binary neural network, an impulse neural network and a convolution neural network related to the bio-signal processor 100 according to an embodiment of the present invention. Specifically, the binary neural network and the impulse neural network have the characteristics of simple calculation and few parameters, and have the possibility of low power consumption realization, the binary neuron model binarizes the weight and the input characteristics, neurons of the binary neural network only have exclusive OR and accumulation operation, and the activation part can be realized by adopting a comparator; the pulse neurons of the pulse neural network do not need multipliers, pulse integration is realized mainly by accumulating with operation and weight values, and the pulse integration can be realized only by an adder under the condition of limiting time windows and attenuation; the convolutional neural network can optimize each convolutional layer, and replace the original parameters with low-precision parameters.
Optionally, the reconfigurable processing unit includes two N-bit ALUs (Arithmetic logic units), a number of multiplexers and registers. Optionally, the controller 102 is further configured to gate the reconfigurable processing unit with different numbers through the multiplexer. Through gating the multiplexer, different numbers of reconfigurable processing units can be gated, and therefore the requirements of different computational powers can be met according to actual needs.
Referring to fig. 6(a) and fig. 6(b), several modules of the reconfigurable processing unit are shown, where fig. 6(a) shows that when multiplication and accumulation are performed, part of product sums and multiplicands flow in the array of the reconfigurable units, and the last reconfigurable unit accumulates all product sums, and finally performs a multiply-accumulate operation; fig. 6(b) shows a data path for performing pulse integration and binary operation by using the reconfigurable processing unit, convolution parameters are first stored in a pipeline register, and when a pulse is input, an ALU performs accumulation and transmits the accumulated convolution parameters to the next reconfigurable processing unit to obtain an integral sum; when the input is binary, the RPE is shifted out of the lower order and conditionally accumulated according to its value.
Optionally, adjacent reconfigurable processing units may be combined into a 4N bit wide ALU to implement multiplication and accumulation for different data bit widths. Optionally, the 4N-bit wide ALUs may be further combined into an 8N-bit wide ALU.
It should be noted that the operational modes of ALU and pipeline can be used to convert the multiplier and multiplicand in the multiplication into addition accumulation, so that the conversion from multiplication to addition accumulation with any bit width can be realized.
Optionally, the controller 102 is further configured to convert the multiplication of the multiplicand with the N-bit width and the M-bit width into an addition accumulation of N/2M +1 bits by means of booth encoding, where N and M are both positive integers.
It should be understood that, since the biological signal processor 100 needs to run different neural network models under different conditions, and different neural network models need to perform operations such as multiplication, exclusive-or and accumulation with different bit widths, if different circuits are designed for these operations, it will inevitably result in an increase in the area of the biological signal processor 100 system, in the embodiment of the present invention, the multiplication is converted into addition accumulation by booth coding, the multiplication is converted into addition accumulation by ALU or pipeline, and the ALU itself can perform operations such as exclusive-or, so as to perform various operations required by different neural network models on the basis of the same circuit, thereby reducing the chip area required by the biological signal processor 100, facilitating the miniaturization of the biological signal processor 100, improving the portability of the biological signal processor 100, and further implanting into a human body, realizing the detection requirements of different bioelectrical signals.
Please refer to fig. 7(a), which converts the multiplication of the multiplicand with N bit width and M bit width into the addition accumulation of N/2M +1 bits by means of booth encoding, where in fig. 7(a), N is 8 and M is 8; in FIG. 7(b), the pulse signal is used as the control signal of each stage in the pipeline, so that the accumulation of the weight can be realized; in fig. 7(c), the xor operation in the binary neural network may be directly completed by the reconfigurable processing unit, and then the number of "1" in the result is calculated in a shift accumulation manner; while the computation process for matrix multiplication by pipelining is shown in fig. 7 (d). The pipeline processing shown in fig. 7(d) is an embodiment of the process shown in fig. 7 (a).
The biological signal processor 100 is exemplified by an epileptic scenario, wherein the low power neural network is a binary neural network or a pulse neural network, and the high precision neural network is a convolutional neural network. Referring to fig. 8(a), which is a framework of the bio-signal processor 100 in the embodiment of the present invention when operating different neural networks, it can be seen from the figure that the binary neural network and the impulse neural network have low power consumption but low accuracy, and the convolutional neural network has high power consumption but high accuracy, so that the binary neural network or the impulse neural network can be used to detect the electroencephalogram (bioelectric signal), so that the bio-signal processor 100 can be in a low-power consumption monitoring state for a long time, when the probability of monitoring the occurrence (seizure) of an epilepsy by the electroencephalogram is greater than a preset threshold, the convolutional neural network having high power consumption but high accuracy is operated again to determine whether the epilepsy actually occurs, and when determining the occurrence of the epilepsy, appropriate processing measures are taken in time to implement effective prediction of the epilepsy, thereby preventing the epilepsy in the future. Fig. 8(b) shows the power consumption variation of the bio-signal processor 100 when operating different neural networks, and it can be seen from the graph that, in the part of the false alarm between seizures (corresponding to the probability of epileptic occurrence being greater than the preset threshold) and in the part of the pre-seizure stage, the bio-signal processor 100 is in the case of high power consumption, and the rest of the time is in the case of low power consumption; the probability of epileptic seizure is very small, so that the probability of occurrence of high power consumption when the convolutional neural network is operated in the graph is very small, and the biological signal processor 100 operates in a low power consumption state most of the time, so that the epileptic seizure can be monitored for a long time; when the probability of detecting the occurrence of the epilepsy is larger than the preset threshold value, the high-precision convolutional neural network can be operated to detect, and the high reliability is also considered while the low power consumption is realized.
According to the biological signal processor 100 provided by the embodiment of the invention, the reconfigurable core with the first preset proportion (less) is gated to operate the low-power-consumption neural network to monitor the biological electric signals during monitoring, and when the probability of epilepsy (preset result) occurrence monitored according to the biological electric signals is greater than the preset threshold value, the reconfigurable core with the second preset proportion (more) is gated to operate the high-precision neural network to detect the biological electric signals. The biological signal processor 100 can be in a mode with lower power consumption when the low-power neural network runs, so that the epilepsy can be monitored for a long time; when the probability of the occurrence of epilepsy (preset result) monitored according to the bioelectricity signals is larger than a preset threshold value, the epilepsy is predicted by using a high-precision neural network, false alarm can be eliminated, and the prediction precision is improved; and because the high-precision neural network only operates when monitoring that epilepsy is likely to occur, the average power consumption of the biological signal processor 100 can be maintained at a lower level, so that the biological signal processor 100 can be directly applied to epileptics, and timely detection of epilepsy is realized.
It should be noted that each module referred to in this embodiment is a logical module, and in practical applications, one logical unit may be one physical unit, may be a part of one physical unit, and may be implemented by a combination of multiple physical units. In addition, in order to highlight the innovative part of the present invention, elements that are not so closely related to solving the technical problems proposed by the present invention are not introduced in the present embodiment, but this does not indicate that other elements are not present in the present embodiment.
It will be understood by those of ordinary skill in the art that the foregoing embodiments are specific examples for carrying out the invention, and that various changes in form and details may be made therein without departing from the spirit and scope of the invention in practice.
Claims (10)
1. A bio-signal processor, comprising: the reconfigurable core array, the signal interface and the controller;
the signal interface is used for receiving a bioelectrical signal;
the controller is used for gating a reconfigurable core with a first preset proportion in the reconfigurable core array, operating the low-power-consumption neural network to monitor the bioelectricity signals, gating a reconfigurable core with a second preset proportion in the reconfigurable core array when the probability of the occurrence of a preset result is greater than a preset threshold value according to the monitoring of the bioelectricity signals, and operating the high-precision neural network to detect the bioelectricity signals, wherein the first preset proportion is smaller than the second preset proportion.
2. The bio-signal processor of claim 1, wherein each reconfigurable core of the reconfigurable core array comprises a number of reconfigurable processing units arranged in one or two dimensions.
3. The bio-signal processor according to claim 2, wherein the reconfigurable processing unit comprises two N-bit ALUs, a number of multiplexers, and a register.
4. The bio-signal processor of claim 3, wherein the controller is further configured to gate a different number of the reconfigurable processing units through the multiplexer.
5. The bio signal processor according to claim 3, wherein adjacent reconfigurable processing units may be combined into a 4N bit wide ALU to enable multiplication and accumulation of different data bit widths.
6. The bio signal processor according to any one of claims 1 to 5, wherein the controller is further configured to convert the multiplication of the N-bit wide multiplier and the M-bit wide multiplicand into an addition accumulation of N/2M +1 bits by Booth encoding, wherein N and M are positive integers.
7. The bio signal processor according to any one of claims 1 to 5, further comprising a program data memory for storing the low power neural network and the high precision neural network, wherein the controller is further configured to operate in the reconfigurable core array after retrieving the low power neural network or the high precision neural network from the program data memory.
8. The bio-signal processor of claim 6, wherein each reconfigurable core runs the high precision neural network through a pipelined mode of operation.
9. The bio-signal processor according to claim 1, wherein a parameter participating in calculation of a frequency lower than a preset frequency is removed when the high-precision neural network is trained.
10. The bio-signal processor of claim 1, wherein the low power neural network is a binary neural network or a spiking neural network, and the high precision neural network is a convolutional neural network.
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