CN113535461A - Configuration file based visual data verification method for interlocking lower computer - Google Patents

Configuration file based visual data verification method for interlocking lower computer Download PDF

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CN113535461A
CN113535461A CN202110643538.4A CN202110643538A CN113535461A CN 113535461 A CN113535461 A CN 113535461A CN 202110643538 A CN202110643538 A CN 202110643538A CN 113535461 A CN113535461 A CN 113535461A
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information
file
address
configuration file
ads
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CN113535461B (en
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杨帆
黎瀚泽
杨平
黄虹博
辛帆
雷贝贝
张国茹
王绍新
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Casco Signal Cherngdu Ltd
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Casco Signal Cherngdu Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1004Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
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Abstract

The invention discloses a visual verification method for interlocking lower computer data based on a configuration file, which relates to the technical field of rail transit interlocking control, comprises an input information making step, a general search grammar searching step and an upper and lower computer communication code bit generating step, and is an automatic interlocking data configuration method for automatically generating code bits corresponding to all effective equipment of a station according to an interlocking information table, an external interface new table and self-defined equipment query grammar based on Boolean logic.

Description

Configuration file based visual data verification method for interlocking lower computer
Technical Field
The invention relates to the technical field of rail transit interlocking control, in particular to an interlocking lower computer data visualization verification method based on a configuration file.
Background
The interlocking refers to a mutual restriction relationship among the signalers, the turnouts and the approaches, and has the main function of ensuring the correct logic among the approaches, the turnouts and the signalers and preventing driving accidents; meanwhile, the computer interlock can improve the working efficiency and reduce the labor intensity.
The interlocking lower computer data is application data which ensures that the lower computer can output a correct operation result, and the driving safety is influenced by the correctness of the data. Interlocking lower computer data (ADS) is a binary file and is generated by a computer aided application software package (CAA), a CAA configuration file is a configuration file read by the CAA software for generating ADS file, and defines an input path and an input file of CAA for generating the necessary input of the lower computer data. CAA generates ADS by reading the correctly composed interlock packets (including interface data and interlock relationship data). Defining CAA configuration file config.tab in the data packet, defining the file name to be read by CAA software through file key words in the configuration file, analyzing the config.tab by CAA to obtain an input file so as to generate ADS, generating a text file ADSVAR by CAA while generating ADS, wherein code bit information and channel address information are stored in the file.
The correctness of the ADS is verified, that is, whether the information stored at the specified location in the ADS is correct or not is known. When data is wrong and the reason of the error needs to be checked manually, the binary files are all composed of 0 and 1, so that a verifier cannot position the error in the binary data.
At present, a verification method of binary data of an interlocking lower computer is to directly analyze the binary data through a verification tool to generate a corresponding logic file or an interface file, and then compare and verify the binary data with a CAA input file through a comparison tool, if the data verification fails, verification personnel cannot locate errors in the binary data because the binary data is composed of '0' and '1'; the existing verification tool has no visual binary data reading function and cannot provide an operation interface for verifying personnel to read a binary data structure of a lower computer, so that once data verification fails, a method for error checking and positioning is to use error data debugging source codes to position errors through a verification tool developer, meanwhile, the logic for analyzing ADS by the verification tool is written in the codes, when a file content structure is changed or a new interface file is added, the corresponding tool needs to maintain and modify the codes, and the method is time-consuming and low in efficiency.
Disclosure of Invention
The invention aims to solve the problems in the prior art and provides a visual lower computer data verification method which is flexible in configuration file setting, can visually check the binary data of a lower computer, helps testing and data verification personnel to efficiently and quickly locate errors and can improve the data verification efficiency.
The purpose of the invention is realized by the following technical scheme:
a visual data verification method for an interlocking lower computer based on a configuration file comprises the following steps:
step S1, acquiring ADS binary data files, that is, ADS files, in a lower computer data package, where the lower computer data package refers to a folder for storing output data generated by CAA software, the data package further includes an ADS var text file, the ADS binary data file refers to a file that is not read, and is a file that takes ADS as suffix, and the name is generally "vpicaa.ads", the ADS binary data file is read in units of four bytes, so as to obtain a key value pair set a, and ADS information is visually displayed in a "address-value-description" longitudinal column manner;
further, in step S1, the key in the key-value pair set a is an address of the ADS, and the value is a value of the quaternary length stored in the corresponding address.
More specifically, in step S1, the ADS information is visually displayed in a "address-value-description" column manner, as shown in fig. 4, the first column of "address" is an address in the ADS binary data, the second column of "value" is a four-byte-length value stored in the corresponding address, and the third column of "description" is description information corresponding to the value, so that a specific value in the ADS is conveniently located. The third column displays the description of the resolved position after the step S6 or step S7 is executed.
Step S2, obtaining an ADSVAR text file in the lower computer data packet, analyzing the ADSVAR text file to obtain code bit and variable information and a corresponding channel address, and storing the information into a set B;
further, all code bits and variable information are stored in the ADSVAR file, and the code bits and variable information obtained in step S2 are code bit names and variable names in the CAA input interface file and the relationship logic file.
Preferably, the channel address is a value stored in the ADS, the value stored in the ADS includes flag bit information of a variable, number information of code bits, and true and false value information of each code bit, channel address information, and the like, the description refers to the channel address stored in the ADS, and the corresponding code bit and variable information are obtained by obtaining the value stored in the ADS, the name of the code bit used for querying the text form in the ADSVAR text file, and the channel address corresponding to the code bit.
More preferably, the code bits and variable information, and the corresponding channel addresses are stored in the set B in the form of a data structure.
Step S3, selecting a configuration file, parsing and reading the selected configuration file, and storing the information obtained by parsing in the set C.
Specifically, in the configuration file in step S3, the configuration file includes parameters that can be configured by self, such as start and end nodes, < ADSTYPE >, < CONFIGFILE >, < DESCRIPTION >, < ADDRESS >, < CONTENT >, < CODE >, and the like, and can be flexibly configured as needed, the parameters are marks read as program identifiers, and information in the configuration file is read according to the keywords, so that desired information can be obtained in the ADS in binary, and the configuration rule is as follows:
(1) the configuration file represents node information with < XX >, and the node is ended with </XX >;
(2) the ADSTYPE defines the type of the lower computer, the type of the data adaptation lower computer can be obtained when the ADS binary data file in the data packet of the lower computer is obtained, and the type of the lower computer can be matched with the ADS binary data file;
(3) the module is system description information or a corresponding non-CAA input file if the information is not defined, the CAA configuration file is a configuration file read by generating ADS file software CAA and necessary input for generating lower computer data, and an input path and an input file of the CAA are defined in the configuration file;
(4) < DESCRIPTION > defines a DESCRIPTION of the module, briefly describing the information represented by the module;
(5) defining an initial ADDRESS of the module in a binary file ADS of a lower computer, and inquiring the initial ADDRESS of module information through the ADDRESS;
(6) < CONTENT > defines the CONTENT information in the module; wherein, the information in < CONTENT > is divided by line-feed character, one line represents a single information, each line is divided by English and number, the first column represents description information; the second column of digital representation is the byte number occupied by the value corresponding to the first column of description information; the third column, if present, is a type key, which indicates that the information of the line is the real address of the next module as nextadress; if the fourth column exists, the information represented by the row is the code bit number;
(7) the < CODE > information generally indicates CODE bits and variables, and is defined as < CONTEN > information, and the number of CODE information is defined as the position of a line where COUNT is located.
Furthermore, the configuration file is analyzed and read, the node information is read by beginning with the XX, and the reading is finished.
Step S4, if the file keyword < CONFILGFILE > is defined in the configuration file, the next step S5 is executed; if the file keyword < CONFIGFILE > is not defined in the configuration file, step S7 is executed;
step S5, reading the CAA configuration file, finding out the corresponding file name according to the file keyword < CONFILGFILE >, wherein the sequence of the file name is stored according to the sequence defined in the CAA configuration file;
further, there may be a plurality of file names corresponding to the file keyword < CONFIGFILE >, that is, there are a plurality of interface files or logical relationship files representing the type, and if there are a plurality of files < CONFIGFILE > having the same keyword, the file information of the type is read out in the ADS binary file by 0 and 1, and is stored according to the order defined in the CAA configuration file.
Step S6, traversing all the file names found in step S5, taking the file names as distinction, reading the content in the configuration file according to the configuration file, starting to analyze the file information, displaying the description information of the analyzed data in the third column in the visual interface, and continuing to execute step S8; the configuration file is a text file, and the content in the configuration file is read according to lines.
Further, according to the comparison relationship between the ADS file and the configuration file, the initial ADDRESS of the file information represented by the configuration file can be located according to the base ADDRESS in the configuration file, and then the file information can be parsed in sequence, wherein the detailed parsing rule is as follows:
(1) after the file name is obtained, finding out the initial Address of the file information in the ADS according to the base Address defined in the configuration file, wherein the Address information is expressed by Address;
(2) traversing the set C, reading N bytes of information from the Address according to the byte number N of each piece of information in the set, printing the description information and the acquired N bytes of information, adding N to the Address, and pointing the Address position to the next piece of information;
(3) if traversing to the next Address NextAddress, reading Address information with the byte number length of N, and storing the Address, wherein the Address Address is added with N;
(4) if traversing the number COUNT of the code bit information, reading the code bit information with the byte number length of N, and storing the information, wherein the Address is added with N;
(5) if the < CODE > information is traversed, finding a corresponding value in the set A according to the Address, then finding a CODE bit in the set B through a value channel Address, printing description information and CODE bit variable information, then adding the Address and the byte number N of the printing information, and printing the < CODE > information for how many times according to the number of the obtained CODE bits;
(6) if the file name traversal is finished, or the next address information value is 0, the information corresponding to the configuration file is analyzed and printed;
wherein, N represents the length of bytes, and N is 2 or 4.
Step S7, if the configuration file does not have the file keyword defined, finding the initial Address of the file information in the ADS according to the base Address defined in the configuration file, and beginning to parse the configuration file corresponding information with the Address.
Specifically, in step S7, the obtained start Address is used as a start Address, the set C is traversed, N bytes of information are read from the Address according to the number of bytes N of each piece of information in the set, and the description information and the obtained N bytes of information are printed. N is then added to the Address Address to point the Address location to the next message.
Further, if the set C traverses to the last element, the information corresponding to the configuration file is already analyzed and printed.
And step S8, comparing the analyzed information with the corresponding CAA input file, and verifying whether the stored information in the ADS is correct.
Compared with the prior art, the technical scheme comprises the following innovation points and beneficial effects (advantages):
at present, the verification method of the binary data of the interlocking lower computer is to directly analyze the binary data to generate a corresponding logic file or an interface file through a verification tool, then compare and verify the binary data with a CAA input file through the comparison tool, if the data verification fails, because the binary data consists of '0' and '1', a verifier cannot locate errors in the binary data, namely the existing verification tool has no visual binary data reading function and cannot provide the verifier with an operation interface for looking up the binary data structure of the lower computer, once the data verification fails, the method of error location is to locate the errors by using an error data debugging source code through a developer of the verification tool, and the logic for analyzing the ADS by the verification tool is written in the code, when the content structure of the file is changed or a new interface file is added, the corresponding tools require maintenance modifications to the code, which is time consuming and inefficient. Compared with the prior art, the method of the scheme of the application has the advantages that: 1. the analysis logic of the binary file is written in the configuration file, flexible configuration can be realized, the code logic of a tool is not required to be modified, and the maintenance and modification of a verification tool caused by the change of the ADS data structure can be reduced. 2. Binary data are displayed by adopting an address-value-description column mode visualization method, information in a binary file can be conveniently consulted through description information, and errors can be quickly positioned when the data are not verified.
Drawings
The foregoing and following detailed description of the invention will be apparent when read in conjunction with the following drawings, in which:
FIG. 1 is a schematic flow chart illustrating verification of lower computer data based on configuration files according to the present invention;
FIG. 2 is a schematic diagram of a preferred configuration file of the present invention;
FIG. 3 is a schematic diagram illustrating comparison between an ADS and a configuration file according to a preferred embodiment of the present invention;
FIG. 4 is a schematic view of an ADS file visualization interface according to the present invention.
Detailed Description
The technical solutions for achieving the objects of the present invention are further illustrated by the following specific examples, and it should be noted that the technical solutions claimed in the present invention include, but are not limited to, the following examples.
Example 1
As a most basic specific embodiment of the present invention, the present embodiment discloses a configuration file-based visual data verification method for an interlocked lower computer, which includes the following steps:
step S1, acquiring an ADS binary data file, i.e., an ADS file, in a lower computer data package, where the lower computer data package refers to a folder for storing output data generated by CAA software, the data package further includes an ADS var text file, the ADS binary data file refers to a file that is not read, and is a file with ADS as suffix, and the name is generally "vpicaa.ads", the ADS binary data file is read in units of four bytes to obtain a key value pair set a, and ADS information is visually displayed in a column manner of "address-value-description".
Step S2, obtaining the ADSVAR text file in the lower computer data packet, analyzing the ADSVAR text file to obtain code bits and variable information, and corresponding channel addresses, and storing these information in the set B.
Step S3, selecting a configuration file, parsing and reading the selected configuration file, and storing the information obtained by parsing in the set C.
Step S4, if the file keyword < CONFILGFILE > is defined in the configuration file, the next step S5 is executed; if the file key < CONFIGFILE > is not defined in the configuration file, step S7 is performed.
Step S5, reading the CAA configuration file, finding out the corresponding file name according to the file keyword < CONFIGFILE >, wherein the sequence of the file name is stored according to the sequence defined in the CAA configuration file.
Step S6, traversing all the file names found in step S5, taking the file names as distinction, reading the content in the configuration file according to the configuration file, starting to analyze the file information, displaying the description information of the analyzed data in the third column in the visual interface, and continuing to execute step S8; the configuration file is a text file, the content in the configuration file is read according to lines, for example, a line with < CONFIGFILE > as an initial line is read, which indicates that keyword information in the CAA configuration file is read, the next line is continuously read, the information of the next line is stored, the next line is read again, if the line with </CONFIGFILE > as the initial line is read, the information in the CONFIGFILE node is completely read, after the information of one node is read, the next line is continuously read, and when the next line is read, the processing mode is the same as that of < CONFIGFILE >.
Step S7, if the configuration file does not have the file keyword defined, finding the initial Address of the file information in the ADS according to the base Address defined in the configuration file, and beginning to parse the configuration file corresponding information with the Address.
And step S8, comparing the analyzed information with the corresponding CAA input file, and verifying whether the stored information in the ADS is correct.
Example 2
As a more preferable specific implementation scheme of the present invention, on the basis of the technical scheme of the above example 1, the present example further discloses:
in step S1, the key in the key-value pair set a is the address of ADS, and the value is the value of the quaternary length stored in the corresponding address. More specifically, in step S1, the ADS information is visually displayed in a "address-value-description" column manner, as shown in fig. 4, the first column "address" is an address in the ADS binary data, the second column "value" is a four-byte-length value stored in a corresponding address, the third column "description" is description information corresponding to the value, so as to facilitate locating a specific value in the ADS, and the third column displays a description of a parsing position after step S6 or step S7 is executed.
Further, in step 2, all the code bits and variable information are stored in the ADSVAR file, and the code bits and variable information obtained in step S2 are the code bit names and variable names in the CAA input interface file and the relationship logic file. Step S2, parsing the ADSVAR text file to obtain code bits, variable information, and corresponding channel addresses, where the channel addresses are values stored in the ADS, the values stored in the ADS include flag bit information of variables, number information of code bits, and true and false value information of each code bit, channel address information, and the like, and the description refers to the channel addresses stored in the ADS, and the corresponding code bits and variable information are obtained by obtaining the values stored in the ADS, and the code bit names used for querying the text form in the ADSVAR text file, and the channel addresses corresponding to the code bits.
More preferably, the code bits and variable information, and the corresponding channel addresses are stored in the set B in the form of a data structure.
Further, in the configuration file in step S3, the configuration file includes parameters that can be configured by self, such as start and end nodes, < ADSTYPE >, < CONFIGFILE >, < DESCRIPTION >, < ADDRESS >, < CONTENT >, < CODE >, and the like, and can be flexibly configured as needed, the parameters are marks read as program identifiers, and information in the configuration file is read according to the keywords, so that desired information can be obtained in ADS in binary, as shown in fig. 2, the configuration rule is as follows:
(1) the configuration file represents node information with < XX >, and the node is ended with </XX >;
(2) the ADSTYPE defines the type of the lower computer, the type of the data adaptation lower computer can be obtained when the ADS binary data file in the data packet of the lower computer is obtained, and the type of the lower computer can be matched with the ADS binary data file;
(3) the module is system description information or a corresponding non-CAA input file if the information is not defined, the CAA configuration file is a configuration file read by generating ADS file software CAA and necessary input for generating lower computer data, and an input path and an input file of the CAA are defined in the configuration file;
(4) < DESCRIPTION > defines a DESCRIPTION of the module, briefly describing the information represented by the module;
(5) defining an initial ADDRESS of the module in a binary file ADS of a lower computer, and inquiring the initial ADDRESS of module information through the ADDRESS;
(6) < CONTENT > defines the CONTENT information in the module; wherein, the information in < CONTENT > is divided by line-feed character, one line represents a single information, each line is divided by English and number, the first column represents description information; the second column of numbers represents the number of bytes (four bytes or two bytes) occupied by the value corresponding to the first column of description information; the third column (if present) is a type key, which indicates that the information of the row is the real address of the next module as nextadress; the fourth column, if any, indicates that the row indicates the number of CODE bits, the third column indicates CODE, indicates that the node of the CODE bit is < CODE >, and the fourth column indicates COUNT, indicates the number of CODE bits, and indicates how many pieces of < CODE > node information will be below;
(7) the < CODE > information generally indicates CODE bits and variables, and is defined as < CONTEN > information, and the number of CODE information is defined as the position of a line where COUNT is located.
Preferably, the configuration file is analyzed and read, and the reading starts with < XX > and ends with </XX > when the node information is read.
In step S4, there may be multiple file names corresponding to the file keyword < CONFIGFILE >, that is, there are multiple interface files or logical relationship files representing the type, and if there are multiple files < CONFIGFILE > with the same keyword, the file information of the type is read out in the ADS binary file by 0 and 1, and is stored successfully according to the order defined in the CAA configuration file.
Further, as shown in fig. 3, the mapping relationship between the ADS file and the configuration file may be located to the initial ADDRESS of the file information represented by the configuration file according to the base ADDRESS in the configuration file, and then the file information may be parsed in sequence, where the detailed parsing rule is as follows:
(1) after the file name is obtained, finding out the initial Address of the file information in the ADS according to the base Address defined in the configuration file, wherein the Address information is expressed by Address;
(2) traversing the set C, reading N bytes of information from the Address according to the byte number N of each piece of information in the set, printing the description information and the acquired N bytes of information, adding N to the Address, and pointing the Address position to the next piece of information;
(3) if traversing to the next Address NextAddress, reading Address information with the byte number length of N, and storing the Address, wherein the Address Address is added with N;
(4) if traversing the number COUNT of the code bit information, reading the code bit information with the byte number length of N, and storing the information, wherein the Address is added with N;
(5) if the < CODE > information is traversed, finding a corresponding value in the set A according to the Address, then finding a CODE bit in the set B through a value channel Address, printing description information and CODE bit variable information, then adding the Address and the byte number N of the printing information, and printing the < CODE > information for how many times according to the number of the obtained CODE bits;
(6) if the file name traversal is finished, or the next address information value is 0, the information corresponding to the configuration file is analyzed and printed;
wherein, N represents the length of bytes, and N is 2 or 4.
In step S7, specifically, the obtained start Address is used as a start Address, the set C is traversed, N bytes of information are read from the Address according to the number of bytes N of each information in the set, and the description information and the obtained N bytes of information are printed. N is then added to the Address Address to point the Address location to the next message.
Further, if the set C traverses to the last element, the information corresponding to the configuration file is already analyzed and printed.

Claims (10)

1. A visual data verification method for an interlocking lower computer based on a configuration file is characterized by comprising the following steps:
step S1, obtaining an ADS binary data file in a lower computer data packet, reading the ADS binary data file by taking four bytes as a unit to obtain a key value pair set A, and visually displaying the ADS information in an address-value-description columnar mode;
step S2, obtaining an ADSVAR text file in the lower computer data packet, analyzing the ADSVAR text file to obtain code bit and variable information and a corresponding channel address, and storing the information into a set B;
step S3, selecting a configuration file, analyzing and reading the selected configuration file, and storing the information obtained by analysis into a set C;
step S4, if the file keyword < CONFILGFILE > is defined in the configuration file, the next step S5 is executed; if the file keyword < CONFIGFILE > is not defined in the configuration file, step S7 is executed;
step S5, reading the CAA configuration file, finding out the corresponding file name according to the file keyword < CONFILGFILE >, wherein the sequence of the file name is stored according to the sequence defined in the CAA configuration file;
step S6, traversing all the file names found in step S5, taking the file names as distinction, reading the content in the configuration file according to the configuration file, starting to analyze the file information, displaying the description information of the analyzed data in the third column in the visual interface, and continuing to execute step S8;
step S7, if the configuration file does not define the file key word, finding the initial Address Address of the file information in ADS according to the base Address defined in the configuration file, and beginning to resolve the corresponding information of the configuration file with the Address;
and step S8, comparing the analyzed information with the corresponding CAA input file, and verifying whether the stored information in the ADS is correct.
2. The interlocking lower computer data visualization verification method based on the configuration file as claimed in claim 1, characterized in that: in step S1, the key in the key-value pair set a is the address of ADS, and the value is the value of quaternary length stored in the corresponding address.
3. The interlocking lower computer data visualization verification method based on the configuration file as claimed in claim 1 or 2, characterized in that: in step S1, the ADS information is visually displayed in a "address-value-description" column manner, where the first column "address" is an address in the ADS binary data, the second column "value" is a four-byte-length value stored in a corresponding address, and the third column "description" is description information corresponding to the value, so as to facilitate positioning of a specific value in the ADS.
4. The interlocking lower computer data visualization verification method based on the configuration file as claimed in claim 1, characterized in that: the ADSVAR file stores all code bits and variable information, and the code bits and variable information obtained in step S2 are code bit names and variable names in the CAA input interface file and the relational logic file.
5. The visual verification method of interlocked lower computer data based on the configuration file as claimed in claim 4, wherein: the channel address is a value stored in the ADS, the value stored in the ADS comprises flag bit information and code bit number information of variables, true and false value information and channel address information of each code bit, and the corresponding code bits and the corresponding variable information are obtained by obtaining the value stored in the ADS, the code bit name used for inquiring the text form in the ADSVAR text file and the channel address corresponding to the code bits.
6. The interlocking lower computer data visualization verification method based on the configuration file as claimed in claim 1 or 5, characterized in that: and the code bits, the variable information and the corresponding channel addresses are stored in the set B in a data structure form.
7. The method for visually verifying interlocked lower computer data based on the configuration file as claimed in claim 1, wherein the configuration file in step S3 includes parameters of start and end nodes, < ADSTYPE >, < CONFIGFILE >, < DESCRIPTION >, < ADDRESS >, < CONTENT >, < CODE > and the like, which can adjust configuration by themselves, and the configuration rules are as follows:
(1) the configuration file represents node information with < XX >, and the node is ended with </XX >;
(2) the ADSTYPE defines the type of the lower computer, the type of the data adaptation lower computer can be obtained when the ADS binary data file in the data packet of the lower computer is obtained, and the type of the lower computer can be matched with the ADS binary data file;
(3) the < CONFILGFILE > defines the corresponding keyword information of the information in the CAA configuration file, if the keyword information is not defined, the module is system description information or a corresponding non-CAA input file;
(4) < DESCRIPTION > defines a DESCRIPTION of the module, briefly describing the information represented by the module;
(5) defining an initial ADDRESS of the module in a binary file ADS of a lower computer, and inquiring the initial ADDRESS of module information through the ADDRESS;
(6) < CONTENT > defines the CONTENT information in the module; wherein, the information in < CONTENT > is divided by line-feed character, one line represents a single information, each line is divided by English and number, the first column represents description information; the second column of digital representation is the byte number occupied by the value corresponding to the first column of description information; the third column is a type key; the information represented by the fourth column is the number of code bits;
(7) CODE bits and variable information are generally represented in < CODE > information, and are defined in < CONTEN > information, and the number of CODE information is defined in the position of a line where COUNT is located;
furthermore, the configuration file is analyzed and read, the node information is read by beginning with the XX, and the reading is finished.
8. The visual verification method of interlocked lower computer data based on the configuration file as claimed in claim 7, wherein: if there are several files with the same key word < CONFILGFILE >, the file information of the type is read out in ADS binary file by 0 and 1 and stored according to the defined sequence in CAA configuration file.
9. The configuration file based interlocking lower computer data visualization verification method as claimed in claim 1, wherein the reference relationship between the ADS file and the configuration file can be located to the file information start ADDRESS represented by the configuration file according to the base ADDRESS in the configuration file, and then the file information can be parsed in sequence, and the detailed parsing rule is as follows:
(1) after the file name is obtained, finding out the initial Address of the file information in the ADS according to the base Address defined in the configuration file, wherein the Address information is expressed by Address;
(2) traversing the set C, reading N bytes of information from the Address according to the byte number N of each piece of information in the set, printing the description information and the acquired N bytes of information, adding N to the Address, and pointing the Address position to the next piece of information;
(3) if traversing to the next Address NextAddress, reading Address information with the byte number length of N, and storing the Address, wherein the Address Address is added with N;
(4) if traversing the number COUNT of the code bit information, reading the code bit information with the byte number length of N, and storing the information, wherein the Address is added with N;
(5) if the < CODE > information is traversed, finding a corresponding value in the set A according to the Address, then finding a CODE bit in the set B through a value channel Address, printing description information and CODE bit variable information, then adding the Address and the byte number N of the printing information, and printing the < CODE > information for how many times according to the number of the obtained CODE bits;
(6) if the file name traversal is finished, or the next address information value is 0, the information corresponding to the configuration file is analyzed and printed;
wherein, N represents the length of bytes, and N is 2 or 4.
10. The interlocking lower computer data visualization verification method based on the configuration file as claimed in claim 1, characterized in that: step S7, starting with the obtained initial Address, traversing the set C, reading N bytes of information from the Address according to the number N of bytes of each information in the set, printing the description information and the obtained N bytes of information, adding N to the Address, and pointing the Address position to the next information; and if the set C traverses to the last element, the information corresponding to the configuration file is analyzed and printed.
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