CN113518213A - Real-time dynamic video display system based on 4k digital micromirror chip - Google Patents
Real-time dynamic video display system based on 4k digital micromirror chip Download PDFInfo
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- CN113518213A CN113518213A CN202110408840.1A CN202110408840A CN113518213A CN 113518213 A CN113518213 A CN 113518213A CN 202110408840 A CN202110408840 A CN 202110408840A CN 113518213 A CN113518213 A CN 113518213A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/12—Picture reproducers
- H04N9/31—Projection devices for colour picture display, e.g. using electronic spatial light modulators [ESLM]
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/001—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/12—Picture reproducers
- H04N9/31—Projection devices for colour picture display, e.g. using electronic spatial light modulators [ESLM]
- H04N9/3141—Constructional details thereof
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/12—Picture reproducers
- H04N9/31—Projection devices for colour picture display, e.g. using electronic spatial light modulators [ESLM]
- H04N9/3141—Constructional details thereof
- H04N9/3144—Cooling systems
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/12—Picture reproducers
- H04N9/31—Projection devices for colour picture display, e.g. using electronic spatial light modulators [ESLM]
- H04N9/3141—Constructional details thereof
- H04N9/315—Modulator illumination systems
- H04N9/3161—Modulator illumination systems using laser light sources
Abstract
The invention discloses a real-time dynamic video display system based on a 4k digital micromirror chip, which comprises an FPGA (field programmable gate array) KINTEX subsystem, a capacitive touch screen, a daughter board module, a power supply module, a color wheel module, an UHP (ultra high performance) lamp module, a three-color laser module, a fan module, a video input/output module and an interaction module. The invention can be compatible with various video input modes and various light source inputs, and can be used in various occasions such as security monitoring, command control, film showing, stage performance, exhibition and display, video conference, simulation virtual reality, 4D cinema, ball screen, science popularization and the like. The invention has the advantages of small volume, complete functions, excellent performance, strong developability and the like, and can bring high-definition and high-quality video watching experience to users.
Description
Technical Field
The invention relates to a video display and digital micromirror chip driving technology, in particular to a real-time dynamic video display system based on a 4k digital micromirror chip, which is used as a digital micromirror chip video display platform, can drive and display ultra-high-definition dynamic videos with the highest resolution of 3840 × 2160, and is compatible with various videos with driving resolutions of 3840 × 2160, 2716 × 1538, 1920 × 1080, 1024 × 768 and the like.
Background
With the gradual improvement of the quality of life of people, the demand for large images is increasing. Projection is the only display technique that proves to offer a large image size of 4k at a reasonable price, as in the day. Projection technology can be essentially classified into Digital Light Processing (DLP) technology and Liquid Crystal Display (LCD). The projection principle of Digital Light Processing (DLP) determines that the contrast of the projected picture is extremely high, and the optical path system is designed to be more compact, so that the DLP is dominant in terms of volume and weight. Meanwhile, the laser technology is used as the next generation display technology, has the advantages of wide color gamut range, long service life, environmental protection, energy conservation and the like, and can lead to the revolutionary improvement of the comprehensive performance of the display system. Liquid crystal materials of a Liquid Crystal Display (LCD) are all organic matters, and can be quickly denatured under the irradiation of high-intensity laser, and the service life of the LCD cannot meet the requirements of products. Thus, digital light processing technology (DLP) is the only choice for laser displays.
According to the annual summary display of the intelligent projection market in China in 2019, in the projection display market, the market share of a digital light processing technology (DLP) in 2019 reaches 72.6 percent and is dominant in the market, and a digital micromirror chip (DMD) serving as a core technology of the DLP is blocked by a certain company in a country and monopolized all the time, and the domestic progress is slow in the field of the digital micromirror chip (DMD).
Disclosure of Invention
The invention aims to provide a real-time dynamic video display system based on a 4k digital micromirror chip aiming at the defects of the existing 4k ultra-high-definition digital micromirror chip video projection driving technology, and the system adopts an FPGA KINTEX subsystem, a capacitive touch screen, a daughter board module, a power supply module, a color wheel module, an UHP lamp module, a three-color laser module, a fan module, a video input and output module and an interaction module, and carries out platform development aiming at the design of a driving chip of the 4k ultra-high-definition digital micromirror chip (DMD) and the display projection of real-time video data.
The invention can meet the high requirement of the verification of the 4k digital micromirror drive chip on one hand, and is suitable for the intelligent development of the 4k ultra-high definition resolution projection market on the other hand. The invention can be used for user interaction in various interaction modes such as a capacitive touch screen, infrared remote control, WIFI (wireless fidelity), an upper computer (USB-Uart) and the like, adopts KINTEX7 series FPGA of Xilinx company to realize signal processing of a system core, has various interfaces such as USB-Uart, serial ports and LVDS (low voltage differential signaling) interfaces for peripheral expansion, and simultaneously supports interconnection of platforms through low-speed SPI (serial peripheral interface), thereby expanding functions. The invention can be compatible with various video input modes, including HDMI interface, SDI interface, etc.; the present invention is compatible with multiple light source inputs simultaneously, including but not limited to lasers, UHP high pressure mercury lamps, etc. The invention can be used in a plurality of occasions such as security monitoring, command control, film showing, stage performance, exhibition and display, video conference, simulation virtual reality, 4D cinema, ball screen, science popularization and the like. The invention has the advantages of small volume, complete functions, excellent performance, strong developability and the like, and can bring high-definition and high-quality video watching experience to users.
The specific technical scheme for realizing the purpose of the invention is as follows:
a real-time dynamic video display system based on a 4k digital micro-mirror chip comprises an FPGA KINTEX subsystem, a capacitive touch screen, a daughter board module, a power module, a color wheel module, an UHP lamp module, a three-color laser module, a fan module, a video input/output module and an interaction module, wherein the FPGA KINTEX subsystem is respectively connected with the capacitive touch screen, the daughter board module, the color wheel module, the UHP lamp module, the three-color laser module, the fan module, the video input/output module and the interaction module; the power supply module supplies power to the FPGA KINTEX subsystem, the capacitive touch screen, the daughter board part, the color wheel module, the UHP lamp module, the three-color laser module, the fan module, the video input/output module and the interaction module; wherein:
the KINTEX subsystem of the FPGA comprises a KINTEX7 chip, an 8Gb 64bit DDR3 memory, a Flash module, a USB-UART interface part, a galvanometer module and a daughter board LVDS interface; the 8Gb 64bit DDR3 memory, the Flash module, the USB-UART interface part, the galvanometer module and the daughter board LVDS interface are respectively connected with a KINTEX7 chip;
the sub-board part comprises a sub-board and a DMD chip, and the DMD chip is connected to the sub-board through a chip base; the daughter board is connected to a daughter board LVDS interface in the FPGA KINTEX subsystem through an LVDS interface;
the color wheel module comprises a first color wheel driving module, a first color wheel feedback, a second color wheel driving module, a second color wheel and a second color wheel feedback, the first color wheel is connected with the first color wheel driving module, the second color wheel is connected with the second color wheel driving module, the first color wheel is connected with the first color wheel feedback, the second color wheel is connected with the second color wheel feedback, and the first color wheel driving module, the first color wheel feedback, the second color wheel driving module and the second color wheel feedback are connected to a KINTEX7 chip in the FPGA KINTEX subsystem;
the UHP lamp module comprises an UHP blast and an UHP lamp, and the UHP lamp is connected with the UHP blast; the UHP blast is connected with a KINTEX7 chip in the KINTEX subsystem of the FPGA programmable gate array.
The three-color laser module comprises a red laser driving module, a green laser driving module and a blue laser driving module; the red laser driving module, the green laser driving module and the blue laser driving module are connected with a KINTEX7 chip in the KINTEX subsystem of the FPGA.
The fan module comprises a first fan driving module, a second fan driving module, a third fan driving module, a fourth fan driving module, a fifth fan driving module and a sixth fan driving module. Each fan driving module can multiplex two fan interfaces, so the system can drive 12 fans at most and realize real-time fan speed regulation. The first fan driving module, the second fan driving module, the third fan driving module, the fourth fan driving module, the fifth fan driving module and the sixth fan driving module are connected with a KINTEX7 chip in the KINTEX subsystem of the FPGA.
The video input and output module is composed of an HDMI input interface, an HDMI output interface and an ultra-high-definition video transceiving chip GSV2011, wherein the HDMI input interface and the HDMI output interface are connected with the ultra-high-definition video transceiving chip GSV2011, the ultra-high-definition video transceiving chip GSV2011 is connected with a KINTEX7 chip in the FPGA KINTEX subsystem, and the SDI video input interface and the SDI video output interface are respectively connected with a KINTEX7 chip in the FPGA KINTEX subsystem.
The interaction module consists of a TC9012 infrared interface module and a serial port transparent transmission wireless module. The TC9012 infrared interface module and the serial port transparent transmission wireless module are connected with a KINTEX7 chip in the KINTEX subsystem of the FPGA.
The USB-UART interface module consists of a mini-USB interface and a UART-to-USB bridging chip; the data differential signal in the mini-USB interface is connected with a UART-to-USB bridging chip, and the UART-to-USB bridging chip is connected with a KINTEX7 chip in a KINTEX subsystem of the FPGA.
The advantages of the invention are as follows:
1) the invention is provided with a USB-UART interface, two HDMI input and output interfaces, two SDI output and output interfaces, three laser control interfaces, a UHP lamp interface, two color wheel interfaces, a galvanometer interface, a twelve fan interface, an infrared interface, a serial transparent transmission wireless module and an LCD touch screen interface. The interface is perfect, the requirement of real-time dynamic video display is met, and the redundant interface of the traditional development platform is cut off under the condition that the requirement of a video platform is met, so that the cost is lower;
2) the display platform can drive and display ultra-high-definition dynamic videos projected by the digital micro-mirrors with the highest resolution of 3840 × 2160 and is compatible with various digital micro-mirror chips such as 3840 × 2160, 2716 × 1538, 1920 × 1080, 1024 × 768 and the like. Meanwhile, the invention adopts the framework of the mother-daughter board, and the digital micromirror chips with different resolutions can be replaced by replacing the daughter board. The cost is reduced to the maximum extent under the condition of improving the compatibility;
3) the invention is provided with a red, green and blue laser driving control interface, a UHP high-pressure mercury lamp control interface and two color wheel interfaces, and can drive the two color wheels to rotate at most. Thereby realizing four light source modes including a high-pressure mercury lamp light source, a monochromatic laser light source, a two-color laser light source (monochromatic laser is a main light source, the other color is complementary color) and a three-color laser light source;
4) the invention supports the input of HDMI ultrahigh definition 4k @60Hz video and simultaneously supports the input of SDI 4k @60Hz video bare data. And a plurality of video access modes can be provided for users.
5) The invention can realize various front-end video processing algorithms including image sharpening, brightness adjustment, contrast adjustment, chromaticity adjustment, gamma correction, OSD superposition, split-screen display and the like while displaying the real-time image with ultrahigh definition resolution, and can provide the optimal video viewing experience for the viewer;
6) the FPGA chip between the platforms can carry out inter-plate communication through an SPI (serial peripheral interface) reserved on the plates, and after the three plates are mutually connected and time sequence is synchronized, development and display of a 3DLP (digital light processing) cinema-level technology can be realized;
7) the platform is based on an independently designed high-speed printed circuit board, and the FPGA program, the JAVA language and the C language are developed by an inventor team without any finished product module. The hardware system adopts a 10-layer stacked interface, and the maximum data rate on the board can reach 10.3125 Gbps. Through simulation calculation, Signal Integrity (SI), Power Integrity (PI) and electromagnetic compatibility (EMI) are guaranteed, and the platform is stable in operation and good in performance.
Drawings
FIG. 1 is a block diagram of the system of the present invention;
FIG. 2 is a circuit block diagram of the KINTEX subsystem of the FPGA;
FIG. 3 is a block diagram of a daughter board module circuit in accordance with the present invention;
fig. 4 is a block circuit diagram of a color wheel module according to the present invention;
fig. 5 is a block circuit diagram of a UHP lamp module according to the invention;
FIG. 6 is a circuit block diagram of a three-color laser module according to the present invention;
FIG. 7 is a circuit block diagram of a fan module according to the present invention;
FIG. 8 is a block diagram of a video I/O module according to the present invention;
FIG. 9 is a circuit block diagram of an interaction module of the present invention;
FIG. 10 is a block diagram of a USB-UART module according to the present invention;
fig. 11 is a circuit block diagram of embodiment 1 of the present invention.
Detailed Description
Referring to fig. 1, the real-time dynamic video display system based on the 4k digital micromirror chip of the present invention comprises an FPGA (field programmable gate array) KINTEX subsystem 1, a capacitive touch screen 2, a daughter board module 3, a power supply module 4, a color wheel module 5, a UHP (ultra high performance) lamp module 6, a three-color laser module 7, a fan module 8, a video input/output module 9 and an interaction module 10, wherein the FPGA KINTEX subsystem 1 is respectively connected with the capacitive touch screen 2, the daughter board module 3, the color wheel module 5, the UHP lamp module 6, the three-color laser module 7, the fan module 8, the video input/output module 9 and the interaction module 10; the power module 4 supplies power for the FPGA KINTEX subsystem 1, the capacitive touch screen 2, the daughter board module 3, the color wheel module 5, the UHP lamp module 6, the three-color laser module 7, the fan module 8, the video input/output module 9 and the interaction module 10. The power supply part has 15 power supply chips, provides 31 power supplies, and has 13 different voltages, wherein the 13 different voltages comprise a negative voltage of-12V and a low voltage of 1.0V with a large current of 30A. In the hardware design, the power-on sequence requirements of the FPGA chip and each path of peripheral chip are considered, the whole platform has three levels of power-on sequences, and the power good pins of the power chip and the slow start time sequences corresponding to different capacitors are respectively used for controlling the power-on sequences.
Referring to fig. 2, the FPGA programmable gate array KINTEX subsystem 1 includes a KINTEX7 chip 11, an 8Gb 64bit DDR3 memory 12, a Flash module 13, a USB-UART interface module 14, a galvanometer module 15, and a daughter board LVDS interface 16; the 8Gb 64bit DDR3 memory 12, the Flash module 13, the USB-UART interface module 14, the galvanometer module 15 and the daughter board LVDS interface 16 are respectively connected with the KINTEX7 chip 11. If the video of 4k @60Hz is processed in real time, two 16bit 2Gb DDR3 memories can meet the requirements of data capacity and data bandwidth. However, due to the working principle of the 4k ultra-high-definition digital micromirror chip, the video image needs to be interpolated to 5432 × 3056@60Hz, and at this time, the data bandwidth of the 2 pieces of DDR3 cannot be met, so that the 4 pieces of 16bit DDR3 are used in the invention.
Referring to fig. 3, the daughter board module 3 includes a daughter board 31 and a DMD chip 32, and the DMD chip 32 is connected to the daughter board 31 through a chip base; the daughter board 31 is connected to the daughter board LVDS interface 16 in the FPGA KINTEX subsystem 1 through the LVDS interface; the LVDS interface is four universal FI-R series 51pin interfaces, and can be used for driving and displaying digital micromirror chips (DMDs) with different resolutions by connecting different sub-boards. The LVDS interface rate is 800M DDR double-edge transmission, 64 pairs of data signals are totally transmitted, and the highest video resolution supports 3840 × 2160.
Referring to fig. 4, the color wheel module 5 includes a first color wheel driving module 51, a first color wheel 52, a first color wheel feedback 53, a second color wheel driving module 54, a second color wheel 55 and a second color wheel feedback 56, the first color wheel 52 is connected to the first color wheel driving module 51, the second color wheel 55 is connected to the second color wheel driving module 54, the first color wheel 52 is connected to the first color wheel feedback 53, the second color wheel 55 is connected to the second color wheel feedback 56, the first color wheel feedback 53 and the second color wheel feedback 56 monitor the rotation of the first color wheel 52 and the second color wheel 55 in real time, and feed back the detection result to the kit 7 chip 11. The first color wheel driving module 51, the first color wheel feedback 53, the second color wheel driving module 54 and the second color wheel feedback 56 are connected to a KINTEX7 chip 11 in the FPGA KINTEX subsystem 1. The system is designed by two paths of independent color wheels, so that four light source modes including a high-pressure mercury lamp light source, a monochromatic laser light source, a two-color laser light source (monochromatic laser is a main light source, the other color is complementary color) and a three-color laser light source can be accessed. The single-color laser light source and the double-color laser light source both need one path of color wheel as a fluorescent wheel for color excitation, and then the excited colors are filtered by the other path of color wheel, so that three or four colors which are finally needed are achieved. The working principle of the two-color laser source using complementary colors is that one path of main light source is used for color excitation, and the color excited by one path of light source is relatively weak corresponding to the complementary colors, so that the second path of laser source is used for supplementing the color; and when the color wheel turns to excite the darker color, the second path of laser light source is switched on to perform the complementary color of the color. The two paths of color wheels synchronously adopt feedback signals, and dynamic regulation and control are realized through real-time processing of a KINTEX7 chip. The color wheel speed is 120 Hz.
Referring to fig. 5, the UHP lamp module 6 includes a UHP scrubber 61 and a UHP lamp 62, the UHP lamp 62 being connected to the UHP scrubber 61; the UHP flush 61 is connected with a KINTEX7 chip 11 in the KINTEX subsystem 1 of the FPGA. The UHP lamp 62 can synchronize the UHP lamp drive signal with the real-time video by the KINTEX7 chip 11 outputting the synchronization signal SCI. The 4k @60Hz projected video display is the result after human eye integration by galvanometer motion at 120Hz frequency. Therefore, the video source input frame rate of the invention is 60Hz, the actual projection video frame rate is 120Hz, and the UHP lamp synchronous frequency is 120 Hz.
Referring to fig. 6, the three-color laser module 7 includes a red laser driving module 71, a green laser driving module 72, and a blue laser driving module 73; the red laser driving module 71, the green laser driving module 72 and the blue laser driving module 73 are respectively connected with a KINTEX7 chip 11 in the FPGA KINTEX subsystem 1.
Referring to fig. 7, the fan module 8 includes a first fan driving module 81, a second fan driving module 82, a third fan driving module 83, a fourth fan driving module 84, a fifth fan driving module 85, and a sixth fan driving module 86. The first fan driving module 81, the second fan driving module 82, the third fan driving module 83, the fourth fan driving module 84, the fifth fan driving module 85 and the sixth fan driving module 86 are respectively connected with a KINTEX7 chip 11 in the FPGA KINTEX subsystem 1. Each fan driving module can multiplex two fan interfaces, so the system can drive 12 fans at most, realize the real-time fan rotating speed adjustment of six different speeds at most, and can fully meet the different heat dissipation requirements of a laser light source, a UHP high-pressure mercury lamp light source, a digital micromirror chip (DMD) and a core processor KINTEX7 chip 11.
Referring to fig. 8, the video input/output module 9 is composed of an HDMI input interface 91, an HDMI output interface 92, an SDI video input interface 93, an SDI video output interface 94, and an ultra-high-definition video transceiver chip GSV 201195, where the HDMI input interface 91 and the HDMI output interface 92 are connected to the ultra-high-definition video transceiver chip GSV 201195, and the ultra-high-definition video transceiver chip GSV 201195 is connected to the KINTEX7 chip 11 in the FPGA KINTEX subsystem 1. The SDI video input interface 93 and the SDI video output interface 94 are respectively connected with a KINTEX7 chip 11 in the FPGA KINTEX subsystem 1. The SDI video input interface 93 and the SDI video output interface 94 are respectively connected with a KINTEX7 chip 11 in the FPGA KINTEX subsystem 1. The GSV2011 is used as a video coding and decoding chip, has the function of receiving and transmitting an HDMI2.0 interface, is downward compatible with an HDMI1.4 interface, supports an HDCP2.2/2.3 encryption standard, and is downward compatible with an HDCP1.4 encryption standard. The chip has excellent performance, comprises an RX end self-adaptive balanced receiving end, a TX end programmable output swing amplitude, a voltage conversion rate, pre-emphasis and the like, supports an LVDS interface, and has the upper limit of the highest data transmission rate of single pair LVDS to be 1.5 Gbps. In the invention, for a 4k @60Hz video source, the data rate of the single pair of LVDS interfaces is 1.18 Gbps. For an SDI interface, if the model of a KINTEX7 chip 11 in the FPGA KINTEX subsystem 1 selects XC7K325T _2FFG900, the highest data rate is 10.3125Gbps, and SDI bare data can only support 6Gbps, namely 4K @30 Hz; if XC7K325T _3FFG900 is selected by the KINTEX7 chip 11 model in the FPGA KINTEX subsystem 1, the SDI bare data can support 12Gbps, namely 4K @60Hz real-time video data can be transmitted.
Referring to fig. 9, the interaction module 10 is composed of a TC9012 infrared interface module 101 and a serial transparent transmission wireless module 102. The TC9012 infrared interface module 101 and the serial port transparent transmission wireless module 102 are respectively connected with a KINTEX7 chip 11 in the FPGA KINTEX subsystem 1. The infrared remote control selects the Pulse Position Modulation (PPM) mode more, i.e. the decision of 1 and 0 depends on the time between pulses. In the present invention, the coding sequence received by the TC9012 infrared interface module 101 is: the customer service code + customer code bar + data code bar format, the carrier is 38kHz, through demodulating the chip, KINTEX7 chip only need judge the time between the front and back falling edge, can carry on the receiving of the data. In the invention, the serial port transparent transmission wireless module 102 monitors the WIFI communication process in the environment, and a user transmits control information to the air through a smart phone or a smart terminal, so that data receiving control can be performed. In the invention, no matter the infrared interface or the wireless interface is adopted, the color contrast adjustment, the brightness and chromaticity adjustment and the selection of the working mode of the video data can be carried out.
Referring to fig. 10, the USB-UART interface portion 14 is composed of a mini-USB interface 141 and a UART-to-USB bridge chip 142; the data differential signal in the mini-USB interface 141 is connected to the UART-to-USB bridge chip 142, and the UART-to-USB bridge chip 142 is connected to the KINTEX7 chip 11 in the FPGA KINTEX subsystem 1. The UART-to-USB bridge chip 142 selects a CP2103 of a certain company, and the CP2103 is a USB-to-UART bridge and is used as an integrated USB transceiver without an external resistor and an integrated clock. Support for baud rate: 300bps to 1 Mbps. And the USB2.0 full speed FS (full speed) mode is supported, and the speed can reach 12 Mbps.
Examples
Referring to fig. 11, the invention can form a 4k ultra high definition real-time video display platform, the video input/output module 9 realizes video input, and the video data decoded into the video data that can be processed by the FPGA is sent to the KINTEX7 chip 11 in the FPGA KINTEX system 1. Codes are solidified in a KINTEX7 chip 11, and control modes such as infrared remote control, wireless control, an LCD capacitive touch screen, connection of an upper computer through a USB-UART (universal serial bus-universal asynchronous receiver/transmitter) and the like can be realized, so that man-machine interaction is completed, adjustment of front-end video algorithms such as a projection mode, brightness contrast, chroma saturation and the like is realized, and a full-high-definition visual flagship image is provided for a user.
The specific working process is as follows: when the system is powered on, the KINTEX7 chip 11 reads the compiling code from the FLASH module 13, and the system is started. The video to be projected and displayed is input from the HDMI interface 91 of the video input/output module 9, passes through the video encoding/decoding chip GSV2011 chip 95, and then enters the KINTEX7 chip 11; the Kintex chip 11 performs information interaction with a remote controller in the hand of the user through the infrared interface 101; if the user selects video projection through the remote controller at this time, the video data decoded by the video coding and decoding chip GSV2011 chip 95 is sent to the daughter board LVDS interface 16 through a digital micromirror driving algorithm solidified in the KINTEX7 chip 11, and is transmitted to the daughter board part 3 through a flexible flat cable, so as to drive more than four hundred thousand micromirrors on the DMD chip 32 to turn over. Meanwhile, according to the connection condition of the current optical machine, the KINTEX7 chip 11 drives the UHP lamp 62 or the three-color laser module 7 to project light rays with different brightness; in addition, at this time, the KINTEX7 chip 11 drives the color wheel to rotate so as to cooperate with the UHP lamp 62 or the three-color laser module 7 to stably project different colors; to maintain a steady rotational speed of the color wheel, and relative stationarity between the two color wheels, the two color wheels independently transmit a first color wheel feedback 53 and a second color wheel feedback 56 to the KINTEX7 chip 11. Finally, the DMD chip 32 on the daughter board is matched with the color wheel through a light path to perform projection of 4k full high-definition resolution on the projection screen cloth; if the user selects to perform video front-end processing on the video to be projected through a remote controller, the original video is processed by a video front-end processing algorithm solidified in the KINTEX chip 11, the processed video data is sent to the daughter board LVDS interface 16 through a digital micromirror driving algorithm and is transmitted to the daughter board module 3 through a flexible flat cable, and finally the digital micromirror chip on the daughter board performs 4k full-high-definition resolution projection on the projection screen cloth through the matching of a light path and a color wheel; in the process of video processing, in order to realize real-time ultra-high definition data processing, the KINTEX7 chip 11 is provided with four 8Gb 64bit DDR3 memories 12, the KINTEX7 chip 11 is directly connected with the 8Gb 64bit DDR3 memory 12 with the total capacity, and the highest data rate can reach 1833 MT/s.
Claims (3)
1. A real-time dynamic video display system based on a 4k digital micro-mirror chip is characterized by comprising an FPGA (field programmable gate array) KINTEX subsystem (1), a capacitive touch screen (2), a daughter board module (3), a power supply module (4), a color wheel module (5), an UHP (ultra high performance) lamp module (6), a three-color laser module (7), a fan module (8), a video input and output module (9) and an interaction module (10), wherein the FPGA KINTEX subsystem (1) is respectively connected with the capacitive touch screen (2), the daughter board module (3), the color wheel module (5), the UHP lamp module (6), the three-color laser module (7), the fan module (8), the video input and output module (9) and the interaction module (10); the power supply module (4) supplies power for the FPGA KINTEX subsystem (1), the capacitive touch screen (2), the daughter board module (3), the color wheel module (5), the UHP lamp module (6), the three-color laser module (7), the fan module (8), the video input/output module (9) and the interaction module (10); wherein:
the FPGA KINTEX subsystem (1) comprises a KINTEX7 chip (11), an 8Gb 64bit DDR3 memory (12), a Flash module (13), a USB-UART interface module (14), a galvanometer module (15) and a daughter board LVDS interface (16); the 8Gb 64bit DDR3 memory (12), the Flash module (13), the USB-UART interface module (14), the galvanometer module (15) and the daughter board LVDS interface (16) are respectively connected with the KINTEX7 chip (11);
the daughter board module (3) comprises a daughter board (31) and a DMD chip (32), and the DMD chip (32) is connected to the daughter board (31) through a chip base; the daughter board (31) is connected to a daughter board LVDS interface (16) in the FPGA KINTEX subsystem (1) through an LVDS interface;
the color wheel module (5) comprises a first color wheel driving module (51), a first color wheel (52), a first color wheel feedback (53), a second color wheel driving module (54), a second color wheel (55) and a second color wheel feedback (56), wherein the first color wheel (52) is connected with the first color wheel driving module (51), the second color wheel (55) is connected with the second color wheel driving module (54), the first color wheel (52) is connected with the first color wheel feedback (53), the second color wheel (55) is connected with the second color wheel feedback (56), and the first color wheel driving module (51), the first color wheel feedback (53), the second color wheel driving module (54) and the second color wheel feedback (56) are connected to a KINTEX7 chip (11) in the FPGA KINTEX subsystem (1);
the UHP lamp module (6) comprises a UHP blast (61) and a UHP lamp (62), and the UHP lamp (62) is connected with the UHP blast (61); the UHP blast (61) is connected with a KINTEX7 chip (11) in the KINTEX subsystem (1) of the FPGA;
the three-color laser module (7) comprises a red laser driving module (71), a green laser driving module (72) and a blue laser driving module (73); the red laser driving module (71), the green laser driving module (72) and the blue laser driving module (73) are respectively connected with a KINTEX7 chip (11) in the FPGA KINTEX subsystem (1);
the fan module (8) comprises a first fan driving module (81), a second fan driving module (82), a third fan driving module (83), a fourth fan driving module (84), a fifth fan driving module (85) and a sixth fan driving module (86), and each fan driving module multiplexes two fan interfaces; the first fan driving module (81), the second fan driving module (82), the third fan driving module (83), the fourth fan driving module (84), the fifth fan driving module (85) and the sixth fan driving module (86) are respectively connected with a KINTEX7 chip (11) in the FPGA KINTEX subsystem (1);
the video input and output module (9) consists of an HDMI input interface (91), an HDMI output interface (92), an SDI video input interface (93), an SDI video output interface (94) and an ultra-high-definition video transceiving chip GSV2011 (95), wherein the HDMI input interface (91) and the HDMI output interface (92) are connected with the ultra-high-definition video transceiving chip GSV2011 (95), and the ultra-high-definition video transceiving chip GSV2011 (95) is connected with a KINTEX7 chip (11) in the FPGA KINTEX subsystem (1); the SDI video input interface (93) and the SDI video output interface (94) are respectively connected with a KINTEX7 chip (11) in the FPGA KINTEX subsystem (1).
2. The interaction module (10) is composed of a TC9012 infrared interface module (101) and a serial port transparent transmission wireless module (102), and the TC9012 infrared interface module (101) and the serial port transparent transmission wireless module (102) are respectively connected with a KINTEX7 chip (11) in the FPGA KINTEX subsystem (1).
3. The real-time dynamic video display system based on 4k digital micro-mirror chip as claimed in claim 1, wherein the USB-UART interface module (14) is composed of a mini-USB interface (141), a UART-to-USB bridge chip (142); the data differential signal in the mini-USB interface (141) is connected with a UART-to-USB bridge chip (142), and the UART-to-USB bridge chip (142) is connected with a KINTEX7 chip (11) in the FPGA KINTEX subsystem (1).
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