CN113517222B - Microsystem component stacking method based on rewiring technology - Google Patents
Microsystem component stacking method based on rewiring technology Download PDFInfo
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- CN113517222B CN113517222B CN202110327389.0A CN202110327389A CN113517222B CN 113517222 B CN113517222 B CN 113517222B CN 202110327389 A CN202110327389 A CN 202110327389A CN 113517222 B CN113517222 B CN 113517222B
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- 229920005989 resin Polymers 0.000 claims abstract description 20
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- 239000011248 coating agent Substances 0.000 claims abstract description 6
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- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 34
- 229910052737 gold Inorganic materials 0.000 claims description 30
- 239000010931 gold Substances 0.000 claims description 30
- 238000003466 welding Methods 0.000 claims description 23
- 229910000679 solder Inorganic materials 0.000 claims description 18
- 230000005496 eutectics Effects 0.000 claims description 17
- 239000002356 single layer Substances 0.000 claims description 17
- 238000007789 sealing Methods 0.000 claims description 9
- 230000008719 thickening Effects 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 4
- 229910052709 silver Inorganic materials 0.000 claims description 4
- 239000004332 silver Substances 0.000 claims description 4
- 230000000694 effects Effects 0.000 claims description 3
- 238000010894 electron beam technology Methods 0.000 claims description 3
- 239000003292 glue Substances 0.000 claims description 3
- 229920002120 photoresistant polymer Polymers 0.000 claims description 3
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- 230000003014 reinforcing effect Effects 0.000 claims description 3
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- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 2
- 229910052782 aluminium Inorganic materials 0.000 claims description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 2
- 238000010009 beating Methods 0.000 claims description 2
- 229910052797 bismuth Inorganic materials 0.000 claims description 2
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 claims description 2
- 229910052802 copper Inorganic materials 0.000 claims description 2
- 239000010949 copper Substances 0.000 claims description 2
- 239000003822 epoxy resin Substances 0.000 claims description 2
- 239000011133 lead Substances 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 229920000647 polyepoxide Polymers 0.000 claims description 2
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- 229920002635 polyurethane Polymers 0.000 claims description 2
- 238000003825 pressing Methods 0.000 claims description 2
- 238000005476 soldering Methods 0.000 claims description 2
- 239000007921 spray Substances 0.000 claims description 2
- 239000011135 tin Substances 0.000 claims description 2
- 229910052710 silicon Inorganic materials 0.000 abstract description 5
- 239000010703 silicon Substances 0.000 abstract description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 4
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 abstract description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract description 3
- 238000004891 communication Methods 0.000 abstract description 2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
- B81C1/00301—Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
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- Computer Hardware Design (AREA)
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Abstract
The invention discloses a microsystem component stacking method based on a re-wiring technology, which mainly realizes the reconfiguration and interconnection of chip pins through the re-wiring technology, and realizes the communication through the processes of coating a resin base material, pattern photoetching, etching forming, conductive seed layer sputtering, electroplating metal film forming, recoating, photoetching, etching, sputtering and electroplating, and the distribution of multi-layer circuits formed on the resin base material is repeated for a plurality of times, and the front and back wiring is realized by adopting a chip embedded with through-hole gallium arsenide or silicon-based through holes in the resin base material. The invention adopts the rewiring technology to transmit the radio frequency signals, has small influence on the radio frequency signals, and is suitable for the integrated design and manufacture of the broadband radio frequency complex system.
Description
Technical Field
The invention belongs to the packaging technology of integrated circuits, and particularly relates to a microsystem component stacking method based on a rewiring technology.
Background
Along with the progress of monolithic integrated circuit technology, novel electronic materials and semiconductor process technology, the precise integrated design of broadband microwave microsystem components, which are applied to active phased array transceiving variable frequency components, high-sensitivity receivers and the like and are required by military civilian use, faces more challenges than the past: the increased number of interconnect points brings about more and more mismatch and assembly limits faced by the increased density of functional devices in the same area.
Traditional broadband components formed by discrete microwave devices, circuit boards, metal shells and the like can not meet the requirement of integration. In the field of semiconductor packaging, on one hand, on-chip integration technology (SOC) is limited by high cost, long development and marketing time and limited integration function are difficult to adapt to various flexibilities of broadband components, and on the other hand, microwave microsystem integration technology integrated by silicon-based MEMS technology requires a bonding machine adopting high-precision wafer-level equipment and a more complex TSV through hole forming process, and is limited by wafer size and extremely high mass production cost.
Disclosure of Invention
The invention provides a microsystem component stacking method based on a rerouting technology.
The technical scheme for realizing the invention is as follows: a microsystem component stacking method based on a rerouting technology comprises the following specific steps:
s1: positioning the chip on a preset flat plate, arranging a sealing surrounding frame on the preset flat plate, encapsulating resin material in the sealing surrounding frame for forming, solidifying the resin material in a set temperature range, and removing the preset flat plate to finish the preset work of the multi-chip module chip;
s2: coating the resin substrate on the bottom surface of the multi-chip module again, and etching through holes at the positions of the pins of the chip to be communicated;
s3: sputtering metal to the bottom of the module in an ionic state by adopting an electron beam to form a metal layer, thickening the metal layer in an electroplating mode, and thickening and metallizing the inside of the etched through hole;
s4: covering a needed circuit pattern on a metal layer at the bottom of the multi-chip module by using a photoetching process, and removing the metal layer uncovered by the photoresist by using a metal etching solution;
s5: repeating the steps S2-S4N times, forming an N+1 layer circuit structure on the bottom surface of the multi-chip module, and completing the manufacture of the single-layer microsystem component, wherein N is a natural number;
s6: beating gold balls on the bottom of the single-layer microsystem component module by using a gold wire ball welding mode;
s7: gold ball eutectic welding is carried out between every two single-layer microsystem components, and multi-layer microsystem component stacking is completed;
s8: and (3) planting BGA solder balls at the bottom of the stacked microsystem component to serve as pins for external connection, so that the stacking of the whole microsystem component is completed.
Preferably, the resin material includes one or more of epoxy resin and polyurethane material.
Preferably, the temperature set in step S1 is in the range of 150 degrees to 200 degrees.
Preferably, the metal layer is one or more of copper, aluminum, nickel, silver or gold materials.
Preferably, the solder balls in step S6 are made of one or more of gold, tin, lead, silver, bismuth materials.
Preferably, the specific method for applying gold balls on the bottom of the single-layer microsystem component module by using a gold wire ball welding mode in the step S6 is as follows: the gold ball is formed on the chopper head of the ball welding machine in an electric shock mode, the chopper is used for pressing the gold ball onto the welding spot at the bottom of the microsystem component, certain ultrasonic power is applied to the cutter head, a micro friction effect is generated for forming a molecular eutectic layer between the gold ball and the gold plating layer at the bottom of the microsystem component, and ball-planting welding of the gold ball is completed.
Preferably, the specific method for performing gold ball eutectic soldering between every two single-layer microsystem components in the step S7 is as follows: and (3) aligning the upper layer of single-layer microsystem components and the lower layer of single-layer microsystem components in the Z-axis direction by using an eutectic chip mounter, applying certain ultrasonic power, generating a molecular eutectic layer on the bonding surface, and encapsulating the periphery of the bonding surface by adopting sealing glue of a low-thermal expansion system after bonding, protecting welding spots, reinforcing bonding strength and finishing stacking welding.
Preferably, the specific method for planting BGA solder balls at the bottom of the stacked microsystem component comprises the following steps: and the ball planting machine sprays out the solder balls, and simultaneously adopts infrared laser beams to heat the solder balls, so that the solder balls are fused with the bonding pads on the bottom surface of the multi-chip module, and the ball planting is completed.
Compared with the prior art, the invention has the remarkable advantages that: .
(1) Compared with the cascade degradation of the radio frequency signals caused by the traditional bonding wires, the method has the advantages that the transmission of the radio frequency signals is carried out by adopting a rewiring technology, the influence on the radio frequency signals is small, and the method is suitable for the integrated design and manufacture of a broadband radio frequency complex system; (2) The whole manufacturing process is completed in the semiconductor middle line, secondary packaging is not needed, the precision can be controlled at the micron level, and the method is suitable for high-consistency mass production; (3) The rewiring technology can isomerically integrate chips with different materials, different manufacturing processes and different heights, and the chips are assembled in building blocks, so that the period is shortened, and the cost is reduced; (4) The whole multifunctional microsystem component adopts resin to wrap, embedded microwave gallium arsenide, silicon-based CMOS, various passive devices and the like are sealed and protected, the reliability is improved, and (5) the whole component is finally welded with BGA, and patch assembly can be realized by adopting a conventional SMT technology, so that the requirements on assembly conditions are low, and the method is beneficial to popularization and use.
The present invention will be described in further detail with reference to the accompanying drawings.
Drawings
Fig. 1 is a flow chart of the present invention.
FIG. 2 is a schematic diagram of a stacked microsystem assembly utilizing the present invention, wherein a 1-compound radio frequency chip, a 2-conductive metal film, a 3-gold ball, a 4-thickened eutectic layer, a 5-sealing resin, a 6-insulated wiring resin, a 7-silicon-based conductive substrate, a 8-underfloor thickening layer, a9-BGA solder ball.
Detailed Description
A stacking method of microsystem components based on a re-wiring technology mainly comprises the steps of re-configuring and interconnecting chip pins through the re-wiring technology, and carrying out front and back wiring to achieve communication through coating of a resin base material, pattern photoetching, etching forming, conductive seed layer sputtering, electroplating metal film forming, re-coating, photoetching, etching, sputtering and electroplating for a plurality of times, wherein multilayer lines are formed on the resin base material, and chips embedded with through-hole gallium arsenide or silicon-based through holes are adopted inside the resin base material. The specific steps are as shown in fig. 1:
s1: positioning the chip on a preset flat plate, encapsulating and forming the preset flat plate by using a surrounding frame sealing resin material, solidifying the resin material at the ambient temperature of between 150 and 200 ℃, and removing the preset flat plate to finish the preset work of the multi-chip module chip;
s2: coating the resin substrate again at the bottom of the multi-chip module, and etching a through hole at the position of a chip pin to be communicated to finish the forming work of the through hole;
s3: sputtering metal to the bottom of the module in an ionic state by adopting an electron beam to form a metal layer, thickening the metal layer in an electroplating mode, thickening and metallizing the inside of the etched through hole, and finishing the metallization work of the back surface of the module;
s4: covering a needed circuit pattern on a metal layer at the bottom of the multi-chip module by using a photoetching process, removing the metal layer uncovered by the photoresist by using a metal etching solution, and completing the work of single-layer wiring by using the rest circuit pattern;
s5: repeating the steps S2-S4, forming a multi-layer circuit structure on the bottom surface of the substrate, and completing the manufacture of the single-layer microsystem component.
S6: the formed single-layer microsystem component is provided with gold balls at the bottom of the module in a gold wire ball welding mode, specifically, gold balls are formed on a chopper head of a ball welding machine in an electric shock mode, the gold balls are pressed onto welding spots at the bottom of the microsystem component by the chopper, then a certain ultrasonic power is applied to the cutter head, a micro friction effect is generated to form a molecular eutectic layer between the gold balls and the gold plating layer at the bottom of the microsystem component, and ball planting welding of the gold balls is completed.
S7: and (3) performing gold ball eutectic welding between two layers of microsystem components, namely aligning the two layers in the Z-axis direction by using an eutectic chip mounter, combining the upper layer and the lower layer, applying certain ultrasonic power, adding a bonding surface to generate a molecular eutectic layer, and encapsulating the two layers at the periphery by adopting sealing glue of a low-thermal expansion system after the bonding is finished, protecting welding spots, reinforcing bonding strength, and finishing stacking welding.
S8: BGA solder balls are planted at the bottom of the stacked microsystem component, the ball planting machine ejects the solder balls in a high-speed mode, meanwhile, infrared laser beams are used for heating the solder balls in a short time, the solder balls are fused with the bottom surface bonding pads of the multichip module, the ball planting is completed, and the solder balls serve as pins for external connection, so that the whole stacked microsystem component is completed.
The invention adopts the eutectic mode to form the multi-layer three-dimensional heterogeneous microsystem component, and utilizes the space in the vertical direction to further integrate, thereby further improving the system integration level.
The eutectic bonding is completed under the condition of low temperature, the process temperature gradient is not occupied, the final BGA welding curve of the whole assembly can be performed according to the conventional temperature, and the patch assembly can be realized by adopting the conventional SMT process.
Claims (8)
1. A microsystem component stacking method based on a rerouting technology is characterized by comprising the following specific steps:
s1: positioning the chip on a preset flat plate, arranging a sealing surrounding frame on the preset flat plate, encapsulating resin material in the sealing surrounding frame for forming, solidifying the resin material in a set temperature range, and removing the preset flat plate to finish the preset work of the multi-chip module chip;
s2: coating the resin substrate on the bottom surface of the multi-chip module again, and etching through holes at the positions of the pins of the chip to be communicated;
s3: sputtering metal to the bottom of the module in an ionic state by adopting an electron beam to form a metal layer, thickening the metal layer in an electroplating mode, and thickening and metallizing the inside of the etched through hole;
s4: covering a needed circuit pattern on a metal layer at the bottom of the multi-chip module by using a photoetching process, and removing the metal layer uncovered by the photoresist by using a metal etching solution;
s5: repeating the steps S2-S4N times, forming an N+1 layer circuit structure on the bottom surface of the multi-chip module, and completing the manufacture of the single-layer microsystem component, wherein N is a natural number;
s6: beating gold balls on the bottom of the single-layer microsystem component module by using a gold wire ball welding mode;
s7: gold ball eutectic welding is carried out between every two single-layer microsystem components, and multi-layer microsystem component stacking is completed;
s8: and (3) planting BGA solder balls at the bottom of the stacked microsystem component to serve as pins for external connection, so that the stacking of the whole microsystem component is completed.
2. The method of claim 1, wherein the resin material comprises one or more of an epoxy resin and a polyurethane material.
3. The method of stacking microsystem components based on the re-routing technology according to claim 1, wherein the temperature set in step S1 is in a range of 150 degrees to 200 degrees.
4. The method of claim 1, wherein the metal layer is one or more of copper, aluminum, nickel, silver, or gold materials.
5. The method of stacking microsystem components based on re-routing technology as claimed in claim 1, wherein the solder balls in step S6 are made of one or more of gold, tin, lead, silver, bismuth materials.
6. The stacking method of microsystem components based on the re-wiring technology as claimed in claim 1, wherein the specific method for bonding gold balls on the bottom of the single-layer microsystem component module by gold wire ball bonding in step S6 is as follows: the gold ball is formed on the chopper head of the ball welding machine in an electric shock mode, the chopper is used for pressing the gold ball onto the welding spot at the bottom of the microsystem component, certain ultrasonic power is applied to the cutter head, a micro friction effect is generated for forming a molecular eutectic layer between the gold ball and the gold plating layer at the bottom of the microsystem component, and ball-planting welding of the gold ball is completed.
7. The stacking method of microsystem components based on the re-routing technology according to claim 1, wherein the specific method of performing gold ball eutectic soldering between every two single-layer microsystem components in step S7 is as follows: and (3) aligning the upper layer of single-layer microsystem components and the lower layer of single-layer microsystem components in the Z-axis direction by using an eutectic chip mounter, applying certain ultrasonic power, generating a molecular eutectic layer on the bonding surface, and encapsulating the periphery of the bonding surface by adopting sealing glue of a low-thermal expansion system after bonding, protecting welding spots, reinforcing bonding strength and finishing stacking welding.
8. The stacking method of microsystem components based on the re-routing technology according to claim 1, wherein the specific method for planting the BGA solder balls at the bottom of the stacked microsystem components is as follows: and the ball planting machine sprays out the solder balls, and simultaneously adopts infrared laser beams to heat the solder balls, so that the solder balls are fused with the bonding pads on the bottom surface of the multi-chip module, and the ball planting is completed.
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| CN202110327389.0A CN113517222B (en) | 2021-03-26 | 2021-03-26 | Microsystem component stacking method based on rewiring technology |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111146190A (en) * | 2019-12-24 | 2020-05-12 | 扬州船用电子仪器研究所(中国船舶重工集团公司第七二三研究所) | Silicon-based three-dimensional integrated microwave frequency conversion assembly |
| CN111689460A (en) * | 2019-11-29 | 2020-09-22 | 浙江集迈科微电子有限公司 | Manufacturing method of TSV (through silicon Via) ground interconnection hole structure under silicon cavity in micro-system module |
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| US20020100600A1 (en) * | 2001-01-26 | 2002-08-01 | Albert Douglas M. | Stackable microcircuit layer formed from a plastic encapsulated microcircuit and method of making the same |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111689460A (en) * | 2019-11-29 | 2020-09-22 | 浙江集迈科微电子有限公司 | Manufacturing method of TSV (through silicon Via) ground interconnection hole structure under silicon cavity in micro-system module |
| CN111146190A (en) * | 2019-12-24 | 2020-05-12 | 扬州船用电子仪器研究所(中国船舶重工集团公司第七二三研究所) | Silicon-based three-dimensional integrated microwave frequency conversion assembly |
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