CN113473082A - Reference monitor and method for switching video mode - Google Patents
Reference monitor and method for switching video mode Download PDFInfo
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- CN113473082A CN113473082A CN202110719441.7A CN202110719441A CN113473082A CN 113473082 A CN113473082 A CN 113473082A CN 202110719441 A CN202110719441 A CN 202110719441A CN 113473082 A CN113473082 A CN 113473082A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/18—Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
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Abstract
The application provides a reference monitor, including FPGA and MCU controller, when the MCU controller detects that the video mode that treats to show is different from the video mode that is showing, the configuration treat the display parameter that the video mode that shows corresponds to, and keep this display parameter to the parameter register that is in idle state at present, when the MCU controller detects there is first switching signal, control register module in the FPGA to switch to by the parameter register output that is in idle state at present to show the parameter, and the wide colour gamut function module in the MCU controller control FPGA, according to follow video mode that register module acquireed and the corresponding display parameter switch to corresponding video mode processing unit and handle the video data that treat to show. The reference monitor solves the problem that signal flicker is unstable when the video mode of the reference monitor is switched, and improves the display stability of the reference monitor.
Description
Technical Field
The present invention relates to the field of reference monitor display, and more particularly, to a reference monitor and a method for switching video modes.
Background
The standard monitor is different from a common household display, has extremely strict requirements on brightness, contrast, color gamut, product reliability and the like, and is a basis for measuring, judging and deciding images by professionals. Therefore, the reference monitor is also regarded as a "scaler" in the field of image quality in the industry, and is a single-rod image quality scale. The 4K reference monitor in the related art supports a full screen range of up to 1000 nits of brightness, not less than 100000: 1, the video signal content of 4K and High Dynamic Range (HDR) can be perfectly restored.
The reference monitor supports a variety of video modes, common video modes being HDR10, HLG, SDR, and the like. Different video modes correspond to different display parameters so that the reference monitor will have different times for configuring the display parameters of the different video modes. If the reference monitor does not perform special processing when switching the video mode, abnormal phenomena such as screen flicker are easy to occur.
Therefore, it is an urgent technical problem to be solved by those skilled in the art how to avoid abnormal phenomena such as screen flickering when the reference monitor switches the video mode.
Disclosure of Invention
The application provides a reference monitor and a method for switching video modes, which can avoid abnormal phenomena such as picture flicker and the like when the reference monitor switches the video modes, solve the problem that signal flicker is unstable when the reference monitor switches the video modes, and improve the display stability of the reference monitor.
In a first aspect, the present application provides a reference monitor comprising an FPGA and an MCU controller, the FPGA comprising a timing detection module, a register module, and a wide color gamut function module,
when the MCU controller detects that the video mode to be displayed is different from the video mode being displayed, configuring display parameters corresponding to the video mode to be displayed, and configuring the display parameters into a second parameter register of the register module, wherein the second parameter register is a parameter register in an idle state at present;
the MCU controller detects whether the register module receives a first switching signal, and when the register module receives the first switching signal, the MCU controller controls the register module to switch to a display parameter corresponding to a video mode to be displayed output to the wide color gamut function module by the second parameter register, wherein the first switching signal is sent to the register module when the time sequence detection module detects that the current time is in a time gap between two frames of images;
and the MCU controller controls the wide color gamut function module and switches to a corresponding video mode processing unit to process video data to be displayed according to the video mode and the corresponding display parameters acquired from the register module.
In a feasible manner, the register module further includes a first parameter register and a register switching unit, where the first parameter register is a parameter register currently in a working state and is configured to provide a display parameter corresponding to a video mode being displayed to the wide color gamut function module, and the register switching unit is configured to switch the first parameter register to the second parameter register.
In a possible manner, determining the video mode to be displayed includes manually determining the video mode, where the manually determining the video mode is to determine the video mode to be displayed through a user control menu.
In a feasible manner, determining the video mode to be displayed includes automatically determining the video mode, where the automatically determined video mode is the video mode to be displayed determined by the MCU controller according to the flag information in the video data to be displayed.
In a feasible manner, the flag information is stored in the register module, and is detected by a data detection module in the FPGA and then sent to the register module.
In one possible approach, the reference monitor further comprises: the player is used for providing the video data to be displayed for the FPGA; the SOC processor is used for responding to an operation instruction of a user and receiving video data from the FPGA; and the display is used for receiving and displaying the video data from the SOC processor.
According to the reference monitor, after the MCU controller configures the display parameters corresponding to the video mode to be displayed to the second parameter register, the first parameter register is switched to the second parameter register when the MCU controller selects the time gap between two frames of images at the current moment, so that the display parameters called by the wide color gamut function module are configured, and then the corresponding video mode processing unit is selected to process the video data to be displayed, and the display displays the corresponding display effect. The abnormal phenomena of video image flicker and the like caused by abnormal work of the wide color gamut functional module due to calling of unconfigured display parameters in the prior art are avoided. The reference monitor provided by the application really realizes seamless switching among different video modes, and meanwhile, the problem of frame loss does not exist.
In a second aspect, the present application provides a method for switching video modes, including:
when the video mode to be displayed is detected to be different from the video mode being displayed, configuring display parameters corresponding to the video mode to be displayed, and configuring the display parameters into a parameter register in an idle state at present;
detecting whether a first switching signal is received or not, and when the first switching signal is detected to be received, controlling a parameter register in a current working state to be switched to a parameter register in an idle state to output display parameters corresponding to a video mode to be displayed, wherein the first switching signal is sent when a time gap between two frames of images at the current moment is detected;
and switching to a corresponding video mode processing unit according to the received video mode and the corresponding display parameters to process the video data to be displayed.
In a possible manner, determining the video mode to be displayed includes manually determining the video mode and automatically determining the video mode, where the manually determining the video mode is to determine the video mode to be displayed through a user control menu; and the automatic video mode determination is to determine the video mode to be displayed according to the mark information in the video data to be displayed.
In a third aspect, the present application provides a display device, including a processor, a communication interface, a memory, and a communication bus, where the processor, the communication interface, and the memory complete communication with each other through the communication bus;
the memory is used for storing a computer program;
the processor is configured to implement the method for switching video mode according to the second aspect when executing the computer program stored in the memory.
In a fourth aspect, the present application provides a computer-readable storage medium, in which a computer program is stored, and the computer program is used for implementing the method for switching video mode according to the second aspect when being executed by a processor.
In a fifth aspect, the present application further provides a computer program product comprising a computer program, which when executed by a processor, implements the method for switching video mode according to the second aspect.
For technical effects brought by any one implementation manner of the second aspect, the third aspect, the fourth aspect, and the fifth aspect, reference may be made to technical effects brought by different implementation manners in the first aspect, and details are not described here.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the application. The objectives and other advantages of the application may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a diagram of a hardware system architecture for a prior art reference monitor provided herein;
FIG. 2 is a diagram of a hardware system architecture for a reference monitor provided herein;
fig. 3 is a flowchart of a method for switching video modes according to the present application;
FIG. 4 is a flowchart of a method for switching video modes completely according to the present application;
fig. 5 is a schematic diagram of a display device provided in the present application.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the scope of the present invention.
In the prior art, a hardware system architecture of "FPGA + SOC + display" is often adopted for a reference monitor, and fig. 1 is a hardware system architecture diagram of a reference monitor in the prior art, as shown in fig. 1, the hardware system architecture includes: FPGA10, player 20, SOC processor 30, display 40, and MCU controller 50.
The player 20 transmits the video data to the FPGA10, after the FPGA10 selects a corresponding video mode processing unit to process the video data, the video data is transmitted to the display 40 through the SOC processor 30 to be displayed, and the MCU controller 50 is interconnected with the FPGA10 and the SOC processor 30 to perform a control coordination function in the whole system.
Specifically, the FPGA10 in fig. 1 includes a decoding module 101, a data detection module 102, a register module 103, and a wide color gamut function module 104.
The decoding module 101 receives video data transmitted by the front-end player 20, parses the video data into digital signals, and sends the digital signals to the data detection module 102, and specific decoding rules can be referred to in the prior art.
The data detection module 102 is configured to detect flag information of the video data, and send the flag information to the register module 103, where the flag information is used to indicate a video mode of the video data.
When detecting that the video mode to be displayed is different from the video mode being displayed, the MCU controller 50 starts to configure the display parameters corresponding to the video mode to be displayed, and sends the display parameters to the parameter register in the register module 103 for storage after configuring the display parameters.
The wide color gamut function module 104 retrieves and selects a corresponding video mode processing unit to process the video data to be displayed according to the video mode and the corresponding display parameter in the register module 103.
However, different video modes have different configuration time according to different numbers of configured display parameters, for example, the HDR10 mode has one corresponding set of display parameters, the HLG mode has another corresponding set of display parameters, and the configuration time of the two sets of display parameters is different according to the number of parameters that need to be configured. If the wide color gamut function module calls the display parameters which are not configured in the parameter register in the process of configuring the display parameters by the MCU controller, the situation that the wide color gamut function module configures the display parameters incorrectly occurs, so that the wide color gamut function module cannot work normally, and image abnormal situations such as video image flicker occur.
For the technical problems existing in the prior art, the conventional method is to make the screen temporarily display a black graphic card to block the image abnormal situation which may occur, but the method may have a frame loss situation.
Based on this, the application provides a reference monitor and a method for switching video modes, which can solve the problem of picture flicker of the reference monitor in the prior art, avoid the frame loss phenomenon in the traditional method, and really realize seamless switching of different video modes.
Fig. 2 is a hardware system architecture diagram of a reference monitor provided in the present application, and compared with the hardware system architecture diagram of the reference monitor in the prior art provided in fig. 1, the reference monitor provided in the present application mainly improves an FPGA portion thereof, and specifically, a parameter register for storing display parameters, a register switching unit for switching between two parameter registers, and a timing detection module for detecting a timing of a video image are added to a register module.
As shown in fig. 2, the FPGA100 of the present application includes: a decoding module 1001, a data detection module 1002, a timing detection module 1003, a register module 1004, and a wide color gamut function module 1005.
The decoding module 1001 is configured to decode video data sent by the front-end player 200, parse the video data, and send the parsed video data to the data detection module 1002, where the decoding specifically refers to parsing the video data from an analog signal format to a digital signal format.
The data detection module 1002 is configured to detect flag information in video data, determine a video mode of the video data according to the flag information, and send the determined video mode to the register module 1004 for storage. The video mode may be, but not limited to, HDR10 mode, HLG mode, SDR mode, etc., and it is understood that the type of video mode of the received video data is not specifically limited, but it can be known that different video modes need different numbers and times of configured display parameters.
The timing detecting module 1003 is configured to detect a timing of the video data, identify a start time and an end time of a video frame, and send a first switching signal to the register module 1004 when detecting that a current time is in a time gap between two frames of images.
It should be noted that the timing detection module may always detect the start time and the end time of a video frame, and as long as the current time is in a time gap between two frames of images, the timing detection module may send a first switching signal to the register module to indicate that the current time may be switched to the video mode.
The register module 1004 is configured to store display parameters and provide the wide color gamut function module with video modes and corresponding display parameters, where the display parameters are configured into the register module by the MCU controller, and the MCU controller may pre-store the display parameters corresponding to various video modes according to the requirement.
In addition, the register module 1004 is further configured to store the video mode of the video data to be displayed, which is identified by the data detection module 1002, and further configured to store the first switching signal sent by the timing detection module 1003.
The register module 1004 collects the parameter information provided by other modules (e.g. data detection module, timing detection module, etc.), and then provides the parameter information to other modules (e.g. MCU controller, wide color gamut function module, etc.) for use.
For example, after the data detection module stores the video mode to be displayed in the register module, the MCU controller performs further determination according to the video mode to be displayed stored in the register module. When the video mode to be displayed is judged to be different from the video mode being displayed, the MCU controller configures the corresponding display parameters into the register module according to the video mode to be displayed.
The wide color gamut function module 1005 is configured to select a corresponding video mode processing unit to process the video data according to the video mode and the corresponding display parameter. The wide color gamut functional module comprises a mode switching unit and a plurality of video mode processing units.
The mode switching unit selects a corresponding video mode processing unit to process video data according to the acquired video mode, and sends the acquired display parameters to the selected video mode processing unit, so that the video mode processing unit can work normally according to the received display parameters, namely, the video data to be displayed is processed under the video mode mechanism.
It will be appreciated that different video mode processing units have different signal processing mechanisms and therefore the display parameters that need to be configured are also different. For example, the signal processing mechanism of the HDR10 mode processing unit is different from that of the SDR mode processing unit.
Referring to the register module in the present application in detail, as shown in fig. 2, the register module 1004 includes a first parameter register and a second parameter register, and a register switching unit for switching the first parameter register to the second parameter register.
In the present application, a parameter register currently in a working state is defined as a first parameter register, and a parameter register currently in an idle state is defined as a second parameter register, where the first parameter register is used to provide display parameters corresponding to a video mode being displayed to the wide color gamut function module, and the second parameter register is used to store the display parameters corresponding to the video mode to be displayed.
The two parameter registers alternately work in turn, so that the situation that the wide color gamut function module is mistakenly configured with the display parameters due to the fact that the wide color gamut function module calls the display parameters which are not configured in the parameter registers when only one parameter register is used in the prior art can be avoided, and the situation that the wide color gamut function module cannot normally work, and therefore image abnormity such as video image flicker occurs.
In addition, the register module 1004 further includes a register for storing other related parameters, for example, a register for storing video mode information to be displayed is the same as the prior art, and reference may be made to the prior art specifically, which is not described herein again.
In the following, with reference to fig. 2, how the MCU controller configures the display parameters corresponding to the video mode to be displayed using two parameter registers is specifically described. Firstly, the MCU controller needs to determine a video mode to be displayed, then, according to the judgment of the video mode to be displayed, when the MCU controller judges that the video mode to be displayed is different from the video mode being displayed, the display parameter corresponding to the video mode to be displayed is configured, and the display parameter is configured into the second parameter register.
In the application, for more flexible switching of the video mode, two modes for determining the video mode to be displayed are provided, including manually determining the video mode and automatically determining the video mode, and the two modes for determining the video mode to be displayed do not work simultaneously, for example, if the user selects to use the manually determined video mode, the function of automatically determining the video mode is turned off, otherwise, if the user selects to use the automatically determined video mode, the function of manually determining the video mode is turned off.
And manually determining the video mode is to determine the video mode to be displayed through a user control menu. Specifically, a user selects a video mode to be displayed through a displayed menu, after receiving an operation instruction of the user, the SOC processor sends the instruction to the MCU controller, the MCU controller judges whether the video mode to be displayed is consistent with the video mode being displayed or not according to the received video mode information to be displayed, when the video mode to be displayed is different from the video mode being displayed, display parameters corresponding to the video mode to be displayed are configured, and the display parameters are stored in a second parameter register of the register module.
The other method for determining the video mode to be displayed is to automatically determine the video mode, specifically, the automatically determined video mode is to determine the video mode to be displayed by the MCU controller according to the mark information embedded in the video data to be displayed, and the mark information in the application is used for representing the video mode of the video data. And after the data detection module in the FPGA detects the video mode of the video data to be displayed according to the mark information, the video mode to be displayed is stored in a register module of the FPGA. And the MCU controller accesses the register module, judges whether the video mode to be displayed is consistent with the video mode being displayed or not according to the inquired video mode information to be displayed, starts to configure display parameters corresponding to the video mode to be displayed when the video mode to be displayed is different from the video mode being displayed, and stores the display parameters into a second parameter register of the register module.
It will be appreciated that when the user setting employs a manual determination of video mode, the function of automatically determining video mode is turned off. At this time, the data detection module still detects the flag information used for indicating the video mode in the video data to be displayed, and still stores the video mode to be displayed in the register module, but the current MCU controller determines whether to start configuring the display parameters corresponding to the video mode to be displayed by analyzing the instruction sent by the SOC processor and determining whether to start configuring the display parameters corresponding to the video mode to be displayed by determining whether the video mode to be displayed indicated by the instruction is different from the video mode being displayed, no longer by determining whether the video mode to be displayed stored in the register module is different from the video mode being displayed.
It is to be understood that when the user sets the determination of the video mode to be displayed using the automatic determination of the video mode, the function of manually determining the video mode is turned off. At this time, even if the user determines the video mode to be displayed through menu operation, the MCU controller will not use the video mode to be displayed indicated by the instruction to determine the video mode being displayed, and the MCU controller will only use the video mode to be displayed stored in the register module to determine the video mode being displayed, and determine whether to start configuring the display parameters corresponding to the video mode to be displayed according to whether the two video modes are the same.
Referring to fig. 2 again, taking the automatic video mode determination as an example, it is illustrated how the first parameter register and the second parameter register alternately work, where the manual video mode determination is performed on the two parameter registers, which is the same as the process of automatically determining the video mode, reference may be made to the process of automatically determining the video mode, and details are not repeated herein.
In this example, assuming that the video mode of the video data being displayed is the HDR10 mode, and the video mode of the video data to be displayed is the HLG mode, the present reference monitor is to implement switching from the HDR10 mode to the HLG mode.
First, video data to be displayed is transmitted from the player 200, and the decoding module 1001 parses the video data, specifically, converts an analog signal format of the video data into a digital signal format. The data detection module 1002 detects flag information indicating a video mode embedded in the video data, and sends video mode information to be displayed to the register module 1004. In this embodiment, the flag information indicates that the video mode to be displayed is the HLG mode.
At this time, the video data to be displayed continues to be transmitted to the timing detection module 1003, after the timing detection module 1003 receives the video data to be displayed, the timing detection module starts to detect the timing of the video frame, detects the start time and the end time of the video frame, stores the start time and the end time in the register module in the form of parameters, and sends a first switching signal to the register module 1004 when detecting that the current time is in a time gap between two frames of images.
Meanwhile, the MCU controller continuously accesses the register module, queries various parameters stored in the register module 1004, and starts to configure display parameters corresponding to the HLG mode when it is determined that the video mode to be displayed is the HLG mode, which is different from the HDR10 mode being displayed.
Secondly, after the MCU controller configures the display parameters corresponding to the HLG mode, the parameter register in the idle state at present is detected, and the display parameters corresponding to the HLG mode are stored in the parameter register. In this application, the parameter register currently in the idle state is defined as a second parameter register, which is used to store the display parameters corresponding to the video mode to be displayed.
Then, after configuring the display parameters corresponding to the HLG mode to the second parameter register, the MCU controller starts to detect whether there is a first switching signal sent to the register module 1004, and when it is detected that there is a first switching signal sent to the register module 1004, the register switching unit in the register module 1004 is controlled to switch the parameter register, specifically, the first parameter register is switched to the second parameter register, and the second parameter register outputs the display parameters corresponding to the HLG mode to the wide color gamut function module 1005. The first parameter register is a parameter register in an operating state before switching, and is used for providing display parameters corresponding to a video mode being displayed for the wide color gamut function module, that is, the first parameter register stores the display parameters corresponding to the HDR10 mode.
Next, the mode switching unit in the wide color gamut function module 1005 selects the HLG mode processing unit to process the video data to be displayed according to the HLG mode information provided by the register module 1004, and transmits the display parameters corresponding to the HLG mode processing unit for processing and use.
Finally, the FPGA100 sends the processed video data to the SOC processor 300, and the SOC processor 300 sends the processed video data to the display 400 for display, at this time, the display displays an effect corresponding to the HLG mode, and the video mode switching from the HDR10 mode to the HLG mode is completed.
It should be noted that, in the present application, the first parameter register and the second parameter register are distinguished according to the current state of the parameter register and are not corresponding to a specific device, so the register switching unit switches the first parameter register to the second parameter register, which actually indicates that the parameter register currently in the operating state is switched to the parameter register currently in the idle state, the parameter register in the operating state stores the display parameter corresponding to the video mode being displayed, and the parameter register in the idle state stores the display parameter corresponding to the video mode to be displayed.
After the video mode is switched, the parameter register in the working state is changed into the parameter register in the idle state, that is, the original first parameter register is changed into the second parameter register, so as to provide a storage space for the display parameter corresponding to the video mode to be displayed, which needs to be stored next time; the parameter register originally in the idle state is changed to the parameter register in the working state, that is, the original second parameter register is changed to the first parameter register, so as to provide the wide color gamut function module with the display parameter corresponding to the video mode being displayed.
In the application, the first parameter register always provides the display parameters corresponding to the video mode being displayed for the wide color gamut function module, the second parameter register always is used for storing the display parameters corresponding to the video mode to be displayed, and when the video mode needs to be switched, the two parameter registers are switched by the register switching unit, so that the two parameter registers can alternately provide the corresponding display parameters for the wide color gamut function module in turn.
According to the reference monitor, after the MCU controller configures the display parameters corresponding to the video mode to be displayed to the second parameter register, the first parameter register is switched to the second parameter register when the MCU controller selects the time gap between two frames of images at the current moment, so that the display parameters called by the wide color gamut function module are configured, and then the corresponding video mode processing unit is selected to process the video data to be displayed, and the display displays the corresponding display effect. The abnormal phenomena of video image flicker and the like caused by abnormal work of the wide color gamut functional module due to calling of unconfigured display parameters in the prior art are avoided. The reference monitor provided by the application really realizes seamless switching among different video modes, and meanwhile, the problem of frame loss does not exist.
Referring again to fig. 2, the reference monitor provided by the present application further includes a player 200, an SOC processor 300, and a display 400.
The player 200 is configured to send the undecoded video data to be displayed to the FPGA100, where the undecoded video data to be displayed is in an analog signal format.
The SOC processor 300 is configured to receive the video data to be displayed after being processed by the FPGA100, and transmit the video data to the display 400 for display.
Meanwhile, when the user selects the currently used manually determined video mode to determine the video mode to be displayed, the SOC processor 300 is further configured to monitor an operation instruction of the user, and when the video mode to be displayed selected by the user in the menu is received, send video mode information to be displayed determined by the instruction to the MCU controller 500.
In addition, the SOC processor 300 is also configured to receive information about the FPGA100, such as an operating state of the FPGA100, a version number of the FPGA100, and the like, sent by the MCU controller 500.
And a display 400 for receiving and displaying the video data from the SOC processor 300 and displaying the corresponding display effect.
Fig. 3 is a flowchart of a method for switching a video mode according to the present application, as shown in fig. 3, including the following steps:
step S301: when the video mode to be displayed is detected to be different from the video mode being displayed, configuring display parameters corresponding to the video mode to be displayed, and configuring the display parameters into a parameter register in an idle state at present;
step S302: detecting whether a first switching signal is received or not, and when the first switching signal is detected to be received, controlling the parameter register in the current working state to be switched to the parameter register in the current idle state to output display parameters corresponding to a video mode to be displayed, wherein the first switching signal is sent when the current time is detected to be in a time gap between two frames of images;
step S303: and switching to a corresponding video mode processing unit according to the received video mode and the corresponding display parameters to process the video data to be displayed.
The method comprises the steps of determining a video mode to be displayed, wherein the steps of manually determining the video mode and automatically determining the video mode are included. Manually determining the video mode is to determine the video mode to be displayed through a user control menu; the automatic video mode determination is to determine a video mode to be displayed according to mark information in video data to be displayed, and the mark information is used for indicating the video mode of the video data in the application. Video modes include, but are not limited to: HDR10 mode, HLG mode, SDR mode, etc.
Fig. 4 is a flowchart of a method for completely switching a video mode provided in the present application, and the following method for switching a video mode in an embodiment of the present application is specifically described with reference to a hardware system architecture diagram of a reference monitor shown in fig. 2, and as shown in fig. 4, the method includes the following steps:
step S401: and receiving video data to be displayed sent by the player.
Specifically, the FPGA100 receives video data to be displayed sent by the front-end player 200, where the video data is in an analog signal format.
Step S402: and a decoding module in the FPGA analyzes the video data to be displayed into a digital signal format.
Specifically, the decoding module 1001 in the FPGA100 parses the received video data to be displayed in the analog signal format into the digital signal format according to a predetermined decoding rule, where the decoding rule belongs to the prior art, and reference may be made to the prior art specifically, and details are not repeated herein.
Step S403: and a data detection module in the FPGA detects the video mode of the video data to be displayed.
Specifically, the data detection module 1002 in the FPGA100 determines the video mode of the video data to be displayed according to the flag information embedded in the video data stream. Different video modes may exist for different sources of the playlist, and common video modes are HDR10 mode, SDR mode, HLG mode, etc.
It is assumed that the video mode of the video data to be displayed is the HLG mode in the present embodiment.
Step S404: and the data detection module in the FPGA stores the video mode of the video data to be displayed into the register module in the FPGA.
Specifically, the data detection module 1002 saves the HLG mode determined in step S403 in the register module 1004. When the reference monitor is currently set to the automatic determination video mode, the stored video mode to be displayed provides a basis for whether to trigger the video mode switching.
Step S405: and judging whether the current video mode to be displayed is automatically determined, if so, executing step 407, otherwise, executing step 406.
The reference monitor provided by the application supports two modes of automatically determining the video mode and manually determining the video mode.
And manually determining that the video mode is the video mode to be displayed selected by the user through the displayed menu, and after receiving the instruction, the SOC processor sends the instruction to the MCU controller.
And automatically determining the video mode as the video mode to be displayed is determined by the MCU according to the mark information in the video data, wherein the mark information is used for representing the video mode of the video data.
Step S406: and the MCU controller determines the video mode of the video data to be displayed according to the instruction sent by the SOC processor. The video mode is now determined manually, the video mode to be displayed being based on a user selection of a menu.
Step S407: and the MCU controller determines the video mode of the video data to be displayed according to the video mode stored in the register module. At this time, to automatically determine the video mode, the video mode to be displayed is based on the analysis of the flag information in the video data to be displayed by the data detection module 1002.
Step S408: the MCU controller determines whether the video mode to be displayed is different from the video mode being displayed, if yes, step S409 is executed, and if not, the determination of step S408 is continuously executed.
Assuming that in the present embodiment, the video mode being displayed is the HDR10 mode, and the video mode of the video data to be displayed is the HLG mode, there is a difference between the video modes to be displayed and being displayed.
Step S409: the MCU controller detects a parameter register currently in an idle state.
The register module 1004 provided by the present application includes a first parameter register, a second parameter register, and a register switching unit.
The first parameter register is defined as a parameter register currently in an operating state, and is used to provide the wide color gamut function module 1005 with display parameters corresponding to the video mode being displayed.
The second parameter register is defined as a parameter register in an idle state currently in use for storing display parameters corresponding to a video mode to be displayed.
The two parameter registers provide display parameters corresponding to the video mode to be displayed for the wide color gamut functional module in an alternate mode.
The register switching unit is used for switching the first parameter register into the second parameter register.
In addition, the register module 1004 further includes a register for storing other related parameters, for example, a register for storing video mode information to be displayed is the same as the prior art, and reference may be made to the prior art specifically, which is not described herein again.
Step S410: and the MCU controller configures the display parameters corresponding to the video mode to be displayed to the parameter register in the idle state at present.
With reference to the above example, the step is specifically that the MCU controller configures the display parameters corresponding to the HLG mode into the second parameter register. At this time, the first parameter register continues to provide the display parameters corresponding to the HDR10 mode being displayed to the wide color gamut function module 1005.
Therefore, when the MCU controller configures the display parameters corresponding to the HLG mode into the register module 1004, the display effect of the current reference monitor will not be affected.
Step S411: the MCU controller determines whether the register module receives the first switching signal, if yes, step S412 is executed, otherwise, the determination of step S411 is continuously executed.
The first switching signal is sent to the register module 1004 when the timing detection module 1003 detects that the current time is in a time gap between two frames of images. If the video mode is switched in the time gap between two frames of images, the display effect of the video is not influenced, and otherwise, the display effect of the video is influenced if the video mode is not switched in the time gap between two frames of images.
Step S412: and the MCU controller controls the parameter register in the current working state to be switched to the parameter register in the current idle state to output display parameters corresponding to the video mode to be displayed.
Specifically, the MCU controller controls the register switching unit to switch the first parameter register to the second parameter register, so as to provide the display parameters corresponding to the video mode for the wide color gamut function module 1005. In conjunction with the above example, after the switching is completed, the register module 1004 provides the wide color gamut function module 1005 with the HLG mode and the display parameters corresponding to the HLG mode.
Step S413: and the MCU controller controls the wide color gamut functional module in the FPGA, and switches to a corresponding video mode processing unit according to the acquired video mode and the corresponding display parameters to process the video data to be displayed.
The wide color gamut function module 1005 provided by the present application includes a mode switching unit and a plurality of video mode processing units. The mode switching unit switches to the corresponding video mode processing unit according to the acquired video mode to be displayed, and the video mode processing unit processes the video data to be displayed according to the acquired display parameters.
With reference to the above example, the mode switching unit selects the HLG mode processing unit according to the acquired HLG mode, and transmits the display parameter corresponding to the acquired HLG mode to the HLG mode processing unit, so that the HLG mode processing unit processes the video data to be displayed by using the display parameter.
Step S414: the wide color gamut function module transmits the processed video data to be displayed to the SOC processor, the SOC processor transmits the video data to be displayed to the display, and the display displays the corresponding video mode effect.
In connection with the above example, the reference monitor switches from the HDR10 video mode to the HLG video mode, and displays the display effect corresponding to the HLG mode, so far, the switching from the HDR10 mode to the HLG mode is completed.
According to the reference monitor, after the MCU controller configures the display parameters corresponding to the video mode to be displayed to the second parameter register, the first parameter register is switched to the second parameter register when the MCU controller selects the time gap between two frames of images at the current moment, so that the display parameters called by the wide color gamut function module are configured, and then the corresponding video mode processing unit is selected to process the video data to be displayed, and the display displays the corresponding display effect. The abnormal phenomena of video image flicker and the like caused by abnormal work of the wide color gamut functional module due to calling of unconfigured display parameters in the prior art are avoided. The reference monitor provided by the application really realizes seamless switching among different video modes, and meanwhile, the problem of frame loss does not exist.
Based on the same technical concept, as shown in fig. 5, the present application also provides a display apparatus, including: the system comprises a processor 1402, a communication interface 1404, a memory 1401 and a communication bus 1403, wherein the processor 1402, the communication interface 1404 and the memory 1401 are communicated with each other through the communication bus 1403;
a memory 1401 for storing a computer program;
the processor 1402 is configured to implement the above-described method for switching the video mode when executing the program stored in the memory 1401.
Based on the same technical concept, the present application further provides a computer-readable storage medium storing a computer-executable program for causing a computer to execute the method for switching video modes listed in any one of the above manners.
Based on the same technical concept, the present application further provides a computer program product, which includes a computer program, and when the computer program is executed by a processor, the method for switching video modes in any of the above manners is implemented.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.
Claims (10)
1. A reference monitor is characterized by comprising an FPGA and an MCU controller, wherein the FPGA comprises a time sequence detection module, a register module and a wide color gamut function module,
when the MCU controller detects that the video mode to be displayed is different from the video mode being displayed, configuring display parameters corresponding to the video mode to be displayed, and configuring the display parameters into a second parameter register of the register module, wherein the second parameter register is a parameter register in an idle state at present;
the MCU controller detects whether the register module receives a first switching signal, and when the register module receives the first switching signal, the MCU controller controls the register module to switch to a display parameter corresponding to a video mode to be displayed output to the wide color gamut function module by the second parameter register, wherein the first switching signal is sent to the register module when the time sequence detection module detects that the current time is in a time gap between two frames of images;
and the MCU controller controls the wide color gamut function module and switches to a corresponding video mode processing unit to process video data to be displayed according to the video mode and the corresponding display parameters acquired from the register module.
2. The reference monitor as claimed in claim 1, wherein the register module further comprises a first parameter register and a register switching unit, the first parameter register is a currently operating parameter register for providing display parameters corresponding to the video mode being displayed to the wide color gamut function module, and the register switching unit is configured to switch the first parameter register to the second parameter register.
3. The reference monitor of claim 1, wherein determining the video mode to be displayed comprises manually determining the video mode by a user control menu.
4. The reference monitor of claim 1, wherein determining the video mode to be displayed comprises automatically determining a video mode, the automatically determining a video mode being a video mode that the MCU controller determines to be displayed based on flag information in the video data to be displayed.
5. The reference monitor of claim 4, wherein said flag information is stored in said register module, detected by a data detection module in said FPGA, and sent to said register module.
6. The reference monitor of claim 1, further comprising:
the player is used for providing the video data to be displayed for the FPGA;
the SOC processor is used for responding to an operation instruction of a user and receiving video data from the FPGA;
a display for receiving and displaying video data from the SOC processor.
7. A method for switching video modes, comprising:
when the video mode to be displayed is detected to be different from the video mode being displayed, configuring display parameters corresponding to the video mode to be displayed, and configuring the display parameters into a parameter register in an idle state at present;
detecting whether a first switching signal is received or not, and when the first switching signal is detected to be received, controlling a parameter register in a current working state to be switched to a parameter register in an idle state to output display parameters corresponding to a video mode to be displayed, wherein the first switching signal is sent when a time gap between two frames of images at the current moment is detected;
and switching to a corresponding video mode processing unit according to the received video mode and the corresponding display parameters to process the video data to be displayed.
8. The method of claim 7, wherein determining the video mode to be displayed comprises manually determining the video mode and automatically determining the video mode, wherein the manually determining the video mode is determining the video mode to be displayed through a user control menu; and the automatic video mode determination is to determine the video mode to be displayed according to the mark information in the video data to be displayed.
9. A display device is characterized by comprising a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory are communicated with each other through the communication bus;
the memory is used for storing a computer program;
the processor, when executing a computer program stored in a memory, is adapted to implement the method of switching video mode according to claims 7-8.
10. A computer-readable storage medium, characterized in that it stores a computer program which, when being executed by a processor, carries out the method of switching video mode according to claims 7-8.
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