CN113472360A

CN113472360A - Decoding method and decoding device for polarization code

Info

Publication number: CN113472360A
Application number: CN202010238617.2A
Authority: CN
Inventors: 牛凯; 董雁飞; 董超; 马亮
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2020-03-30
Filing date: 2020-03-30
Publication date: 2021-10-01

Abstract

The application provides a decoding method and a decoding device of a polar code, which are beneficial to improving the decoding performance by acquiring P polar code words of an information bit sequence, then utilizing the P polar code words to carry out symbol processing on a first channel receiving value of the polar code to obtain a second channel receiving value, decoding the second channel receiving value to obtain a plurality of candidate paths, finally carrying out Cyclic Redundancy Check (CRC) on the plurality of candidate paths, and outputting the first candidate path as a decoding result.

Description

Decoding method and decoding device for polarization code

Technical Field

The present application relates to the field of channel coding, and more particularly, to a decoding method and a decoding apparatus for a polar code.

Background

Polar code (polar code), which is the only channel coding technique that can be theoretically proven to reach the fragrant limit at present and has a practical linear complexity coding capability, is determined as a coding scheme of a control channel of the 5th generation (5G) communication system. The Serial Cancellation (SC) decoding algorithm is the most basic decoding algorithm for the polar code. As the code length approaches infinity, good progressive performance is obtained. However, the performance of the SC decoding algorithm is not ideal at medium and short code lengths. In order to improve the decoding performance of the SC decoding algorithm, a Successive Cancellation List (SCL) decoding algorithm is proposed. The SCL decoding algorithm introduces a breadth-first search strategy into a code tree search mechanism, and a small candidate path list is reserved for each decoding judgment. And finally, selecting the path with the maximum likelihood probability from the candidate path list as a decision path.

Cyclic Redundancy Check (CRC) is a channel error detection technique that has found widespread use in practical digital communication systems. For polar codes, a group of candidate paths are obtained when SCL decoding is finished, joint detection decoding can be performed with very low complexity and CRC, and a candidate sequence capable of being detected by CRC is selected as a decoder output sequence, so that the error correction capability of a decoding algorithm is improved.

However, the decoding performance of the CA-SCL decoding algorithm is affected by the list size L. When L is small, the error rate is high, and the decoding performance is still not ideal enough. And, according to the CA-SCL decoding algorithm, every time a decoder decodes 1 bit, the decoder needs to perform sorting operation on 2L measurement values. If L is increased to improve decoding performance, the size of the sorting operation is rapidly increased, which causes decoding delay and directly affects the throughput of the decoder. Therefore, it is desirable to provide a decoding method to improve decoding performance.

Disclosure of Invention

In view of this, the present application provides a decoding method and a decoding apparatus for polar codes, which are helpful to improve decoding performance.

In a first aspect, a method for decoding a polar code is provided, including: acquiring P polarization code words of an information bit sequence; carrying out symbol processing on a first channel receiving value of the polarization code according to the P polarization code words to obtain a second channel receiving value; decoding the second channel receiving value to obtain a plurality of candidate paths; and performing Cyclic Redundancy Check (CRC) check on the plurality of candidate paths, and outputting a first candidate path as a decoding result.

In this embodiment of the present application, a decoding end first obtains P polar code words (which may also be referred to as error patterns), then performs symbol processing on a codeword to be decoded (such as a first channel received value) by using the P polar code words to obtain a second channel received value, and decodes the second channel received value to obtain multiple candidate paths. Here, the present application may run multiple SC decoders or multiple CA-SCL (L-smaller) decoders in parallel, and compared with the SC decoding scheme, may obtain better decoding performance, and may also solve the delay problem caused by the CA-SCL (L-larger) decoders needing to sort through excessive metric values.

If one path in the plurality of candidate paths passes the CRC check, the first candidate path is the path passing the CRC check; and if two or more paths in the plurality of candidate paths pass the CRC check, the first candidate path is the path with the best path metric value in the paths passing the CRC check.

The P polar code words acquired by the decoding end can be acquired online or offline.

As a possible implementation manner, acquiring P polar code words includes: performing serial cancellation list SCL decoding on the channel receiving value of the information bit sequence to obtain L candidate paths of the information bit sequence; encoding the L candidate paths to obtain L polarization code words; and selecting the P polarization code words from the L polarization code words, wherein P is smaller than L.

Optionally, the L candidate paths are represented as

The L polarization code words are expressed as

Wherein the L polar code words satisfy the following formula:

wherein the content of the first and second substances,

represents a kronecker product in which n is log₂N, N represents a code length.

As a possible implementation manner, selecting the P polar code words from the L polar code words includes:

and calculating the code weight of each polarization code word of the L polarization code words, and selecting the P polarization code words with the minimum code weight.

As a possible implementation manner, the performing symbol processing on the first channel received value according to the P polar code words to obtain a second channel received value includes: calculating the metric value of each polarization code word in the P polarization code words; determining D polarization code words according to the metric values of the P polarization code words, wherein D is less than or equal to P; and performing symbol turnover on the first channel receiving value by using the D polarization code words to obtain a second channel receiving value.

As a possible implementation, D is represented as: d is M k, M belongs to N^*,k∈N^*Said first channel reception value is denoted as Y; the performing symbol flipping on the first channel received value by using the D-bar polarization code words to obtain a second channel received value includes: taking M polarization code words in the D polarization code words

And carrying out symbol turnover on the Y to obtain M groups of channel receiving values { Y₀,Y₁,...,Y_M-1And (c) the step of (c) in which,

as a possible implementation manner, the performing cyclic redundancy check, CRC, check on the multiple candidate paths and outputting a first candidate path as a decoding result includes: if one path in the plurality of candidate paths passes the CRC check, the first candidate path is the path passing the CRC check; and if two or more paths in the plurality of candidate paths pass the CRC check, the first candidate path is the path with the best path metric value in the paths passing the CRC check.

In a second aspect, the present application provides a decoding apparatus for polar codes, which has the function of implementing the method in the first aspect or any possible implementation manner thereof. The functions can be realized by hardware, and the functions can also be realized by executing corresponding software by hardware. The hardware or software includes one or more units corresponding to the above functions.

In a third aspect, the present application provides a decoder comprising one or more processors coupled with one or more memories. The one or more memories are used to store computer programs, and the one or more processors are used to invoke and execute the computer programs stored in the one or more memories to perform the methods of the first aspect or any possible implementation thereof.

Alternatively, the chip may be a channel decoder.

In a fourth aspect, the present application provides a chip comprising one or more processors. The one or more processors are configured to read and execute the computer programs stored in the one or more memories to perform the methods of the first aspect or any possible implementation thereof. The one or more memories are independently disposed off the chip.

Optionally, the chip further comprises one or more memories, and the one or more memories and the one or more processors are connected with the one or more memories through circuits or wires.

Further optionally, the chip further comprises a communication interface.

In a fifth aspect, the present application further provides a decoding device comprising a processor and an interface circuit, the interface circuit being configured to receive computer code or instructions and transmit the computer code or instructions to the processor, and the processor being configured to execute the computer code or instructions to perform the method of the first aspect or any possible implementation manner thereof.

In a sixth aspect, the present application provides a computer-readable storage medium having stored thereon computer instructions which, when run on a computer, cause the computer to perform the method as in the first aspect or any possible implementation thereof.

In a seventh aspect, the present application provides a computer program product comprising computer program code to, when run on a computer, cause the computer to perform the method of the first aspect or any possible implementation thereof.

In an eighth aspect, the present application provides a communication device comprising the decoder of the third aspect.

In a ninth aspect, the present application provides a wireless communication system including the communication device of the eighth aspect.

Drawings

Fig. 1 is a schematic diagram of an architecture of a wireless communication system suitable for the present application;

FIG. 2 is a basic flow diagram of wireless communications;

fig. 3 is an example of an SCL decoding algorithm with L-2;

fig. 4 is a flowchart of a decoding method 400 of a polar code provided in the present application;

FIG. 5 is a flow chart for determining P polar code words provided herein;

FIG. 6 is a schematic flow chart of decoding with P polar code words provided by the present application;

FIG. 7 is a diagram of simulation results of the EP-SC algorithm and other algorithms according to the embodiment of the present application;

FIG. 8 is a diagram of simulation results of the EP-SCL algorithm and other algorithms according to an embodiment of the present application;

FIG. 9 is a diagram of a decoding apparatus 900 provided herein;

fig. 10 is a schematic block diagram of a decoding apparatus 900 provided in the present application;

fig. 11 is a schematic structural diagram of a decoder 1000 according to an embodiment of the present application.

Detailed Description

The technical solution in the present application will be described below with reference to the accompanying drawings.

Referring to fig. 1, fig. 1 is a schematic diagram of an architecture of a wireless communication system suitable for the present application. As shown in fig. 1, a wireless communication system may include at least one network device 110 and at least one terminal device (e.g., 111,112, and 113 shown in fig. 1). The network device 110 and the terminal device communicate wirelessly. When the network device 110 sends a signal to the terminal device, the network device 110 is an encoding side and the terminal device is a decoding side. When the terminal device sends a signal to the network device 110, the terminal device is an encoding end, and the network device is a decoding end.

The wireless communication system mentioned in the embodiments of the present application includes but is not limited to: a Wireless Local Area Network (WLAN) system, a narrowband band-internet of things (NB-IoT) system, a Long Term Evolution (LTE) system, a fifth generation (the 5)^thgeneration,5G) communication system or a communication system after 5G, and the like.

The network device mentioned in the present application may be any device having a wireless transceiving function. The network devices include, but are not limited to: node B (NB), evolved node B (eNB) in a Long Term Evolution (LTE) system, a Radio Network Controller (RNC), an evolved LTE base station, a next generation node B (gNB) in a 5G system, which may also be a Base Station Controller (BSC), a Base Transceiver Station (BTS), an Access Point (AP), a wireless backhaul node, a Transmission Point (TP), a Transmission and Reception Point (TRP), a Home Node B (HNB), and the like. Alternatively, the network node may also be a network node that forms a gNB or a transmission point, for example, a baseband unit (BBU) or a Distributed Unit (DU), and the application is not limited in this application.

The terminal devices mentioned in this application may also be referred to as User Equipment (UE), a mobile station, an access terminal, a subscriber unit, a subscriber station, a mobile station, a remote terminal, a mobile device, a terminal, a wireless communication device, a user agent, a Station (STA) in a WLAN, a cellular phone, a cordless phone, a Session Initiation Protocol (SIP) phone, a Wireless Local Loop (WLL) station, a Personal Digital Assistant (PDA), a handheld device with wireless communication function, a computing device, other processing devices connected to a wireless modem, a vehicle-mounted device, a wearable device, a mobile station in a 5G network, a terminal device in a future evolved Public Land Mobile Network (PLMN) network, and the like.

Referring to fig. 2, fig. 2 is a basic flow chart of wireless communication. As shown in fig. 2, at the transmitting end of the signal, the source is sequentially sent out after source coding, channel coding and digital modulation. And the receiving end of the signal outputs an information sink to the received signal through digital demodulation, channel decoding and information source decoding in sequence. Channel coding and decoding are one of the core technologies in the field of wireless communication. Currently, polar code (polar code) is a channel coding technique that can theoretically prove to reach the shannon limit and has a practical linear complexity coding capability.

Polar code is a linear block code. Among Polar code decoding algorithms, the Sequential Cancellation (SC) decoding algorithm is the most basic decoding algorithm. When the code length approaches infinity, the SC decoding algorithm can obtain good progressive performance. In a limited code length, there still exists some information bits that cannot be decoded correctly because the polarization channel is not complete. As can be known from the coding principle of polar code, since the polarized channels are not independent from each other, but have a dependency relationship: a polarized channel with a large channel number depends on all polarized channels with smaller numbers than it. Based on the dependency relationship among the polarized channels, the SC decoding algorithm carries out decoding judgment on each bit in turn according to the sequence of the channel serial numbers from small to large. And, when the i-th bit is decided, it is based on the assumption that the results of decoding decisions of all the previous (i-1) bits are correct. As the code length approaches infinity, each information bit will be correctly decoded since the split channel is nearly fully polarized (channel capacity is either 0 or 1). However, with a limited code length, there are still some information bits that cannot be decoded correctly due to incomplete channel polarization. Since the SC decoding algorithm needs to use the estimated value of the previous information bit when decoding the subsequent information bit, and the SC decoding algorithm is a greedy algorithm, the next layer is performed by searching only the optimal path at each layer of the code tree. Thus, if the previous decoding of i-1 information bits is erroneous, a more serious error propagation will result.

In view of the disadvantages of the SC decoding algorithm, a Sequential Cancellation List (SCL) decoding algorithm is proposed. In the SCL decoding algorithm, the number of candidate paths allowed to be reserved is increased at each layer of the code tree, and only the optimal path is allowed to be selected for next-layer expansion from each layer of the SC decoding algorithm, so that the maximum path allowed to be selected best is changed into the next-layer expansion. Specifically, when decoding, the SCL decoding algorithm searches for a path from a root node of a decoding tree to a leaf node layer by layer. Different from SC, SCL decoding algorithm is breadth-first, which introduces breadth-first search strategy into code tree search mechanism, and extends and prunes firstly, and finally reaches leaf node. The decoding decision of each layer reserves a small survival path list, and finally the path with the maximum likelihood probability is selected from the survival path list to be used as the decision path. Given the list length L, the complexity of the SCL decoding algorithm is o (lnlogn), and the performance thereof can approach the Maximum Likelihood (ML) decoding performance.

Referring to fig. 3, fig. 3 is an example of SCL decoding algorithm with L ═ 2. As shown in fig. 3, assuming that the list size of the SCL decoding algorithm is L, when the decoding end performs SCL decoding, starting from the root node of the code tree, each layer reserves L survivor paths, and enters the path expansion of the next layer until reaching the leaf node of the code tree. When the SCL decoding of the polar code is completed, a set of candidate paths is obtained. And finally, the decoding end selects one path with the best metric value from the L candidate paths as a decoding path to output. It should be understood that, in the code tree, a path formed from the root node to any node corresponds to a Path Metric (PM) value, and the PM value can be used as a reference for determining whether the path is good or bad. The decoding end reserves L candidate paths at each layer of the code tree with reference to the PM value. Therefore, according to the SCL decoding algorithm, the decoding process of the polar code finds a suitable decoding path on the full binary tree shown in fig. 3. As shown in fig. 3, when the list size L of the SCL decoding algorithm is 2, starting from the root node, 2 candidate paths are reserved at each layer and expanded to the next layer until reaching the leaf node. Taking the example shown in fig. 3 as an example, when decoding is completed according to the SCL decoding algorithm, two candidate paths are reserved in the candidate list, which are [0011] and [1000], respectively. Finally, the decoding end can select one of the 2 candidate paths with the optimal metric value as a decoding path.

The CRC assisted SCL (CRC aid-SCL, CA-SCL) decoding algorithm is based on the SCL decoding algorithm, and CRC check bits are added in the information bit sequence. During decoding, the decoding end adopts an SCL decoding algorithm to decode, normally obtains L candidate paths, and then selects the L candidate paths by means of the prior information that the correct information bit can pass through CRC, so that the optimal decoding path is output as a decoding result.

Taking fig. 3 as an example, the decoding end inputs the reserved 2 candidate paths into the CRC module for CRC, and outputs the candidate paths passing through the CRC as the decoding result. Assuming that candidate path 0011 shown in fig. 3 passes CRC and candidate [1000] does not pass CRC, candidate path [0011] is output as a decoding result.

The performance of the CA-SCL decoding algorithm is influenced by the size of the search path L, and the decoding performance is still to be improved.

Therefore, the application provides a decoding method of a polarization code, aiming at reducing the error rate of a CA-SCL decoding algorithm.

Referring to fig. 4, fig. 4 is a flowchart of a decoding method 400 of a polar code provided in the present application. The method 400 may be performed by a decoding side (i.e., a decoding apparatus), or may also be performed by a chip, a processing circuit, or the like mounted in the decoding side, which has a function of implementing the method described below. Optionally, the decoding end may be the network device shown in fig. 1, and may also be a terminal device.

S401, P polarized code words of the information bit sequence are obtained.

P polar code words can be used as an error pattern (pattern). Here, the P polar code words with the best error correction performance can be selected as the error pattern. For example, P polarization code words with the smallest code weight may be selected as the error pattern from the L polarization code words. The number of non-zero symbols in a codeword is referred to as the weight of the code, simply the code weight.

It can be understood that, in the embodiment of the present application, the process of obtaining P polar code words may be completed offline or completed online, which is not limited in the embodiment of the present application. If P polar code words are obtained in an off-line manner, the process of obtaining P polar code words may be performed on another device (e.g., a computer device).

Optionally, S401 includes: performing serial cancellation list SCL decoding on the received value of the information bit sequence to obtain L candidate paths of the information bit sequence; encoding the L candidate paths to obtain L polarization code words; and selecting the P polarization code words from the L polarization code words, wherein P is smaller than L.

Wherein the received value of the information bit sequence is a channel received value in the form of log-likelihood ratio (LLR). Alternatively, the channel reception value of the information bit sequence may be calculated using the following equation:

wherein the receiving sequence is

The transmission sequence is

1^NRepresenting a full 1 vector of length N,

represents an Additive White Gaussian Noise (AWGN) noise sequence. Here, the noise can be reduced

Is set to all 0, i.e.

Specifically, the transmitting end transmits all 0 codewords of 0 for all bits in the sequence, assuming that the noise variance is 0. The receiving end inputs the receiving value of the information bit sequence into the SCL decoder, and the SCL decoder can be used to obtain L candidate paths (the L candidate paths can be represented as L estimated sequences) close to the all-0 code word, and then the L candidate paths are encoded to obtain L polarization code words. Then, the receiving end calculates the code weight of the L polarized code words, and then selects the P polarized code words based on the code weight of the L polarized code words. For example, P polarization code words with the smallest code weight are selected from the L polarization code words as the error pattern.

Illustratively, the received value Y of the information bit sequence is input into an SCL decoder, the initial path is set as a null path, and L candidate paths obtained after decoding are represented as

For example, assume that L candidate paths are encoded to obtain L polar code words

Optionally, L polar code words

The following equation may be satisfied:

here, the receiving end may select P polar code words from the L polar code words based on the code weights of the polar code words. Or, the receiving end may also perform a simulation experiment on the L polar code words, and select the P polar code words with the best error correction performance as the error pattern. For example, the receiving end calculates the code weight of each code word in L polar code words, then sorts the code words according to the ascending order, and selects the P polar code words with the smallest code weight as the error pattern. The embodiment of the present application does not limit the code weight calculation method for the polarization code word. Alternatively, assume code repetition of i-th polar code word is w_i，

Is the jth element of the ith polarization code word, then the code weight is { w }₀,w₁,...,w_L-1The formula can be satisfied:

wherein the content of the first and second substances,

is 0 or 1.

After the receiving end obtains the P polar code words, the receiving end can decode the P polar code words. In other words, the decoding end performs decoding with the aid of P error patterns. The decoder is not particularly limited in the embodiments of the present application. If the SC decoder is adopted, the method for performing auxiliary decoding by using the error pattern in the embodiment of the present application may be referred to as error pattern assisted SC (EP-SC); if the SCL decoder is adopted, the method for performing auxiliary decoding by using the error pattern in the embodiment of the present application may be referred to as an error pattern assisted SCL (EP-SCL).

S402, carrying out symbol processing on the first channel receiving value of the polarization code according to the P polarization code words to obtain a second channel receiving value.

Here, the first channel reception value is a codeword to be decoded, i.e., a codeword that actually needs to be decoded.

"symbol processing" may be understood as the sign reversal of the first channel received values according to the P polar code words. The sign inversion here means: according to the P polar code words, the received value corresponding to the bit marked as 1 in the code words needs to be subjected to sign inversion, and the received value corresponding to the bit marked as 0 does not need to be subjected to sign inversion. For example, a plurality of polar code words may be determined from the P polar code words, and then the plurality of polar code words are used to perform symbol inversion on the first channel received value, so as to obtain a second channel received value. It is to be understood that the first channel reception value and the second channel reception value are introduced here only for the convenience of distinguishing the channel reception values before and after the symbol processing, and have no special meaning.

Here, a plurality of polarization code words may be selected among the P polarization code words for use in decoding, taking into account the metric values of the P polarization code words. Optionally, S402 includes: calculating the metric value of each polarization code word in the P polarization code words; determining D polarization code words according to the metric values of the P polarization code words, wherein D is less than or equal to P; and carrying out symbol turnover on the first channel receiving value according to the D polarization code words to obtain a second channel receiving value.

Illustratively, the decoder performs symbol inversion on the first channel receiving value by using the D polar code words by calculating metric values of each of the P polar code words, then performing ascending order arrangement on the metric values of the P polar code words, and selecting the first D polar code words with the metric values being ordered from large to small from the P polar code words.

Here, when the first channel reception value is sign-flipped with the D-bar polar code words, the D-bar polar code words may be further processed. For example, the D polar code words are divided into a plurality of groups of polar code words, D ═ M × k, M ∈ N^*,k∈N^*，N^*Representing a positive integer, and M represents the number of polarization code words cycled k times. In this way, the decoder can cycle k times based on the decoding process, and can perform symbol inversion on the first channel value Y by using M polar code words each time to obtain M sets of channel receiving values.

S403, decoding the second channel receiving value to obtain a plurality of candidate paths.

For example, M groups of channel received values may be input to M decoders operating in parallel, respectively, to obtain multiple candidate paths.

S404, performing Cyclic Redundancy Check (CRC) check on the plurality of candidate paths, and outputting a first candidate path as a decoding result.

The decoder performs a CRC check on the plurality of candidate path polarizations. If one path in the multiple candidate paths passes the CRC check, stopping decoding, and outputting the path passing the CRC check as a decoding result, namely the first candidate path is the path passing the CRC check. If two or more paths in the multiple candidate paths pass the CRC check, the path with the best path metric value is selected as a decoding result, namely the first candidate path is the path with the best path metric value.

Of course, if there is no candidate path that passes the CRC check, the decoder may repeat S402-S404 to obtain the first candidate path. For example, there may be two cases when the decoder repeatedly performs S402-S404: in case 1, selecting one polarization code word from P polarization code words (or D polarization code words) for flipping each time, and performing S402-S404, if there is no candidate path passing CRC, selecting another polarization code word from the P polarization code words, and continuing to perform S402-S404; in case 2, M polarization code words are selected to be inverted each time among P polarization code words (or D polarization code words), S402-S404 are executed, and if there is no candidate path passing CRC, another polarization code word is selected from the P polarization code words, and S402-S404 are continuously executed.

The decoding method of the embodiment of the application can include a process of acquiring P polarized code words and a process of decoding by utilizing the P polarized code words.

One example of a process for determining P polar code words is described below in conjunction with fig. 5.

As shown in fig. 5, fig. 5 shows a flowchart for determining P polar code words provided by the present application. Wherein the flow shown in fig. 5 may be executed by another device or computer.

510. And (5) initializing.

The initialization mainly includes initialization of a channel model. For example, the code length of the polarization code is N-2ⁿThe code structure of the polarization code with the information bit length of K is

Represents a kronecker product in which n is log₂N。

S510 may also include selection of a channel type (channel model), selection of a modulation scheme, and the like. For example, the channel type may be Additive White Gaussian Noise (AWGN), and the modulation scheme may be Binary Phase Shift Keying (BPSK).

Alternatively, as an example, for AWGN channel, BPSK modulation, the transmission bit sequence may be

The received bit sequence may be

Wherein 1 is^NRepresenting a full 1 vector of length N,

representing the noise sequence of AWGN. Here, the channel noise can be reduced

Is set to all 0, i.e.

520. A channel reception value Y in the form of LLR is calculated.

Alternatively, the channel reception values in the form of LLRs may be calculated here under the assumption of a high signal-to-noise ratio. Although channel noise

A large specific SNR value, e.g. 6dB or10dB, etc., to make the LLR form of the channel received value meaningful. The channel received value Y in the form of LLR can be represented by the formula

Calculation of σ²Representing the variance of the noise.

530. An SCL decoder with a list size L is run.

Specifically, the channel reception value Y may be input to the decoder, and the initial path may be set to the null path. All candidate paths are extended by

bit

0 or 1 and the path metric values are updated. Only L paths with the maximum metric value are reserved for each decoding 1 bit, decoding is stopped when the path length reaches N, and the currently reserved L candidate paths are output:

540. and recoding the L candidate paths to obtain L polarization code words.

Illustratively, the L pieces of polarization code words are represented as

Optionally, the L polarization code codewords are calculated by using the following formula:

550. and calculating the code weights of the L polarization code words and sequencing the L polarization code words.

For L polar code words

Suppose the code weight of the ith codeword is w_i，

Is the j element of the i code word, L polarization code words

Code weight of (w)₀,w₁,...,w_L-1Is calculated asRepresented by the formula:

for code weight { w₀,w₁,...,w_L-1The indexes are arranged in ascending order, and the corresponding indexes after the ordering are expressed as gamma₀,γ₁,...,γ_L-1}。

And 560, selecting P polarization code words with the smallest code weight from the L polarization code words.

Here, the decoding end may select P polarization code words with the smallest code weight from the L polarization code words as error patterns for subsequent decoding. The P-strip polarization code word with the minimum code weight is expressed as

An example of decoding by the decoding end by means of P polar code words is described below with reference to fig. 6.

As shown in fig. 6, fig. 6 shows a schematic flow chart of decoding with P polar code words provided by the present application. The process shown in fig. 6 may be executed by the decoding end.

610. And (5) initializing.

For example, N-2 for one code lengthⁿThe code structure of the polarization code with the information bit length of K is

Where B denotes the bit permutation matrix (which can be understood as the permutation matrix associated with the error pattern, i.e. the permutation matrix associated with the P polar code words),

represents a kronecker product in which n is log₂And N is added. Let CRC code pre-sequence length be K_PREAnd the length of the sequence after coding is K, then the length of the CRC check bit is K_CRC＝K-K_PREThe generator polynomial of the CRC is g (x).

Optionally, as an example, for AWGN channel, BPSK modulation, transmissionThe bit sequence may be

The received bit sequence may be

Wherein 1 is^NRepresenting a full 1 vector of length N,

representing the noise sequence of AWGN.

620. And calculating the receiving value of the channel and the metric values of the P polarization code words.

Similar to the method of calculating the channel reception value in step 520, the formula can be used here

A channel reception value is calculated. The P polar code words are P polar code words obtained through the flow chart in fig. 5

For convenience of description, P polar code words obtained in fig. 5 are

Expressed as an error pattern e₀,e₁,...,e_P-1Metric EM of ith error pattern_iCalculated using the following formula:

wherein the content of the first and second substances,

is e_iThe j element of (a), y_jIs the j-th element of Y, w_iIs e_iCode weight of (2).

630. D polarization code words are selected from the P polarization code words.

After the metric values of the P polarization code words are obtained in step 620, the decoding end arranges the metric values of the P polarization code words in ascending order, and the ordered metric values of the P polarization code words are indexed by { lambda }₀,λ₁,...,λ_P-1Denotes then at { lambda }₀,λ₁,...,λ_P-1Selecting front D polarization code words

For use in decoding.

640. Initializing k as D/M.

Here, let D ═ M × k, and M ∈ N^*,k∈N^*And initializing t to 0. t is the number of cycles.

It can be understood that when k takes a value of 1, it is equivalent to using a decoder for full parallel computation.

And 650, judging whether t is less than k.

If t is less than k, decoding is finished. If t is not less than k, step 660 is performed.

660, taking M error patterns

Carrying out symbol inversion on Y to obtain M groups of different channel receiving values { Y₀,Y₁,...,Y_M-1}。

Here, the sign inversion can be achieved by the following formula:

the resulting M groups of channel received values are input to M decoders in parallel, respectively 670.

The decoder may be an SC decoder or an SCL decoder, but is not limited thereto. If the path is the SC decoder, outputting M candidate paths; if the decoder is an SCL decoder, M × L candidate paths are output.

Here, the present application may run multiple SC decoders or multiple CA-SCL (L-smaller) decoders in parallel, and compared with the SC decoding scheme, may obtain better decoding performance, and may also solve the delay problem caused by the CA-SCL (L-larger) decoders needing to sort through excessive metric values.

It can be understood that the value of M does not limit the number of decoders deployed in the actual device, that is, M groups of channel received values may be decoded in parallel by M decoders, or may be decoded by only one decoder executing M times in series. If k is 1, a decoder can be used to perform full parallel decoding.

680, a CRC check is performed on the candidate path.

Illustratively, M candidate paths output by the SC decoder or M × L candidate paths output by the SCL decoder constitute a set of candidate decoding paths, and a CRC check is performed on sequences in the set.

690, determine whether the CRC check passed.

If there is no candidate path that passes the CRC check, step 691 is executed, let t be t +1, and return to step 650. If there is a candidate path for a CRC check, step 692 is performed.

692, outputting the decoding result.

If a candidate path passes CRC check in step 690, the decoder stops decoding and outputs the candidate path as a decoding result; if there are two or more candidate paths that pass the CRC check in step 690, the metric values of the candidate paths that pass the CRC check are calculated, respectively, and the path with the best metric value of the path is output as the decoding result.

Referring to fig. 7, fig. 7 is a diagram of simulation results of the EP-SC algorithm and other algorithms according to the embodiment of the present application. In fig. 7, it is assumed that the code length N of the polar code is 256, the code rate R is 0.5, and the length of the CRC bit sequence is 16.

As can be seen from fig. 7, if the EP-SC algorithm of the embodiment of the present application has the configuration parameters P256, D128, and M8, then when the block error rate (BLER) is 10^-2In comparison with the original SC decoding algorithm, the EP-SC algorithm of the embodiment of the present application has a gain of 0.7 dB. Also, the EP-SC algorithm of the embodiment of the present application shows a gain when the signal-to-noise ratio is greater than 2.5dB, as compared to CA-SCL (L ═ 2), and the gain gradually increases as the signal-to-noise ratio increases.

Referring to fig. 8, fig. 8 is a diagram of simulation results of the EP-SCL algorithm and other algorithms according to the embodiment of the present application.

As can be seen from fig. 8, if the EP-SCL algorithm of the embodiment of the present application has the parameters P-256, D-128, and M-8, then when the BLER is 10^-3When the EP-SCL algorithm of the embodiment of the present application is compared with the original CA-SCL (L ═ 2), the EP-SCL (L ═ 2) has a gain of 0.5 dB. Also, as the signal-to-noise ratio increases, the EP-SCL algorithm of the embodiment of the present application also exhibits a gain as compared to CA-SCL (L ═ 4), and the gain gradually increases.

Therefore, the algorithm for decoding assisted by the error pattern provided by the embodiment of the application can improve the decoding performance of the polar code.

The decoding method of the polar code provided in the present application is explained in detail above, and the decoding apparatus provided in the present application is explained below.

Referring to fig. 9, fig. 9 is a schematic diagram of a decoding apparatus 900 provided in the present application. As shown in fig. 9, the decoding apparatus 900 includes a processing unit 910 and a communication unit 920.

A processing unit 910, configured to obtain P polar code codewords of an information bit sequence; carrying out symbol processing on a first channel receiving value of the polarization code according to the P polarization code words to obtain a second channel receiving value; decoding the second channel receiving value to obtain a plurality of candidate paths;

a communication unit 920, configured to perform cyclic redundancy check, CRC, check on the multiple candidate paths, and output a first candidate path as a decoding result.

Optionally, the processing unit 910 is configured to obtain P polar code words, and includes: performing serial cancellation list SCL decoding on the channel receiving value of the information bit sequence to obtain L candidate paths of the information bit sequence; encoding the L candidate paths to obtain L polarization code words; and selecting the P polarization code words from the L polarization code words, wherein P is smaller than L.

Optionally, the L candidate paths are represented as

The L polarization code words are expressed as

Wherein the L polar code words satisfy the following formula:

wherein the content of the first and second substances,

Optionally, the processing unit 910 is configured to select the P polar code codewords from the L polar code codewords, and includes: and calculating the code weight of each polarization code word of the L polarization code words, and selecting the P polarization code words with the minimum code weight.

Optionally, the processing unit 910 is configured to perform symbol processing on the first channel received value according to the P polar code codewords, to obtain a second channel received value, and includes: calculating the metric value of each polarization code word in the P polarization code words; determining D polarization code words according to the metric values of the P polarization code words, wherein D is less than or equal to P; and performing symbol turnover on the first channel receiving value by using the D polarization code words to obtain a second channel receiving value.

Optionally, D is represented as: d is M k, M belongs to N^*,k∈N^*Said first channel reception value is denoted as Y; the processing unit 910 is configured to perform symbol flipping on the first channel received value by using the D-bar polarization code codeword to obtain a second channel received value, and includes: taking M polarization code words in the D polarization code words

optionally, the communication unit 920 is configured to perform cyclic redundancy check, CRC, check on the multiple candidate paths, and output a first candidate path as a decoding result, and includes: if one path in the plurality of candidate paths passes the CRC check, the first candidate path is the path passing the CRC check; and if two or more paths in the plurality of candidate paths pass the CRC check, the first candidate path is the path with the best path metric value in the paths passing the CRC check.

In one possible design, the above functions of the decoding device 900 may be implemented by hardware, or by hardware executing corresponding software.

As an example, the decoding apparatus 900 may comprise one or more processors configured to execute a computer program stored in a memory, so as to cause the decoding apparatus 900 to perform any one of the method embodiments provided herein.

Optionally, the memory for storing the computer program is located outside the decoding device 900, and the one or more processors are connected with the memory through circuits and/or wires. The memory may be one or more.

Optionally, the decoding apparatus 900 further comprises one or more memories.

Further optionally, the decoding apparatus 900 further comprises one or more communication interfaces.

As some examples, the communication interface or interfaces may be an input-output interface or an output-output circuit, which is not limited in this application.

In another embodiment, the decoding apparatus 900 may also be implemented by hardware.

Referring to fig. 10, fig. 10 is a schematic structural diagram of a decoding apparatus 900 provided in the present application. As shown in fig. 10, the decoding apparatus 900 includes an input interface circuit 901, a logic circuit 902, and an output interface circuit 903.

The input interface circuit 901 is configured to obtain an LLR sequence; a logic circuit 902, configured to perform decoding by using the decoding method of the polarization code provided in the present application; and an output interface circuit 903 for outputting the decoding result.

Alternatively, the decoding apparatus 900 may be a chip or an integrated circuit. For example, the chip may be a System On Chip (SOC), a baseband chip, or the like.

Alternatively, the decoding apparatus 900 may also be a device or a module in the decoding end for implementing channel decoding. Such as a channel decoder or channel decoding circuit, etc.

Fig. 11 is a schematic structural diagram of a decoder 1000 according to an embodiment of the present application. As shown in fig. 11, the decoder 1000 includes: one or more processors 1100, one or more memories 1200, and one or more communication interfaces 1300. The communication interface 1300 is configured to obtain an LLR sequence, the memory 1200 is configured to store a computer program, and the processor 1100 is configured to call and run the computer program from the memory 1200, so that the decoder 1000 completes decoding of the LLR sequence by using the decoding method of the polarization code provided in this application.

Further, the communication interface 1300 is also used for outputting the decoding result.

In addition, the decoding apparatus 900 shown in fig. 9 may be implemented by the decoder 1000 shown in fig. 11.

For example, the communication unit 930 may be implemented by the communication interface 1300 in fig. 11, the processing unit 910 may be implemented by the processor 1100, and the like.

Alternatively, the memory and processor in an embodiment of the apparatus may be integrated together or may be physically separate units from each other.

In addition, the present application also provides a decoding device, which includes a processor and an interface circuit, the interface circuit is used for receiving computer code or instructions and transmitting the computer code or instructions to the processor, and the processor is used for operating the computer code or instructions to execute the decoding method of the polarization code provided by the present application.

Furthermore, the present application provides a computer-readable storage medium having stored therein a computer program which, when run on a computer, causes the method of decoding a polarization code of the present application to be implemented.

The present application also provides a computer program product comprising computer program code which, when run on a computer, causes the method of decoding a polarization code of the present application to be implemented.

The present application also provides a chip comprising one or more memories and one or more processors. The one or more memories are used for storing a computer program, and the one or more processors are used for calling the computer program from the one or more memories and running the computer program, so that the device provided with the chip executes the decoding method of the polarization code.

The present application further provides a communication device including the decoder 1000.

The decoding end in this context is also the receiving end of signals and/or data. Accordingly, the party transmitting the signal and/or data is the transmitting end. Optionally, the decoding end may be a network device (e.g., a gbb of 5G) in the communication system, or may be a terminal device, and the scheme of the present application is not limited.

In the above embodiments, the processor may be a Central Processing Unit (CPU), a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, a microprocessor, one or more integrated circuits for controlling the execution of the program according to the present disclosure, and so on. For example, a processor may be comprised of a digital signal processor device, a microprocessor device, an analog to digital converter, a digital to analog converter, and so forth. The processor may distribute the control and signal processing functions of the mobile device among the devices according to their respective functions. Further, the processor may include functionality to operate one or more software programs, which may be stored in the memory. The functions of the processor can be realized by hardware, and can also be realized by hardware executing corresponding software. The hardware or software includes one or more units corresponding to the above functions.

The memory may be a read-only memory (ROM) or other type of static storage device that may store static information and instructions, a Random Access Memory (RAM) or other type of dynamic storage device that may store information and instructions, an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disk storage, optical disk storage (including compact disc, laser disc, optical disc, digital versatile disc, blu-ray disc, etc.), magnetic disk storage media or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer.

As used in this specification, the terms "component," "module," "system," and the like are intended to refer to a computer-related entity, either hardware, firmware, a combination of hardware and software, or software in execution. For example, a component may be a process running on a processor, an object, an executable, a thread of execution, a program, and/or a computer. Both an application running on a computing device and the computing device can be a component. One or more components may reside within a process and/or thread of execution. A component may be located on one computer and/or distributed between two or more computers. In addition, these components can execute from various computer readable media having various data structures stored thereon. The components may communicate by way of local and/or remote processes based on a signal having one or more data packets (e.g., data from two components interacting with another component in a local system, distributed system, and/or across a network, such as the internet with other systems by way of the signal).

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware, depending on the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

In the several embodiments provided in the present application, the disclosed system, apparatus and method can be implemented in other ways. For example, the above-described apparatus embodiments are also merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions when actually implementing, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not implemented. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the elements can be selected according to actual needs to achieve the purpose of the embodiments of the present application.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A method for decoding a polar code, comprising:

acquiring P polarization code words of an information bit sequence;

carrying out symbol processing on a first channel receiving value of the polarization code according to the P polarization code words to obtain a second channel receiving value;

decoding the second channel receiving value to obtain a plurality of candidate paths;

and performing Cyclic Redundancy Check (CRC) check on the plurality of candidate paths, and outputting a first candidate path as a decoding result.

2. The method of claim 1, wherein the obtaining P polar code words comprises:

performing serial cancellation list SCL decoding on the received value of the information bit sequence to obtain L candidate paths of the information bit sequence;

encoding the L candidate paths to obtain L polarization code words;

and selecting the P polarization code words from the L polarization code words, wherein P is smaller than L.

3. The method of claim 2, wherein the L candidate paths are represented as

Said LThe code word of the strip-polar code is expressed as

Wherein the L polar code words satisfy the following formula:

wherein the content of the first and second substances,

4. The method according to claim 2 or 3, wherein said selecting the P polarization code words from the L polarization code words comprises:

5. The method according to any one of claims 1 to 4, wherein the performing symbol processing on the first channel received value according to the P polar code words to obtain a second channel received value comprises:

calculating the metric value of each polarization code word in the P polarization code words;

determining D polarization code words according to the metric values of the P polarization code words, wherein D is less than or equal to P;

and performing symbol turnover on the first channel receiving value by using the D polarization code words to obtain a second channel receiving value.

6. The method of claim 5, wherein D is represented as: d is M k, M belongs to N^*,k∈N^*Said first channel reception value is denoted as Y;

wherein, the performing symbol flipping on the first channel received value by using the D-pieces of polarization code codeword to obtain a second channel received value includes:

taking M polarization code words in the D polarization code words

7. the method according to any one of claims 1 to 6, wherein performing Cyclic Redundancy Check (CRC) check on the plurality of candidate paths and outputting a first candidate path as a decoding result comprises:

if one path in the plurality of candidate paths passes the CRC check, the first candidate path is the path passing the CRC check;

and if two or more paths in the plurality of candidate paths pass the CRC check, the first candidate path is the path with the best path metric value in the paths passing the CRC check.

8. A decoding apparatus, comprising:

the processing unit is used for acquiring P polarized code words of the information bit sequence; carrying out symbol processing on a first channel receiving value of the polarization code according to the P polarization code words to obtain a second channel receiving value; decoding the second channel receiving value to obtain a plurality of candidate paths;

and the communication unit is used for carrying out Cyclic Redundancy Check (CRC) check on the plurality of candidate paths and outputting a first candidate path as a decoding result.

9. The decoding device according to claim 8, wherein the processing unit is configured to obtain P polar code words, and includes:

encoding the L candidate paths to obtain L polarization code words;

10. The decoding apparatus according to claim 9, wherein the L candidate paths are represented as

The L polarization code words are expressed as

Wherein the L polar code words satisfy the following formula:

wherein the content of the first and second substances,

11. The decoding device according to claim 9 or 10, wherein the processing unit is configured to select the P polar code words from the L polar code words, and includes:

12. The decoding device according to any one of claims 8 to 11, wherein the processing unit is configured to perform symbol processing on a first channel received value according to the P polar code words to obtain a second channel received value, and includes:

13. The coding device of claim 12, wherein D is represented as: d is M k, M belongs to N^*,k∈N^*Said first channel reception value is denoted as Y;

wherein, the processing unit is configured to perform symbol flipping on the first channel received value by using the D-pieces of polar code codewords to obtain a second channel received value, and includes:

taking M polarization code words in the D polarization code words

14. the decoding device according to any one of claims 8 to 13, wherein the communication unit is configured to perform cyclic redundancy check, CRC, check on the plurality of candidate paths and output a first candidate path as a decoding result, and includes:

15. A decoding apparatus, comprising at least one processor coupled with at least one memory, the at least one processor being configured to execute a computer program or instructions stored in the at least one memory to cause the decoding apparatus to perform the method of any one of claims 1-7.

16. A decoding device comprising a processor and interface circuitry for receiving computer code or instructions and transmitting the computer code or instructions to the processor, the processor being configured to execute the computer code or instructions to perform the method of any of claims 1-7.

17. A computer-readable storage medium, characterized by comprising a computer program which, when run on a computer, implements the method of any of claims 1-7.