CN113471649B

CN113471649B - Filter

Info

Publication number: CN113471649B
Application number: CN202010237895.6A
Authority: CN
Inventors: 余俊璋
Original assignee: Industrial Technology Research Institute ITRI
Current assignee: Industrial Technology Research Institute ITRI
Priority date: 2020-03-30
Filing date: 2020-03-30
Publication date: 2022-07-12
Anticipated expiration: 2040-03-30
Also published as: CN113471649A

Abstract

The invention discloses a filter, which comprises a dielectric substrate, a grounding layer, a circuit layer, a signal path and a grounding path. The dielectric substrate is arranged between the grounding layer and the circuit layer. The circuit layer comprises at least three microstrip line resonant elements, a common electrode, an input terminal and an output terminal. The input end point and the output end point are respectively connected with the microstrip line resonance element. The microstrip line resonant element extends outwards from the common electrode. The signal terminals of the ground layer are connected to the input terminal and the output terminal via signal paths, respectively. The ground plane of the ground layer is connected to the common electrode via a ground via. The filter also comprises a capacitive coupling unit which is electrically coupled between two adjacent microstrip line resonant elements.

Description

Filter

Technical Field

The present invention relates to a filter, and more particularly, to a filter using microstrip (microstrip) technology.

Background

As the functions of mobile terminals such as smart phones become more and more powerful, and the network Frequency bands to be applied to the mobile terminals become more and more, the performance of a Radio Frequency Front End Module (RFFEM), which is a core device of a communication system, directly determines important performance indexes such as a communication mode, received signal strength, call stability, and transmission power that can be supported by the mobile terminals.

In general, a high-end smart phone must filter transmission/reception paths of up to several tens of bands, and also filter reception paths such as Wi-Fi and bluetooth. In addition to the need to isolate the signals of each receiving path, it is also necessary to suppress other external signals which are frequently present and difficult to be performed. For this purpose, a multiband handset usually requires several filters (filters), which are otherwise difficult to implement. With the trend of miniaturization, how to miniaturize such a multi-component communication system is also one of the important items of research in the related art.

The filter is a device for filtering waves, and can be a filter circuit consisting of a capacitor, an inductor and a resistor, so as to effectively remove the frequency point of a specific frequency in a power line or frequencies except the frequency point, namely, the filter can be used for filtering various noise signals to obtain a power signal of the specific frequency or eliminate the power signal of the specific frequency. In the field of Long Term Evolution (LTE), filters such as Surface Acoustic wave (saw) filters and Bulk Acoustic Wave (BAWF) filters have the characteristics of narrow bandwidth, high rejection, low loss, etc. therefore, the filters are widely used.

However, in applications with higher frequencies, surface acoustic wave filters and bulk acoustic wave filters have problems such as increased passband (pass band) loss and reduced stopband (stop band) suppression. The data indicate that the currently used surface acoustic Wave filters and bulk acoustic Wave filters can no longer meet the requirements of high-band communication technology in the Millimeter Wave (mmWave) band. Therefore, in order to meet the coming of the 5G era, it is difficult for the rf front-end module of the future mobile phone to continue filtering by using the existing saw filter and bulk acoustic wave filter.

Disclosure of Invention

In view of the above, the present invention provides an innovative filter, which adopts a thick-film integrated filter in which a thin-film metal layer of a microstrip line is disposed on a thick film of a Low-Temperature Co-fired Ceramic (LTCC) technology, and has the effects of Low loss, excellent stopband suppression, and the like when applied in a millimeter wave frequency band.

According to an embodiment of the present invention, a filter includes a dielectric substrate, a ground layer, a circuit layer, two signal paths, and a plurality of ground paths. The grounding layer is formed on the surface of the dielectric substrate and is provided with a grounding plane and two signal terminals. The circuit layer is located on the other surface of the dielectric substrate and comprises at least three microstrip line resonant elements, a common electrode, an input terminal and an output terminal. The input end point and the output end point are respectively connected with two of the microstrip line resonance elements. The microstrip line resonant element extends outwards from the common electrode. The signal path and the ground path extend to the ground layer, the dielectric substrate and the circuit layer. The signal terminals are respectively connected with the input terminal and the output terminal through signal paths. The ground plane is connected to the common electrode via a ground path. The filter also comprises a capacitive coupling unit which is electrically coupled with two adjacent microstrip line resonant elements.

In the filter disclosed in the foregoing embodiment of the present invention, since the capacitive coupling unit can be electrically coupled to the adjacent microstrip line resonant element, the filter of the present embodiment has an obvious high-pass band rejection effect in the application of the millimeter wave frequency band, and compared with the conventional Surface Acoustic Wave Filter (SAWF) and Bulk Acoustic Wave Filter (BAWF), the filter of the present embodiment is more suitable for higher frequency application.

The foregoing description of the disclosed embodiments and the following description are presented to illustrate and explain the principles and spirit of the invention and to provide further explanation of the invention as claimed.

Drawings

FIG. 1 is a perspective view of a filter according to an embodiment of the present invention;

FIG. 2 is a schematic partial side cross-sectional view of the filter of FIG. 1 taken along line 2-2;

FIG. 3 is an enlarged, partial top view of the filter of FIG. 1;

FIG. 4 is a graph comparing frequency responses (frequency responses) of the filter of FIG. 1 and a filter with the capacitive coupling unit removed;

FIG. 5 is a graph of the frequency response of the filter of FIG. 1;

FIG. 6 is a diagram of the line transmission loss comparison between the thick film integration process and the pure film process;

fig. 7 is a perspective view of a filter according to another embodiment of the invention.

Description of the symbols

1. 1' filter

10 ground plane

20 dielectric substrate

30. 30' flat layer

40 line layer

50. 50' capacitive coupling unit

70 dielectric layer Stack

80 ground plane

110 ground plane

130 signal end point

210 conductive vias

230 conductive via

310 conductive via

330 conductive via

410 common connection electrode

430 microstrip line resonance element

450 input endpoint

470 output endpoint

510 first finger structure

520 second finger-like structure

710 conductive via

730 conductive via

810 ground plane

830 signal endpoint

G pitch

GV ground path

L1, L2 Length

SV Signal pathway

Width W

Detailed Description

The detailed features and advantages of the present invention are described in detail in the following embodiments, which are sufficient for any person skilled in the art to understand the technical content of the present invention and to implement the same, and the objects and advantages related to the present invention can be easily understood by any person skilled in the art according to the disclosure of the present specification, the claims and the accompanying drawings. The following examples are intended to further illustrate aspects of the present invention in detail, but are not intended to limit the scope of the present invention in any way.

In addition, the embodiments of the present invention will be described with reference to the accompanying drawings, and for the purpose of clarity, many practical details will be set forth in the following description. It should be understood, however, that these implementation details are not intended to limit the invention.

Also, some conventional structures and elements may be schematically shown in the drawings for the purpose of neatness. In addition, some features of the drawings may be slightly enlarged or changed in scale or size for the purpose of facilitating understanding and viewing of the technical features of the present invention, but this is not intended to limit the present invention. The actual dimensions and specifications of the product manufactured according to the teachings of the present invention may be adjusted according to manufacturing requirements, the nature of the product, and the teachings of the present invention as disclosed below.

Furthermore, the terms "end," "section," "portion," "region," "section," and the like may be used hereinafter to describe a particular feature or feature in or on a particular element or structure, but these elements and structures are not limited by these terms. The term "and/or" may also be used hereinafter to refer to a combination including one or all of the associated listed elements or structures. The terms "substantially", "about" or "approximately" may also be used hereinafter in connection with ranges of dimensions, concentrations, temperatures or other physical or chemical properties or characteristics, and are intended to cover deviations that may exist in the upper and/or lower limits of the ranges of properties or characteristics, or that represent acceptable deviations from manufacturing tolerances or from analytical procedures, which still achieve the desired results.

Furthermore, unless otherwise defined, all terms or phrases used herein, including technical and scientific terms and terms, include their ordinary meanings and meanings as understood by those skilled in the art. Furthermore, the definitions of the above-mentioned words or terms should be construed in this specification to include meanings consistent with the technical fields related to the present invention. Unless specifically defined, these terms and phrases are not to be construed in an idealized or formal sense unless expressly so defined.

First, referring to fig. 1 to 3, fig. 1 is a perspective view of a filter 1 according to an embodiment of the present invention, fig. 2 is a partial side sectional view of the filter of fig. 1 along 2-2, and fig. 3 is a partial enlarged top view of the filter of fig. 1, it should be noted that in this or subsequent drawings, the proportions and sizes of elements in the filter may be adjusted to facilitate understanding, but the present invention is not limited thereto, and in order to simplify the drawings, fig. 3 may only show some of the elements.

As shown in the figure, the filter 1 of the present embodiment at least includes a ground layer (ground layer)10, a dielectric substrate (dielectric substrate)20, a flat layer (flat layer)30, a circuit layer 40 and at least one capacitive coupling unit (capacitive coupling unit) 50. In addition, the filter 1 of the present embodiment may further include a dielectric layer stack (dielectric layer) 70 and a ground layer 80. The arrangement of the foregoing elements will be described below.

The ground layer 80 is made of a suitable metal material, but the invention is not limited thereto, and in the embodiment, the ground layer 80 includes a ground plane 810 and two signal terminals 830.

The dielectric layer stack 70 is formed on the ground layer 80, the dielectric layer stack 70 is made of, for example, a Ceramic material, and is formed by stacking a plurality of Ceramic substrates with the same or different thicknesses by using a Low-Temperature Co-fired Ceramic (LTCC) technology, for example, a dielectric constant (dielectric coefficient) of the dielectric layer stack may be, for example, about 3 to 20, and may be, for example, greater than 5.

In addition, the thickness of the dielectric layer stack 70 may be adjusted according to the overall structural strength or height, the installation environment or other practical requirements, and the invention is not limited thereto. In addition, a plurality of conductive vias (710) and two conductive vias 730 may be formed through the dielectric layer stack 70, wherein the conductive vias 710 are connected to the ground plane 810 of the ground layer 80, and the conductive vias 730 are respectively connected to the signal terminals 830 of the ground layer 80.

The ground layer 10 is formed on the other surface of the dielectric layer stack 70 opposite to the ground layer 80. The structure of the ground layer 10 may be, but is not limited to, the same as or similar to the ground layer 80, and is made of a suitable metal material. In the present embodiment, the ground layer 10 includes a ground plane 110 and two signal terminals 130, wherein the ground plane 110 is connected to the conductive vias 710 of the dielectric layer stack 70, and the signal terminals 130 are respectively connected to the conductive vias 730 of the dielectric layer stack 70.

The dielectric substrate 20 is formed on the other surface of the ground layer 10 opposite to the dielectric layer stack 70. Similar to the dielectric layer stack 70, the dielectric substrate 20 is made by using low temperature co-fired ceramic technology, for example, and has a dielectric constant of about 5 to 20, for example, greater than 5.

Furthermore, the thickness of the dielectric substrate 20 is not particularly limited in design, and mainly meets the requirement of miniaturization operation, for example, the dielectric substrate 20 can be made of a single layer of green material with the minimum thickness achieved by the current LTCC technology, and therefore, as shown in the figure, the thickness of the dielectric substrate 20 is at least significantly smaller than the thickness of the dielectric layer stack 70, for example, the thickness of the dielectric substrate 20 can be smaller than 150 μm, for example, 125 μm, but the invention is not limited thereto.

In addition, a plurality of conductive vias 210 and two conductive vias 230 may be formed through the dielectric substrate 20, wherein the conductive vias 210 are connected to the ground plane 110 of the ground layer 10, and the conductive vias 230 are respectively connected to the signal terminals 130 of the ground layer 10.

The flat layer 30 is formed on the other surface of the dielectric substrate 20 opposite to the ground layer 10, in other words, the dielectric substrate 20 is between the flat layer 30 and the ground layer 10. The planarization layer 30 is made of a different material than the dielectric substrate 20, and the planarization layer 30 is made of, for example, Epoxy (Epoxy), Polyimide (PI), or glass, such as Epoxy or Polyimide with photo-development function.

In addition, the thickness of the planarization layer 30 can be, for example, about 3 to 20 μm in design, which can effectively fill up the micro holes on the dielectric substrate 20 due to the manufacturing process, thereby forming a plane with high flatness (flatness) on the dielectric substrate 20. In addition, a plurality of conductive vias 310 and two conductive vias 330 can be formed through the planarization layer 30, wherein the conductive vias 310 are connected to the conductive vias 210 of the dielectric substrate 20, and the conductive vias 330 are respectively connected to the conductive vias 230 of the dielectric substrate 20.

The circuit layer 40 is formed on the other surface of the planarization layer 30 opposite to the dielectric substrate 20, in other words, the planarization layer 30 is interposed between the circuit layer 40 and the dielectric substrate 20. Since the surface of the planarization layer 30 has high flatness, the circuit layer 40 can be formed on the planarization layer 30 by photolithography (photolithography) Process, and thus can have a thickness of only about 15 μm. Moreover, the high flatness of the planarization layer 30 can firmly adhere the circuit layer 40 thereon, and the metal roughness of the circuit layer 40 under the photolithography process is low, so that the bottom and the surface of the circuit layer 40 can be maintained at a high flatness, thereby having the effect of reducing the loss of the pass band (passband).

In contrast, in the case of the planarization layer 30, if the circuit layer is to be directly formed on the dielectric substrate 20, the holes and the rough surface of the dielectric substrate 20 make it difficult for the circuit layer to be adhered thereon by the photolithography process, and the circuit layer can only be formed on the dielectric substrate 20 by the grid printing method, so that the flatness of the circuit layer as a whole is reduced and the roughness is increased, resulting in an increase in the loss of the pass band; further, when the wiring layer is directly formed on the dielectric substrate 20, the wiring layer is easily dissociated and diffused into the minute holes of the dielectric substrate 20, and thus the wiring layer cannot be formed into a desired shape with certainty.

In addition, in this configuration, as shown in the figure, the circuit layer 40 and the planarization layer 30 are relatively thin layer structures, and thus can be regarded as a thin film (layer) structure relative to other relatively thick layer structures (i.e., the dielectric substrate 20 and the dielectric layer stack 70), and the whole relatively thick layer structure can be regarded as a thick film (layer) structure relative to the thin film structure. That is, the filter 1 of the present embodiment is a thick-film (layer) integrated laminated structure. Even if only the portion above the ground layer 10 is viewed, the circuit layer 40 and the planar layer 30 can still be regarded as a thin film (layer) structure relative to the dielectric substrate 20, and the dielectric substrate 20 can be regarded as a thick film (layer) structure relative to the circuit layer 40 and the planar layer 30, i.e. can also be regarded as a thick film (layer) integrated laminated structure.

Next, referring to the circuit layer 40, in the present embodiment, the circuit layer 40 includes a common electrode 410, at least three microstrip line resonators (microstrip resonators) 430, an input terminal 450 and an output terminal 470. The common electrode 410 is connected to the conductive via 310 of the planar layer 30, and the input terminal 450 and the output terminal 470 are respectively connected to two of the microstrip resonant elements 430 and respectively connected to the conductive via 330 of the planar layer 30. Here, as shown in the figure, in the present embodiment, the common electrode 410 of the circuit layer 40, the conductive via 310 of the planar layer 30, the conductive via 210 of the dielectric substrate 20, the ground plane 110 of the ground layer 10, the conductive via 710 of the dielectric layer stack 70, and the ground plane 810 of the ground layer 80 together form a plurality of ground vias GV in the filter 1, so that the common electrode 410 of the circuit layer 40 can be grounded to the ground plane 810 of the ground layer 80 via the ground vias GV; the input terminal 450 and the output terminal 470 of the circuit layer 40, the conductive via 330 of the planarization layer 30, the conductive via 230 of the dielectric substrate 20, the signal terminal 130 of the ground layer 10, the conductive via 730 of the dielectric layer stack 70, and the signal terminal 830 of the ground layer 80 together form two signal paths SV in the filter 1, so that the input terminal 450 and the output terminal 470 of the circuit layer 40 can be communicatively connected to the signal terminal 830 of the ground layer 80 via the signal paths SV.

The microstrip line resonant elements 430 are connected to the common electrode 410, extend outward from the common electrode 410, and have one end open, and the microstrip line resonant elements 430 are arranged in parallel at intervals to form a comb (combline) configuration.

In this case, the thickness of the dielectric substrate 20 under the circuit layer 40 can be designed to be a thinner layer structure, so that the microstrip line resonant element 430 of the circuit layer 40 can be kept relatively small and spaced apart by a distance sufficient for signal transmission. In addition, due to the high dielectric constant of the dielectric substrate 20, the microstrip line resonant element 430 can achieve the desired resonant effect with a short length and a thick film (layer) integrated stack structure of the circuit layer 40. Therefore, by using the dielectric substrate 20 with a relatively thin thickness and a high dielectric constant, the microstrip line resonant element 430 of the circuit layer 40 can have a shorter length and a shorter pitch, thereby contributing to the requirement of reducing the overall size and achieving miniaturization.

In the present embodiment, the capacitive coupling unit 50 is electrically coupled to two adjacent microstrip line resonant elements 430. Specifically, the capacitive coupling unit 50 includes a plurality of first fingers 510 and a plurality of second fingers 520, the first fingers 510 extend from one microstrip line resonator 430 to another adjacent microstrip line resonator 430, and are spaced and arranged in parallel, and the second fingers 520 correspondingly extend from the another microstrip line resonator 430 to the microstrip line resonator 430 where the first fingers 510 are located, and are spaced and arranged in parallel, as shown in the figure, the first fingers 510 and the second fingers 520 are alternately arranged between two adjacent microstrip line resonators 430 to form a finger-type (interdigital) capacitor. In the present embodiment, the first finger 510, the second finger 520 and the microstrip line resonant element 430 are all formed on the surface of the planarization layer 30 opposite to the dielectric substrate 20, and in short, in the present embodiment, the capacitive coupling element 50 and the circuit layer 40 are formed on the same plane, so that they can be regarded as the same layer structure.

In design, the width W of each of the first finger 510 and the second finger 520 is at least about less than 50 μm, such as about 10 μm, and the distance G between the first finger 510 and the second finger 520 is at least about less than 50 μm, such as about 10 μm; thus, it is ensured that the first finger 510 and the second finger 520 can generate capacitive coupling between the adjacent microstrip line resonant elements 430.

Next, referring to fig. 4, fig. 4 is a graph comparing frequency responses (frequency responses) of the filter 1 and the filter with the capacitive coupling unit 50 removed, wherein a solid line is the response characteristic of the filter 1 with the capacitive coupling unit 50, and a dashed line is the response characteristic after the capacitive coupling unit 50 is removed from the filter 1. It can be known that, by the electrical coupling effect of the capacitive coupling unit 50, an obvious transmission zero (transmission zero), i.e., an obvious characteristic of improving the stopband (stop) suppression, can be generated in the application field of the millimeter wave frequency band.

In addition, as shown in the figure, in the present embodiment or other embodiments, the length L1 (for example, the length from the root of the common electrode 410 to the end of the microstrip line resonant element 430 where the microstrip line resonant element 430 is connected to) of two adjacent microstrip line resonant elements 430 where the capacitive coupling unit 50 is disposed is at least shorter than the length L2 of the other microstrip line resonant elements 430. This configuration may improve the performance of the passband of the filter 1.

Here, referring to fig. 5, fig. 5 is a frequency response diagram of the filter 1, in which a curve S11 indicates a reflection loss (return loss), a curve S21 indicates an insertion loss (insertion loss), and a solid line portion indicates the microstrip line resonant element 430 having a configuration in which the length L1 is shorter than the length L2, and a dashed line portion indicates the microstrip line resonant element 430 having a configuration in which the length L1 is equal to the length L2. It can be seen that the configuration with the length L1 shorter than the length L2 helps to improve the performance of the pass-band curves S11 and S21.

However, it should be noted that the lengths of two adjacent microstrip line resonant elements 430 in which the capacitive coupling unit 50 is disposed may be the same or different, and the invention is not limited thereto.

Next, referring to fig. 6, fig. 6 is a graph comparing transmission loss of the line using the thick film process and the transmission loss of the line using the conventional pure thick film process, in which the solid line is a transmission loss curve of the thick film process, the line can be disposed on the flat layer 30 as the filter 1, and the dotted line is a pure thick film process without the flat layer 30, so that the line can be formed on the dielectric substrate only by grid printing. In comparison, the arrangement of the planarization layer 30 and the thin film process can maintain the bottom and the surface of the circuit layer 40 to be highly smooth, thereby achieving a lower transmission loss of the circuit.

In the foregoing embodiment, the capacitive coupling unit 50 and the microstrip line resonant element 430 are located on the same plane, but the invention is not limited thereto. For example, please refer to fig. 7, which is a schematic perspective view of a filter 1 'according to another embodiment of the present invention, a main difference between the filter 1' and the filter 1 of the foregoing embodiment is only the position of the capacitive coupling unit, so that only differences will be described below, and similar or identical portions can be understood from relevant paragraphs of the foregoing embodiment and are not repeated herein.

In the present embodiment, the capacitive coupling unit 50 'of the filter 1' is a single-layer capacitor structure disposed on a different plane from the circuit layer 40. Specifically, in the present embodiment, another planarization layer 30 'is additionally formed on the circuit layer 40, and the composition of the planarization layer 30' is substantially the same as that of the planarization layer 30, so the details thereof will not be repeated. Then, a single-layer capacitor, i.e., the capacitive coupling unit 50 ' shown in the figure, can be formed on the planarization layer 30 ' by using a metal plating method, so that the planarization layer 30 ' is interposed between the circuit layer 40 and the capacitive coupling unit 50 ', and in this position, the capacitive coupling unit 50 ' can cross over two adjacent microstrip line resonant elements 430 of the circuit layer 40. Here, "cross over" means that the capacitive coupling unit 50 'overlaps at least the electrically coupled microstrip line resonator 430 when viewed from the top of the filter 1'. As a result of experiments, the configuration can also achieve the electrical coupling of two adjacent microstrip line resonant elements 430, so as to equivalently achieve the above-mentioned high stopband suppression effect. Similarly, in the present embodiment, the length of two microstrip line resonant elements 430 on which the capacitive coupling unit 50 'spans is shorter than the length of the other microstrip line resonant elements 430 which are not spanned by the capacitive coupling unit 50'.

In addition to the foregoing embodiments, it is supplementary to explain here that, in the present invention, only a single capacitive coupling unit may be provided on the filter, but not limited thereto. For example, in other embodiments, the filter may also include a plurality of capacitive coupling units according to actual requirements, and the capacitive coupling units may be selectively disposed between consecutive adjacent microstrip line resonant elements or between a plurality of pairs of adjacent microstrip line resonant elements. In addition, as long as the effect of capacitively coupling the adjacent microstrip line resonant elements can be achieved, the number, shape and relative position of the first finger structure and the second finger structure of the capacitive coupling unit on the microstrip line resonant element can be adjusted according to practical requirements (such as the position of the transmission zero point), and the like, which is not limited by the invention. In addition, the number of the microstrip line resonant elements may also be increased or decreased according to actual requirements, for example, the number of the microstrip line resonant elements is only three or more, and the invention is not limited thereto.

In summary, in the filter disclosed in the foregoing embodiments of the present invention, since the capacitive coupling unit can be electrically coupled to the adjacent microstrip line resonant element, the filter of the present invention has an obvious high-pass band rejection property in the application of the millimeter wave frequency band, and is more suitable for the application in the higher frequency domain than the conventional Surface Acoustic Wave Filter (SAWF) and Bulk Acoustic Wave Filter (BAWF).

In addition, because the filter of the invention has the flat layer, can make the circuit layer set up in a high planeness level, except can promote the adhesion strength of the circuit layer, can also make the circuit layer form with the yellow light development manufacturing process, make the whole level and more promote, thus help to reduce the loss of transmission.

In addition, the microstrip line resonant elements of the filter of the invention have short length and small pitch, thereby being beneficial to reducing the whole size and meeting the requirement of miniaturization.

Claims

1. A filter, comprising:

a dielectric substrate;

the grounding layer is formed on one surface of the dielectric substrate and is provided with a grounding plane and two signal terminals;

a circuit layer located on the other surface of the dielectric substrate and including at least three microstrip line resonant elements, a common electrode, an input end point and an output end point, wherein the input end point and the output end point are respectively connected to two of the at least three microstrip line resonant elements, and the at least three microstrip line resonant elements extend outwards from the common electrode; and

two signal paths and a plurality of grounding paths extending from the grounding layer, the dielectric substrate and the circuit layer, wherein the signal terminals are respectively connected with the input terminal and the output terminal through the signal paths, and the grounding plane is connected with the common electrode through the grounding paths;

wherein the filter further comprises at least one capacitive coupling unit electrically coupled to two adjacent microstrip line resonant elements,

wherein the length of two of the at least three microstrip line resonant elements connected to the at least one capacitive coupling unit is shorter than the length of the other of the at least three microstrip line resonant elements not connected to the at least one capacitive coupling unit.

2. The filter according to claim 1, wherein the at least one capacitive coupling unit is disposed between two adjacent microstrip line resonant elements.

3. The filter of claim 1, further comprising a planarization layer formed between the dielectric substrate and the wiring layer, the signal vias and the ground vias penetrating the planarization layer, the planarization layer being formed of a different material than the dielectric substrate.

4. The filter of claim 3, wherein the planarization layer comprises epoxy, polyimide, or glass.

5. The filter of claim 1, wherein the at least one capacitive coupling unit comprises a plurality of first fingers and a plurality of second fingers, the first fingers and the second fingers being interleaved to form an interdigitated structure.

6. The filter of claim 5, wherein the first fingers are spaced from the second fingers by less than 50 μm.

7. The filter of claim 5, wherein each of the first fingers and each of the second fingers has a width of less than 50 μm.

8. The filter of claim 5, wherein the first fingers are integrally formed on one of the at least three microstrip line resonant elements, the second fingers are integrally formed on the other of the at least three microstrip line resonant elements, and the first fingers, the second fingers and the at least three microstrip line resonant elements are all located on the same plane.

9. The filter of claim 1, comprising another planarization layer interposed between the circuit layer and the at least one capacitive coupling unit, wherein the at least one capacitive coupling unit crosses over two adjacent microstrip line resonator elements.

10. The filter of claim 9, wherein the length of two of the at least three microstrip line resonant elements that are crossed by the at least one capacitive coupling unit is shorter than the length of the other of the at least three microstrip line resonant elements that are not crossed by the at least one capacitive coupling unit.

11. The filter of claim 1, wherein the wiring layer is electrically coupled to only a single capacitive coupling element.