CN113452334A - Quick response automatic gain control method for trans-impedance amplifier - Google Patents
Quick response automatic gain control method for trans-impedance amplifier Download PDFInfo
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- CN113452334A CN113452334A CN202110785470.3A CN202110785470A CN113452334A CN 113452334 A CN113452334 A CN 113452334A CN 202110785470 A CN202110785470 A CN 202110785470A CN 113452334 A CN113452334 A CN 113452334A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
- H03G3/20—Automatic control
- H03G3/30—Automatic control in amplifiers having semiconductor devices
- H03G3/3084—Automatic control in amplifiers having semiconductor devices in receivers or transmitters for electromagnetic waves other than radiowaves, e.g. lightwaves
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Abstract
The invention discloses a quick response automatic gain control method for a trans-impedance amplifier, which comprises the following steps: A. detecting the output amplitude of the transimpedance amplifier; B. comparing the output amplitude with a reference signal representing an amplitude threshold; if the output amplitude is smaller than the threshold value, the parallel connection of the active resistor and the passive resistor is disconnected, so that the transimpedance gain of the transimpedance amplifier is equal to the resistance value of the passive resistor; if the output amplitude is larger than the threshold value, the active resistor and the passive resistor are connected in parallel, so that the transimpedance gain of the transimpedance amplifier is equal to the parallel resistance value of the passive resistor and the active resistor; the active resistor is an NMOS transistor, and when the active resistor is connected with the passive resistor in parallel, the grid voltage of the active resistor is direct-current bias voltage. The automatic gain control method can quickly respond to the change of the input optical power to establish a stable state, can be used for a burst mode, and can provide a larger transimpedance gain adjustment range, thereby widening the dynamic range of the transimpedance amplifier.
Description
Technical Field
The invention relates to the technical field of transimpedance amplifiers, in particular to a quick response automatic gain control method for a transimpedance amplifier.
Background
In an optical fiber communication system, a Trans-Impedance Amplifier (TIA) is located at the foremost end of a receiving link, and functions to convert and amplify a weak photocurrent signal generated by a photodiode into a voltage signal, and output the voltage signal to a subsequent circuit for processing. The performance of the TIA greatly affects the performance of the entire receive chain.
The input dynamic range is an important indicator of TIA, and is defined as the ratio of the saturated input optical power to the receiving optical sensitivity, i.e. the ratio of the maximum input optical power to the minimum input optical power within a certain allowable error rate range. The sensitivity is mainly determined by noise performance, the smaller the equivalent input noise of TIA is, the better the sensitivity is, and the larger transimpedance gain is adopted in general to be beneficial to reducing the equivalent input noise; the saturation input optical power is mainly determined by factors such as the distortion degree of the output signal, and the larger the transimpedance, the more saturation is likely to occur in the case of a large signal.
In order to solve this contradiction, an Automatic Gain Control (AGC) circuit is usually added to the TIA, that is, the transimpedance Gain is adjusted according to the magnitude of the input optical power, a larger transimpedance is maintained when the input optical power is smaller, and the transimpedance is reduced when the input optical power is larger, so as to improve the distortion of the output voltage signal, thereby widening the dynamic range of the TIA.
AGC typically involves two functions, amplitude detection and gain adjustment. Because the TIA is a single-end input single-end output amplifier, the direct current component and the alternating current component in the input current are amplified in proportion, and the change of the input current amplitude can be reflected by monitoring the change of the direct current component of the output voltage. A conventional AGC usually uses a low-pass filter to obtain an average value Vout, avg of TIA output voltage in a time domain, as shown in fig. 1, a TIA replica circuit with an input current of 0 is used to generate a reference voltage, and an error amplifier is used to amplify an error between the average value of TIA output voltage and the reference voltage, so as to implement an amplitude detection function. The gain adjustment function is realized by connecting an NMOS (N-channel metal oxide semiconductor) serving as an active resistor in parallel with a passive resistor and controlling the grid electrode of the NMOS by adopting the output voltage of an error amplifier. When the input optical power is increased, the average value of the TIA output voltage is reduced, the output voltage of the error amplifier is increased, and the active resistance provided by the NMOS is reduced, so that the trans-impedance gain is reduced.
In the above AGC method, the cutoff frequency ω of the RC low-pass filterLPFThe bandwidth and response time of the AGC loop are determined by 1/(RC). On the one hand, if ω isLPFThe low-frequency alternating current component in the data signal is not attenuated by the low-pass filter and is superposed on Vout and avg, so that the transimpedance cannot be kept stable, and the output signal is jittered; on the other hand, a large RC determines that the AGC loop requires a long convergence time to establish a steady state. In the continuous communication mode, the low frequency cut-off frequency of the AGC loop is typically set at several tens of kHz, meaning that several tens of us of time is required for the AGC loop to re-stabilize when the input optical power changes.
In an Optical Line Terminal (OLT) of a Passive Optical Network (PON) system, a signal processed by a receiving end is in a Burst-Mode (Burst-Mode) Mode, an Optical signal received in each Burst is from a different Optical Network Unit (ONU), and Optical power may be different. According to different communication standards, a burst mode receiving system generally needs to establish a stable operating state within tens of ns to hundreds of ns, which means that a TIA needs a fast AGC response, and thus a conventional AGC loop cannot be applied to a burst mode.
To achieve a fast AGC response, the gate of the NMOS is controlled by generating a dc level Vgate through a bias circuit as shown in fig. 2. When the input optical power is 0 or very small, the voltage difference between Vgate and the output voltage Vout does not reach the threshold voltage Vth of the NMOS, the NMOS is in a cut-off region, and the transconductance of the TIA is determined by the passive resistor; when the input optical power is increased, the current flowing through the passive resistor is increased, the output voltage Vout is reduced, and the gate-source voltage Vgs of the NMOS is increased; when Vgs exceeds Vth, the NMOS is conducted, the NMOS is in a linear region and is equivalent to an active resistor, and transconductance of the TIA is formed by connecting a passive resistor and the active resistor in parallel, so that total transconductance is reduced; the larger the input optical power, the larger the Vgs of the NMOS, and the lower the transconductance gain of the TIA. The method can realize quick response because the on-resistance of the NMOS can change instantly with the grid-source voltage.
In practical applications, however, the output amplitude of the TIA generally needs to be within 0.2V to ensure that no significant signal distortion occurs. At low optical power, Vgate must be biased at the critical point where the NMOS is turned from off to on to switch the NMOS between off and linear regions. On one hand, due to the existence of factors such as temperature variation and process deviation, the accurate setting of the bias voltage has great difficulty. On the other hand, in the whole dynamic range, the overdrive voltage of the NMOS does not exceed 0.2V, and it is difficult to adjust to a sufficiently small transimpedance gain under a large input power, so that it is difficult to realize a large TIA dynamic range.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide a fast response automatic gain control method for a transimpedance amplifier, which can quickly respond to establish a steady state when the input optical power changes, can be used in a burst mode, and can provide a larger transimpedance gain adjustment range, thereby widening the dynamic range of the transimpedance amplifier.
In order to solve the above problem, the present invention provides a fast response automatic gain control method for a transimpedance amplifier, comprising the steps of:
A. detecting the output amplitude of the transimpedance amplifier;
B. comparing the output amplitude with a reference signal representing an amplitude threshold; if the output amplitude is smaller than the threshold value, the parallel connection of the active resistor and the passive resistor is disconnected, so that the transimpedance gain of the transimpedance amplifier is equal to the resistance value of the passive resistor; if the output amplitude is larger than the threshold value, the active resistor and the passive resistor are connected in parallel, so that the transimpedance gain of the transimpedance amplifier is equal to the parallel resistance value of the passive resistor and the active resistor; the active resistor is an NMOS transistor, and when the active resistor is connected with the passive resistor in parallel, the grid voltage of the active resistor is direct-current bias voltage.
As a further improvement of the present invention, when the active resistor is connected in parallel with the passive resistor, the source voltage is the output voltage of the transimpedance amplifier, and as the input current, i.e., the input optical power, increases, the output voltage of the transimpedance amplifier decreases, the gate-source voltage of the NMOS transistor increases, the resistance value of the active resistor decreases, and the transimpedance gain of the transimpedance amplifier decreases.
As a further improvement of the invention, step A comprises: and detecting the average value Vout, avg of the output voltage of the trans-impedance amplifier in the time domain through an RC low-pass filter.
As a further improvement of the present invention, in step B, the average values Vout, avg are compared with the reference voltage Vref by a latch comparator; if Vout and avg are greater than Vref, the output Bsw of the latch comparator is equal to 0, and the switch connected in series with the active resistor is disconnected, so that the transimpedance gain of the transimpedance amplifier is equal to the resistance of the passive resistor; if Vout and avg are less than Vref, the output Bsw of the latch comparator is equal to 1, the switch connected in series with the active resistor is closed, the active resistor and the passive resistor are connected in parallel, and the transimpedance gain of the transimpedance amplifier is equal to the parallel resistance of the passive resistor and the active resistor.
As a further improvement of the present invention, the latching comparator has a latching function, and after comparison, maintains Bsw until the next input power change.
As a further improvement of the invention, after the output amplitude is compared with a reference signal representing an amplitude threshold value, a one-bit digital code is generated, the on-off of a switch connected with an active resistor in series is controlled through the one-bit digital code, the active resistor is disconnected with a passive resistor when the switch is opened, and the active resistor is connected with the passive resistor in parallel when the switch is closed.
As a further improvement of the invention, step A comprises: the power detector detects an alternating current component of the output signal Vout of the transimpedance amplifier, and outputs a voltage signal Vpd having a positive correlation with the amplitude of Vout.
As a further improvement of the present invention, in step B, the signal Vpd is compared with the reference voltage Vref by a latch comparator; if Vpd is less than Vref, and the output Bsw of the latch comparator is equal to 0, then — Bsw is equal to 1, the gate of the NMOS transistor is grounded, the NMOS transistor is in the cut-off region, and the source and drain of the NMOS transistor are open; when Vpd > Vref, the latch comparator output Bsw is equal to 1, the gate of the NMOS transistor is connected to the dc bias voltage Vgate, the NMOS transistor is turned on, and the NMOS transistor is connected in parallel as an active resistor across the passive resistor.
As a further improvement of the invention, after the output amplitude is compared with a reference signal representing an amplitude threshold value, a one-bit digital code is generated, the on-off of a switch connected in series between the grid electrode of the NMOS transistor and the ground is controlled through the one-bit digital code, the on-off of a switch connected in series between the grid electrode of the NMOS transistor and the direct-current bias voltage is controlled, the source electrode and the drain electrode of the NMOS transistor are opened when the switch connected in series between the grid electrode of the NMOS transistor and the ground is closed, and the active resistor and the passive resistor are connected in parallel when the switch connected in series between the grid electrode of the NMOS transistor and the direct-current bias voltage is closed.
The invention has the beneficial effects that:
the quick response automatic gain control method for the transimpedance amplifier controls whether the NMOS transistor is connected with the transimpedance amplifier or not by comparing the output amplitude, which is much faster than the control mode of an analog AGC feedback loop, and the on-resistance of the NMOS transistor can change instantly along with the grid source voltage of the NMOS transistor. Therefore, the method can quickly respond to the change of the input optical power to establish a steady state and can be used for the burst mode trans-impedance amplifier.
The transimpedance gain has two states, when the input optical power is 0 or very low, the active resistor is not connected into a feedback loop of the transimpedance amplifier, the resistance value of the active resistor does not influence the gain of the transimpedance amplifier, therefore, the NMOS transistor can be in a conducting state, the grid bias voltage of the NMOS transistor does not need to be biased on a critical point from cut-off to conduction of the NMOS, and the design of a bias circuit can be flexible. Compared with the prior art in fig. 2, the gate voltage Vgate is higher with the same NMOS transistor size, which provides a larger transimpedance gain adjustment range, thereby widening the dynamic range of the transimpedance amplifier.
The foregoing description is only an overview of the technical solutions of the present invention, and in order to make the technical means of the present invention more clearly understood, the present invention may be implemented in accordance with the content of the description, and in order to make the above and other objects, features, and advantages of the present invention more clearly understood, the following preferred embodiments are described in detail with reference to the accompanying drawings.
Drawings
FIG. 1 is a diagram of an automatic gain control circuit for detecting DC component of output voltage of a transimpedance amplifier;
FIG. 2 is a prior art fast response automatic gain control circuit;
FIG. 3 is a schematic diagram of a fast response automatic gain control method for a transimpedance amplifier according to a preferred embodiment of the present invention;
fig. 4 is a first circuit diagram related to a fast response automatic gain control method for a transimpedance amplifier according to the preferred embodiment of the present invention;
fig. 5 is a circuit diagram two related to a fast response automatic gain control method for a transimpedance amplifier according to the preferred embodiment of the present invention.
Detailed Description
The present invention is further described below in conjunction with the following figures and specific examples so that those skilled in the art may better understand the present invention and practice it, but the examples are not intended to limit the present invention.
As shown in fig. 3, the fast response automatic gain control method for a transimpedance amplifier in the preferred embodiment of the present invention includes the following steps:
A. detecting the output amplitude of the transimpedance amplifier;
B. comparing the output amplitude with a reference signal representing an amplitude threshold; if the output amplitude is smaller than the threshold value, the parallel connection of the active resistor and the passive resistor is disconnected, so that the transimpedance gain of the transimpedance amplifier is equal to the resistance value of the passive resistor; if the output amplitude is larger than the threshold value, the active resistor and the passive resistor are connected in parallel, so that the transimpedance gain of the transimpedance amplifier is equal to the parallel resistance value of the passive resistor and the active resistor; the active resistor is an NMOS transistor, when the active resistor is connected with the passive resistor in parallel, the grid voltage of the active resistor is direct-current bias voltage, and the passive resistor is a resistor R.
When the active resistor is connected in parallel with the passive resistor, the source voltage of the active resistor is the output voltage of the transimpedance amplifier, and with the increase of input current, namely input optical power, the output voltage of the transimpedance amplifier is reduced, the gate-source voltage of the NMOS transistor is increased, the resistance value of the active resistor is reduced, and the transimpedance gain of the transimpedance amplifier is reduced.
As shown in fig. 4, in one embodiment, step a includes: and detecting the average value Vout, avg of the output voltage of the trans-impedance amplifier in the time domain through an RC low-pass filter.
Further, in step B, the average values Vout, avg are compared with the reference voltage Vref by the latch comparator; if Vout and avg are greater than Vref and the output Bsw of the latching comparator is equal to 0, the input power is determined to be small, a switch connected with the active resistor in series is disconnected, and the transimpedance gain of the transimpedance amplifier is equal to the resistance value of the passive resistor; and if Vout and avg are less than Vref, the input power is judged to be high, the output Bsw of the latching comparator is equal to 1, a switch connected with the active resistor in series is closed, the active resistor and the passive resistor are connected in parallel, and the transimpedance gain of the transimpedance amplifier is equal to the parallel resistance of the passive resistor and the active resistor.
Optionally, after the output amplitude is compared with the reference signal representing the amplitude threshold, a one-bit digital code is generated, the on-off of a switch connected in series with the active resistor is controlled through the one-bit digital code, the active resistor is disconnected from the passive resistor when the switch is disconnected, and the active resistor is connected in parallel with the passive resistor when the switch is closed.
As shown in fig. 5, in one embodiment, step a includes: the power detector detects an alternating current component of the output signal Vout of the transimpedance amplifier, and outputs a voltage signal Vpd having a positive correlation with the amplitude of Vout.
Further, in step B, the signal Vpd is compared with the reference voltage Vref by a latch comparator; if Vpd is less than Vref, the input power is determined to be small, the latch comparator output Bsw is 0, and then _ Bsw is 1, the gate of the NMOS transistor is grounded, the NMOS transistor is in a cut-off region, and the source and the drain of the NMOS transistor are open; when Vpd > Vref, the magnitude of input power is determined, the latch comparator output Bsw is equal to 1, the gate of the NMOS transistor is connected to the dc bias voltage Vgate, the NMOS transistor is turned on, and the NMOS transistor is connected in parallel as an active resistor at both ends of the passive resistor.
In other embodiments of the present invention, the amplitude detection and the binary judgment may be performed in other manners, and the on/off of the active resistor may be controlled in other manners, which are not limited to the manners in the above embodiments.
Optionally, after the output amplitude is compared with the reference signal representing the amplitude threshold, a one-bit digital code is generated, the on-off of a switch connected in series between the gate of the NMOS transistor and the ground is controlled through the one-bit digital code, the on-off of a switch connected in series between the gate of the NMOS transistor and the dc bias voltage is controlled, the source and the drain of the NMOS transistor are opened when the switch connected in series between the gate of the NMOS transistor and the ground is closed, and the active resistor and the passive resistor are connected in parallel when the switch connected in series between the gate of the NMOS transistor and the dc bias voltage is closed.
Optionally, the latching comparator has a latching function, and after comparison, maintains Bsw until the next input power change.
In the invention, only one bit of digital code is fed back to control whether the NMOS transistor is connected with the trans-impedance amplifier after the amplitude is detected, which is much faster than the control mode of an analog AGC feedback loop, and the on-resistance of the NMOS transistor can be changed instantly along with the grid source voltage of the NMOS transistor. Therefore, the method can quickly respond to the change of the input optical power to establish a steady state and can be used for the burst mode trans-impedance amplifier.
The invention uses one-digit digital code to control the on-off of the active resistor, so the trans-impedance gain has two states, when the input optical power is 0 or very low, the active resistor is not connected with the feedback loop of the trans-impedance amplifier, the resistance value does not affect the gain of the trans-impedance amplifier, therefore, the NMOS transistor can be in the conducting state, the grid bias voltage does not need to be biased on the critical point from the cut-off to the conducting of the NMOS transistor, and the design of the bias circuit can be more flexible. Compared with the prior art in fig. 2, the gate voltage Vgate is higher with the same NMOS size, which provides a larger transimpedance gain adjustment range, thereby widening the dynamic range of the transimpedance amplifier.
The above embodiments are merely preferred embodiments for fully illustrating the present invention, and the scope of the present invention is not limited thereto. The equivalent substitution or change made by the technical personnel in the technical field on the basis of the invention is all within the protection scope of the invention. The protection scope of the invention is subject to the claims.
Claims (9)
1. A fast response automatic gain control method for a transimpedance amplifier, comprising the steps of:
A. detecting the output amplitude of the transimpedance amplifier;
B. comparing the output amplitude with a reference signal representing an amplitude threshold; if the output amplitude is smaller than the threshold value, the parallel connection of the active resistor and the passive resistor is disconnected, so that the transimpedance gain of the transimpedance amplifier is equal to the resistance value of the passive resistor; if the output amplitude is larger than the threshold value, the active resistor and the passive resistor are connected in parallel, so that the transimpedance gain of the transimpedance amplifier is equal to the parallel resistance value of the passive resistor and the active resistor; the active resistor is an NMOS transistor, and when the active resistor is connected with the passive resistor in parallel, the grid voltage of the active resistor is direct-current bias voltage.
2. The method as claimed in claim 1, wherein when the active resistor is connected in parallel with the passive resistor, the source voltage is the output voltage of the transimpedance amplifier, and as the input current, i.e., the input optical power, increases, the output voltage of the transimpedance amplifier decreases, the gate-source voltage of the NMOS transistor increases, the resistance value of the active resistor decreases, and the transimpedance gain of the transimpedance amplifier decreases.
3. The fast response automatic gain control method for a transimpedance amplifier according to claim 1, wherein step a comprises: and detecting the average value Vout, avg of the output voltage of the trans-impedance amplifier in the time domain through an RC low-pass filter.
4. The fast response automatic gain control method for a transimpedance amplifier according to claim 3, wherein in step B, the average values Vout, avg are compared with the reference voltage Vref by a latch comparator; if Vout and avg are greater than Vref, the output Bsw of the latch comparator is equal to 0, and the switch connected in series with the active resistor is disconnected, so that the transimpedance gain of the transimpedance amplifier is equal to the resistance of the passive resistor; if Vout and avg are less than Vref, the output Bsw of the latch comparator is equal to 1, the switch connected in series with the active resistor is closed, the active resistor and the passive resistor are connected in parallel, and the transimpedance gain of the transimpedance amplifier is equal to the parallel resistance of the passive resistor and the active resistor.
5. The method of claim 4, wherein the comparison of the output amplitude with a reference signal indicative of an amplitude threshold generates a one-bit digital code, and wherein the one-bit digital code controls the on/off of a switch in series with the active resistor, wherein the open switch disconnects the active resistor from the passive resistor, and the closed switch connects the active resistor in parallel with the passive resistor.
6. The method as claimed in claim 4, wherein the latch comparator has a latch function, and maintains Bsw after the comparison until the next input power change.
7. The fast response automatic gain control method for a transimpedance amplifier according to claim 1, wherein step a comprises: the power detector detects an alternating current component of the output signal Vout of the transimpedance amplifier, and outputs a voltage signal Vpd having a positive correlation with the amplitude of Vout.
8. The fast response automatic gain control method for a transimpedance amplifier according to claim 7, wherein in step B, the signal Vpd is compared with the reference voltage Vref by a latch comparator; if Vpd is less than Vref, and the output Bsw of the latch comparator is equal to 0, then — Bsw is equal to 1, the gate of the NMOS transistor is grounded, the NMOS transistor is in the cut-off region, and the source and drain of the NMOS transistor are open; when Vpd > Vref, the latch comparator output Bsw is equal to 1, the gate of the NMOS transistor is connected to the dc bias voltage Vgate, the NMOS transistor is turned on, and the NMOS transistor is connected in parallel as an active resistor across the passive resistor.
9. The method of claim 8, wherein the comparison of the output amplitude with a reference signal indicative of an amplitude threshold generates a one-bit digital code, the one-bit digital code controls the on/off of a switch connected in series between the gate of the NMOS transistor and ground and the dc bias voltage, the switch connected in series between the gate of the NMOS transistor and ground is closed and the source and drain of the NMOS transistor are open, and the switch connected in series between the gate of the NMOS transistor and the dc bias voltage is closed and the active resistor and the passive resistor are connected in parallel.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN114050794A (en) * | 2022-01-12 | 2022-02-15 | 微龛(广州)半导体有限公司 | Transimpedance amplifier circuit, optical receiver, and optical communication system |
CN115473501A (en) * | 2022-11-15 | 2022-12-13 | 上海阿米芯光半导体有限责任公司 | Regulating and controlling circuit of trans-impedance amplifier and method for reducing influence of stray inductance on circuit |
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2021
- 2021-07-12 CN CN202110785470.3A patent/CN113452334A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN114050794A (en) * | 2022-01-12 | 2022-02-15 | 微龛(广州)半导体有限公司 | Transimpedance amplifier circuit, optical receiver, and optical communication system |
CN115473501A (en) * | 2022-11-15 | 2022-12-13 | 上海阿米芯光半导体有限责任公司 | Regulating and controlling circuit of trans-impedance amplifier and method for reducing influence of stray inductance on circuit |
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