CN113450712B

CN113450712B - Pixel driving device and method of silicon-based light-emitting unit and display panel

Info

Publication number: CN113450712B
Application number: CN202110729200.0A
Authority: CN
Inventors: 王糖祥; 陈燚; 杨飞
Original assignee: BOE Technology Group Co Ltd
Current assignee: BOE Technology Group Co Ltd
Priority date: 2021-06-29
Filing date: 2021-06-29
Publication date: 2023-04-18
Anticipated expiration: 2041-06-29
Also published as: CN113450712A

Abstract

The embodiment of the application provides a pixel driving device of a silicon-based light-emitting unit, a method thereof and a display panel, wherein the pixel driving device comprises: the pixel circuit comprises a selection circuit, a pixel circuit group and a reset circuit, wherein the selection circuit comprises at least one output end; the pixel circuit group comprises at least one pixel circuit of the same pixel circuit row; the reset circuit comprises at least one reset sub-circuit; each output end of the selection circuit is electrically connected with the corresponding pixel circuit; each output end is electrically connected with the corresponding reset sub-circuit; in the first stage of the data writing stage of the pixel circuit row to which the pixel circuit group belongs, all the reset sub-circuits are started, and all the pixel circuits are reset; in the second stage of the data writing stage, all the reset sub-circuits are closed, and all the output ends of the selection circuit write all the data signals into all the pixel circuits in a time-sharing mode. According to the embodiment of the application, on the basis that the speed of the front-end interface is not increased, the reset current is eliminated, and the power consumption is reduced.

Description

Pixel driving device and method of silicon-based light-emitting unit and display panel

Technical Field

The present application relates to the field of display technologies, and in particular, to a pixel driving device of a silicon-based light emitting unit, a method thereof, and a display panel.

Background

With the rise of devices such as intelligent wearable, VR (Virtual Reality), AR (Augmented Reality), and the like, consumers have higher demands for the performance of small-sized display panels on product devices.

The small-sized display device may employ technologies including: for example, LCOS (Liquid Crystal On Silicon) is a novel reflective display technology based On a single Crystal Silicon wafer, and utilizes the reflection of the back surface of the Liquid Crystal layer to improve the transmittance of the display device to achieve a larger light output, and the higher electron mobility of the single Crystal Silicon to achieve a higher resolution.

The Micro LED (light emitting diode) technology is a Micro LED technology, the LED structural design is subjected to thinning and microminiaturization treatment on a substrate through a Micro process technology, each LED unit reaches 1-10 micrometers, arrayed LED units are transferred to a circuit board in batches through a mass transfer technology, and after positive and negative grid-shaped electrodes which are vertically staggered are connected with positive and negative electrodes and are sequentially electrified, the imaging is lightened through a scanning mode, so that each pixel is independently addressed and independently driven to emit light.

The silicon-based Light Emitting unit comprises a silicon-based OLED (Organic Light-Emitting Diode), and the micro display technology of the silicon-based OLED, namely the micro OLED technology, the basic Light Emitting principle of the silicon-based OLED technology is the phenomenon of Light emission caused by injection and recombination of current carriers, and the characteristics of the OLED are reserved. On the basis, the silicon-based OLED also utilizes a monocrystalline silicon substrate process of LCOS, and the light utilization efficiency is higher than that of a glass substrate. Achieving high PPI (Pixels Per Inch, pixel density) is considered as the mainstream micro-display technology in the future.

In the prior art, the PPI of the display panel can reach 4000 by the current silicon-based OLED technology, and as the display performance of the consumer is further improved, the silicon-based OLED display also faces the following challenges:

although in the Micro OLED field, as the light emitting efficiency of EL (ELectroluminescence) is improved, the current flowing through the OLED is only required at nA (nano-ampere) level for the highest gray level, which helps to reduce the power consumption of the pixel circuit, and meanwhile, in order to ensure that the OLED does not emit light during writing data (data signal), the anode of the OLED should be reset, and at this time, if normal data (data signal) is written, a reset current is generated, and if data is large, the reset current is also large, even far exceeding the normal light emitting current. If 0 is written first and then normal data is written, the speed of the front-end interface is required to be improved, namely the data frequency of the front-end interface is doubled, the design difficulty is increased, the power consumption is further increased, and a serious challenge is provided for silicon-based products with ultrahigh PPI and ultrahigh integration level.

How to provide a silicon-based light-emitting unit which eliminates reset current and reduces power consumption on the basis of not improving the speed of a front-end interface is a problem to be solved urgently by technical personnel in the field.

Disclosure of Invention

The present application provides a pixel driving device of a silicon-based light emitting unit, a method thereof, and a display panel to solve the technical problem in the prior art that a reset current is generated or the speed of a front-end interface needs to be increased.

In a first aspect, an embodiment of the present application provides a pixel driving apparatus for a silicon-based light emitting unit, including:

a selection circuit comprising at least one output;

a pixel circuit group including at least one pixel circuit of the same pixel circuit row;

a reset circuit comprising at least one reset sub-circuit;

each output end of the selection circuit is electrically connected with the corresponding pixel circuit; each output end is electrically connected with the corresponding reset sub-circuit;

in the first stage of the data writing stage of the pixel circuit row to which the pixel circuit group belongs, all the reset sub-circuits are started, the potentials of all the output ends of the selection circuit are all clamped at the reference potential, and all the pixel circuits are reset according to the reference potential;

in the second stage of the data writing stage, all the reset sub-circuits are closed, and all the output ends of the selection circuit write all the data signals into all the pixel circuits in a time-sharing mode.

In one possible implementation manner, the control terminal of the reset sub-circuit is configured to receive a reset control signal, the first terminal of the reset sub-circuit is electrically connected to the corresponding output terminal of the selection circuit, the first terminal of the reset sub-circuit is electrically connected to the corresponding pixel circuit, and the second terminal of the reset sub-circuit is electrically connected to the reference potential terminal.

In one possible implementation manner, the reset sub-circuit includes a reset transistor, and a control electrode, a first electrode, and a second electrode of the reset transistor are respectively used as a control terminal, a first terminal, and a second terminal of the reset sub-circuit.

In one possible implementation manner, the pixel driving apparatus of the silicon-based light emitting unit provided by the embodiment of the present application further includes at least one of the following items:

the ratio of the duration of the first phase to the write duration of each data signal in the second phase is 4;

the drive current of the pixel circuit is not less than 1E-13 amperes and not more than 1E-9 amperes;

the pixel circuit corresponds to the pixel density, and the number of pixels per inch is not less than 8000 and not more than 10000;

the refresh rate of the display panel to which the pixel driving device belongs is not less than 120Hz and not more than 240 Hz;

the voltage range of a data signal written into a driving module of the pixel circuit is not less than 0.5 volt and not more than 4.5 volts;

when the switch module of the pixel circuit is turned on, the potential of the control end of the switch module is not less than 5 volts and not more than 5.5 volts.

In one possible implementation manner, the pixel driving apparatus of a silicon-based light emitting unit provided in the embodiment of the present application further includes:

the digital-to-analog conversion circuit is electrically connected with the selection circuit;

the digital to analog conversion circuit transmits 4 megabits per second.

In one possible implementation, a pixel circuit includes: the device comprises a first switch module, a charge storage module and a driving module;

the control end of the first switch module is used for receiving scanning signals, the first end of the first switch module is electrically connected with the output end of the selection circuit, and the second end of the first switch module is electrically connected with the third end and the first node;

the charge storage module is electrically connected with the first node;

the control end of the driving module is electrically connected with the first node.

In one possible implementation manner, the first switch module includes a first transistor, and a control electrode, a first electrode, a second electrode, and a third electrode of the first transistor are respectively used as a control terminal, a first terminal, a second terminal, and a third terminal of the first switch module.

In a second aspect, an embodiment of the present application provides a display panel, including a pixel driving apparatus of a silicon-based light emitting unit as provided in the first aspect of the embodiment of the present application.

In a third aspect, an embodiment of the present application provides a pixel driving method for a silicon-based light emitting unit, which is applied to a pixel driving apparatus for a silicon-based light emitting unit provided in the first aspect of the embodiment of the present application, and the pixel driving method for a silicon-based light emitting unit includes:

in the first stage of the data writing stage of the pixel circuit row to which the pixel circuit group belongs, all the reset sub-circuits are started, the potentials of all the output ends of the selection circuit are all clamped at the reference potential, and all the pixel circuits are reset according to the reference potential; the pixel driving device comprises a selection circuit, a pixel circuit group and a reset circuit, wherein the selection circuit comprises at least one output end, and the pixel circuit group comprises at least one pixel circuit in the same pixel circuit row; the reset circuit comprises at least one reset sub-circuit;

In one possible implementation manner, in a first stage of a data writing stage of a pixel circuit row to which a pixel circuit group belongs, each reset sub-circuit is turned on, potentials at output ends of a selection circuit are all clamped at a reference potential, and each pixel circuit is reset according to the reference potential, including:

in the first stage, the reset control signal input to the control end of each reset sub-circuit is a first control signal, each reset sub-circuit is turned on when receiving the first control signal through the respective control end, the potential of each output end of the selection circuit is clamped at the reference potential, and the reference potential is transmitted to the control end of the driving module of each pixel circuit, so that the driving module of each pixel circuit is turned off or kept in a turned-off state.

In one possible implementation manner, in the second stage of the data writing stage, each reset sub-circuit is turned off, and each output terminal of the selection circuit time-divisionally writes each data signal into each pixel circuit, including:

in the second stage, the reset control signal input to the control end of each reset sub-circuit is a second control signal, and when each reset sub-circuit receives the second control signal through the respective control end, each output end of the selection circuit is closed, and each data signal is sequentially transmitted to the control end of the drive module of each pixel circuit, so that the drive module of each pixel circuit is sequentially started, and each data signal is sequentially written into the drive module of each pixel circuit.

The beneficial technical effects brought by the technical scheme provided by the embodiment of the application comprise:

by adopting the pixel driving device of the silicon-based light-emitting unit, provided by the embodiment of the application, through arranging the selection circuit and the reset circuit, the first stage of the data writing stage of the pixel circuit row to which the pixel circuit group belongs can be realized, all reset sub-circuits are started, and all pixel circuits are reset according to the reference potential; in the second stage of the data writing stage, all the reset sub-circuits are closed, and all the output ends of the selection circuit write all the data signals into all the pixel circuits in a time-sharing manner, so that after the pixel circuit rows to which the pixel circuit groups belong are reset simultaneously, the data signals are written into all the pixel circuits in a time-sharing manner, and therefore, on the basis of not improving the speed of the front-end interface, the reset current is eliminated, and the power consumption is reduced. Meanwhile, the reset current is eliminated (namely the reset current is 0), power consumption and heat generation caused by the reset current are eliminated, and the problem of heat dissipation is favorably solved.

Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.

Drawings

The foregoing and/or additional aspects and advantages of the present application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:

FIG. 1a is a timing diagram illustrating a pixel driving method in the prior art;

FIG. 1b is a timing diagram illustrating another pixel driving method in the prior art;

fig. 2 is a schematic structural diagram of a pixel driving device of a silicon-based light emitting unit according to an embodiment of the present disclosure;

fig. 3 is a schematic structural diagram of another pixel driving device of a silicon-based light emitting unit according to an embodiment of the present disclosure;

fig. 4 is a schematic circuit diagram of a pixel circuit according to an embodiment of the present disclosure;

fig. 5 is a schematic flowchart of a pixel driving method of a silicon-based light emitting unit according to an embodiment of the present disclosure;

fig. 6 is a timing diagram of control signals of a pixel driving apparatus of a silicon-based light emitting unit according to an embodiment of the present disclosure.

Reference numerals:

1-select circuit (i.e., MUX circuit in the figure);

2-Pixel circuit group, 21-Pixel circuit (i.e. Pixel shown in the figure), 211-first switch module, 212-charge storage module, 213-drive module, 214-second switch module;

3-Reset circuit (i.e., reset circuit in the figure), 31-Reset sub-circuit,

a 4-digital to analog conversion circuit (i.e., DAC as shown in the figure).

Detailed Description

The present application is described in detail below and examples of embodiments of the present application are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements with the same or similar functionality throughout. In addition, if a detailed description of the known art is not necessary for illustrating the features of the present application, it is omitted. The embodiments described below with reference to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application.

It will be understood by those within the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

As used herein, the singular forms "a", "an", "the" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may also be present. Further, "connected" or "coupled" as used herein may include wirelessly connected or wirelessly coupled. As used herein, the term "and/or" includes all or any element and all combinations of one or more of the associated listed items.

The inventor of the present application has conducted research and found that a silicon-based OLED pixel circuit may include a 3T1C circuit structure, that is, the silicon-based OLED pixel circuit may include a first transistor, a second transistor, a third transistor and a storage capacitor, wherein the first transistor is a switching transistor for transmitting a data (data signal) to a GATE of the second transistor under the control of a scan signal (i.e., a GATE signal), the second transistor is a driving transistor, a drain of the second transistor is electrically connected to a first potential terminal, a source of the second transistor is electrically connected to an anode of an OLED, a GATE of the second transistor is electrically connected to a first ground terminal through the storage capacitor, the second transistor provides a required current for an OLED, the third transistor is a sense switching transistor, and a voltage value from a sense is transmitted to a compensation circuit under the control of the scan signal (i.e., the GATE signal). During data writing, the third transistor works in a sub-threshold region, the third transistor is in a linear following relationship between a g point (drain) and an s point (source), and the current of the second transistor is changed by writing data, so that the brightness of the OLED is adjusted.

The inventors of the present application have also found that Micro OLEDs, unlike large-sized OLEDs, emit light at currents on the order of 0.1uA (microampere) to tens of uA (microampere), require drive currents typically on the order of 1E-13 (minus 13 th power of 10) to 1E-9 (minus 9 th power of 10) amperes, and with such low currents and minimal dimensions for the second transistor (drive transistor), the second transistor (drive transistor) can only operate in the subthreshold region. The leakage of the CMOS transistor, which is usually implemented by a CMOS (Complementary Metal Oxide Semiconductor) process, is on the order of 1E-12 (minus 12 times of 10) amperes, and the leakage of the CMOS transistor is more serious at high temperature, so that the first transistor (switch transistor), the second transistor (drive transistor), and the third transistor (sense switch transistor) of the silicon-based pixel circuit can only adopt a customized low-level leakage device.

When the PPI (Pixels Per inc, pixel density, i.e. the number of Pixels Per Inch) reaches more than 8000, it is not allowed to add any device in the pixel region except for the first transistor (switch transistor), the second transistor (driver transistor) and the third transistor (sense switch transistor) which require the minimum size of the device, and each additional device means that the PPI is at least 20%. Furthermore, for silicon-based OLEDs with resolutions of 4000 x 2000, the data writing time may be less than 1us (microseconds) in the face of higher and higher refresh rates (120 Hz or even higher) (the source employs the MUX scheme).

In the pixel circuit, the general operation principle and timing are as shown in fig. 1a, where Vg represents the gate voltage of the second transistor (driving transistor), G1 represents the scan signal for driving the first transistor (switching transistor), G2 represents the scan signal for driving the third transistor (sense switching transistor), vs represents the source voltage of the second transistor (driving transistor), and Vdata represents the data voltage.

As shown in fig. 1a, the specific working principle is as follows: during the period T1 (reset time ), the scan signal G1 and the scan signal G2 turn on the first transistor (switch tube) and the third transistor (sense switch tube) simultaneously, the data voltage Vdata is given to 0, and the source voltage Vs of the second transistor (driving tube) is pulled down to 0 by the scan signal G2. During the period T2 (data writing time), data is raised from 0V to the target data, at this time, the scan signal G2 is pulled low, the third transistor (sense switch tube) is turned off, the second transistor (drive tube) is gradually turned on due to the data writing, the gate voltage Vs of the second transistor (drive tube) is gradually raised to the target value, and the OLED is turned on and emits light. In the period of T3 (OLED light-emitting time), the scanning signal G1 is pulled low, the first transistor (switching tube) is turned off, and the gate voltage Vg of the second transistor (driving tube) is maintained stable by the capacitor electrically connected to the gate of the second transistor (driving tube), so as to ensure that the OLED brightness is not changed.

The disadvantage of this timing sequence is that in a period (that is, the time for turning on the scanning signal of a row of pixel circuits is a period, that is, the data writing stage of a row of pixel circuits), data needs to be written twice (once is 0, once is normal data), which is very high for the high resolution PPI-high silicon substrate, writing data twice in a period is equivalent to doubling the data amount, and the speed is doubled, which is not favorable for further increasing the refresh rate of the display panel.

Further, the inventor of the present application has found that a silicon-based OLED pixel circuit adopts a 4T1C circuit structure, that is, a fourth transistor electrically connected to a third transistor (sense switch) is added to the silicon-based OLED pixel circuit, and the four transistors and a storage capacitor together form a silicon-based OLED pixel circuit with a reset function.

As shown in fig. 1b, the specific working principle is as follows: during the period T1 (reset time ), data writing and OLED anode reset are performed simultaneously, which is equivalent to that data writing is only needed once in one period (that is, the time for turning on the scanning signal of a row of pixel circuits is one period, that is, the data writing phase of a row of pixel circuits), and is the current main stream direction.

However, a major problem of this timing sequence is that during the period T1 (reset time ), since the first transistor (switch tube) and the second transistor (drive tube) are turned on simultaneously, a large current flows through the second transistor (drive tube), the third transistor (sense switch tube) and the fourth transistor until the ground electrically connected to the fourth transistor, and this current is related to the written data value, and can reach a maximum level of 100uA (microampere), and assuming that there are 4000 pixels in a row, it is equivalent to a current of 400mA (milliamp) during the period of resetting the pixels in the row. The reset is required for each row of pixels, that is, the scan signal G3 driving the fourth transistor is always on during the whole display period, and the source voltage Vs of the second transistor (driving transistor) of the pixels in different rows is continuously reset, which is always present. The fourth transistor is designed outside the AA (active Area, generally referred to as the Area where the pattern is displayed) region for high PPI, and the number of the fourth transistor is the same as that of the sub-pixels of one row.

In order to reduce the current flowing through the second transistor (driving transistor), the third transistor (sense switch transistor) and the fourth transistor during data writing, reduce power consumption, or not increase the data writing frequency, the present application provides a pixel driving device of a silicon-based light emitting unit, a method thereof, and a display panel, which aim to solve the above technical problems in the prior art.

The following describes the technical solutions of the present application and how to solve the above technical problems with specific embodiments. These several specific embodiments may be combined with each other below, and details of the same or similar concepts or processes may not be repeated in some embodiments. Embodiments of the present application will be described below with reference to the accompanying drawings.

The embodiment of the present application provides a pixel driving device of a silicon-based light emitting unit, which has a schematic structural diagram, as shown in fig. 2, and includes: a selection circuit 1 (i.e., MUX circuit in the figure), a pixel circuit group 2, and a Reset circuit 3 (i.e., reset circuit in the figure).

Specifically, the selection circuit 1 (i.e., MUX circuit in the figure) includes at least one output terminal; the Pixel circuit group 2 includes at least one Pixel circuit 21 (i.e., pixel shown in the figure) of the same row; the Reset circuit 3 (i.e., reset circuit in the figure) includes at least one Reset sub-circuit 31; each output terminal of the selection circuit 1 (i.e., MUX circuit in the figure) is electrically connected to a corresponding Pixel circuit 21 (i.e., pixel in the figure); each output terminal is electrically connected to a corresponding reset sub-circuit 31. Here, rst is a reset control signal for controlling the on and off of each reset sub-circuit 31.

In the first phase of the data writing phase of the Pixel circuit row to which the Pixel circuit group 2 belongs, each reset sub-circuit 31 is turned on, the potentials of the output ends of the selection circuit 1 (i.e. the MUX circuit in the figure) are all clamped at the reference potential (i.e. Vref in the figure), and each Pixel circuit 21 (i.e. the Pixel in the figure) is reset according to the reference potential (i.e. Vref in the figure); in the second phase of the data writing phase, each reset sub-circuit 31 is turned off, and each output terminal of the selection circuit 1 (i.e., MUX circuit) time-divisionally writes each data signal to each Pixel circuit 21 (i.e., pixel shown in the figure).

According to the pixel driving device of the silicon-based light-emitting unit provided by the embodiment of the application, by arranging the selection circuit 1 and the reset circuit 3, the first stage of the data writing stage of the pixel circuit row to which the pixel circuit group 2 belongs can be realized, each reset sub-circuit 31 is started, and each pixel circuit 21 is reset according to the reference potential; in the second stage of the data writing stage, each reset sub-circuit 31 is closed, each output end of the selection circuit 1 writes each data signal into each pixel circuit 21 in a time-sharing manner, that is, the pixel circuit row to which the pixel circuit group 2 belongs can be reset simultaneously, and then the data signal is written into each pixel circuit 21 in a time-sharing manner, so that the reset current is eliminated and the power consumption is reduced on the basis of not increasing the speed of the front-end interface. Meanwhile, the reset current is eliminated (namely the reset current is 0), power consumption and heat generation caused by the reset current are eliminated, and the problem of heat dissipation is favorably solved.

Optionally, the silicon-based Light Emitting unit of the embodiment of the present application includes a silicon-based OLED (Organic Light-Emitting Diode), and the silicon-based OLED has characteristics of low power consumption, fast response speed, wide viewing angle, high resolution, and the like, and meanwhile, the Light utilization efficiency of the silicon-based OLED may reach over 40%.

Alternatively, the silicon-based OLED integrates a source driver, a pixel circuit, and a TCON (logic board, also called a control board) on the display panel.

The pixel driving device of the silicon-based light-emitting unit has the advantages of being small in size, convenient to carry, energy-saving, efficient, stable and the like, and meanwhile can be produced in batches, so that the cost is reduced. The application scene can be expanded to ultra-high resolution large screen displays, automobiles and the like.

With reference to fig. 2, the operation principle of the pixel driving device of the silicon-based light emitting unit provided in the embodiment of the present application is described as an example, which is as follows:

the selection circuit 1 (i.e. MUX circuit in the figure) receives the data signal from the front-end digital-to-analog conversion circuit 4 (i.e. DAC), assuming that 1: the 20 MUX (i.e. MUX circuit includes 20 output terminals) requires that the speed of DAC be raised by 20 times, and at the same time, the number of DAC can be reduced to 1/20 of original number, so that the front-end interface speed can be kept unchanged. The MUX outputs CH < 1. The selection circuit 1 (i.e. the MUX circuit in the figure) may include 20 output terminals, and of course, other numbers of output terminals, such as 30 output terminals, 40 output terminals, etc., may also be included according to actual design and application, and the present application is not particularly limited.

By adopting the selection circuit 1 (i.e. the MUX circuit in the figure), the embodiment of the present application can not only reduce the number of the front-end digital-to-analog conversion circuits 4 (i.e. the DACs) and thus reduce the area, but also reset 20 corresponding to the MUXs simultaneously and then write data in a time-sharing manner. The "writing data in a time-sharing manner" may be a manner of sequentially writing data, or may be another time-sharing manner, and the present application is not limited in particular.

Alternatively, assuming that the gate on time of each row of pixel circuits 21 is 5.2us (microseconds), and the refresh rate of the digital-to-analog conversion circuit 4 (i.e., DAC) is 4Mbps (4 megabits per second is transmitted), each data write time is 0.25us (microseconds), and the CH < 1. As shown in fig. 6, MUX <1 n > is a MUX control signal, n is a positive integer greater than 1, GATE _1 is a first row GATE signal, and GATE _2 is a second row GATE signal, assuming n =20, MUX < 1. 0.2us (microseconds) before the GATE (GATE _ 1) in the first row is turned on, rst is a high level signal, CH <1 >. In the figure, the t3 stage, the t4 stage, ...:, the tn +1 stage and the tn +2 stage are stages for sequentially writing data (data signals) to Pixel circuits electrically connected to MUX <1>, MUX <2>, ..., MUX < n-1> and MUX < n >, respectively. The next row GATE (GATE _ 2) is then opened and the above action is repeated.

According to the embodiment of the application, the selection circuit 1 and the reset circuit 3 are arranged, so that the reset current can be avoided (the reset current is changed into 0), the speed of a front-end interface circuit is not increased, and the aim of saving power consumption is fulfilled. Meanwhile, the reset current is eliminated (namely the reset current is 0), power consumption and heat generation caused by the reset current are eliminated, and the problem of heat dissipation is favorably solved.

In one possible implementation, as shown in fig. 2, the control terminal of the reset sub-circuit 31 is configured to receive a reset control signal, the first terminal of the reset sub-circuit 31 is electrically connected to the corresponding output terminal of the selection circuit 1, the first terminal of the reset sub-circuit 31 is electrically connected to the corresponding pixel circuit 21, and the second terminal of the reset sub-circuit 31 is electrically connected to the reference potential terminal (i.e., vref in the figure).

In one possible implementation manner, as shown in fig. 2, the reset sub-circuit 31 includes a reset transistor, and a control electrode, a first electrode, and a second electrode of the reset transistor are respectively used as a control terminal, a first terminal, and a second terminal of the reset sub-circuit 31.

Optionally, the control electrode of the reset transistor is a gate electrode of the transistor, the first electrode of the reset transistor is a source electrode or a drain electrode of the transistor, and the second electrode of the reset transistor is a drain electrode or a source electrode corresponding to the first electrode of the transistor.

Alternatively, the reset transistor may be an NMOS transistor, and certainly, a PMOS transistor may also be used, which is not particularly limited in this application.

the drive current of the pixel circuit 21 is not less than 1E-13 amperes and not more than 1E-9 amperes;

the pixel circuit 21 corresponds to the pixel density of not less than 8000 and not more than 10000 pixels per inch;

the voltage range of the data signal written to the driving module 213 of the pixel circuit 21 is not less than 0.5 volt and not more than 4.5 volt;

when the switch module of the pixel circuit 21 is turned on, the potential of the control terminal of the switch module is not less than 5v and not more than 5.5 v.

In one possible implementation manner, as shown in fig. 3, the pixel driving apparatus of a silicon-based light emitting unit provided in the embodiment of the present application further includes: a digital-to-analog conversion circuit 4 (i.e., DAC shown in the figure) electrically connected to the selection circuit 1; the digital to analog conversion circuit 4 (i.e. the DAC shown in the figure) transmits 4 megabits per second.

According to the embodiment of the application, the selection circuit 1 and the reset circuit 3 are arranged, so that the reset current can be avoided (the reset current is changed into 0), the speed of a front-end interface circuit is not increased, and the aim of saving power consumption is fulfilled.

The inventors of the present application have also found that for ultra-high PPI, which means very small sub-pixel area, on the one hand the number of transistors to be used is small, not more than 3T (3 transistors), and that the size of each transistor is required to be minimized, compressing the size of sub-pixels to a few um ² On the order of (micrometers squared), this would have several problems as follows:

first, the capacitance area is also very small and cannot exceed the sub-pixel area, the capacitance value of the capacitor may be only a few fF (1E-15 method, i.e., 10 to the power of-15), the small capacitance can cause serious leakage, the voltage cannot be kept constant within one frame time, and the display problem can be generated. This may alleviate the leakage problem to some extent by capacitive multiplexing techniques, but at the cost of increasing the data refresh rate, which would otherwise sacrifice display performance. If the capacitance value per unit area cannot be increased, it is also a breakthrough direction to reduce the leakage of the transistor (usually, MOS transistor), which can change the doping concentration in the manufacturing process and reduce the leakage of the MOS transistor to the level of 1E-18 (power of-18 of 10), and this is done at the cost of increasing the threshold voltage of the MOS transistor, and if the Vth (threshold voltage) of the conventional 5V MOS transistor is about 0.7V (volt), the Vth (threshold voltage) of the MOS transistor with ultra-low leakage may be about 1V (volt), and the increase of Vth (threshold voltage) may cause some problems, such as reducing the gray scale voltage transmission range.

Secondly, in order to realize the ultra-high PPI, only a single transistor can be used as a pixel circuit switch, for example, an NMOS is used, the NMOS has a threshold loss when transmitting a high voltage, the larger the threshold voltage is, the larger the level loss is, and in addition, if the substrate bias effect of the MOS transistor is considered, the more serious the level loss is, the compensation space is reduced, and the display effect of a high gray scale is affected.

Alternatively, the inventors of the present application have also found that silicon-based OLED pixel circuits are typically implemented using CMOS (Complementary Metal Oxide Semiconductor) technology, which is at least a four-terminal device, other than a TFT (Thin Film Transistor), except for G (gate), S (source), D (drain) and B (body), and that in order to increase PPI as much as possible, the pixel circuits can be built with a minimum number of MOS transistors.

Since only a single transistor is used as the data transmission switch, for example, an MOS transistor is used as the data transmission switch, it can be known from the above that the MOS transistor inevitably has a threshold loss, for example, the data range is 0.5 to 5.5V, and if the threshold voltage Vth =1V of the switching transistor of the pixel circuit is assumed, the threshold voltage is increased because the MOS transistor reduces device leakage in the manufacturing process, the Vth (threshold voltage) of the MOS transistor is not only related to the doping concentration in the process, but also related to the voltage difference between B (substrate) and S (source), the larger the absolute value of the voltage difference between BS (substrate and source) is, the substrate bias effect of the MOS transistor is more serious, and in an extreme case, the maximum value of the Vth (threshold voltage) of the switching transistor of the pixel circuit may be as high as 1.8V, the gate of the driving transistor of the pixel circuit is at the highest level of only 3.2V (assuming that the high level of the scanning signal applied to the gate of the switching transistor of the pixel circuit is 5V), and in this case, the data range is 0.5 to 3.2V, the highest luminance requirement cannot be satisfied, and the compensation space is not only.

The inventor of the present application considers that, by means of a short circuit between B and S, a substrate bias effect is avoided, such that Vth (threshold voltage) of an MOS transistor (a switching transistor, which is a data transmission switch) is always stabilized at 1V, and compared with a case that a B (substrate) terminal of the MOS transistor in the prior art is electrically connected to a ground terminal (a substrate B of the MOS transistor manufactured by a CMOS process in the prior art is electrically connected to the ground terminal), a data range is increased by 0.8V, such that the data range is changed from 0.5-3.2V to 0.5-4V.

Optionally, assuming that the data voltage corresponding to the minimum brightness is 0.5V and the data voltage corresponding to the maximum brightness is 4V, if BS (substrate and source) short circuit is not adopted, the maximum brightness of the display panel cannot be realized, and if the sampling BS (substrate and source) short circuit, the maximum brightness of the display panel can be realized, but the high gray scale compensation space is only 0V (offset of K value and Vth cannot be compensated).

The following describes the technical solutions of the present application and how to solve the above technical problems with specific embodiments.

The embodiment of the application is further improved on the basis of the short circuit of the BS (substrate and source) of the switching tube of the pixel circuit, so that the highest brightness of the display panel can be realized, a compensation space can be provided at the highest gray scale, and the display effect is improved.

In one possible implementation, as shown in fig. 4, the pixel circuit 21 includes: a first switching module 211, a charge storage module 212, and a driving module 213; a control end of the first switch module 211 is configured to receive a scan signal G1, a first end of the first switch module is electrically connected to an output end of the selection circuit 1, and a second end of the first switch module is electrically connected to a third end and a first node N1; the charge storage module 212 is electrically connected to the first node N1; the control terminal of the driving module 213 is electrically connected to the first node N1.

Optionally, as further shown in fig. 4, the pixel circuit 21 further includes: a second switching module 214.

Specifically, the first terminal of the driving module 213 is electrically connected to the first potential terminal ELVDD, the second terminal thereof is electrically connected to the second node N2, and the third terminal thereof is electrically connected to the first ground terminal GND.

The control terminal of the second switch module 214 is configured to receive a scan signal G2, the first terminal is electrically connected to the second node N2, the second terminal is configured to output a voltage signal of the second node N2, and the third terminal is electrically connected to the first ground GND.

During data writing, the first terminal and the second terminal of the second switch module 214 follow in a linear relationship, and the second switch module 214 supplies the sensed voltage value to the compensation circuit, for example, the second node N2, under the control of the scan signal G2.

The charge storage module 212 is electrically connected to the first ground GND; the scanning signals G1 and G2 can be electrically connected, and can also be replaced by the same scanning signal line; the second node N2 is electrically connected to an anode of a light emitting element other than the pixel circuit 21, and a cathode of the light emitting element is electrically connected to the second potential terminal ELVSS.

The pixel circuit 21 of the embodiment of the application changes the current of the driving module 213 by writing data, thereby adjusting the brightness of the light emitting element. The light emitting element may be an OLED, and of course, other light emitting elements may also be used, and the application is not limited thereto.

In one possible implementation manner, the first switch module 211 includes a first transistor M1, and a control electrode, a first electrode, a second electrode, and a third electrode of the first transistor M1 are respectively used as a control terminal, a first terminal, a second terminal, and a third terminal of the first switch module 211.

Optionally, the driving module 213 includes a second transistor M3, and a control electrode, a first electrode, a second electrode, and a third electrode of the second transistor M3 are respectively used as a control terminal, a first terminal, a second terminal, and a third terminal of the driving module 213. The second switch module 214 includes a third transistor M2, and a control electrode, a first electrode, a second electrode, and a third electrode of the third transistor M2 are respectively used as a control terminal, a first terminal, a second terminal, and a third terminal of the second switch module 214. The charge storage module 212 includes a storage capacitor C, and two ends of the storage capacitor C are respectively connected to the first node N1 and the first ground GND.

Optionally, the control electrodes of the first transistor M1, the second transistor M3, and the third transistor M2 are the gates of the transistors; the third poles of the first transistor M1, the second transistor M3 and the third transistor M2 are all substrates of the transistors. The first electrode of the third transistor M2 is the source or the drain of the transistor, and the second electrode of the third transistor M2 is the drain or the source corresponding to the first electrode of the transistor.

Exemplarily, as shown in fig. 4, the first transistor M1, the second transistor M3, and the third transistor M2 all use NMOS transistors, and certainly, PMOS transistors may also be used to implement the above functions, which is not particularly limited in this application, and the above transistors are implemented by using a CMOS process. Specifically, the gate of the second transistor M3 is configured to receive the scan signal G1, the drain is electrically connected to the output terminal of the selection circuit 1, and the source is electrically connected to the substrate and the first node N1; a first end of the storage capacitor C is electrically connected with the first node N1, and a second end is electrically connected with a first ground terminal GND; a gate (g in the drawing) of the second transistor M3 is electrically connected to the first node N1, a drain (d in the drawing) is electrically connected to the first potential terminal ELVDD, a source (s in the drawing) is electrically connected to the second node N2, and a substrate is electrically connected to the first ground terminal GND; a gate of the third transistor M2 is configured to receive a scan signal G2, a drain (or source) is electrically connected to the second node N2, the source (or drain) is configured to output a voltage signal of the second node N2, and the substrate is electrically connected to a first ground GND; the scanning signals G1 and G2 may be both electrically connected to the same scanning signal line; the second node N2 is electrically connected to an anode of a light emitting element other than the pixel circuit 21, and a cathode of the light emitting element is electrically connected to the second potential terminal ELVSS. The light emitting element may be an OLED, but may be other light emitting elements.

It should be noted that, in the prior art, the substrate B of the MOS transistor implemented by using the CMOS process is electrically connected to the first ground GND, and since the first transistor M1 is a 5V device, the maximum potential of the gate G of the first transistor M1 (switching transistor) can only be 5V.

In the embodiment of the application, after the BS (substrate and source) of the first transistor M1 (switch tube) of the pixel circuit 21 is short-circuited (and B is disconnected from the first ground terminal GND), the data is ensured to be 0.5V at the lowest, so that the maximum potential of the gate of the first transistor M1 (switch tube) can be raised to 5.5V, and therefore it is ensured that the voltage difference of any 2 ends of the first transistor M1 of the four-terminal device adopting the CMOS process does not exceed 5V, and since the maximum voltage of the scanning signal G1 is raised by 0.5V, the maximum voltage which can be transmitted by the first transistor M1 (switch tube) is also raised by 0.5V, that is, the data range is changed to 0.5-4.5V, which not only can meet the requirement of the highest brightness, but also has a compensation space of 0.5V at the highest gray scale, thereby improving the display effect.

In summary, in the embodiment of the present application, the BS (substrate and source) of the switching tube of the pixel circuit 21 is short-circuited, so that not only the substrate bias effect is eliminated, but also the display gray scale range is improved, the compensation space is increased, and the compensation effect is improved, thereby improving the display effect.

Optionally, each of the transistors may be an N-type MOS transistor or a P-type MOS transistor, and it can be understood by those skilled in the art that the circuit connection manner shown in fig. 4 is only an example of the pixel circuit 21 provided in the embodiment of the present application, and when the type of each transistor changes, the electrical connection manner of each element in the pixel circuit 21 provided in the embodiment of the present application may be adaptively adjusted, and the adaptively adjusted electrical connection manner still belongs to the protection scope of the embodiment of the present application.

Embodiments of the present application provide a display panel, including a pixel driving apparatus of a silicon-based light emitting unit as provided in any of the above embodiments of the present application.

Based on the same inventive concept, an embodiment of the present application provides a pixel driving method for a silicon-based light emitting unit, which can be applied to the pixel driving apparatus for a silicon-based light emitting unit provided in the embodiment of the present application, as shown in fig. 5, the pixel driving method includes:

step S1: in the first stage of the data writing stage of the pixel circuit row to which the pixel circuit group 2 belongs, the reset sub-circuits 31 are all turned on, the potentials of the output terminals of the selection circuit 1 are all clamped at the reference potential, and the pixel circuits 21 are reset according to the reference potential.

Specifically, the pixel driving device comprises a selection circuit 1, a pixel circuit group 2 and a reset circuit 3, wherein the selection circuit 1 comprises at least one output end, and the pixel circuit group 2 comprises at least one pixel circuit 21 in the same pixel circuit row; the reset circuit 3 comprises at least one reset sub-circuit 31.

Alternatively, in the first stage, the reset control signal input to the control terminal of each reset sub-circuit 31 is the first control signal, each reset sub-circuit 31 is turned on when receiving the first control signal through its respective control terminal, the potentials of the output terminals of the selection circuit 1 are all clamped at the reference potential, and the reference potential is transmitted to the control terminal of the driving module 213 of each pixel circuit 21, so that the driving module 213 of each pixel circuit 21 is turned off or keeps in an off state.

Step S2: in the second phase of the data writing phase, each reset sub-circuit 31 is turned off, and each output terminal of the selection circuit 1 writes each data signal to each pixel circuit 21 in a time-sharing manner.

Optionally, in the second stage, the reset control signal input to the control terminal of each reset sub-circuit 31 is a second control signal, each reset sub-circuit 31 is turned off when receiving the second control signal through its respective control terminal, so as to stop resetting the corresponding pixel circuit 21, and each output terminal of the selection circuit 1 sequentially transmits each data signal to the control terminal of the driving module 213 of each pixel circuit 21, so that the driving module 213 of each pixel circuit 21 is sequentially turned on, and each data signal is sequentially written into the driving module 213 of each pixel circuit 21.

Optionally, the first control signal is a high-level signal, and the second control signal is a low-level signal; or, the first control signal is a low level signal, and the second control signal is a high level signal.

Optionally, when the transistor of each module is a P-type MOS transistor, the first control signal is a low-level signal, and the corresponding second control signal is a high-level signal; when the transistors of the modules are N-type MOS transistors, the first control signal is a high level signal, and the corresponding second control signal is a low level signal.

Referring to the schematic timing diagram of the control signals of the pixel driving device of the silicon-based light emitting unit shown in fig. 2, the pixel circuit 21 shown in fig. 4, and the pixel driving device of the silicon-based light emitting unit shown in fig. 6, taking the case that each transistor is an N-type MOS transistor as an example, the principle of the pixel driving method provided by the embodiment of the present application is specifically described as follows:

as shown in fig. 6, GATE _1 is a first row GATE signal, GATE _2 is a second row GATE signal, MUX <1> is a MUX control signal, and rst is a reset control signal of the reset circuit. The scan signal G1 and the scan signal G2 are both electrically connected to the same scan signal line (e.g., GATE _1 and GATE _ 2).

In the first phase when GATE _1 is turned on (i.e., in the t1 phase of the figure, GATE _1 is a high signal): a reset phase.

The scan signal G1 and the scan signal G2 are both high level signals, the reset control signal rst is a high level signal, each reset transistor receives a high level signal through its gate, each reset transistor is turned on, the potentials of the output terminals of the MUX circuit are all clamped at a reference potential Vref, the reference potential Vref is not necessarily 0 and may be any value (e.g., 0.5V) less than Vth (threshold voltage), so that it is ensured that the second transistor M3 (driving transistor) of the Pixel is not turned on, no reset current (reset current is 0) is generated, and the reference potential Vref is transmitted to each Pixel, since the scan signal G1 and the scan signal G2 are both high level signals, the first transistor M1 and the third transistor M2 are both turned on or kept in a conducting state, and the reference potential Vref is transmitted to the gate of the second transistor M3 (driving transistor), so that the second transistor M3 (driving transistor) of each Pixel is turned off or kept in a turning-off state.

During the second phase when GATE _1 is turned on (i.e., during the t2 phase in the figure, GATE _1 is a high signal): and a data signal writing phase.

In the figure, the stages t3, t4, \8230- +1 and tn +2 are stages for sequentially writing data (data signals) to Pixel circuits electrically connected to MUX <1>, MUX <2>, MUX < 8230- \ 8230- \\ MUX < n-1> and MUX < n >, respectively. The scanning signal G1 and the scanning signal G2 are both high-level signals, the reset control signal rst is a low-level signal, each reset transistor receives a low-level signal through a respective gate, each reset transistor is turned off to stop resetting the corresponding Pixel, each data signal is transmitted to each Pixel by each output end of the MUX circuit, because the scanning signal G1 and the scanning signal G2 are both high-level signals, the first transistor M1 and the third transistor M2 are both turned on or kept in a turned-on state, and the data signal is transmitted to a gate of the second transistor M3 (driving transistor), so that the second transistor M3 (driving transistor) of each Pixel is turned on or kept in a turned-on state, and each data signal is sequentially written into each Pixel, so that the light-emitting element (which may be an OLED) emits light.

1) By adopting the pixel driving device and the method of the silicon-based light-emitting unit provided by the embodiment of the application, through arranging the selection circuit and the reset circuit, each output end of the selection circuit is electrically connected with the corresponding pixel circuit and the corresponding reset sub-circuit, in the first stage of the data writing stage of the pixel circuit row to which the pixel circuit group belongs, each reset sub-circuit is started, and each pixel circuit is reset according to the reference potential; in the second stage of the data writing stage, all the reset sub-circuits are closed, and all the output ends of the selection circuit write all the data signals into all the pixel circuits in a time-sharing manner, so that on the basis of not increasing the speed of a front-end interface, reset current is eliminated, and power consumption is reduced. Meanwhile, the reset current is eliminated (namely the reset current is 0), power consumption and heat generation caused by the reset current are eliminated, and the problem of heat dissipation is favorably solved.

2) By adopting the pixel driving device and the method of the silicon-based light-emitting unit, the BS (substrate and source) of the switching tube of the pixel circuit is in short circuit, so that the substrate bias effect is eliminated, the display gray scale range is improved, the compensation space is increased, the compensation effect is improved, and the display effect is improved.

3) By adopting the selection circuit, the number of front-end digital-to-analog conversion circuits can be reduced, so that the area is reduced.

Those of skill in the art will understand that various operations, methods, steps in the flow, measures, schemes discussed in this application can be alternated, modified, combined, or deleted. Further, other steps, measures, or schemes in various operations, methods, or flows that have been discussed in this application can be alternated, altered, rearranged, broken down, combined, or deleted. Further, steps, measures, schemes in the prior art having various operations, methods, procedures disclosed in the present application may also be alternated, modified, rearranged, decomposed, combined, or deleted.

The terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, the meaning of "a plurality" is two or more unless otherwise specified.

It should be understood that, although the steps in the flowcharts of the figures are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and may be performed in other orders unless explicitly stated herein. Moreover, at least a portion of the steps in the flow chart of the figure may include multiple sub-steps or multiple stages, which are not necessarily performed at the same time, but may be performed at different times, which are not necessarily performed in sequence, but may be performed alternately or alternately with other steps or at least a portion of the sub-steps or stages of other steps.

The foregoing is only a few embodiments of the present application and it should be noted that those skilled in the art can make various improvements and modifications without departing from the principle of the present application, and that these improvements and modifications should also be considered as the protection scope of the present application.

Claims

1. A pixel driving device of a silicon-based light emitting unit, comprising:

a selection circuit comprising at least one output;

a pixel circuit group including at least one pixel circuit of the same pixel circuit row; the pixel circuit includes: the device comprises a first switch module, a charge storage module and a driving module; the control end of the first switch module is used for receiving scanning signals, the first end of the first switch module is electrically connected with the output end of the selection circuit, and the second end of the first switch module is electrically connected with the third end and the first node; the charge storage module is electrically connected with the first node; the control end of the driving module is electrically connected with the first node;

a reset circuit comprising at least one reset sub-circuit;

in a first stage of starting scanning signals of a pixel circuit row to which the pixel circuit group belongs, all reset sub-circuits are started, the potentials of all output ends of the selection circuit are all clamped at reference potentials, and all pixel circuits are reset simultaneously according to the reference potentials;

in a second stage of turning on the scanning signal, each reset sub-circuit is turned off, and each output end of the selection circuit writes each data signal into each pixel circuit in a time-sharing manner.

2. The pixel driving device of silicon-based light emitting unit according to claim 1,

the control end of the reset sub-circuit is used for receiving a reset control signal, the first end of the reset sub-circuit is electrically connected with the corresponding output end of the selection circuit, the first end of the reset sub-circuit is electrically connected with the corresponding pixel circuit, and the second end of the reset sub-circuit is electrically connected with a reference potential end.

3. The pixel driving device of silicon-based light emitting unit according to claim 2,

the reset sub-circuit comprises a reset transistor, and a control electrode, a first electrode and a second electrode of the reset transistor are respectively used as a control end, a first end and a second end of the reset sub-circuit.

4. The pixel driving device of the silicon-based light emitting unit according to claim 1, further comprising at least one of:

the driving current of the pixel circuit is not less than 1E-13 amperes and not more than 1E-9 amperes;

the pixel circuit is characterized in that the pixel density corresponding to each inch is not less than 8000 and not more than 10000 pixels per inch;

5. The pixel driving device of silicon-based light-emitting unit according to claim 1, further comprising:

the digital to analog conversion circuit transmits 4 megabits per second.

6. The pixel driving device of silicon-based light emitting unit according to claim 1,

the first switch module comprises a first transistor, and a control electrode, a first electrode, a second electrode and a third electrode of the first transistor are respectively used as a control end, a first end, a second end and a third end of the first switch module.

7. A display panel comprising the silicon-based light emitting cell of any one of claims 1 to 6.

8. A pixel driving method of a silicon-based light emitting unit, applied to the pixel driving apparatus of the silicon-based light emitting unit according to any one of claims 1 to 6, the pixel driving method comprising:

in the first stage of starting the scanning signal of the pixel circuit row to which the pixel circuit group belongs, all the reset sub-circuits are started, the potentials of all the output ends of the selection circuit are all clamped at the reference potential, and all the pixel circuits are reset simultaneously according to the reference potential; the pixel driving device comprises the selection circuit, the pixel circuit group and a reset circuit, wherein the selection circuit comprises at least one output end, and the pixel circuit group comprises at least one pixel circuit in the same pixel circuit row; the reset circuit comprises at least one reset sub-circuit;

9. The method as claimed in claim 8, wherein in the first phase of the turn-on of the scan signal of the pixel circuit row of the pixel circuit group, the reset sub-circuits are turned on, the potentials of the output terminals of the selection circuit are all clamped at the reference potential, and the pixel circuits are reset simultaneously according to the reference potential, comprising:

in the first stage, the reset control signal input to the control end of each reset sub-circuit is a first control signal, each reset sub-circuit is turned on when receiving the first control signal through the respective control end, the potential of each output end of the selection circuit is all clamped at a reference potential, and the reference potential is transmitted to the control end of the driving module of each pixel circuit, so that the driving module of each pixel circuit is turned off or kept in a turned-off state.

10. The method as claimed in claim 8, wherein during the second phase when the scan signal is turned on, the reset sub-circuits are turned off, and the output terminals of the selection circuit write the data signals into the pixel circuits in a time-sharing manner, comprising:

in the second stage, the reset control signal input to the control end of each reset sub-circuit is a second control signal, each reset sub-circuit is closed when receiving the second control signal through the respective control end, and each output end of the selection circuit sequentially transmits each data signal to the control end of the drive module of each pixel circuit, so that the drive module of each pixel circuit is sequentially opened, and each data signal is sequentially written into the drive module of each pixel circuit.